2134 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 40, NO. 11, NOVEMBER 1993

pA within f1 .5 V, and the forward and reverse turn-on voltages of the EB junction are 0.3 V and greater than 1.0 V at 77 K, indicating reasonable junction performance. The transistor I- V characteristics show increasing current level and current gain as the temperature decreased, which may be attributed to the reduction of the electron scatter- ing. The BSRTT’s behave as regular transistors until a large VcE bias causes the depletion of base charge. For VCE > 1.5 V and 3.0 V at 300 K and 77 K, the BSRTT’s fabricated exhibit NDR’s in the collector current with PVRs of 1.25 and 4.1 at these two temperatures. The highest differential current gain (do) measured is around 1.05 at 77 K. Obviously, further structure optimization is needed to improve the device performance. [l] G. 1. Haddad, R. K . Mains, U . K. Reddy and J . R. East, Superlat. &

Microstructure, vol. 5, no. 3, p. 437, 1989.

VB-2 Room-Temperature Operation of InGaAs- Based Hot-Electron Transistors-T. S. Moise, A. C. Seabaugh, E. A. Beam 111, Y .-C. Kao, and J. N. Randall, Central Research Laboratories, Texas Instruments Incor- porated, Dallas, TX 75265 (2 14) 995-3273.

The hot-electron transistor (HET) is an attractive alter- native for advanced circuit applications because of its po- tential for high-speed operation and low power consump- tion [ 11. In conjunction with resonant-tunneling hot- electron transistors (RHET’S), HETs are useful for pro- viding voltage gain and noise margin for room-tempera- ture logic circuit applications. Since the pioneering work of Heiblum 121, hot-electron transistors formed within the 111-V heteroepitaxy system have progressed from the orig- inal GaAs-based devices, operational at liquid helium temperatures, to the InGaAs-based heterostructures, which feature a larger energy band-offset and function at 77 K [l]. In this report, we demonstrate that 300 K op- eration of an InGaAs-based HET can be achieved by fur- ther increasing the electron injection energy in combina- tion with the use of wide-bandgap base-collector isolation barrier. We note that prior to this demonstration, the sole nonresonant-tunneling HET to show current gain at room- temperature was fabricatFd by Levi and Chiu using an AlSbAs emitter, a 100 A InAs base layer, and a GaSb collector [3].

We report the charact$ristics of a device consisting of an InAlAs emitter, a 10 A AlAs tunnel-baqier positioned at the emitter-base heterojvnction, a 400 A n+ InGaAs base region, and a 2500 A InAlGaAs collector barrier. The injected electrons are transported across the base re- gion with over 80% efficiency, as measured in a common- base configuration. The maximum common-emitter cur- rent gain in this non-optimized transistor is nearly 4 with af t of over 40 GHz and a base-collector breakdown volt- age of 1.5 V.

Since the electron injection energy of the RHET in- creases with applied base-emitter voltage, this device can be utilized to determine the optimum injection energy for

hot-electron transistor operation. Through a systematic study of RHET injector and collection properties, we now conclude that the HET can operate at room-temperature with current gain of order 100. As evidence for this con- clusion, we will present recent RHET results which ex- hibit a dc common-emitter differential current gain of greater than 100 at room-temperature. This results ex- ceeds previously reported RHET common-emitter current gains by an order of magnitude.

Further, we will show 300 K operation of a single- RHET, exclusive-NOR integrated circuit that is similar in design to the one first demonstrated at 77 K by Yoko- yama [ 5 ] . The circuit operates with a 1.8 V supply volt- age and has an output voltage swing of 500 mV. Co-in- tegration of RHETs and HETs will increase the voltage gain, noise-margin, and fan-out capabilities of this tech- nology leading to a room-temperature logic-family . [I] N. Yokoyama et a l . , in Hot Carriers in Semiconductors, Physics and

[2] M. Heiblum et al . , Phys. Rev. Lett., vol. 55, no. 20, p. 2200, 1985. [3] A. F. J . Levi et a l . , Appl. Phys. Lett., vol. 51, no. 13, p. 984, 1987. [4] A. Seabaugh et al . , Jpn. J. Appl. Phys., vol. 30, no. 5, p. 921, 1991. [5] N. Yokoyama et a l . , Jpn. J . Appl. Phys., vol. 24, no. 11, p. L853,

Applications, Ed. J . Shah San Diego: Academic, 1992, p. 443.

1985.

VB-3 Split-Gate InGaAs Quantum Wire Device Op- erated at 80 K-Kanji Yoh, Akira Nishida, and Masa- taka Inoue, Department of Electrical Engineering, Osaka Institute of Technology, Osaka 535, Japan Tel: +6-952- 3131 (ext. 3317).

We report the electrical characteristics of InAs quantum wire devices based on deep mesa-etched structures with split gate. Quantized conductance and quantized currents have been observed at 80 K for the first time.

InAs quantum-effect devices [ 11 are potentially supe- rior to the GaAs counterpart [2] in high temperature op- eration for their higher low-field mobility, higher conduc- tion band discontinuities, and higher energy separation of sublevels. However, there have only been results mea- sured at much lower temperatures than expected for sev- eral reasons [3], [4].

The heterostructure of the devices consists of 2000 A of GaAs layer grown on uncoped GaAs substrates, 1.0 pm AlSb buffer layer, 2000 A (+lo.5G%,s)Sb buffer l?yer, 70 A of AlSb layer, 150 A of InAs, 150 A of (Alo,sGao.s)Sb, and 100 A of GaSb cap layer. The in- serted 70 A of AlSb was intended to prevent leakage cur- rents through (A1Ga)Sb buffer layer which becomes ap- preciable at high temperatures under high gate bias voltages. Device fabrication has been performed by elec- tron beam lithography and wet chemical etching with phosphoric-asid-based etchant and photoresist developper as a selective etchant for antimonides. Ti/Au was used as non-alloyed ohmic metal which is directly deposited on InAs layer after selective etching of antimonides.

A clear quantized conductance steps of three to five fold multiples of ( 2 e 2 / h ) were observed at 80 K with the InAs