Program for Promoting Academic Excellence of Universities（Phase II）

Final Report

前瞻性單晶微波及毫米波積體電路(1/4)、(2/4)、(3/4)、(4/4)

Advanced MonolithicMicrowave/Millimeter-Wave

Integrated Circuits(1/4)、(2/4)、(3/4)、(4/4)

NSC 93-2752-E-002-002-PAENSC 94-2752-E-002-003-PAENSC 95-2752-E-002-003-PAENSC 96-2752-E-002-003-PAE

PI：Huei Wang

Co-PI：Huei Wang

Overall Duration: 04.2004-03.2008

NATIONAL TAIWAN UNIVERSITY (NTU)June 13,2008

Table of Contents

I. BASIC INFORMATION OF THE PROGRAM

II. LIST OF WORKS, EXPENDITURES, MANPOWER, AND MATCHING SUPPORTS

FROM THE PARTICIPATING INSTITUTES(REALITY)

III. STATISTICS ON RESEARCH OUTCOMES OF THIS PROGRAM

IV. EXECUTIVE SUMMARY ON RESEARCH OUTCOMES OF THIS PROGRAM

1. GENERAL DESCRIPTION OF THE PROGRAM

2. BREAKTHROUGHS AND MAJOR ACHIEVEMENTS

3. RESEARCH METHODS AND ACHIEVEMENTS

4. CATEGORIZED SUMMARY OF RESEARCH OUTCOMES

5. INTERNATIONAL COOPERATION ACTIVITIES

V. APPENDIX I: 1. PUBLICATIONS

2. PATENTS

3. PERSONAL ACHIEVEMENTS

4. TECHNOLOGY TRANSFERS

VI. APPENDIX II : LIST OF PUBLICATIONS IN “TOP”JOURNALS AND

CONFERENCES

VIII . APPENDIX III :SLIDES ON SCIENCE AND TECHNOLOGY BREAKTHROUGHS

IX. APPENDIX IV: SELF-ASSESSMENT

1

2

3

4

5

6

39

41

1-1～1-10

1-11

1-11

1-11

2-1

3-1

4-1 ～ 4-14

1

I. BASIC INFORMATION OF THIS SUB-PROJECT

Project Title: Advanced Monolithic Microwave/Millimeter-Wave Integrated Circuits前瞻性單晶微波及毫米波積體電路

93-2752-E-002-002-PAESerial No.: NSC 94-2752-E-002-003-PAE

95-2752-E-002-003-PAE96-2752-E-002-003-PAE

Affiliation National Taiwan University台灣大學

Name Huei Wang 王暉 Name Huei Wang 王暉

Tel: 02-23635251 ext 317 Tel: 02-23635251 ext 317

Fax: 02-23683824 Fax: 02-23683824

PrincipalInvestigator

E-mail hueiwang@ew.ee.ntu.edu.tw

ProjectCoordinator

E-mail hueiwang@ew.ee.ntu.edu.tw

Expenditures1 (in NT$1,000) Manpower2:Full time/Part time(Person-Months)

Projected Actual Projected Actual

FY2004 4,844 4,652 129 175.6

FY2005 5,828 5,828 214 243.6

FY2006 5,970 5,940 218 231.6

FY2007 6,135 5,534 206 225.6

Overall 22,753 21,954 767 876.4

Notes: 1,2 Please explain large differences between projected and actual figures.

Principal Investigator’s Signature:

2

II. LIST OF WORKS, EXPENDITURES, MANPOWER, AND MATCHING SUPPORTS FROM THE PARTICIPATING INSTITUTES

93-2752-E-002-002-PAESerial No.: NSC 94-2752-E-002-003-PAE

95-2752-E-002-003-PAE96-2752-E-002-003-PAE

Program Title: Avanced Monolithic Microwave/Millimeter-Wave Integrated Circuits前瞻性單晶微波及毫米波積體電路

Expenditures (in NT$1,000)（2004.4～2005.3） Manpower (person-month) （2004.4～2005.3）

Projects Major Tasksand Objectives Salary

Seminar/Conference-

RelatedExpenses

Project-Related

Expenses

Cost forHardware

& SoftwareOver-head Total Principal

Investigators ConsultantsResearch/TeachingPersonnel

SupportingStaff Total

2004 MMICs 1,958 643 1,712 0 339 4,652 3.6 0 165 7 175.6

2005 MMICs 2,639 894 1,629 270 396 5,828 3.6 0 228 12 243.6

2006 MMICs 2,652 870 1,677 322 419 5,940 3.6 0 216 12 231.6

2007 MMICs 2,607 800 1,171 390 566 5,534 3.6 0 210 12 225.6

SUM 9,849 2,689 5,582 886 1,702 20,708 14.4 0 819 43 876.4

3

III. STATISTICS ON RESEARCH OUTCOMES OF THIS PROJECT

LISTING TOTAL DOMESTIC INTERNATIONAL SIGNIFICANT1 CITATIONS2

JOURNALS 67 - 6 61 1.87

CONFERENCES 85 - 36 49 -PUBLISHED

ARTICLES

TECHNOLOGY REPORTS - - - - -

GRANTED 5 3 2PATENTS

PENDING 5 1 4

COPYRIGHTED

INVENTIONSITEM - - -

ITEM - - -WORKSHOPS/CONFERENCES3

PARTICIPANTS - - -

HOURS - - -TRAINING

COURSES

（WORKSHOPS PARTICIPANTS - - -

HONORS/ AWARDS4 4 2 2

KEYNOTES GIVEN BY

PIS- - -

PERSONAL

ACHIEVEMENT

SEDITOR FOR JOURNALS 1 1 -

ITEM - - -

LICENSING FEE - - -TECHNOLOGY

TRANSFERS

ROYALTY - - -

INDUSTRY

STANDARDS5ITEM - - -

ITEM - - -TECHNOLOGIC

AL SERVICES6SERVICE FEE - - -

- -

1 Indicate the number of items that are significant.The criterion for “significant” is defined by the PIs of the program. For example, it may refer to Top journals (i.e., those with impact factors in the upper 15%) in the area of research, or conferences that are very selective in accepting submittedpapers (i.e., at an acceptance rate no greater than 30%). Please specify the criteria in Appendix IV.

2 Indicate the average number of citations (= total citations/ papers in 2000.4～2008.3). The criterion for “citations” refers to citations by other research teams, i.e., exclude self-citations.

3 Refers to the workshop and conferences hosted by the program.4 Includes Laureate of Nobel Prize, Member of Academia Sinica or equivalent, fellow of major international academic societies, etc.5 Refers to industry standards approved by national or international standardization parties that are proposed by PIs of the program.6 Refers to research outcomes used to provide technological services, including research and educational programs, to other ministries of the

government or professional societies.

4

IV . EXECUTIVE SUMMARY ON RESEARCH OUTCOMES OF THIS PROGRAM

1. GENERAL DESCRIPTION OF THE PROGRAM

Microwave and Millimeter-wave (MMW) technology has been used in various civil

applications, such as cellular phones, global positioning systems (GPS), intelligent vehicular

highway systems (IVHS), direct broadcast systems (DBS), radio frequency identification (RFID),

and etc, with frequency up to 77 GHz. The MMW technology has high potential for future R&D.

There are many MMW MMIC components, including low noise amplifiers, power amplifiers,

mixers and oscillators reported in US, Japan, and European countries for various MMW

applications [1]-[5]. There have been research and development efforts devoted for MMICs in

MMW frequency range up to 100 GHz recently by our research group. The development effort

mainly utilized 0.15-m gate-length GaAs-based HEMT MMIC processes provided by TRW and

WIN Semiconductors. In this project, we tried to use more advanced technologies (GaAs-based

MHEMT or InP-based HEMT and HBT MMIC processes) to investigate the feasibility of MMICs.

The MMIC processes could be either provided by sub-project 5 or commercial available foundries

(possibly through the Chip Implement Center of Taiwan). We investigated the MMIC design and

new device modeling using the advanced MMIC processes in MMW regime. In the mean while,

we provided the MMICs for the integration of sub-project 1.

On the other hand, owing to recent advances in semiconductor technology, Si-based transistors

with fT and fmax well above 100 GHz or even higher than 200 GHz have been reported. The

capability of Si-based circuitry has extended into microwave and MMW range. Therefore,

integration of complete microwave or MMW system in a single Si substrate with baseband circuits

proposes a promising solution for low-cost and high-performance applications. Though the trend

of pushing the present Si-based RFIC (mostly below 10 GHz) toward the MMW range is clear, the

task requires extensive effort on device modeling, circuit design and post-process integration.

5

2. BREAKTHROUGHS AND MAJOR ACHIEVEMENTS

1) State-of-the-art results of the broadband amplifiers, oscillators and mixers have been

demonstrated in the millimeter-wave CMOS circuit designs. The operation frequencies of

the bulk CMOS circuits are pushed to W-band (75 ~ 110 GHz).

2) State-of-the-art results of the high-gain amplifier and the 60-GHz transmitter with integrated

antenna have been demonstrated using standard commercial bulk CMOS and SiGe BiCMOS

technologies. The three-stage LNA is design using thin-film microstrip (TFMS) line and

results in a miniature size of smaller than 0.5 mm2, with 25-dB gain at 57 GHz, which is the

highest gain ever reported for CMOS amplifiers at this frequency, and rivals those LNA

implemented in InP HEMT MMIC LNAs. The PA of transmitter features an RF output

power of greater than 15.8 dBm, which is the highest output power of PA using Si-based

transistors in V-band. The complete transmitter includes a VCO, a mixer, a PA, and an

antenna, and demonstrates an isotropic conversion gain of better than 20 dB. This transmitter

is the first attempt to integrate such a high complexity chip with antenna using Si-based IC

process in V-band.

3) The world first 60GHz six-port transceiver IC in standard-bulk 0.13m CMOS technology is

reported in this project. This chip is composed of a VCO, a modified reflection-type I/Q

modulator, a buffer amplifier (BA), a single-pole double-throw (SPDT) switch, a LNA, and a

six-port receiver. The measured results of this chip show 4.5dB conversion gain and 4Gb/s

modulation bandwidth with 97.7mW dc power consumption for a software-defined

transceiver (SDT) application.

6

3. RESEARCH METHODS AND ACHIEVEMENTS

1) System Block Diagram

Figure 1 shows the RF front-end block diagram of the RF front-end transceiver module. The

monolithic circuits of the RF front end in this module include the 60-GHz single-pole-double-throw

(SPDT) switch, low-noise amplifier (LNA), power amplifier (PA), buffer amplifier and

subharmonic mixers. The specifications of the circuits are shown in Table I.

Fig. 1. RF front-end block diagram of the RF front-end transceiver module.

Table I. Specifications of the circuits in RF front-end transceiver module.

(a) (b) (c)

7

60­GHz Buffer Amplifier

Frequency(GHz) 58 ~ 63

Gain (dB) > 15

I/O ReturnLosses (dB) > 15

P1dB (dBm) > 10

60­GHz Subharmonic Mixer(Down Conversion)

RF Frequency(GHz)

58 ~ 63

LO Frequency(GHz) 13.25 ~ 14.25

ConversionLoss (dB) < 20

RF Return Loss(dB) > 15

LO Power(dBm) < 10

4LO­to­RFIsolation (dB) > 35

(d) (e) (f)

2) GaAs Millimeter Circuits

A. Low-Noise Amplifiers:

Fig. 2 shows the schematic and chip photo of a microstrip-line amplifier using a 0.15 um GaAs

PHEMT technology. This amplifier is a four-stage, single-ended design. The devices in the first

and the second stages are 2-finger, 40-um HEMTs, and the 2-finger, 100-m transistors are used in

the third and the forth stages for the linearity concern. Source inductors are added in the first and

the second stages to improve the stability. All the bias voltages are fed through the bypass

networks of the shunt short stub. The bypass networks consist of MIM capacitors and thin-film

resistors. The layout is shown in Fig. 2(a) with a chip size of 2.6 x 1 mm2. Fig. 3 shows the

simulated and measured small-signal gain and return losses. The measured gain is better than 17

dB between 50 and 73 GHz, and the input and output return losses are better than 10 dB from 58 to

68 GHz.

8

(a)

(b)

Fig. 2. (a) Schematic and (b) layout of the microstrip-line four-stage LNA.

0 10G 20G 30G 40G 50G 60G 70G 80G-40

-30

-20

-10

0

10

20

30

40

S_p

aram

eter

s(d

B)

Frequency (GHz)

measurement S11 simualtion S11measurement S22 simualtion S22measurement S21 simualtion S21

Fig. 3. Simulated and measured small-signal gain and return losses of the microstrip-line four-stage

LNA.

B. Power Amplifier

The schematic and chip photo of the power amplifier are shown in Fig. 4. This amplifier was

fabricated by WIN 0.15 m GaAs PHEMT process with chip size of 2.5 x 1 mm2. The output

stage consists of 2 transistors in parallel with a total gate periphery of 600 m, and the transistor in

the first stage is 4 finger total 300 um. Fig. 5 illustrated the measured and simulated S-parameters

9

of the power amplifier. The amplifier demonstrates a 11-dB gain and 5-dB input/output return

losses at 60 GHz. The measured output power is 12 dBm at 60 GHz.

RES

1

2

1

2

1

2

4f300

4f300

4f300

(a) (b)

Fig. 4. (a) Schematic, and (b) chip photo of the microstrip-line two-stage power amplifier.

52 54 56 58 60 62 64 66 68 70 72 7450 76

-15

-10

-5

0

5

10

15

-20

20

freq,GHz

Simulation

Measurement

Fig. 5. Simulated and measured small-signal gain and return losses of the microstrip-line two-stage

power amplifier.

C. Switches

Switches and filters are both key components in a communication system. The former controls

the RF signal flow and determines the signal should pass by whether transmit or receive path, while

the latter filters the desired frequency range of the RF signal.

The MMIC switch in Fig. 6 is fabricated using a GaAs-based HEMT MMIC process. By adding

10

a short stub parallel to each transistor, the MMIC SPDT switch can also possesses band-pass filter

characteristic. The main idea is based on using the inductance of the short-stub transmission lines

and the capacitance of the Cds produced by the parasitic off-state FET to implement a band-pass

switch filter, since LC resonators can be used to build a microwave band-pass filter. When the gate

voltage is biased at -3V, the transistor is operating at off-state and can be viewed as one capacitance

to ground. By adding a short stub parallel to each transistor, the signal will pass through this branch

with desired frequency response. While the gate voltage is biased at 0 V, the transistor is operating

at on-state and can be viewed as a resistor, which is small enough to be considered as a short circuit.

Then series a quarter-wavelength transformer, and the impedance of this branch looking from the

input port will approximate to open, thus the input signal will be reflected. The off-state switch path

is equivalent to a band-pass filter, and that is why this SPDT switch has a band-pass frequency

response. At the on-state switch path, the added short stubs do not take any effect on the switch,

hence the circuit act as the conventional traveling-wave switches.

(a) (b)

Fig. 6 (a) Circuit schematic of the 60 GHz switchable filter, and (b) its chip photo.

Fig. 7 is the simulated and measured results of the filter-integrated switch. From the

measurement results, this circuit has an insertion loss and an isolation better than 2.2 dB and 30 dB,

respectively, from 45 GHz to 65 GHz. The lowest insertion loss with high isolation, outmatches

other SPDT switches at this frequency range. The chip size is 2 by 1 mm2.

11

0 20 40 60 80 100-40

-30

-20

-10

0

(dB

)

frequency (GHz)

measured isolationmeasured insertion losssimulated isolationsimulated insertion loss

Fig. 7 Simulation and experimental results of the filter-integrated SPDT switch

Fig. 8 shows the measured results and layout of a 60-GHz 2P4T switch using 0.15-m GaAs

PHEMT process. This switch was designed using traveling-wave concept and demonstrates a

wideband characteristic. Four identical SPST traveling-wave switch cells and four 50-ohm

impedance transformers are used to form a 2P4T switch. Each SPST switch has three transistors,

and the gate terminals of the transistors are biased through large resistors. The chip size is 2 x 1.5

mm2. From 58 to 62 GHz, the simulated insertion loss and isolation is 4.5 dB and 25 dB,

respectively.

(a) (b)

Fig. 8. (a) Simulated results, and (b) chip layout of the 60-GHz 2P4T switch.

D. Mixers

Fig. 9 shows the schematic and chip photo of the 60-GHz X4 subharmonic mixer. The circuit

12

was fabricated by 0.15-m GaAs PHMET process, and the chip size is 1 x 1 mm2. The

anti-parallel diode pair is used to produce the even-harmonic mixing signals. A

quarter-wavelength line is placed at LO port to provide RF short and LO matching. Another

reduce size short stub at LO port is used to provide open circuit at LO frequency and short circuit at

the second harmonic of LO frequency. At RF port a quarter-wavelength line is used to serve as

short circuit at the second harmonic LO frequency and open circuit at RF frequency. A reduced

size open stub at RF port is used to provide short circuit at LO frequency and open circuit at RF

frequency. A high-pass filter consists of MIM capacitors and a shunt short stub is placed at RF

port to filter out the LO and IF signal. A low-pass filter comprises of a radial stub and a series

high-impedance line was added to filter out the high frequency signal at IF port. Fig. 10 shows the

measured conversion loss versus LO power and conversion loss versus LO frequency. The

measured conversion loss is better than 20 dB for the RF frequency between 56 and 61 GHz.

RF

IF

LO

IF

(a) (b)

Fig. 9. (a) Schematic, and (b) chip photo of the 60-GHz X4 subharmonic mixer.

13

-6 -4 -2 0 2 4 6 8 10 12 14 16-70

-65

-60

-55

-50

-45

-40

-35

-30

-25

-20

-15

-10

Con

vers

ion

Loss

(dB

)

LO Power (dBm)

Sim, RF=60 GHz#2, RF=58 GHz#2, RF=60 GHz#2, RF=62 GHz#3, RF=58 GHz#3, RF=60 GHz#3, RF=62 GHz

11.50 11.75 12.00 12.25 12.50 12.75 13.00 13.25 13.50 13.75 14.00 14.25 14.50 14.75 15.00 15.25 15.50-27

-26

-25

-24

-23

-22

-21

-20

-19

-18

-17

-16

Con

vers

ion

Loss

(dB

)

LO Freq (GHz)

Sim, LO Power = 9.5 dBm#2, LO Power = 9.5 dBm#3, LO Power = 9.5 dBm

(a) (b)

Fig. 10. Measured (a) conversion loss versus LO power, and (b) conversion loss versus LO

frequency of the 60-GHz X4 subharmonic mixer.

Fig. 11 shows the schematic and layout of the broadband single-balanced mixer which was

fabricated by 0.15-um GaAs PHEMT process. This mixer consists of a modified Marchand balun

and two diodes which are 2 fingers, 15 um. A low-pass filter comprises of a small and a series

inductor was added to filter out the high frequency signal at IF port. The chip size is 0.57 x 0.52

mm2. Fig. 12 is the measured results. This mixer achieves a conversion loss of 7 to 10 dB from

46 to 78 GHz for down conversion, with LO power of 12.5 dBm and IF fixed at 1 GHz. The

isolation is greater than 20 dB from 50 to 78 GHz.

RF

IF

LO Air-bridge20 m

Gap5 m

(a) (b)

Fig. 11. (a) Schematic, and (b) chip photo of the broadband single-balanced mixer.

14

40 50 60 70 80-20

-15

-10

-5

0C

onve

rsio

nLo

ss(d

B)

LO Frequency (GHz)

SimulationMeasurement

50 60 70 80-40

-30

-20

-10

0

LO

-to-

RF

Isol

atio

n

LO Frequency (GHz)

(a) (b)

Fig. 12. (a) Simulated and measured conversion loss and (b) measured LO-to-RF isolation of the

broadband mixer for down conversion, which LO power is 12.5 dBm and IF is fixed at 1 GHz.

Taking advantage of the 3-terminal nature of the FET device, we designed an up-conversion

singly-balance resistive mixer. Fig. 13 shows the circuit schematic of the up-conversion

singly-balanced resistive mixer. Two FET devices are used; a miniature CPW balun is used to

provide the differential RF signal feeding into the drain of the devices, and the differential IF signal

is extracted at the sources of the devices. For testing purposes, the IF signal is set at 1 GHz, -10

dBm, with an external balun. Measurement results illustrated in Fig. 14 show saturation conversion

loss at about 8~10 dBm LO power, and average of 16 dB conversion loss over the V-band (50 to 75

GHz) range as shown in Fig. 8.

(a) (b)

Fig. 13. (a) Schematic and (b) layout of novel singly balanced resistive mixer.

15

Singly Balanced Mixer Power Sweep

-40

-35

-30

-25

-20

-15

-10

-25 -20 -15 -10 -5 0 5 10LO (dBm)

CL(dB)

Chip 1

Chip 2

Chip 3

Frequency Sweep

-25

-22.5

-20

-17.5

-15

-12.5

-1050 55 60 65 70 75

LO (GHz)

CL(dB)

Chip 1

Chip 2

Chip 3

(a) (b)

Fig. 14. Measurement results of singly balanced resistive mixer (a) conversion gain versus LO

power (b) conversion gain versus LO frequency.

3) Millimeter-Wave Silicon-Based Circuits

A. Amplifiers

Figure 15 shows the schematic and chip photo of the conventional distributed amplifier

fabricated by 90-nm bulk CMOS process, and the chip size is 1.2 x 0.6 mm2. The cascode cells

were used in this design to improve the gain and bandwidth. To reduce the conductive substrate

effect, the CPWs were used as the transmission lines in this circuit. The measured small-signal

parameters are shown in Fig. 16. This amplifier achieves a peak gain of 7.4 dB and presents a

3-dB bandwidth of 80 GHz.

(a) (b)

Fig. 15. (a) Schematic, and (b) chip photo of the cascode distributed amplifier.

16

Fig. 16. Measured small-signal parameters of the cascode distributed amplifier.

A broadband cascaded multi-stage distributed amplifier (CMSDA) is proposed and implemented

in 90-nm bulk CMOS technology. The schematic and chip photo of the CMSDA are shown in Fig.

17, and the chip size is 0.9 x 0.8 mm2. CMSDA consists of conventional distributed amplifier

cells in cascaded single-stage distributed amplifier (CSSDA) structure to improve the output power.

Figure 18 shows the measured small-signal parameters and power performance. The amplifier has

a gain of better than 7 dB and the 3-dB cut-off frequency is 74 GHz. The measured P1dB is better

than 10 dBm at 20 and 30 GHz, and this amplifier presents an average NF of 6.4 dB from 1 to 25

GHz.

(a) (b)

Fig. 17. (a) Schematic, and (b) chip photo of the CMSDA.

17

(a) (b)

Fig. 18. Measured (a) small-signal parameters, and (b) power performance at 20 and 30 GHz of the

CMSDA.

A miniature 58-70-GHz four-stage cascode CMOS LNA is implemented in 0.13-μm standard

MS/RF CMOS technology. In LNA design, the cascode device configuration is utilized to achieve

high gain performance. In order to obtain the maximum small signal gain from the cascode

structure, the sizes of common source (CS) and common gate (CG) NMOS transistors are

investigated and indicate that the size selection can be crucial for a high gain amplifier design.

1

2

3

1

2

3

1

2

3

1

2

3

1

2

3

1

2

3

1

2

3

1

2

3

(a) (b)

Fig. 19 (a) Circuit schematic of 58-70-GHz CMOS LNA. (b) The chip photo of 58-70-GHz

CMOS LNA with die size of 0.823mm x 0.592mm.

18

The circuit schematic diagram and the chip photo are shown in Fig. 19, which consists of four

cascode stages. All the input, output and inter-stage matching networks are conjugately matched for

maximum small signal gain. In order to overcome the lossy silicon substrate and the no backside

ground issues in the MMW RFIC designs using bulk CMOS processes, the matching networks were

implemented using the TFMS lines.

Fig. 20 plots the measured small signal gain and input/output return losses from 50 to 75 GHz.

The measured gain is higher than 13 dB from 58 to 70 GHz with a peak gain of 17 dB at 69 GHz.

The input and output return losses are better than 10 dB at 60 GHz. The input 1-dB compression

point plotted in Fig. 32 is–14.6 dBm at 67 GHz. The saturated output power is 2 dBm at 67 GHz.

55 60 65 7050 75

-25-20-15-10

-505

1015

-30

20

freq, GHz

S21

S22

S11

Input P1dB=-14.6dBm

Gain=16.62

(a) (b)

Fig. 20 (a) Measured results of S-parameters. (b) Measured input 1-dB compression point at 67

GHz.

A V-band 3-stage cascode low noise amplifier is implemented in 130-nm bulk CMOS

technology. The schematic and chip photo of the low noise amplifier are shown in Fig. 21, and the

chip size is 0.72 mm x 0.67 mm. Fig. 22 shows the measured small-signal S-parameter of the

V-band low noise amplifier. The measured gain is higher than 20 dB from 51 to 57.5 GHz with a

peak gain of 24.7 dB at 56.1GHz. The input and output return losses are better than 8 and 5dB,

respectively. and exhibits an average noise figure of 8 dB from 50 to 57 GHz, with a minimum of

7.1 dB at 56.8 GHz.

19

(a) (b)

Fig. 21. (a) Schematic, and (b) chip photo of the low noise amplifier.

40-30-25

-20-15-10-505101520Sparameters(dB)

Fig. 22. Measured small-signal parameters of the V-band low noise amplifier.

B. Mixers

A broadband microwave/millimeter-wave Gilbert-cell mixer is designed using standard 1P8M

0.13-um CMOS technology. Fig. 23 shows the schematic and chip photo of the mixer. Two RF

transformer baluns are used in RF- and LO-ports to convert single-ended signals to differential

signals. Thin film microstrip line is employed for matching networks and transformer design.

Fig. 24 shows the measured conversion gain of the mixer. This mixer has a conversion gain of

better than 0 dB from 8 to 70 GHz. Between 5 and 50 GHz, the RF- and LO-to-IF isolations are

better than 40 dB. The RF-to-LO and LO-to-RF isolations are all better than 20 dB.

20

(a) (b)

Fig. 23. (a) Schematic, and (b) chip photo of the doubly balanced Gilbert-cell mixer.

Fig. 24. The conversion gain of this millimeter-wave Gilbert-cell down-conversion mixer.

The sub-harmonically pumped technique is selected to solve the LO leakage problem in

direct-conversion system. The LO frequency, which is one-half the desired RF frequency, release

the design challenge of high-power and low phase noise LO in MMW frequency. For broadband

sub-harmonic modulator and demodulator design, the low quality factor impedance matching

network is design and analysis. In addition, a MMW four-way quadrature divider using 90°

coupler and 180° balun have been implemented in the CMOS process to provide equal amplitude

and quadrature-phases LO signals for sub-harmonically pumped modulator and demodulator.

Figs. 25 and 26. show the shematics of the modeulator and demodulator. The modulator and

demodulator are constructed with two broadband sub-harmonic Gilbert-cell mixers, 90° phase

21

shifter, and a Wilkinson divider. The schematic of the broadband sub-harmonic direct-conversion

Gilbert-cell mixer is showed bellow. The mixer consists of the several passive and active

components. The Gilbert-cell configuration is selected for its double-balanced implementation

which offers high spur suppression in a very compact die size. The main transconductor converts

baseband input signal to output current. The sub-harmonic LO switching quad consists of four

parallel connected NMOS pairs. Each transistors of the LO switching quad is turned on and off

alternatively during one period of applied LO signal, so the RF signal can be switched on every

quarter cycle of the LO signal. In order to minimize the noise of the active mixer, the bias current

of the LO switching quad should be small enough to lower the height of noise pulses. Therefore a

current bleeding circuit, which is composed of two resistors, are incorporated to bleed the drain

current flowing into main transconductors and reduce the bias current of the LO switching quad.

The bias current of the transconductor stage is determined by a current mirror source.

Fig. 27 shows the chip photo of the modulator and demodulator. In Figs. 28-29., the measured

results of the modulator exhibits 6 dB measured conversion loss from 40 to 65 GHz with good

image and twice of LO suppression. In Fig. 30., the demodulator exhibits 7 dB (to 50-Ω load)

measured conversion loss with amplitude imbalance within 1 dB from 40 to 65 GHz. In Fig. 31.,

the measured eye diagrams show the sub-harmonic modulator and demodulator MMIC feature good

modulation and demodulation quality for MMW wireless Gigabit direct-conversion applications.

LO

Wilk

inso

nD

ivid

er

90°

RF

I+ I-

Q+ Q-

Sub-harmonic

Mixer

(a) (b)

Fig. 25. (a)Block diagrams of the CMOS broadband sub-harmonic modulator and (b) schematic ofthe sub-harmonic Gilbert-cell mixer.

22

LO

Wilk

inso

nD

ivid

er90°

RF

I+ I-

Q+ Q-

Sub-harmonic

Mixer

(a) (b)

Fig. 26. (a) Block diagrams of the CMOS broadband sub-harmonic demodulator and (b) schematicof the sub-harmonic Gilbert-cell mixer.

Quadrature-PhasesLO Generator RF

LO

I+ I-

Q+ Q-

RF Balun

RF Balun

RF

90° Coupler

WilkinsonCombiner

Gilbert-cell

Gilbert-cell

RF Match

RF Match

Quadrature-PhasesLO Generator

RF

LO

I+ I-

Q+ Q-

RF Balun

RF Balun

RF

90°C

oupler

WilkinsonCombiner

Gilbert-cell

Gilbert-cell

CompensationLine

CompensationLine

(a) (b)

Fig. 27. Chip photo of the CMOS (a) sub-harmonic modulator and (b) demodulator.

59.975 59.980 59.985 59.990 59.995 60.000 60.005 60.010 60.015 60.020 60.025-70

-60

-50

-40

-30

-20

-10

0

2fLO

-2fBB

2fLO

-3fBB

2fLO

+2fBB

2fLO+3fBB

Image2f

LO

Desired

Out

putP

ower

(dB

m)

Frequency (GHz)

20 25 30 35 40 45 50 55 60 65 70-40

-30

-20

-10

0

Frequency (GHz)

LO SupressionSideband SuppressionConversion LossC

onve

rsio

nL

oss

(dB

)&Su

pres

sion

(dB

c)

Fig. 28. Measured output spectrum of the sub-harmonic IQ modulator at 60 GHz.

23

59.5 59.6 59.7 59.8 59.9 60.0 60.1 60.2 60.3 60.4 60.5-60

-55

-50

-45

-40

-35

-30

0.2-Gbps

1.0-Gbps

0.5-Gbps

Out

put

Pow

er(d

Bm

)

Frequency (GHz)

Fig. 29. Measured output spectrum of the sub-harmonic IQ modulator at 60 GHz with 0.2- , 0.5-,and 1.0-Gbps data rates in PRBS.

35 40 45 50 55 60 65 70-30

-25

-20

-15

-10

-5

0

Frequency (GHz)

Q-Q+I-I+

Con

vers

ion

Los

s(d

B)

-0.5

-0.4

-0.3

-0.2

-0.1

0.0

0.1

0.2

0.3

0.4

0.5

0 Time 200nS

Q-Q+I-I+

Bas

eban

dO

utpu

tWav

efor

m(V

)

Fig. 30. Measured conversion loss and baseband time-domain quadrature signals.

Fig. 31. Measured eye diagram of the 0.5-Gb/s and 1-Gb/s PRBS for the sub-harmonic demodulatorat 44 GHz.

Fig. 32illustrates circuit schematic and the chip photo of the sub-harmonic mixer. It is formed

by a sub-harmonic mixer section and a three-stage cascode amplifier section. The mixer section has

24

only four devices to provide signal mixing. The device sizes of these four transistors are

36-fingers NMOS device with finger width of 2 μm. All the bias points are in saturation region.

3

IF

LO

RFAmp

M3 M4

M1M2

Mixer

Amp

(a) (b)

Fig. 32. (a) Schematic, and (b) chip photo of the singly balanced up-conversion mixer.

The measured conversion gain swept over LO power saturates at LO power of 5 dBm at IF

frequency of 4 GHz with 60 GHz RF frequency. Consequently, 5-dBm LO driving power is used to

drive this mixer over the entire RF-frequency range. Fig. 33(a) shows the measured and simulated

conversion gains from 20 to 36 GHz LO frequencies with IF frequency of 4 GHz. It has a

measured conversion gain of better than 5 dB from 58 to 66 GHz RF frequencies, but differs from

simulated results due to the inaccuracy of the device model. Fig. 33(b) shows the simulated and

measured conversion gain swept IF frequency from 1 to 10 GHz with LO frequency of 28 GHz.

From 2.5 to 5.5 GHz IF frequencies, the measured conversion gain is 2-5 dB.

25

20 22 24 26 28 30 32 34 36-60

-50

-40

-30

-20

-10

0

10C

onve

rsio

nG

ain

(dB

)

LO Frequency (GHz)

Conversion gainSimulationMeasurement

0 1 2 3 4 5 6 7 8 9 10-50

-40

-30

-20

-10

0

10

Con

vers

ion

Gai

n(d

B)

IF Frequency (GHz)

Conversion gainSimulation Measurement

(a) (b)

Fig. 33. (a) Simulated and measured conversion gain of the up-conversion mixer swept over LOfrequency, (b) Simulated and measured conversion gain of the up-conversion mixer swept over IFfrequency.

C. Transceivers

The world first 60 GHz SiGe HBT transmitter IC with integrated antenna in standard-bulk

0.18-m SiGe BiCMOS technology is reported in this paper. This chip is composed of a VCO, a

sub-harmonic mixer (SH mixer), a PA, and a tapered-slot antenna, all with differential designs. Fig.

34 shows the schematic and chip photo of the transmitter, the chip size is 1.3 x 0.8 mm2. Fig. 35

shows the measurement results. The measured results show 15.8 dBm output power and 20.2 dB

conversion gain with 281 mW dc power consumption.

(a)

26

VCO +Buffer Stages

Mixer Power Amplifier Antenna

(b)

Fig. 34. (a) Schematic, and (b) chip photo of the 60 GHz transmitter.

(a) (b)

Fig. 35. Measured (a) output frequency versus control voltage from 0.6 to 1.6 V of the 60 GHz

SiGe HBT transmitter; (b) S-parameters of the single-ended PA test circuit.

The world first 60-GHz six-port transceiver IC in standard-bulk 0.13m CMOS technology is

developed. Fig. 36 illustrates the system block diagram and the chip photo of the transceiver. This

chip is composed of a VCO, a modified reflection-type I/Q modulator, a buffer amplifier (BA), a

single-pole double-throw (SPDT) switch, a LNA, and a six-port receiver. Fig. 37 is the measured

results, which shows 4.5 dB conversion gain and 4Gb/s modulation bandwidth with 97.7mW dc

power consumption for a software-defined transceiver (SDT) application.

27

(a) (b)

Fig. 36. (a) System block diagram, and (b) chip photo of the 60 GHz transmitter.

Fig. 37. Measured input and output of the 60 GHz transmitter.

4) Frequency Synthesizer

In the design of the 60-GHz front-end transceiver, the LO signal is provided by a 15-GHz signal

source with frequency multipliers. Hence, effort has been made to develop a 15-GHz integer-N

frequency synthesizer using a standard CMOS process. Fig. 38 shows the design specifications

and the block diagram of the synthesizer which is composed of a VCO, frequency dividers, a

phase/frequency detector (PFD), a charge pump and a low-pass filter.

28

fosc 13-15 GHz

fref 25 MHz

loop BW 500 kHz

phase margin 60

freq. division 520-600

Divider/260 ~/300

PFDCharge Pump

Output BufferPAD

÷2

VCOLoop FilterfREF

Modulus Control

Differential Control

Divider/260 ~/300

PFDCharge Pump

Output BufferPAD

÷2

VCOLoop FilterfREF

Modulus Control

Differential Control

(a) (b)

Fig. 38. The specifications and block diagram of the 15-GHz frequency synthesizer.

For circuit implementations, a differential Colpitts oscillator is employed to realize the VCO as

shown in Fig. 39 (a). In order to minimize the phase noise, PMOS transistors are used as the

active devices which provide the required negative resistance to compensate for the losses for a

sustained oscillation. A divide-by-two frequency divider followed by a prescaler provides the

frequency division which generates a low-frequency output to lock with the 25-MHz reference

frequency. Fig. 39(b) shows the differential charge pump in this design. Due to the differential

operation of the circuit, good noise tolerance can be achieved at the cost of higher circuit

complexity and power dissipation.

(a) (b)

Fig. 39. (a) The differential Colpitts VCO, (b) the differential charge pump.

The 15-GHz integer-N frequency synthesizer is designed and implemented in a 0.18-m CMOS

process. Fig. 40 shows the die photograph of the fabricated circuit with chip area of 0.98 x 0.98

29

mm2. The frequency tuning characteristics and the output spectrum of the differential Colpitts

VCO are shown in Fig. 41(a) and (b), respectively, exhibiting a frequency tuning range of 13.5%

and a phase noise of 110.7 dBc/Hz at 1-MHz offset. The output spectrum of the frequency

synthesizer under locked condition is shown Fig. 42.

Fig. 40. The die photo of the fabricated frequency synthesizer.

14.5

15

15.5

16

16.5

17

17.5

0 0.5 1 1.5 2

Vctrl (Volts)

Fre

q(G

Hz)

(a) (b)

Fig. 41. (a) Frequency tuning characteristics, and (b) output spectrum of the VCO.

(a) (b)

Fig. 42. The output spectrum of the frequency synthesizer (a) 14.70 GHz and (b) 15.78 GHz.

30

The fast-growing market in personal wireless communications has motivated the development of

fully integrated transceivers using a cost-efficient CMOS process. As one of the most important

building blocks to provide a programmable carrier frequency for signal transmitting and receiving,

the frequency synthesizers have been successfully fabricated in deep-submicron CMOS

technologies for applications at multi-gigahertz frequencies. With the limitations imposed on the

cut-off frequency of the transistors, it is still a great design challenge to implement CMOS

synthesizers operating at frequencies beyond 10 GHz.

For phase-locked loop (PLL)-based frequency synthesizers, the only circuit modules operating at

the carrier frequency are the voltage-controlled oscillator (VCO) and the prescaler. By employing

on-chip LC-tanks for the circuit implementations, CMOS VCOs can be realized at very high

frequencies. Therefore, the prescalers, especially for the first divider stage, are generally considered

the speed bottleneck in CMOS frequency synthesizers. In order to achieve the required high-speed

operations, a divide-by-two circuit is widely used as the input stage followed by a dual-modulus

divider. Though the speed limitations can be effectively alleviated, undesirable spur sidebands

appear at an offset frequency apart from the carrier by half of the channel spacing. Alternatively,

dual-modulus phase-switching prescalers are proposed to substitute the input programmable divider,

presenting a promising solution to high-frequency synthesizers. However, the potential output

glitches associated with the finite transition time and inaccurate timing control of the logic gates

may result in miscount in the following divider stages.

In order to overcome the limitations of the phase-switching prescaler, a novel switching

algorithm is presented in this work. The proposed phase-switching mechanism is shown in Fig. 43.

With reversed switching orders between the eight 45°-spaced signals generated by the

divide-by-eight circuit, the timing constraint of the prescaler is thus relaxed for glitch-free

operations at higher frequencies. In addition, a triple-modulus topology is also employed to provide

a wide division ratio and an enhanced frequency covering range. Fig. 44 shows the Circuit

31

implementation of the phase-switching prescaler. The proposed prescaler is implemented in a

0.18-um CMOS process, demonstrating a maximum operating frequency of 16 GHz without

additional peaking inductors for a compact chip size. Fig. 45 shows the simulation results of the

prescaler circuit. Based on the high-speed prescaler, a fully integrated integer-N frequency

synthesizer is realized. Fig. 46(a) and (b) show the circuit schematic and chip photo of the

frequency synthesizer, respectively. The measurement results of the frequency synthesizer is shown

in Fig. 47. The synthesizer operates at an output frequency from 13.9 to 15.6 GHz, making it very

attractive for wideband applications in Ku-band. At an output frequency of 14.4 GHz, the measured

sideband power and phase noise at 1-MHz offset are -60 dBc and -103.8 dBc/Hz, respectively. The

fabricated circuit occupies a chip area of 1 mm2 and consumes a dc power of 70 mW from a 1.8-V

supply voltage.

Fig. 43. The proposed phase-switching mechanism.

Fig. 44. Circuit implementation of the phase-switching prescaler

32

Fig. 45. Simulation results of the phase-switching prescaler

Buffer

VCOPFD&CP

DividerBuffer

VCOPFD&CP

Divider

(a) (b)

Fig. 46. The proposed frequency synthesizer (a) schematic (b) chip photo

-25

-15

-5

5

15

7 9 11 13 15 17

Frequency [GHz]

-25

-15

-5

5

15

7 9 11 13 15 17

Frequency [GHz]

33

200 KHzLoop Bandwidth

-103.8 dBc/Hz @ 15 GHzPhase noise @ 1MHz

15 GHz Frequency Synthesizer

400 m x 100 mChip Area (active)

Integer-NArchitecture

6/7/8Divided Ratio

40 mW @ 1.8 VPower Dissipations

Triple-Modulus Phase-Switching Prescaler

7.1 GHzLocking Range

1000 m x 1000 mChip-size

70 mW @ 1.8 VPower Consumptions

< -60 dBcReference Spur

13.9 to 15.6 GHzFrequency

8.9 to 16 GHzFrequency

TSMC 0.18- m CMOSTechnology

200 KHzLoop Bandwidth

-103.8 dBc/Hz @ 15 GHzPhase noise @ 1MHz

15 GHz Frequency Synthesizer

400 m x 100 mChip Area (active)

Integer-NArchitecture

6/7/8Divided Ratio

40 mW @ 1.8 VPower Dissipations

Triple-Modulus Phase-Switching Prescaler

7.1 GHzLocking Range

1000 m x 1000 mChip-size

70 mW @ 1.8 VPower Consumptions

< -60 dBcReference Spur

13.9 to 15.6 GHzFrequency

8.9 to 16 GHzFrequency

TSMC 0.18- m CMOSTechnology

200 KHzLoop Bandwidth

-103.8 dBc/Hz @ 15 GHzPhase noise @ 1MHz

15 GHz Frequency Synthesizer

400 m x 100 mChip Area (active)

Integer-NArchitecture

6/7/8Divided Ratio

40 mW @ 1.8 VPower Dissipations

Triple-Modulus Phase-Switching Prescaler

7.1 GHzLocking Range

1000 m x 1000 mChip-size

70 mW @ 1.8 VPower Consumptions

< -60 dBcReference Spur

13.9 to 15.6 GHzFrequency

8.9 to 16 GHzFrequency

TSMC 0.18- m CMOSTechnology

200 KHzLoop Bandwidth

-103.8 dBc/Hz @ 15 GHzPhase noise @ 1MHz

15 GHz Frequency Synthesizer

400 m x 100 mChip Area (active)

Integer-NArchitecture

6/7/8Divided Ratio

40 mW @ 1.8 VPower Dissipations

Triple-Modulus Phase-Switching Prescaler

7.1 GHzLocking Range

1000 m x 1000 mChip-size

70 mW @ 1.8 VPower Consumptions

< -60 dBcReference Spur

13.9 to 15.6 GHzFrequency

8.9 to 16 GHzFrequency

TSMC 0.18- m CMOSTechnology

Fig. 47. Experimental results of the frequency synthesizer

5) Micromachined RFICs by CMOS Compatible Deep Trench Technology

A. Inductors

Fig. 48(a) shows the layouts of the 2.5-turn inductors with PGS (PGS IND) and without PGS

(STD IND) and Fig. 48 (b) is the backside photo of the chips, where the sidewalls of substrate are

sharp and the front-side pattern can be seen clearly. Fig. 48(c) shows the inductance and quality

factor of these inductors. An increase in Qmax (from 10.7 at 4.7 GHz to 51.2 at 14.9 GHz ), and an

increase in the fSR (from 16.5 to 20.15 GHz) were achieved for the STD IND after ICP dry etching.

PGS increases the Qmax of STD IND from 10.7(at 4.7 GHz) to 12.69(at 5.1 GHz) but with a much

lower degree compared to the ICP etching. Even compared at 5GHz, the Q (14.23) of ICP IND is

higher than that (12.37) of PGS IND. Note that the Q and Leff values for PGS IND and PGS-ICP

IND are almost the same. This is reasonable since a good PGS screens the substrate effects, so

further ICP etching will not affect Qmax and fSR much.

34

(a) (b) (c)

Fig. 48 (a) Layout (b) backside chip photo (c) inductance and Q

B. 5.15-5.825-GHz LNA

A 5.15-5.825 GHz CMOS LNA with schematics is shown in Fig. 49. The Measured S parameters

and noise figure are shown in Fig. 49 and Fig. 50. The S11 is blue shifted due to the reduction of

parasitic capacitance after ICP and S21 is increased by 2 dB from 21dB to 23dB. In Fig. 51, clearly

the reduction of NF can be achieved by ICP etching. The ICP LNA shows a relatively broad-band

low-NF characteristics over the band of interest with a minimum NF as low as 1.78dB at 5.4GHz.

Fig. 49 Schematic of LNA

35

Fig. 50. Measured S parameter of the LNA.

Fig. 51. Measured NF of the LNA.

C. 4-GHz VCO.

Fig. 25 shows the schematic of the 4-GHz CMOS LC VCO. Fig. 26 shows that the phase noise

can be suppressed by 3dB after backside ICP etching.

0 .2 um / 210 um

0.57nH

1 um / 240 um

(a) (b)

Fig. 52 (a) Circuit schematic of the 4GHz CMOS LC VCO. (b) The phase noise can be

suppressed by 3dB after backside ICP etching.

36

D. 1-12.6-GHz DA

Fig. 53 shows the schematic of the designed 1-12.6-GHz CMOS DA. Fig. 54 shows the measured

S-parameters and noise figure of the DA before and after etching. A 1.06 dB improvement in peak

S21 (from 9.7 to 10.76 dB) is achieved at 5.8 GHz and a 0.87-dB NF reduction from 5.51 to 4.64 dB

at 5.8 GHz. A significant improvement of noise figure is observed in 3-8 GHz. However, the

mismatch of ICP inductors makes noise figure degrade at higher frequency above 8 GHz, which

implies in a wide band amplifier, the performance should be optimized based on the ICP inductors

instead of the standard inductors.

Fig. 53 Circuit schematic of DA

Fig. 54. Measured S parameters and noise figure of DA

37

We also have studied the thin substrate effects in CMOS MMICs. The processing steps of our

backside inductively-coupled-plasma (ICP) deep trench technology shown in Fig. 55 are

described as follows. First, the front-side of the finished die was attached to a glass with adhesive

followed by mechanical lapping, which thinned the silicon substrate down to about 100 um. After

standard photolithography on the backside of the die, the ICP dry etching was used to remove the

silicon underneath the inductors. Finally, the adhesive and photoresist covering the front-side and

backside of the die, respectively, were removed for test purpose.

Fig. 55 Process steps of the backside inductively-coupled-plasma (ICP) deep trench etching

technology.

Fig. 56(a) shows the schematic diagram of the 4-GHz CMOS LC VCO. The VCO can operate

from 3.9 to 4.2 GHz as shown in Fig. 56(b). Fig. 56(c) shows that the phase noise can be

suppressed by 3 dB after backside ICP dry etching.

(a) (b) (c)Fig. 56 (a) The schematic, (b) the measured tuning range, and (c) the measured phase noise of the

4-GHz CMOS LC VCO.

38

This CMOS LC VCO demonstrates a DC power of 7 mW, phase noise at 1 MHz of -122.94

dBc/Hz, and FOM of -186.9 dBc/Hz. The “FOM” means the widely accepted figure-of-merit

defined as follows.

)(log102

fLPff

FOMDC

o

(dBc/Hz)

where of means carrier frequency, f means offset frequency, and )( fL means phase noise.

According to table I, the FOM of our VCO after ICP dry etching is the best among the 4-6 GHz

CMOS LC VCO with a practical tuning range ( > ~ 5 %).

6) Module Assembly

Fig. 57 shows the module assembly diagram of the 60 GHz transmitter and receiver module.

The receiver module consists of two low noise amplifiers, two band pass filters, a mixer, and a

power amplifier chip. Two power amplifier, a mixer, two band pass filter, a buffer amplifier chips

are assembled in the transmitter module. Fig. 58 shows the measured results of the receiver and

transmitter module. The receiver and transmitter module achieve a conversion gain of 20 dB and

20.4 dB, respectively.

RF In

LO In

LNA LNABPF BPF PAMIXER

(a)

PA BABPF BPF PAMIXER

RF Out

IF In

LO In

(b)

Fig. 57. Module assembly diagram of the 60 GHz (a) receiver and (b) transmitter.

39

FrequencyConversio

nLoss(dB)

-20-100575959GHz12.7dB 13-15-10-50Conversio

nGain(dB)

(a) (b)Fig. 58. Measured conversion gain of the (a) receiver and (b) transmitter module.

7) Conclusions

In the first year, the link budget of the 60-GHz transceiver was estimated, and the specifications

of the RF front-end components are determined. In the past three years, we designed both

GaAs-based circuits and Silicon-based circuits including low noise amplifiers, power amplifiers,

mixers and switches for the 60-GHz transceiver, some of the components are state-of-the-art results.

We also integrated two complete 60-GHz systems in single Silicon-based chip and the two chips are

the first highly integrated systems in SiGe and CMOS in the world. The SiGe transceiver and the

0.13um CMOS transceiver are both accepted by the top conference (ISSCC). For the frequency

synthesizer, several frequency synthesizer are designed and verified for the 60 GHz transceiver.

The inductors, LNA, VCO and DA using micromachined RFICs by CMOS compatible deep trench

technology are develops. With this post process, RF performances are improved.

Finally, the transceiver module for the 60-GHz system are assembled, the tested results shows

that both transmitter and receiver demonstrated 20 dB conversion gain.

3. CATEGORIZED SUMMARY OF RESEARCH OUTCOMES.

1) State-of-the-art results of the broadband amplifiers, oscillators and mixers have been

demonstrated in the millimeter-wave CMOS circuit designs. The operation frequencies of the

40

bulk CMOS circuits are pushed to W-band (75 ~ 110 GHz).

2) High-performance MHMET devices and modeling technologies have been developed. MHEMT

devices with low noise, high linearity and high fmax have been demonstrated. The developed

MHEMT device demonstrates a record fmax as high as 300 GHz. And this technology is an

indispensable basis for the future 60 GHz MMIC design.

3) 60 and 5-GHz RF building blocks using advanced synthetic waveguides for making

miniaturized RF SOC have been implemented mainly by CMOS technology.

4) State-of-the-art results of the broadband amplifiers, VCOs and mixers have been demonstrated

on the millimeter-wave CMOS circuit designs. The operation frequencies of the bulk CMOS

circuits are pushed to W-band.

5) A number of 60-GHz front-end RF components, including low-noise amplifier (LNA), mixer,

oscillator, frequecy systhesizer, and switch have been fabricated successfully using 0.15-um

GaAs-based HEMT MMIC, 2um GaInP/GaAs HBT MMIC and Si based CMOS technology.

The measurement results of these MMIC chips could meet the circuit specifications of the

60-GHz system.

6) The front-end transmitter and receiver modules of the 60 GHz system have been assembled and

tested successfully. The modules are also evaluated with the digital modulation signal, and the

measured results meet the system requirement.

7) State-of-the-art results of the 60-GHz amplifiers and the fully integrated transmitter with an

antenna have been demonstrated on the commercial standard bulk CMOS and SiGe

technologies, respectively. From the experimental results, the operation frequencies of the

Si-based circuits are greatly potential to push to D-band.

8) A 3D transformer balun has been designed based on the theory of tandem couplers using five

layers in LTCC process to reduce the size. The balun size is 0.38 x 1.58 x 0.49 mm3 with its top

plate area only 25% of the planar Marchand balun at the same frequency range using the same

process.

41

4. INTERNATIONAL COOPERATION ACTIVITIES

We have quite a few international collaboration activities from the past few years to present.

We have supported the component development for a number of international radio telescope

systems: 1) HIFI (Heterodyne Instrument for FIRST which stands for Far Infrared and

Sub-millimeter-wave Telescope, now called Hershel Space Observatory, funded by European Space

Agency) for the W-band power amplifier in the local oscillator (work with Jet Propulsion

Laboratory, or JPL of USA) and IF low noise amplifier (work with Space Research Organization,

Netherlands, or SRON); 2) ALMA telescope system for the W-band power amplifier in the local

oscillator (work with JPL and National Radio Astronomy Observatory, or NRAO of USA). We

also supported the Array of Microwave Background Anisotropy (AMiBA) radio telescope

(constructed by ASIAA and Dept. of Physics of NTU) for the receiver component. The AMiBA

project itself is an international program for which a number of international partners have involved,

including Australia Telescope National Facility (ATNF), JPL, and University of Hawaii of USA.

The ASIAA recently started to work on ALMA telescope system Band-1 and requested our help to

develop Ka-band receiver components

We have also collaborated with IMEC of Belgium in the 45-nm CMOS millimeter-wave IC

development. We have supported the design effort for the 100-GHz transceiver components using

their most advanced 45-nm CMOS process. The collaboration project is still on-going toward

2008.

Another international collaboration activity is to develop 60-GHz power amplifier together

with iHP of German in 2006. We have designed a series of power devices at 60 GHz using iHP’s

0.25-m SiGe HBT process.

1-1

V. APPENDIX I：

1. Publication list

A1. Journal (Significant)

[1] Hong-Yeh Chang, Tian-Wei Huang, Huei Wang, Yu-Chi Wang, Pane-Chane Chao andChung-Hsu Chen, "Broadband HBT BPSK and IQ modulator MMICs and millimeter-wavevector signal characterization," IEEE Trans. on Microwave Theory and Tech, vol. 52, no. 3, pp.908-919, March 2004. (NSC 89-2213-E-002-178, NSC 89-2219-E-002-042 andME-89-E-FA06-2-4-6)

[2] Yu-Lung Tang, Po-Yu Chen, and Huei Wang, “A broadband PHEMT MMIC distributeddoubler using high-pass drain line topology," IEEE Microwave and Wireless Component Letters,vol. 14, no. 5, pp. 201-203, May 2004. (ME 89-N-FA01-1-1, ME 89-E-FA06-2-4, NSC90-2219-E-002-007, and NSC 89-2213-E-002-178)

[3] Po-Yu Chen, Tian-Wei Huang, Huei Wang, Yu-Chi Wang, Pane-Chane Chao and Chung-HsuChen, "K-and HBT and HEMT monolithic active phase shifters using vector sum method,"IEEE Trans. on Microwave Theory and Tech., vol. 52, no. 5, pp. 1414-1424, May 2004. (NSC89-2213-E-002-178, NSC 89-2219-E-002-042 and ME-89-E-FA06-2-4-6)

[4] Kun-You Lin, Wen-Hua Tu, Ping-Yu Chen, Hong-Yeh Chang, Huei Wang, and Ruey-Beei Wu,"Millimeter-wave MMIC passive HEMT switches using traveling-wave concept," IEEE Trans.on Microwave Theory and Tech, vol. 52, no. 8, part 1, pp. 1798-1808, Aug. 2004. (NSC89-2213-E-002-178, NSC 89-2219-E-002-042 and ME-89-E-FA06-2-4-6)

[5] Yuh-King Hwang, Huei Wang, and Tah-Hsiung Chu, "A W-band subharmonically pumpedmonolithic GaAs-based HEMT gate mixer," IEEE Microwave and Wireless Component Letters,vol. 14, no. 7, pp. 313-315, July 2004. (ME-89-N-FA01-4-1, NSC 92-2213-E-002-71)

[6] Ming-Da Tsai and Huei Wang, “A 0.3-25-GHz ultra-wideband mixer using commercial0.18-µm CMOS technology," IEEE Microwave and Wireless Component Letters, vol. 14, no.11, pp. 522-524, Nov. 2004. (ME 89-N-FA01-1-1, ME 89-E-FA06-2-4, NSC90-2219-E-002-007, and NSC 89-2213-E-002-178)

[7] Ming-Da Tsai, Kuo-Liang Deng, Huei Wang, Chun-Hung Chen, Chih-Sheng Chang,and John G.J. Chern, “A miniature, 25-GHz 9-dB CMOS cascaded single-stage distributed amplifier," IEEEMicrowave and Wireless Component Letters, vol. 14, no. 12, pp. 554-556, Dec. 2004. (ME89-N-FA01-1-1, ME 89-E-FA06-2-4, NSC 90-2219-E-002-007, and NSC 89-2213-E-002-178)

[8] Yu-Tso Lin and, Shey-Shi Lu, “A 2.4/3.5/4.9/5.2/5.7 GHz Concurrent Multiband Low NoiseAmplifier Using InGaP/GaAs HBT Technology,” IEEE Microwave and Wireless Components Letters, vol.14, no.10, pp. 463-465, Oct. 2004. (NSC 93-2752-E-002-002-PAE)

[9] Ren-Chieh Liu, Chin-Shen Lin, Kuo-Liang Deng, and Huei Wang, “Design and analysis of DC-to-14-GHz and 22-GHz CMOS cascode distributed amplifiers,” IEEE Journal of Solid State Circuits, vol. 39, no. 8, pp. 1370-1374, Aug. 2004. (NSC 89-2213-E-002-178, NSC89-2219-E-002-042 and ME-89-E-FA06-2-4-6)

[10] Yu-Che Yang, Shih-An Yu, Yu-Hsuan Liu, Tao Wang and Shey-Shi Lu, “A Quantization Noise Suppression Technique for ΔΣ Fractional-N Frequency Synthesizers,” IEEE Journal of Solid-State Circuits 2004.

[11] Ming-Da Tsai and Huei Wang, "Broadband MMICs based on modified loss-compensationmethod using 0.35-um SiGe BiCMOS technology," IEEE Trans. on Microwave Theory andTech., vol. 53, no. 2, pp. 496-505, Feb. 2005.

[12] Pei-Si Wu, Chi-Hsuieh Wang, Tian-Wei Huang, and Huei Wang, "Compact and broadbandmillimeter-wave monolithic transformer balanced mixers," IEEE Trans. on Microwave Theoryand Tech., vol. 53, no. 10, pp. 3106-3114, Oct., 2005.

[13] Ming-Fong Lei and Huei Wang, "An analysis of miniaturized dual mode bandpass filter

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structure using shunt capacitance perturbation," IEEE Trans. on Microwave Theory and Tech.,vol. 53, no. 3, pp. 861-867, March, 2005. (NSC 89-2213-E-002-178, NSC 89-2219-E-002-042and ME-89-E-FA06-2-4-6).

[14] H. W. Chiu, S. S. Lu and Y. S. Lin “A 2.17 dB NF, 5 GHz Band Monolithic CMOS LNA with 10 mW DC Power Consumption,” IEEE Tran. on Microwave Theory and Technique, vol.53, no.3,pp.813-824, Mar. 2005.

[15] Kang-Wei Fan, Ching-Chih Weng, Zou-Min Tsai, Huei Wang and Shyh-Kang Jeng, “K-BandMMIC active band-pass filters," IEEE Microwave and Wireless Component Letters, vol. 15, no.1, pp. 19-21, Jan. 2005. (NSC 90-2219-E-002-007, and NSC 89-2213-E-002-178)

[16] Ming-Da Tsai, Yi-Hsien Cho, and Huei Wang, “A 5-GHz low phase noise differential ColpittsCMOS VCO," IEEE Microwave and Wireless Component Letters, vol. 15, no. 5, pp. 327-329,May 2005. (NSC 90-2219-E-002-007, and NSC 89-2213-E-002-178)

[17] Shih-Chieh Shin, Ming-Da Tsai, Ren-Chieh Liu, Kun-You Lin, and Huei Wang, “A 24-GHz3.9-dB NF low-noise amplifier using 0.18 um CMOS technology," IEEE Microwave andWireless Component Letters, vol. 15, no. 7, pp. 448-450, July 2005.

[18] Hong-Yeh Chang, Jeng-Han Tsai, Tian-Wei Huang, Huei Wang, Yongxiang Xia, and YonghuiShu, “A W-band high power predistorted direct-conversion digital modulator for transmitterapplications," IEEE Microwave and Wireless Component Letters, vol. 15, no. 9, pp. 600-602,Sept. 2005.

[19] L.-H. Lu, Y.-T. Liao and C.-R. Wu, “A miniaturized Wilkinson power divider with CMOS active inductors,” IEEE Microwave and Wireless Components Letters, vol. 15, no. 11, pp. 775-777, Nov. 2005.

[20] L.-H. Lu, T.-Y. Chen and Y.-J. Lin, “A 32-GHz Non-Uniform Distributed Amplifier in 0.18-umCMOS,” IEEE Microwave and Wireless Components Letters, vol. 15, no. 11, pp. 745-747, Nov.2005.

[21] L.-H. Lu and Y.-T. Liao, “A 4-GHz phase shifter MMIC in 0.18-um CMOS,” IEEE Microwaveand Wireless Components Letters, vol. 15, no. 10, pp. 694-696, Oct. 2005.

[22] L.-H. Lu, H.-H. Hsieh and Y.-S. Wang, “A compact 2.4/5.2-GHz CMOS dual-band low-noiseamplifier,” IEEE Microwave and Wireless Components Letters, vol. 15, no. 10, pp. 685-687,Oct. 2005.

[23] L.-H. Lu and J.-C. Chien, “A wide-band CMOS injection-locked ring oscillator,” IEEE Microwave and Wireless Components Letters, vol. 15, no. 10, pp. 676-678, Oct. 2005.

[24] H. –C. Chen, and S. S. Lu, et al “A low-power low-phase-noise LC-VCO with MEMS Cuinductors,” IEEE Microwave and Wireless Components Letters, vol.15, no.6, pp.434-436, June2005.

[25] Y.-S. Lin and S.-S. Lu, “An Analysis of Base Bias Current Effect on SiGe HBT,” IEEE Trans. on Electron Devices, vol.52, no.1, pp.132-136, Jan. 2005.

[26] Hong-Yeh Chang, Pei-Si Wu, Tian-Wei Huang, Huei Wang, Chung-Long Chang, and JohnChern, "Design and analysis of CMOS broadband compact high-linearity modulators forGigabit microwave/millimeter-wave applications," IEEE Trans. on Microwave Theory andTech, vol. 54, no. 1, pp. 20-30, Jan. 2006.

[27] To-Po Wang, Chia-Chi Chang, Ren-Chieh Liu, Ming-Da Tsai, Ying-Tang Chang, Liang-HungLu, and Huei Wang, "A low power self-oscillating mixer in 0.18-um CMOS technology," IEEETrans. on Microwave Theory and Tech, vol. 54, no. 1, pp. 88-95, Jan. 2006.

[28] Mei-Chao Yeh, Zuo-Min Tsai, Ren-Chieh Liu, Kun-You Lin, Ying-Tang Chang, and HueiWang, "Design and analysis for a miniature CMOS SPDT switch using body-floating techniqueto improve power performance," IEEE Trans. on Microwave Theory and Tech, vol. 54, no. 1, pp.31-39, Jan. 2006.

[29] Pei-Si Wu, Chi-Hsueh Wang, Tian-Wei Huang, and Huei Wang, "New miniature 15-20-GHzcontinuous phase/amplitude control MMICs using 0.18-um CMOS technology," IEEE Trans. onMicrowave Theory and Tech, vol. 54, no. 1, pp. 10-19, Jan. 2006.

[30] Jeng-Han Tsai, Hong-Yeh Chang, Pei-Si Wu, Yi-Lin Lee, Tian-Wei Huang, and Huei Wang,

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"Design and analysis of a 44-GHz MMIC low-loss built-in linearizer for high-linearity mediumpower amplifier,” IEEE Trans. on Microwave Theory and Tech., vol. 54, no. 6, pp. 2487-2496,June 2006.

[31] Kuo-Jung Sun, Zuo-Min Tsai, Kun-You Lin, and Huei Wang, "A noise optimization fomulationfor CMOS low-noise amplifiers with on-chip low-Q inductors,” IEEE Trans. on Microwave Theory and Tech., vol. 54, no. 4, part 1, pp. 1554-1560, April 2006.

[32] Zuo-Min Tsai, Kuo-Jung Sun, George D. Vendelin, and Huei Wang, "A new feedback methodfor power amplifier with unilateralization and improved output return loss,” IEEE Trans. on Microwave Theory and Tech., vol. 54, no. 4, part 1, pp. 1590-1597, April 2006.

[33] Zuo-Min Tsai, Mei-Chao Yeh, Hong-Yeh Chang, Ming-Fong Lei, Kun-You Lin, Chin-Shen Lin,and Huei Wang, " FET-integrated CPW and the application in filter synthesis design method ontraveling-wave switchabove 100 GHz,” IEEE Trans. on Microwave Theory and Tech., vol. 54, no. 5, pp. 2090-2097, May 2006.

[34] T. Wang, H.-C. Chen, H. W. Chiu, Y.S. Lin, G. W. Huang, and S. S. Lu “Micromachined CMOS LNA and VCO By CMOS Compatible ICP Deep Trench Technology,” IEEE Tran. onMicrowave Theory and Technique, vol.54, no.2, pp.580-588, Feb. 2006.

[35] Y. S. Lin, H. B. Liang, T. Wang, and S. S. Lu, “An Analysis of Perfect- Magnetic-CouplingUltra-Low-Loss Micromachined SMIS RF Transformers for RFIC Applications,” IEEE Trans. on Microwave Theory and Techniques, accepted, Dec., 2006.

[36] Shih-Chieh Shin, Chin-Shen Lin, Ming-Da Tsai, Kun-You Lin, and Huei Wang, “A low-voltageand variable-gain distributed amplifier for 3.1-10.6 GHz UWB systems," IEEE Microwave andWireless Component Letters, vol. 16, no. 4, pp. 179-181, April 2006.

[37] Chin-Shen Lin, Pei-Si Wu, Hong-Yeh Chang, and Huei Wang, “A 9-50-GHz Gilbert-celldown-conversion mixer in 0.13-um CMOS technology," IEEE Microwave and WirelessComponent Letters, vol. 16, no. 5, pp. 293-295, May 2006.

[38] Jeng-Han Tsai, Wei-Chien Chen, To-Po Wang, Tian-Wei Huang, and Huei Wang, “A miniature Q-band low noise amplifier using 0.13-um CMOS technology," IEEE Microwave and WirelessComponent Letters, vol. 16, no. 6, pp. 327-329, June 2006.

[39] Jun-Chau Chien, Chin-Shen Lin, Liang-Hung Lu, Huei Wang, John Yeh, Chwan-Ying Lee andJohn Chern, “A harmonic injection-locked frequency divider in 0.18-um SiGe BiCMOS," toappear in IEEE Microwave and Wireless Component Letters, vol. 16, no. 10, Oct. 2006.

[40] H.-Y. Hwang, J.-C. Chien, T.-Y. Chen and L.-H. Lu, “A CMOS tunable transimpedance amplifier,” IEEE Microwave and Wireless Components Letters, 2006.

[41] Y.-H. Peng and L.-H. Lu, “A Ku-band frequency synthesizer in 0.18-um CMOS technology,” IEEE Microwave and Wireless Components Letters, 2006.

[42] J.-C. Chien, C.-S. Lin, L.-H. Lu, H. Wang, J. Yeh, C.-Y. Lee and J. Chern, “A harmonic injection-locked frequency divider in 0.18-um SiGe BiCMOS,” IEEE Microwave and Wireless Components Letters, Oct. 2006.

[43] J.-C. Chien and L.-H. Lu, “A 15-Gb/s 2:1 multiplexer in 0.18-um CMOS,” IEEE Microwave and Wireless Components Letters, Oct. 2006.

[44] H.-H. Hsieh and L.-H. Lu, “A low-phase-noise K-band CMOS VCO,” IEEE Microwave and Wireless Components Letters, Oct. 2006.

[45] Hsiao-Chin Chen, Tao Wang, Shey-Shi Lu , and Kuo-Wei Huang, “A Monolithic 5.9 GHz CMOS I/Q Direct-Down Converter Utilizing a Quadrature Coupler and Transformer-coupledSubharmonic Mixers,” IEEE Microwave and Wireless Components Letters, vol.16, no.4, pp.197-199, April 2006.

[46] Y. S. Lin, C. C. Chen, T. Wang, and S. S. Lu, “A High-Quality-Factor and Low-Power-LossMicromachined RF Bifilar Transformer for Ultra-Wideband (UWB) RFIC Applications,” IEEE Electron Device Letters, vol. 27, no. 8, pp. 684-687, Aug. 2006.

[47] Tao Wang, Chun-Hao Chen, Yo-sheng Lin, and Shey-Shi Lu, “A Micromachinced CMOS Distributed Amplifier by CMOS Compatible ICP Deep-Trench Technology,” IEEE Electron Device Letters, vol. 27, no.4, pp.291-293, April 2006.

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[48] Tao Wang, Yo-Sheng Lin, and Shey-Shi Lu, “An Ultra-Low-Loss and BroadbandMicomachined RF Inductor for RFIC Input-Matching Application ,” IEEE Trans. on Electron Devices, vol. 53, no.3, pp.568-570, March 2006.

[49] To-Po Wang, Zuo-Min Tsai, Kuo-Jung Sun, and Huei Wang, "Phase noise reduction of X-bandpush-push oscillator with second-harmonic self-injection techniques,” IEEE Trans. on Microwave Theory and Tech., vol. 55, no. 1, pp. 66-77, Jan. 2007

[50] Chin-Shen Lin, Pei-Si Wu, Mei-Chao Yeh, Jia-Shiang Fu, Hong-Yeh Chang, Kun-You Lin, andHuei Wang, "Analysis of multi-conductor coupled-line Marchand baluns for miniature MMICdesign,” IEEE Trans. on Microwave Theory and Tech., vol. 55, no. 6, pp.1190-1199, June 2007.

[51] Zuo-Min Tsai, Yu-Sian Jiang, Jeffery Lee, Kun-You Lin, and Huei Wang, "Analysis and designof band-pass single pole-double-throw FET filter-integrated switches,” IEEE Trans. on Microwave Theory and Tech., vol. 55, no. 8, pp. 1601-1610, Aug. 2007.

[52] Ming-Fong Lei, Zuo-Min Tsai, Kun-You Lin, and Huei Wang, “Design and analysis of stacked power amplifier in series-input and series-output configuration,” IEEE Trans. MicrowaveTheory and Tech., vol. 55, pp. 2802-2812, Dec. 2007.

[53] Shih-Fong Chao, Che-Chung Kuo, Zuo-Min Tsai, Kun-You Lin, and Huei Wang, “40-GHzMMIC SPDT and multiple-port bandpass filter-integrated switches,” IEEE Trans. MicrowaveTheory and Tech., vol. 55, pp. 2691-2699, Dec. 2007.

[54] Shih-Fong Chao, Huei Wang, Chia-Yi Su, and John G. J. Chern, “A 50-94 GHz CMOS SPDTswitch using traveling-wave concept," IEEE Microwave and Wireless Component Letters, vol.17, no. 2, pp. 130-132, Feb. 2007.

[55] Fong-Cheng Chang, Pei-Si Wu, Ming-Fong Lei, and Huei Wang, “A 4-41-GHz singly balanceddistributed mixer using GaAs pHEMT technology," IEEE Microwave and Wireless ComponentLetters, vol. 17, no. 2, pp. 136-138, Feb. 2007.

[56] Zuo-Min Tsai, Chin-Shen Lin, C.F.Huang, John G.J.Chern, and Huei Wang, “A fundamental 90-GHz CMOS VCO using new ring-coupled quad," IEEE Microwave and WirelessComponent Letters, vol. 17, no. 3, pp. 226-228, March 2007.

[57] Fong-Cheng Chang, Ping-Chen Huang, Shih-Fong Chao, and Huei Wang, “A low power folded mixer for UWB system applications in 0.18-um CMOS technology," IEEE Microwave andWireless Component Letters, vol. 17, no. 5, pp., May 2007.

[58] To-Po Wang and Huei Wang, “A 71-80-GHz amplifier using 0.13-um CMOS technology,” IEEE Microwave and Wireless Component Letters, pp.1-10, Sept. 2007.

[59] Hong-Yeh Chang, Ming-Fong Lei, Chin-Shen Lin, Yi-Hsien Cho, Zuo-Min Tsai, and HueiWang, “A 46-GHz direct wide modulation bandwidth ASK modulator in 0.13-um CMOStechnology," IEEE Microwave and Wireless Component Letters, vol. 17, no. 9, pp.691-693,Sept. 2007.

[60] Pin-Chen Huang, Ming-Da Tsai, Huei Wang, George D. Vendelin, Chun-Hung Chen, andChih-Shen Chang, “A low power 114-GHz push-push CMOS VCO using LC sourcedegeneration,” IEEE Journal of Solid State Circuits, vol. 42, no. 6, pp.1230-1239,June 2007.

[61] Yu-Sian Jiang, Zuo-Min Tsai, Jeng-Han Tsai, Hsien-Te Chen, and Huei Wang “A 86 to 108 GHz amplifier in 90 nm CMOS," IEEE Microw. Wireless Compon. Lett., vol. 18, no. 2, Feb.2008.

A2. Journal (International)

[1] K.-Y. Yeh, S.-S. Lu and Y.-S. Lin, “Monolithic InGaP-GaAs HBT Receiver Front-end with 6mW DC Power Consumption for 5 GHz Band WLAN Applications,” IEE Electronics Letters, vol. 40, no.24, Nov. 2004.

[2] Y.-S. Wang and L.-H. Lu, “5.7 GHzlow-power variable-gain LNA in 0.18-um CMOS,” Electronics Letters, vol. 41, no. 2, pp. 66-68, Jan. 2005

[3] C. L. Tai, S. S. Lu, and Y. S. Lin, “A 5.2 GHz Low-Power Low Noise Amplifier Using InGaP-GaAs HBT Technology,” Microwave and Optical Technology Letters, vol.45. no.5, pp.425-427,

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June 5, 2005.[4] S. S. Lu, Y. S. Lin, H. W. Chiu, Y. C. Chen and C. C. Meng “The Determination of S parameters from the Poles of Voltage Gain Transfer Function for RF IC Design,” IEEE Trans. Circuits andSystem, vol.52, no.1, pp.191-199, Jan. 2005.

[5] H. W. Chiu, Y. S. Lin, K. Liu, and S. S. Lu, “Temperature and Substrate Effects in Monolithic RF Inductors on Silicon with 6-um-Thick Top Metal for RFIC Applications,” IEEE Trans. on Semiconductor Manufacturing, vol. 19, no. 3, pp.316-330, Aug. 2006.

[6] Y. C. Yang, P. W. Lee, H. W. Chiu, Y. S. Lin, G. W. Huang, and S. S. Lu, “Reconfigurable SiGe Low Noise Amplifiers with Variable-Miller-Capacitance,” IEEE Trans. on Circuits and Systems–I, vol. 53 (or 54), 2008.

B1. Conference (Significant)

[1] Ming-Fong Lei, Pei-Si Wu, Tian-Wei Huang, and Huei Wang, “Design and analysis of a miniature W-Band MMIC sub-harmonically pumped resistive mixer,” 2004 IEEE MTT-SInternational Microwave Symposium Digest, vol. 1, pp. 235-238, Dallas, Texas, June, 2004.(NSC 91-2219-E-002-014, NSC 91-2213-E-002-019 and ME 89-E-FA06-2-4-6)

[2] Chi-Hsueh Wang, Yo-Shen Lin, Huei Wang, and Chun-Hsiung Chen, “A Q-band miniaturizeduniplanar MMIC HEMT mixer,” 2004 IEEE MTT-S International Microwave SymposiumDigest, vol. 1, pp. 187-190, Dallas, Texas, June, 2004. (ME 89-E-FA06-2-4, NSC92-2213-E-002-041)

[3] Ming-Da Tasi, Chin-Shen Lin, Chi-Hsueh Wang, Chun-Hsien Lien and Huei Wang, “A 0.1-23-GHz SiGe BiCMOS analog multiplier and mixer based on attenuation-compensationtechnique,” 2004 IEEE RFIC Symposium Digest, pp. 417-420, Dallas, Texas, June, 2004. (NSC91-2219-E-002-014, NSC 91-2213-E-002-019 and ME 89-E-FA06-2-4-6)

[4] Ren-Chieh Liu and Huei Wang, “DC-to-15- and DC-to-30-GHz CMOS distributedtrans-impedance amplifiers,” 2004 IEEE RFIC Symposium Digest, pp. 535-538, Dallas, Texas,June, 2004. (NSC 89-2213-E-002-178, NSC 90-2219-E-002-019 and ME 89-E-FA06-2-4-6)

[5] Ren-Chieh Liu, Hong-Yeh Chang, Chi-Hsueh Wang, and Huei Wang, “A 63-GHz VCO using astandard 0.25-um CMOS process,” 2004 International Solid-State Circuit Conference (ISSCC),pp. 446-447, San Francisco, Feb., 2004. (NSC 89-2213-E-002-178 and ME 89-E-FA06-2-4-6)

[6] Ming-Da Tsai, Huei Wang, Jui-Feng Kuan, and Chih-Sheng Chang, “A 74GHz cascaded multi-stage distributed amplifier in 90nm CMOS technology,” 2005 International Solid-StateCircuit Conference (ISSCC), pp. 402-403, San Francisco, Feb. 2005.

[7] Ping-Chen Huang, Ming-Da Tsai, Huei Wang, Chun-Hung Chen, and Chih-Sheng Chang, “A 114GHz VCO in 0.13um CMOS technology,” 2005 International Solid-State CircuitConference (ISSCC), pp. 404-405, San Francisco, Feb. 2005.

[8] Ren-Chieh Liu, To-Po Wang, Liang-Hung Lu, Huei Wang, Sung-Hsiung Wang, and Chih-PingChao, “An 80GHz traveling-wave amplifier in a 90nm CMOS technology,” 2005 International Solid-State Circuit Conference (ISSCC), pp. 154-155, San Francisco, Feb. 2005.

[9] Hong-Yeh Chang, Pei-Si Wu, Tian-Wei Huang, Huei Wang, Yung-Chih Tsai, and Chun-HungChen “An ultra compact and broadband 15-75 GHz BPSK modulator using 0.13-um CMOSprocess,” 2005 IEEE MTT-S International Microwave Symposium Digest, Long Beach, CA,June 2005.

[10] Mei-Chao Yeh, Zuo-Min Tsai, Kun-You Lin, Huei Wang, Chia-Yi Su, and Chih-Ping Chao, “A millimeter-wave wideband SPDT switch with traveling-wave concept using 0.13-um CMOSprocess,” 2005 IEEE MTT-S International Microwave Symposium Digest, Long Beach, CA,June 2005.

[11] Zuo-Min Tsai, Mei-Chao Yeh, Ming-Fong Lei, Hong-Yeh Chang, Chin-Shen Lin, and HueiWang, “DC-to-135 GHz SPST and 15-to-135 GHz SPDT traveling wave switches usingFET-integrated CPW line structure,” 2005 IEEE MTT-S International Microwave SymposiumDigest, Long Beach, CA, June 2005.

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[12] Ming-Da Tsai, Kun-You Lin, and Huei Wang, “A 5.4-mW LNA using 0.35-um SiGe BiCMOStechnology for 3.1-10.6-GHz UWB wireless receivers,” 2005 IEEE RFIC Symposium Digest,pp. 335-338, Long Beach, CA, June 2005.

[13] Ping-Chen Huang, Ren-Chieh Liu, Hong-Yeh Chang, Chin-Shen Lin, Ming-Fong Lei, HueiWang, Chia-Yi Su, and Chia-Long Chang, “A 131-GHz push-push VCO in 90-nm CMOStechnology,” 2005 IEEE RFICSymposium Digest, pp. 613-616, Long Beach, CA, June 2005.

[14] Yi-Hsien Cho, Ming-Da Tsai, Hong-Yeh Chang, Chia-Chi Chang, and Huei Wang, “A low phase noise 52-GHz push-push VCO in 0.18-um bulk CMOS technology,” 2005 IEEE RFIC Symposium Digest, pp. 131-134, Long Beach, CA, June 2005.

[15] Shi-Chieh Shin, Szu-Fan Lai, Kun-You Lin, Ming-Da Tasi, Huei Wang and Chih-Sheng Chang,and Yung-Chih Tsai, “18-26 GHz low-noise amplifiers using 130- and 90-nm bulk CMOStechnologies,” 2005 IEEE RFIC Symposium Digest, pp. 46-50, Long Beach, CA, June 2005.

[16] Mei-Chao Yeh, Ren-Chieh Liu, Zuo-Min Tsai, and Huei Wang, “A miniature low-insertion-loss,high-power CMOS SPDT switch using floating-body technique for 2.4- and 5.8-GHzapplications,” 2005 IEEE RFIC Symposium Digest, pp. 451-454, Long Beach, CA, June, 2005.

[17] H.-H. Hsieh and L.-H. Lu, “A CMOS 5-GHz micro-power LNA,” IEEE RFIC Symposium, pp. 31-34, Jun. 2005.

[18] H.-H. Hsieh, K.-S. Chung and L.-H. Lu, “Ultra-low-voltage mixer and VCO in 0.18-umCMOS,” IEEE RFIC Symposium, pp. 167-170, Jun. 2005.

[19] Jeng-Han Tsai, Hong-Yeh Chang, Pei-Si Wu, Tian-Wei Huang, and Huei Wang, “A 44-GHzhigh-linearity MMIC medium power amplifier with a low-loss built-in linearizer,” 2005 IEEE MTT-S International Microwave Symposium Digest, Long Beach, CA, June 2005

[20] C. H. Wang, Y. H. Cho, C. S. Lin, H. Wang, C. H. Chen, D. C. Niu, J. Yeh, C. Y. Lee, and J.Chern, A 60 GHz transmitter with integrated antenna in 0.18-µm SiGe BiCMOS technology,2006 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, California,USA, pp. 186-187, February 2006.

[21] Chieh-Min Lo, Chin-Shen Lin, and Huei Wang, “A Miniature V-band three-stage cascode lownoise amplifier in 130-nm CMOS technology,” 2006 International Solid-State CircuitConference (ISSCC), San Francisco, CA, Feb. 2006.

[22] C. H. Chen, Shey-shi Lu, “A wireless Bio-MEMS Sensor for C-Reactive Protein DetectionBased on Nanomechanics,” IEEE, ISSCC, pp.562-563, San Francisco, Feb. 2006.

[23] Jeffery Lee, Zuo-Min Tsai, and Huei Wang, “A band-pass filter-integrated switch usingMESFET and its power analysis,” 2006 IEEE MTT-S International Microwave SymposiumDigest, San Francisco, CA, June 2006.

[24] Hong-Yeh Chang, Tian-Wei Huang and Huei Wang, “A 45-GHz quadrature voltage controlledoscillator with a reflection-type IQ modulator in 0.13-um CMOS technology,” 2006 IEEE MTT-S International Microwave Symposium Digest, San Francisco, CA, June 2006.

[25] To-Po Wang and Huei Wang, “A 30-GHz low-phase-noise 0.35-um CMOS push-push oscillatorusing micromachined inductors,” 2006 IEEE MTT-S International Microwave SymposiumDigest, San Francisco, CA, June 2006.

[26] Pin-Chen Huang and Huei Wang, “A compact 35-65 GHz up-conversion mixer with integratedbroadband transformers in 0.18-μm SiGe BiCMOS technology,” 2006 IEEE RFIC Symposium Digest, San Francisco, CA, June 2006.

[27] Mei-Chen Chuang, Pei-Si Wu, Ming-Fong Lei, Huei Wang, Yu-Chi Wang, and Chan-Shin Wu,“A miniature 15-50-GHz medium power amplifier,” 2006 IEEE RFIC Symposium Digest, San Francisco, CA, June 2006.

[28] Chi-Hsueh Wang, Hong-Yeh Chang, Pei-Si Wu, Kun-You Lin, Tian-Wei Huang, Huei Wang,and Chun-Hsiung Chen, “A 60-GHz low power six-port transceiver for gigabit software-definedtransciever,” 2007 International Solid-State Circuit Conference (ISSCC), San Francisco, CA,Feb. 2007.

[29] Ruey-Beei Wu, Huei Wang, Shi-Jong Chung, Chung-Hsin Lu, and Chun-Hsuing Chen“Microwave activities in Taiwan,” 2007 IEEE MTT-S International Microwave Symposium

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Digest, Honolulu, HI, USA, June 2007.[30] Kuo-Jung Sun, Zuo-Min Tsai, Kun-You Lin, and Huei Wang, “A 10.8-GHz CMOS low-noise

amplifier using parallel-resonant inductor,” 2007 IEEE MTT-S International MicrowaveSymposium Digest, Honolulu, HI, USA, June 2007.

[31] Hong-Yeh Chang, Huei Wang, and Wesley Lin, “A miniature 35-110 GHz modifiedreflection-type BPSK modulator using 65-nm CMOS technology,” 2007 IEEE MTT-SInternational Microwave Symposium Digest, Honolulu, HI, USA, June 2007.

[32] To-Po Wang and Huei Wang, “A broadband 42-63-GHz amplifier using 0.13-m CMOStechnology,” 2007 IEEE MTT-S International Microwave Symposium Digest, Honolulu, HI,USA, June 2007.

[33] Zuo-Min Tsai, Ming-Fong Lei, and Huei Wang, “An HBT 4-Cell monolithic stacked poweramplifier,” 2007 IEEE MTT-S International Microwave Symposium Digest, Honolulu, HI,USA, June 2007.

[34] Chin-Shen Lin, Hong-Yeh Chang, Pei-Si Wu, Kun-You Lin, and Huei Wang, “A 35-50 GHzIQ-demodulator in 0.13-um CMOS technology,” 2007 IEEE MTT-S International MicrowaveSymposium Digest, Honolulu, HI, USA, June 2007.

[35] Shi-Fong, Che-Chung Kuo, Zuo-Min Tsai, and Huei Wang, “A 40-GHz MMIC SPDT bandpassfilter integrated switch,” 2007 IEEE MTT-S International Microwave Symposium Digest,Honolulu, HI, USA, June 2007.

[36] Pin-Cheng Huang, Fong-Cheng Chang, Shi-Fong, and Huei Wang, “A miniature folded-switching upconversion mixer for UWB applications using 0.18-um CMOS process,” 2007 IEEE IEEE RFIC Symposium Digest, Honolulu, HI, USA, June 2007.

B2. Conference (International)

[1] Tian-Wei Huang, Pei-Si Wu, Ren-Chieh Liu, Jeng-Han Tsai, Huei Wang, and Tzi-Dar Chieuh,“Boundary scan for 5-GHz RF pins using LC isolation networks,” Proc. of 22nd IEEE VLSI Test Symposium, Napa Valley, CA, USA, April 2004.

[2] Pei-Si Wu, Tian-Wei Huang, Huei Wang, and Philip Liao, “3-D X-band new transformer balunconfiguration using the multilayer ceramic technologies,” 34th European MicrowaveConference Proceedings, pp. 385-388, Amsterdam, Netherlands, Oct. 2004. (NSC89-2213-E-002-178, NSC 90-2219-E-002-007 and ME-89-E-FA06-2-4-6)

[3] Ming-Da Tsai and Huei Wang, “A miniature 4.3-7-GHz, 1-V CMOS LNA with helicalinductors,” 34th European Microwave Conference Proceedings, pp. 29-32, Amsterdam,Netherlands, Oct., 2004. (NSC 89-2213-E-002-178, NSC 90-2219-E-002-007 andME-89-E-FA06-2-4-6)

[4] Chin-Shen Lin, and Huei Wang, “A monolithic HBT broadband Darlington amplifier using modified triple Darlington pair,” European GAAS Conference Proceedings, pp. 331-334,Amsterdam, Netherlands, Oct., 2004. (NSC 89-2213-E-002-178, NSC 90-2219-E-002-007 andME-89-E-FA06-2-4-6)

[5] Hong-Yeh Chang, and Huei Wang, “A 22-GHz ultra low phase noise push-push dielectricresonator oscillator using MMICs,” European GAAS Conference Proceedings, pp. 33-36,Amsterdam, Netherlands, Oct., 2004. (NSC 89-2213-E-002-178, NSC 90-2219-E-002-007 andME-89-E-FA06-2-4-6)

[6] Mei-Chao Yeh, Zou-Min Tsai and, Huei Wang, “A miniature singly balanced mixer usingseven-symmetric-coupled-line Marchand balun,” 2004 Asia Pacific Microwave Conference Technical Digest, New Delhi, India, Dec. 2004.

[7] To-Po Wang, Ming-Da Tsai, Ren-Chieh Liu, and Huei Wang, “A high conversion gain and low LO power 5-6-GHz CMOS mixer,” 2004 Asia Pacific Microwave Conference Technical Digest, New Delhi, India, Dec. 2004.

[8] C. T. Li, D. Kubo, C. Han, C. Chen, C. Lien, H. Wang, C. Yang, T. Chiueh, J. Peterson, M.Kesteven, W. Wilson, "A wideband analog correlator system for AMiBA," Conference

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Proceedings of SPIE’s International Symposium on Astronomical Telescopes and Instrumentation 2004 Conference, Glasgow, Scotland, UK, June 2004.

[9] Huei Wang, Ming-Da Tsai, and Ren-Chieh Liu, “Silicon-based RFICs for Broadband andMillimeter-wave Applications,” International Symposium on Advanced Si-RF LSI Circuits andDevices, Tokyo, Japan, Nov., 2004.

[10] Yi-Hsien Cho, Ming-Da Tsai, and Huei Wang, “A wide-band low noise quadrature CMOSVCO,” 2005 IEEE Asia Solid-State Circuit Conference (A-SSCC) Proceedings, pp. 325-328,Hsin-Chu, Taiwan, Nov. 2005.

[11] J.-C. Chien and L.-H. Lu, “Ultra-low-voltage CMOS static frequency divider,” IEEE Asian Solid-State Circuits Conference, pp. 209-212, Nov. 2005.

[12] Huei Wang, , “Development of monolithic microwave and millimeter-wave integrated circuitsat National Taiwan University,” International Joint Conference of the 6th MINT Millimeter-Wave International Symposium and the 7th Topical Symposium on MillimeterWaves (MINT-MIS2005/TSMMW2005) Proceedings, pp.13-16, Seoul, Korea, Feb. 2005.

[13] Huei Wang, “Researches and applications of monolithic millimeter-wave integrated circuits atNational Taiwan University,” Joint 30th International Conference on Infrared and Millimeter-wave and 13th International Conference on Terahertz Electronics(ITMMW-THz2005), vol. 2, pp. 622-623, Williamsburg, Virginia, USA, Sept., 2005. (invitedplenary talk)

[14] Mei-Chao Yeh, Zuo-Min Tsai, and Huei Wang, “A miniature dc-to-50-GHz CMOS SPDTdistributed switch,” 35th European Microwave Conference Proceedings, Paris, France, Oct.,2005.

[15] Ching-Chih Weng, Zuo-Min Tsai, and Huei Wang, “A K-band miniature, high output powerHBT MMIC balanced doubler with integrated balun,” 35th European Microwave Conference Proceedings, Paris, France, Oct., 2005.

[16] Pei-Si Wu Chin-Shen Lin, Tian-Wei Huang, Huei Wang, “A millimeter-wave ultra-compactbroadband diode mixer using modified Marchand balun,” European GAAS Conference Proceedings, Paris, France, Oct., 2005.

[17] Shih-Fong Chao, Zuo-Min Tsai, Kun-You Lin, Huei Wang, “Compact W-band SPQT switchusing traveling wave concept,” European GAAS Conference Proceedings, Paris, France, Oct., 2005.

[18] Wei-Chien Chen, Shih-Yu Chen, Jeng-Han Tsai, Tian-Wei Huang, and Huei Wang, “A 38-48GHz miniature MMIC subharmonic mixer,” European GAAS Conference Proceedings, Paris,France, Oct., 2005.

[19] Y. H. Liu, H. C. Chen, T. Wang and S. S. Lu,” A CMOS transmitter front-end with digital powercontrol for WiMAX 802.16e applications”, 17th Asia-Pacific Microwave Conference,December 4-7, 2005, Suzhou, China.

[20] K.Y. Liu, C. H. Chen, Y. C. Yang, H. C. Chen, S. A. Yu and S. S. Lu, ” A Low Power Fully Integrated Analog Baseband Circuit with Variable Bandwidth for 802.11 a/b/g WLAN ”, 17th Asia-Pacific Microwave Conference, December 4-7, 2005, Suzhou, China.

[21] Ming-Fong Lei and Huei Wang, "A 100-120 GHz quadruple-LO pumped harmonic diode mixerusing dtandard GaAs based 0.15-um PHEMT process," 17th Asia Pacific MicrowaveConference Technical Digest, Suzhou, China, Dec. 2005.

[22] Mei-Chen Chunag, Ming-Fong Lei, Huei Wang, "A broadband medium power amplifier formillimeter-wave applications, " 17th Asia Pacific Microwave Conference Technical Digest,Suzhou, China, Dec. 2005.

[23] Huei Wang, “Broadband and millimeter-wave silicon-based RFICs,” 2005 Microwave Workshops & Exhibitions (MWE2005), Workshop Digest, pp. 453-458, Yokohama, Japan, Nov.2005. (invited paper)

[24] Chi-Wei Ling, Chia-Chi Chang, Chin-Shen Lin, and Huei Wang, “A CMOS wide-band lownoise amplifier for very low frequency to 3 GHz applications,” 8th International Symposium onCommunications (ISCOM), Kao-Hsiung, Taiwan, Nov. 2005.

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[25] Kuo-Liang Deng, Ming-Da Tsai, Chin-Shen Lin, Kun-You Lin, Huei Wang, S.H. Wang, W.Y.Lien, and John G.J. Chern, “A Ku-band CMOS low-noise amplifier,” 2005 Workshop of RF Integrated Technology (RFIT), Singapore, Dec. 2005.

[26] T.-Y. Chen, J.-C. Chien and L.-H. Lu, “A 45.6-GHz matrix distributed amplifier in 0.18-umCMOS,” IEEE Custom Integrated Circuits Conference, pp. 119-122, Sep. 2005.

[27] H.-H. Hsieh and L.-H. Lu, “Built-in Sensors and Testing Technique for RF Amplifiers,” International Mixed-Signals Testing Workshop, pp. 193-198, Jun. 2005.

[28] Y.-C. Hsu and L.-H. Lu, “A 9-GHz quadrature-phase VCO in 0.18-um CMOS,” Symposium on Nano Device Technology, May 2005.

[29] J.-C. Chien, T.-Y. Chen and L.-H. Lu, “A 9.5-dB 50-GHz Matrix Distributed Amplifier in0.18-um CMOS,” 2006 Symposium on VLSI Circuits, pp. 182-183, Jun. 2006.

[30] J.-C. Chien and L.-H. Lu, “A 40-GHz Wide-Tuning-Range VCO in 0.18-um CMOS,” 2006 Symposium on VLSI Circuits, pp. 220-221, Jun. 2006.

[31] H.-H. Hsieh and L.-H. Lu, “Integrated CMOS power sensors for RF BIST applications,” IEEE VLSI Test Symposium, Apr. 2006.

[32] Ming-Fong Lei and Huei Wang, “Implementation of reduced-size dual-mode ring filters inLTCC and MMIC processes at millimeter-wave frequencies,” 36thEuropean MicrowaveConference Proceedings, Manchester, UK, Sept. 2006.

[33] To-Po Wang and Huei Wang, “High-Q micro-machined inductors for 10-to-30-GHz RFICapplications on low resistivity Si-substrate,” 36th European Microwave Conference Proceedings, Manchester, UK, Sept. 2006.

[34] Che-Min Lo, Shih-Fong Chao, Chia-Chi Chang and Huei Wang, “A fully integrated 5-6 GHzCMOS variable-gain LNA using helix-stacked inductors,” European Microwave Integrated Circuits Conference (EuMIC) Proceedings, Manchester, UK, Sept. 2006.

[35] Yi-Hsien Cho, Fong-Cheng Chang, Ming-Fong Lei, Ming-Da Tsai, Hong-Yeh Chang, and HueiWang, "A low noise bulk-coupled colpitts CMOS quadrature VCO,” 18th Asia Pacific Microwave Conference Technical Digest, Yokohama, Japan, Dec. 2006.

[36] Wen-Ren Lee, Shi-Fong Chao, Zuo-Min Tsai, Pin-Cheng Huang, Chun-Hsien Lien, Jeng-HanTsai, and Huei Wang, "A high-efficiency, broadband and high output power PHEMT balancedK-Band doubler with integrated balun,” 18th Asia Pacific Microwave Conference Technical Digest, Yokohama, Japan, Dec. 2006.

[37] Huei Wang, "Silicon-based monolithic millimeter-wave integrated circuits,” 18th Asia Pacific Microwave Conference Technical Digest, Yokohama, Japan, Dec. 2006. (INVITED)

[38] Shih-Yu Chen, Jen-Han Tsai, Pei-Si Wu, Tian-Wei Huang, and Huei Wang, "A Q-bandminiature monolithic sub-harmonically pumped resistive mixer,” 18th Asia Pacific Microwave Conference Technical Digest, Yokohama, Japan, Dec. 2006.

[39] Kun-You Lin, Ming-Da Tsai, Shih-Chieh Shin, and Huei Wang, “Low-Power Low-NoiseAmplifiersfor UWB Applications” ICSICT2007, Shianghi, China, Oct. 2006. (INVITED)

[40] Ming-Da Tsai, Chin-Shen Lin, and Huei Wang, “A 10.8-mW low-noise amplifier in 0.35-umSiGe BiCMOS for UWB wireless receivers,” 2006 IEEE Radio and Wireless Symposium (RWS) Proceedings, pp. 39-42, San Diego, CA, USA, Jan. 2006.

[41] C.-R. Wu and L.-H. Lu, “A 2.9-3.5-GHz tunable low-noise amplifier,” IEEE SiRF 2006, pp. 206-209, Jan. 2006.

[42] H.-C. Chen, T. Wang, S.-S. Lu and G.-W. Huang, “A Low-phase-noise Area-efficient 3-D LCVCO in Standard 0.18-um CMOS Technology,” IEEE Proceedings of 13th Mediterranean Electrotechnical Conference, pp.202-205, 16-19 May, 2006.

[43] Y.T. Lin and Shey-Shi Lu, “A Fully Integrated Concurrent Dual-band Low-Noise AmplifierUsing InGaP/GaAs HBT Technology", 5th WSEAS International Conference on Electronics,Hardware, Wireless and Optical Communications, Feb., 2006.

[44] C. Y. Liu, J. H. Hsu, H. C. Chen, S. S. Lu, S. H. Chang, “Electromechanical Oscillator Based on Carbon Nanotube Field-Effect Transistors,” ChemOnTubes, Arcachon, France, April 2-5, 2006.

[45] Chung-Chun Chen, Chi-Hsueh Wang, Bo-Jr Huang, Hen-Wai Tsao, and Huei Wang, “A

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24-GHz divide-by-4 injection-locked frequency divider in 0.13-um CMOS technology,” 2007 IEEE Asian Solid-State Circuit Conference (A-SSCC) Proceedings, pp. 340-343, Jeju Island,Korea, Nov. 2007.

[46] Chi-Hsueh Wang, Chung-Chun Chen, Ming-Fong Lei, Mei-Chen Chuang, and Huei Wang, “A 66-72 GHz divide-by-3 injection-locked frequency divider in 0.13-um CMOS technology,” 2007 IEEE Asian Solid-State Circuit Conference (A-SSCC) Proceedings, pp. 344-347, JejuIsland, Korea, Nov. 2007.

[47] Huei Wang, “The microwave activity and progress in National Taiwan University,” European Microwave Conference (EuMC) Proceedings, Munich, Germany, Oct. 2007. (invited paper)

[48] Pei-Si Wu, Hong-Yeh Chang, Ming-Fong Lei, Bo-Jr Huang, Huei Wang, Cheng-Ming Yu, andJohn G. J. Chern, “A 40-74 GHz amplitude/phase control MMIC using 90-nm CMOStechnology,” European Microwave Integrated Circuits Conference (EuMIC) Proceedings, Munich, Germany, Oct. 2007.

[49] Huei Wang, “Development of silicon-based millimeter-wave ICs at National TaiwanUniversity,” 2007 Microwave Workshops & Exhibitions (MWE2005), Workshop Digest, pp., Yokohama, Japan, Nov. 2007. (invited)

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2. Patents

A1. Granted (International)[1] Huei Wang, Yu-Jiu Wang, Kun-You Lin, “Millimeter-wave passive FET switch using

impedance transformation networks,” US 6,801,108 B2.[2] United State Patent No US 7,157,986 B1, Pei-Si Wu, Tian-Wei Huang, and Huei Wang,

“Three-dimensional transformer balun,” Jan. 2, 2007

A1. Granted (Domestic)[1] Huei Wang, 空橋式馬迅平衡不平衡轉換器結構, 95109627.[2] Republic of China Patent No. I 245449, Pei-Si Wu, Tian-Wei Huang, and Huei Wang,

“Three-dimensional transformer balun,” Dec. 11, 2005.[3] Republic of China Patent No. I 287350, Pei-Si Wu, Tian-Wei Huang, and Huei Wang, “PHMET

power amplifier with active bias linearizer,” Sept. 21, 2007.

B1. Pending (International)[1] United State Patent pending: Pei-Si Wu, Tian-Wei Huang, and Huei Wang, “Three dimensional

balun.”[2] Republic of China Patent pending: Pei-Si Wu, Tian-Wei Huang, and Huei Wang, “Modified

Marchand balun using air-bridges.”[3] United State and Republic of China Patent pending, Zuo-Min Tsai, Mei-Chao Yeh, and Huei

Wang, “A traveling-wave switch using FET-integrated CPW structure.”[4] Huei Wang, Traveling Wave Switches using Fet-Intetrated CPW Line Structure, 11/276,952.

B2.Pending (Domestic)[1] Republic of China Patent pending, Shi-Chieh Shin, Ming-Da Tsai, and Huei Wang,“Compensation mechanism for wideband gain flatness of variable-gain distributed amplifierusing variable termination resistor.”

3. List of personal achievements(1) Huei Wang, Distinguished Research Award from National Science Council (2003).(2) Huei Wang, Editor in-chief for International Journal of Electrical Engineerin (2006).(3) Huei Wang, Richard M. Hong Endowed Chair Professor of National Taiwan University

(2005-2007).(4) Huei Wang, IEEE Fellow in 2006(5) Hueiwang, Academic Achievement Award, Ministry of Education, R. O. C. (2007)

4. Technology TransfersThe topic of the patents in this sub-project is communication ICs. The granted patents list belowhave the potential for technology transfers. The target of the technology transfers is the IC designhouses; for example, Media Tek. and Hittite (US.).

* Huei Wang, Yu-Jiu Wang, Kun-You Lin, “Millimeter-wave passive FET switch using impedancetransformation networks,” US 6,801,108 B2.

* United State Patent No US 7,157,986 B1, Pei-Si Wu, Tian-Wei Huang, and HueiWang,“Threedimensional transformer balun,” Jan. 2, 2007.

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VI. APPENDIX II

LIST OF PUBLICATIONS IN“TOP”JOURNALS AND CONFERENCES (LIMIT TO 3-5)Journal[1] Hong-Yeh Chang, Pei-Si Wu, Tian-Wei Huang, Huei Wang, Chung-Long Chang, and John

Chern, "Design and analysis of CMOS broadband compact high-linearity modulators forGigabit microwave/millimeter-wave applications," IEEE Trans. on Microwave Theory andTech, vol. 54, no. 1, pp. 20-30, Jan. 2006.

[2] T. Wang, Y.-S. Lin and S.-S. Lu, “An Ultralow-Loss and Broadband Micromachined RFInductor for RFIC Input-Matching Applications,” IEEE T. Electron Devices, vol. 53, no. 3, pp.568-570, March 2006

[3] Zuo-Min Tsai, Kuo-Jung Sun, George D. Vendelin, and Huei Wang, "A new feedback methodfor power amplifier with unilateralization and improved output return loss,” IEEE Trans. on Microwave Theory and Tech., vol. 54, no. 4, part 1, pp. 1590-1597, April 2006.Hong-YehChang, Tian-Wei Huang, Huei Wang, Yu-Chi Wang, Pane-Chane Chao and Chung-Hsu Chen,"Broadband HBT BPSK and IQ modulator MMICs and millimeter-wave vector signalcharacterization," IEEE Trans. on Microwave Theory and Tech, vol. 52, no. 3, pp. 908-919,March 2004. (NSC 89-2213-E-002-178, NSC 89-2219-E-002-042 and ME-89-E-FA06-2-4-6)

Conference

[1] C. H. Wang, Y. H. Cho, C. S. Lin, H. Wang, C. H. Chen, D. C. Niu, J. Yeh, C. Y. Lee, and J.Chern, A 60 GHz transmitter with integrated antenna in 0.18-µm SiGe BiCMOS technology,2006 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, California,USA, pp. 186-187, February 2006.

[2] Chieh-Min Lo, Chin-Shen Lin, and Huei Wang, “A Miniature V-band three-stage cascode lownoise amplifier in 130-nm CMOS technology,” 2006 IEEE International Solid-State CircuitsConference (ISSCC), San Francisco, CA, Feb. 2006.

[3] C. H. Chen, Shey-shi Lu, “A wireless Bio-MEMS Sensor for C-Reactive Protein DetectionBased on Nanomechanics,” 2006 IEEE International Solid-State Circuits Conference (ISSCC),pp.562-563, San Francisco, Feb. 2006.T. Wang, Y.-S. Lin and S.-S. Lu, “An Ultralow-Loss andBroadband Micromachined RF Inductor for RFIC Input-Matching Applications,” IEEE T. Electron Devices, vol. 53, no. 3, pp. 568-570, March 2006

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VIII. APPENDIX III: SLIDES ON SCIENCE AND TECHNOLOGY BREAKTHROUGHS(TWO SLIDES FOR EACH BREAKTHROUGH)

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Appendix IV

Self-Assessment

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IX. APPENDIX IV: SELF-ASSESSMENT（子計畫二）PROGRAM TITLE: ADVANCED MICROWAVE TECHNOLOGIES FOR TELECOMMUNICATIONS

前瞻電信微波科技發展計畫

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1. First ReviewerREVIEWER’S COMMENTS & SUGGESTION:

1. The group has been one of the most prolific research groups in MMIC in the world, both inpublication as well as in Ph. D production.

2. Some of the recent work in CMOS by the group competes favorably with other internationalleading groups´ efforts.

3. The mode of collaboration with TSMC seems to be working well. The university shouldlook into the IP issues more closely.

4. With 29 graduate students (12 Ph. D, 17 MS) working in the sub-project, quality assurancevery be an issue. Close attention by the PI is suggested. A good researcher, or a goodengineer, needs more training and attention than just publishing several good papers.

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PROGRAM DIRECTOR’S FEEDBACK

委員一意見回覆：

1.The group has been one of the most prolific research groups in MMIC in the world, both inpublication as well as in Ph. D production.

回覆：謝謝委員的意見。

2.Some of the recent work in CMOS by the group competes favorably with other internationalleading groups´ efforts.

回覆：謝謝委員的意見。

3.The mode of collaboration with TSMC seems to be working well. The university shouldlook into the IP issues more closely.

回覆：本校與台積電之合作協議書中已明訂智財權屬台大與台積電共有。

4.With 29 graduate students (12 Ph. D, 17 MS) working in the sub-project, quality assurancevery be an issue. Close attention by the PI is suggested. A good researcher, or a goodengineer, needs more training and attention than just publishing several good papers.

回覆：本子計畫中除主持人外，另有兩位共同主持人及一位協同主持人，總計共四位教授參與。計畫項下中所支援的學生係於四位教授，學生人數應屬合理，且都能接受適當的訓練。

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2. Second Reviewer

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REVIEWER’S COMMENTS & SUGGESTION:

1.領先世界的 60 GHz 毫米波 IC，充分展現研究團隊的卓越表現。

2.本毫米波 IC 以標準 0.13 um CMOS 製程實現，具龐大的商品化機會。

3.此 IC 包函 VCO，I/Q 調製。緩衝放大器(BA)，SPDT 開關，及 LNA 等。組成傳收器(Transceiver)的主要部件。

4.結合標準 CMOS 製程與 SiGe BiCMOS 技術，本計畫驗証 60 GHz 毫米波 on chip 天線的技術。

5.此 IC 同時驗証毫米波矽晶功率放大器，及 VCO、Mixer 及天線等 IC 整合。

6.毫米波無線訊產品已經是事實成真了，建議相關的研發不要中斷。

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PROGRAM DIRECTOR’S FEEDBACK

委員二意見回覆：

1.領先世界的 60 GHz 毫米波 IC，充分展現研究團隊的卓越表現。回覆：謝謝委員的意見。

2.本毫米波 IC 以標準 0.13 um CMOS 製程實現，具龐大的商品化機會。回覆：謝謝委員的意見。

3.此 IC 包函 VCO，I/Q 調製。緩衝放大器(BA)，SPDT 開關，及 LNA 等。組成傳收器(Transceiver)的主要部件。

回覆：謝謝委員的意見。

4.結合標準 CMOS 製程與 SiGe BiCMOS 技術，本計畫驗証 60 GHz 毫米波 on chip 天線的技術。

回覆：謝謝委員的意見。

5.此 IC 同時驗証毫米波矽晶功率放大器，及 VCO、Mixer 及天線等 IC 整合。回覆：謝謝委員的意見。

6.毫米波無線訊產品已經是事實成真了，建議相關的研發不要中斷。回覆：相關的研究，在卓越計畫結束後，目前將暫時由教育部五年 500 億經費中「資電中心，分項一」來支援。希望國科會能在專案繼續支持卓越延續計畫之相關研究。

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3. Third Reviewer

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REVIEWER’S COMMENTS & SUGGESTION:

1.本子計劃主要關發 MMIC 收發小機整合型計畫使用，此外，各頻段之 MMIC 也有開發，成效包含 61 篇重要期刊及 10 件專利，並與台積電建議密切合作關係。

2.建議將此成果在 ISAP08 及 APMC08 展覽，俾供業界了解本計畫之研究成果。

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PROGRAM DIRECTOR’S FEEDBACK

委員三意見回覆：

1.本子計劃主要關發 MMIC 收發小機整合型計畫使用，此外，各頻段之 MMIC 也有開發，成效包含 61 篇重要期刊及 10 件專利，並與台積電建議密切合作關係。

回覆：謝謝委員的意見。

2.建議將此成果在 ISAP08 及 APMC08 展覽，俾供業界了解本計畫之研究成果。回覆：我們會慎重考慮將計畫成果在相關國際會議中參展的可行性。

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4. Fourth Reviewer

ASSESSMENT SUBJECTSCORE

（1~5,LOW TOHIGH）

Importance &Innovation of the Program’s Major Tasks 5

Clarity and Presentation of the Report 4

Viability of the Program’s Approaches &Methodologies 5

Program Director’s Competence for Leading the Program 5

Interface & Integration between Overall & Sub-project（s） 4

Interface & Integration among All Sub-projects 4

PROGRAM’S CONTENTS &

PERFORMANCE

Manpower & Expenditures 4

Contribution in Enhancing the Institute’s International Academic Standing 5PROGRAM’S

RESULTS Impact on Advancing Teaching or on TechnologyDevelopment 5

OVERALL 41

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REVIEWER’S COMMENTS & SUGGESTION:

COMMENTS：1. 本計畫以開發「先進無線通訊系統平台」來驗證各子計畫 Microwave/MMW 積體電

路及模組件之先進技術，此作法確能具體顯現各項研究成果，請持續落實。子計畫（S2）在 MMIC Transceiver 研發上成果顯著，尤其是提供計畫（S1）系統平台之 60-GHzTransceiver IC 具世界級水準。

回覆：謝謝委員的意見。

2. 計畫投入人力每年均大幅超過計劃人力，而實際支出預算又低於預劃者，如何支應？請補充說明。

回覆：計畫書中原編列博士後及專職技術人員若干名。但因聘請全職人員不易，故四年中某此時段未能照原計畫聘任時，所餘人事費用部分用以支應博士、碩士生研究費用。所以研究人力高於計畫人力，而實際支出預算較低。

3. Page 4：專利表 Total 數不明，請補正。目前尚無技轉及技服收入，但請先擬定技術項目（ITEM），並說明未來潛在的技轉及技服對象，以利應用推廣。回覆：在整個計畫執行其間，共提出四項國內專利申請案，以及六項美國專利申請案，其中通過了三項國內專利申請案以及二項國際專利申請案。而此專利技術以微波領域以及通訊 IC 為主，以下兩項為已申請通過的國際專利申請案，目前正預計以此兩項專利做技轉的目標，技轉的對象為國內或國外 IC 設計公司，如聯發科、美國的 Hittite公司等。

* Huei Wang, Yu-Jiu Wang, Kun-You Lin, “Millimeter-wave passive FET switch usingimpedance transformation networks,” US 6,801,108 B2.

* United State Patent No US 7,157,986 B1, Pei-Si Wu, Tian-Wei Huang, and HueiWang,“Threedimensional transformer balun,” Jan. 2, 2007.

SUGGESTION：1. 請將計畫當年（2004）起所規劃之 5年以上技術路程圖（Road map）附上，以利審閱

者明瞭技術的前瞻性及執行成效。2.中研院參加之無線電天文望遠鏡（ALMA）國際合作計畫，其涵蓋 10 個頻道

（30G~950GHZ）。本計畫參與 BAND 1 研發，仍有成長空間。中科院一所參與 BAND 3、4、6、7、8、9 之組測，其儀器設備可協調利用。

4-13

PROGRAM DIRECTOR’S FEEDBACK

委員四意見回覆：

COMMENTS：

1. 本計畫以開發「先進無線通訊系統平台」來驗證各子計畫 Microwave/MMW 積體電路及模組件之先進技術，此作法確能具體顯現各項研究成果，請持續落實。子計畫（S2）在 MMIC Transceiver 研發上成果顯著，尤其是提供計畫（S1）系統平台之 60-GHzTransceiver IC 具世界級水準。

回覆：謝謝委員的意見。

2. 計畫投入人力每年均大幅超過計劃人力，而實際支出預算又低於預劃者，如何支應？請補充說明。

回覆：計畫書中原編列博士後及專職技術人員若干名。但因聘請全職人員不易，故四年中某此時段未能照原計畫聘任時，所餘人事費用部分用以支應博士、碩士生研究費用。所以研究人力高於計畫人力，而實際支出預算較低。

3. Page 4：專利表 Total 數不明，請補正。目前尚無技轉及技服收入，但請先擬定技術項目（ITEM），並說明未來潛在的技轉及技服對象，以利應用推廣。回覆：在整個計畫執行其間，共提出四項國內專利申請案，以及六項美國專利申請案，其中通過了三項國內專利申請案以及二項國際專利申請案，此 Total 數已補正於報告中。而此專利技術以微波領域以及通訊 IC 為主，以下兩項為已申請通過的國際專利申請案，目前正預計以此兩項專利做技轉的目標，技轉的對象為國內或國外IC 設計公司，如聯發科、美國的 Hittite 公司等。* Huei Wang, Yu-Jiu Wang, Kun-You Lin, “Millimeter-wave passive FET switch

using impedance transformation networks,” US 6,801,108 B2.* United State Patent No US 7,157,986 B1, Pei-Si Wu, Tian-Wei Huang, and Huei

Wang,“Threedimensional transformer balun,” Jan. 2, 2007.

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SUGGESTION：1. 請將計畫當年（2004）起所規劃之 5 年以上技術路程圖（Road map）附上，以利審

閱者明瞭技術的前瞻性及執行成效。回覆：下表為子計畫二在這五年內的預計成果以及所達成的目標。由結案報告內計畫的成果顯示，已超越當年的預期目標。

年份 預計目標 達成目標

第一年 * 制定系統須求及規格* 建立主動及被動元件模型* 設計第一版的 60 GHzMMIC 收發機

* 完成系統子電路規格的規畫* 完成系統子電路的設計* 成功製作 80 GHz CMOS 的寬頻放大器

第二年 * 完成各項 60 GHz 收發機子電路設計 30 GHz 的 CMOS 電路

* 成功製作 W-頻帶的 CMOS 電路，包括混頻器、低雜訊放大器、鎖相迴路等。* 成功製作出 SiGe 60 GHz 的單晶發射器。

第三年 * 擁有設計 30 GHz 矽基MMIC 的能力* 整合 60 GHz 收發機

* 完成 CMOS IQ 調變器。* 完成收發模組的組裝。

第四年 * 擁有設計 40 GHz 矽基MMIC 的能力* 完成 60 GHz 收發機

* 完成微波模組以及基頻訊號的整合。* 完成 60 GHz CMOS 的單晶收發機。

第五年 * 擁有設計 60 GHz 矽基MMIC 的能力

* 製作出 V-頻帶以及 W 頻帶的矽基功率放大器

2. 中研院參加之無線電天文望遠鏡（ALMA）國際合作計畫，其涵蓋 10 個頻道（30G~950GHz）。本計畫參與 Band 1 研發，仍有成長空間。中科院一所參與Band 3、4、6、7、8、9 之組測，其儀器設備可協調利用。回覆：謝謝委員的意見，將與中科院一所洽商使用儀器的可能性。