25
1 1 2 2 3 3 4 4 5 5 A A B B C C D D 4. ALL 0.1 uF AND 0.01uF CAPACITORS ARE DECOUPLING CAPS UNLESS OTHERWISE NOTED. THEY ARE SHOWN ON THE PAGE WITH THE INTEGRATED CIRCUITS THEY SHOULD BE PLACED NEAR. NOTES, UNLESS OTHERWISE SPECIFIED: 1. RESISTANCE VALUES IN OHMS. 2. CAPACTITANCE VALUES IN MICROFARADS. 3. REFERENCE DESIGNATORS USED: 5. OBSERVE THE FOLLOWING LAYOUT NOTES: 1. TOP - SIGNAL ROUTING 2. GROUND PLANE 3. INNER1 - SIGNAL ROUTING 4. VCC3 PLANE (3.3V BOARD) 5. INNER2 - SIGNAL ROUTING 6. INNER3 - SIGNAL ROUTING 7. VCC PLANE 2 8. INNER4 - SIGNAL ROUTING 9. GROUND PLANE 10. BOTTOM - SIGNAL ROUTING 6. BOARD PROPERTIES B. 50 +/- 5 OHM MATCHED IMPEDANCE C. OUTER LAYERS 0.5 OZ CU /W 0.5 OZ AU PLATING D. INNER LAYERS 1.0 OZ CU E. FR4 BOARD MATERIAL F. MINIMUM TRACE WIDTH/SPACING 4 MILS G. MINIMUM VIA SIZE 10/19 MIL H. LAYER STACKUP: A. ROUTE TO WITHIN 10% OF MANHATTAN DISTANCE SCHEMATIC INDEX 1 DM642 EVM Notes and Contents 2 User Options/Config 3 DM642 Clocks, Reset, Interrupts, Timers, and IIC 4 DM642 EMIF 5 Emulation Headers 6 DM642 Video Ports 7 DM642 PCI/HPI/EMAC 8 DM642 Power Pins 9 SDRAM 10 Expansion EMIF Buffers 11 Flash and Dual UART 12 RS232 Buffers 13 Video Port Expansion Switches 14 Video Port Daugher Card Connector 15 EMIF Daughter Card Connector 16 OSD FPGA 17 OSD FPGA Power 18 Video Decoder 1 19 Video Decoder 2 20 Video Encoder 21 Ethernet 22 PCI 23 AIC23 Audio Interface 24 Power 25 FPGA Power/Reset Circuitry REV ENGR 2 REVISION STATUS OF SHEETS 1 11 SH DATE 14 12 13 DATE ENGR-MGR MFG 7 DWN DATE 8 DATE 10 SH DATE CHK RLSE APPLICATION REV 3 5 NEXT ASSY DATE 6 DATE 9 QA USED ON 4 15 B A B A B A A A A A A A A A A R.R.P. T.W.K. R.R.P. R.R.P. C.M.D. R.R.P. R.R.P. 03/01/2004 03/01/2004 16 17 18 19 20 21 22 23 24 25 03/01/2004 03/01/2004 03/01/2004 03/01/2004 03/01/2004 REV SH A Initial schematic ready for layout. DESCRIPTION REV APPROVED DATE 01/07/04 RRP A A A A A B A A A B Sheet05: Add quick switch on JTAG to provide some ESD protection to EMU pins on DM642. Added optional emulator reset from pin A15. Sheet16: Added series termination resistors between FPGA and encoder 10/01/04 RRP B Sheet3: Added AND gate U49 to support optional emulator reset. Sheet20: HD Filters used on encoder outputs as shipped 507342 B DM642 Evaluation Module with TI Decoders (Version 3) B 1 25 Thursday, December 02, 2004 SPECTRUM DIGITAL INCORPORATED Title Size Document Number Rev Date: Sheet of

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1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

4. ALL 0.1 uF AND 0.01uF CAPACITORS ARE DECOUPLING CAPS UNLESSOTHERWISE NOTED. THEY ARE SHOWN ON THE PAGE WITH THE INTEGRATEDCIRCUITS THEY SHOULD BE PLACED NEAR.

NOTES, UNLESS OTHERWISE SPECIFIED:

1. RESISTANCE VALUES IN OHMS.

2. CAPACTITANCE VALUES IN MICROFARADS.

3. REFERENCE DESIGNATORS USED:

5. OBSERVE THE FOLLOWING LAYOUT NOTES:

1. TOP - SIGNAL ROUTING2. GROUND PLANE3. INNER1 - SIGNAL ROUTING4. VCC3 PLANE (3.3V BOARD)5. INNER2 - SIGNAL ROUTING6. INNER3 - SIGNAL ROUTING7. VCC PLANE 28. INNER4 - SIGNAL ROUTING9. GROUND PLANE10. BOTTOM - SIGNAL ROUTING

6. BOARD PROPERTIES

B. 50 +/- 5 OHM MATCHED IMPEDANCEC. OUTER LAYERS 0.5 OZ CU /W 0.5 OZ AU PLATINGD. INNER LAYERS 1.0 OZ CUE. FR4 BOARD MATERIALF. MINIMUM TRACE WIDTH/SPACING 4 MILSG. MINIMUM VIA SIZE 10/19 MILH. LAYER STACKUP:

A. ROUTE TO WITHIN 10% OF MANHATTAN DISTANCE

SCHEMATIC INDEX

1 DM642 EVM Notes and Contents2 User Options/Config3 DM642 Clocks, Reset, Interrupts, Timers, and IIC4 DM642 EMIF5 Emulation Headers6 DM642 Video Ports7 DM642 PCI/HPI/EMAC8 DM642 Power Pins9 SDRAM10 Expansion EMIF Buffers11 Flash and Dual UART12 RS232 Buffers13 Video Port Expansion Switches14 Video Port Daugher Card Connector15 EMIF Daughter Card Connector16 OSD FPGA17 OSD FPGA Power18 Video Decoder 119 Video Decoder 220 Video Encoder21 Ethernet22 PCI23 AIC23 Audio Interface24 Power25 FPGA Power/Reset Circuitry

REV

ENGR

2

REVISION STATUS OF SHEETS

1

11

SH

DATE

1412 13

DATE

ENGR-MGR

MFG

7

DWN

DATE8

DATE

10

SH

DATE

CHK

RLSEAPPLICATION

REV

3 5

NEXT ASSY

DATE

6

DATE

9

QA

USED ON

4

15

B A B A B A A A A A

AAAAA

R.R.P.

T.W.K.

R.R.P.

R.R.P.

C.M.D.

R.R.P.

R.R.P.

03/01/2004

03/01/2004

16 17 18 19 20

21 22 23 24 25 03/01/2004

03/01/2004

03/01/2004

03/01/2004

03/01/2004

REV

SH

A Initial schematic ready for layout.

DESCRIPTIONREV APPROVEDDATE

01/07/04 RRP

A A A A A

B A A A B

Sheet05: Add quick switch on JTAG to provide some ESD protection to EMUpins on DM642. Added optional emulator reset from pin A15.

Sheet16: Added series termination resistors between FPGA and encoder

10/01/04 RRPB

Sheet3: Added AND gate U49 to support optional emulator reset.

Sheet20: HD Filters used on encoder outputs as shipped

507342 B

DM642 Evaluation Module with TI Decoders (Version 3)

B

1 25Thursday, December 02, 2004

SPECTRUM DIGITAL INCORPORATED

Title

Size Document Number Rev

Date: Sheet of

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

USER LEDS

LEDS/SWITCHES/CONFIGURATION INPUTS

SPDIF BLOCK

ON ON

EMIF_ECLKINSEL[1:0]

NO POP

1K OHM

ECLKIN( DEFAULT)

CPU CLOCK /4 EMIF CLOCK

MODE SELECTEDR42 R40

NO POP

1K OHM1K OHM

1K OHMNO POP

NO POP CPU CLOCK /6 EMIF CLOCK

ECLKIN

OFF NO BOOT (DEFAULT)

BOOT_MODE[1:0]

MODE SELECTED

HPI/PCI BOOT MODE

S1-2 S1-1

OFF

OFF ON

RESERVED

EMIF 8 BIT ROM BOOT

ON

ON ON

OFF

LITTLE ENDIAN MODE (DEFAULT)

BIG ENDIAN MODE

S2-2(ENDIAN)

OFF

ON

ENDIAN MODE CONFIGURATION

MODE SELECTED

S2-1(PCI ROM)

OFF

ON

PCI MODE CONFIGURATION

MODE SELECTED

PCI EEPROM DISABLED(DEFAULT)

PCI ROM ENABLED

507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL. INCORPORATED

B

2 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

GND

USER_LED0(16)USER_LED1(16)USER_LED2(16)USER_LED3(16)USER_LED4(16)USER_LED5(16)USER_LED6(16)USER_LED7(16)

BOOT_MODE1 (4,10)

BOOT_MODE0 (4,10)

LENDIAN_MODE (3,14)

PCI_EEAI (3,14)

EMIF_ECLKINSEL0 (4,10)EMIF_ECLKINSEL1 (4,10)

SPDIF_OUT(6)

EXP_AUDIO_EN#(6,14)

VCC3.3

GND

VCC3.3VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

R114 NO POP

R44NO POP

R41NO POP

R40NO POP

R42NO POP

R22150

C237 0.1uF

C2380.1uF

J9 RCA JACK

1

2

R190 220

R191100

DS5GREEN

DS6GREEN

R17150

R18150

DS7

GREEN

R15150

R223 NO POP

R16150

DS8GREEN

R2201K

1 2

S2

DIP_SWITCH101184-00021 2

4 3

1 2 S1DIP_SWITCH

101184-0002

1 24 3

R221 NO POP

R219

1K

R115 NO POP

R89

1K

R90

1K

R21150

R20150

DS1

GREENDS2GREEN

DS3GREEN

R19150

DS4GREEN

U34

SN74LVC1G125

3

4

5

2

1

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

DM642 CLOCKS,RESETCIRCUITRY,I2CINTERFACE

3X

5.33X

8X

2.5X

3.33X

6X

2X

4X

5X

S1 S0

0 0

0

0

0

0

1

1

1

1

1

OPEN

OPEN

OPEN OPEN

OPEN

OPEN

1

100 MHz

125 MHz

133.25 MHz

62.5 MHz

50 MHz

83.25 MHz

150 MHz

75 MHz

200 MHz

MULTIPLY

Place all PLL external components as closeto the DSP. All PLL external componentsmust be on a single side of the board.

I2C ROM

THIS DESELECTS 641

OPTION, 0 AT POWER

ON RESET

OUTPUT

NO

POP

60 Megahertz Oscillator for 720MHz CPU50 Megahertz Oscillator for 600MHz CPU

507342 B

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL INCORPORATED

B

3 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

DSP_CLKIN

DSP_ECLKIN

DSP_PLL_VDD

DSP_PLL_VDD

DSP_ECLKIN

GND

PCI_EEAI(2,14)DSP_EXTINT4(14)

DSP_GPIO_3(2,14)

EMAC_ENABLE(7,14)

DSP_EXTINT5(14)

LENDIAN_MODE(2,14)

DSP_NMI(14)

DSP_EXTINT7(16)

FPGA_PROG# (17)

DSP_SCL0 (14,18,19,20,23)DSP_SDA0 (14,18,19,20,23)

DSP_TOUT1 (2,14)DSP_TINP1 (14)

FPGA_CCLK (17)

DSP_TINP0 (14)

FPGA_DIN (16)

DSP_TOUT0 (7,14)FPGA_INIT_EINT6(16)

VCC3.3

GND

FPGA_LOCK(17)

SYSTEM_RESET#(11,14,16,17,18,19,20,21,25)

EMULATOR_RSTn(5)

VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3 VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

C390.1uF+

C4010uF

E1EXCCET103U

EMI FILTER

1 3

2

I O

GN

D

TP21TP1

TP20TP1 R66

2KR672K

R174

NO POP

R205NO POP R203

10K

R173 360

R21710K

R171NO POP

C1190.1uF

RN27RPACK4-10K

12345 6 7 8

C3640.1uF

R1012K

C1900.1uF

R1721K

C1880.1uF

R120 33

C186.001uF

C189NO POP

L16

BLM21P221SN

U56 ICS512

2

8

467 5

1

3 VDD

X2

REFS0S1 CLK

X1/ICLK

GND

R123NO POP

R121NO POP

R119NO POPR122

10K

U26

60.00 MHz

4

32

1 VCC

OUTGND

EN

R266 0

R251NO POP

R267 0

R252NO POP

R253NO POP

R2540

U21

25 MHz

4

32

1 VCC

OUTGND

EN R118

33

C1870.1uF

L17

BLM21P221SN

C184.001uF

R5 NO POP

Clocks / Interrupts /

Timers / IIC

RESERVED

U25E

DM642AC2

AB3

AA2AE4

AD3AC4

D6C6

F4F3F2E1

M5L5

B4

P4

AA3

AF3

V6

E14

A4C5

A5B5

E4D3

H25

CLKIN

CLKINF

CLKMODE0CLKMODE1

CLKOUTTCLKOUTF

GP01 / CLKOUT4GP02 / CLKOUT6

EXTINT4 / GP04EXTINT5 / GP05EXTINT6 / GP06EXTINT7 / GP07

GP00 / DM641SELGP03 / PCIEEAI

NMI

RESET

AMUX1

PLL_LD

PLL_VDD

TSTSTRB

TINP0EMACEN / TOUT0

TINP1LENDIAN / TOUT1

SCL0SDA0

ECLKIN

R91 33

U16

24WC256

1 8

43 6

5

2 7A0 VCC

VSSNC SCL

SDA

A1 WP

U20 ICS512

2

8

467 5

1

3 VDD

X2

REFS0S1 CLK

X1/ICLK

GND

C3130.1uF

U49

SN74LVC1G08

1

24

53

R218 360

R176 360

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

NOTE 4.1: PLACE ALL

33-OHM RESISTORS AND

RESISTOR NETWORKS AS

CLOSE A SPOSSIBLE TO

THE CORRESPONDING U25

PINS.

NOTE: ALTERNATE PIN

NAMES

DM642 EMIF ANDTERMINATORS

507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

B

4 25Thursday, December 02, 2004

SPECTRUM DIGITAL INCORPORATED

Title

Size Document Number Rev

Date: Sheet of

TBE5#

TBE3#

TBE6#TBE7#

TBE2#

TBE4#

TBE0#TBE1#

DSP_EMU1

DSP_EMU4

ED17

ED

2

ED

8

ED

30

EA12EA13

ED

38

ED

48

DSP_EMU0

ED2

ED

10

ED

25

EA19

ED

39

ED13

ED15

ED[0:31]

ED

4

ED

22

EA11

BEz4

DSP_EMU6

ED23

ED7

ED

18

BEz7

ECLKO2

ED

37

ED

49

DSP_TMS

ED14

ED

12

ED

23

BEz5

SDCASz

ED

33

ED

53

ED12

ED1

ED20

ED

16E

D17

ED

29

DSP_EMU9

ED22

ED30

ED

7BEz0

BEz6

ECLKO1

ED

50

DSP_EMU5

DSP_EMU11

ED6

ED19

ED8

ED

6

ED

20

EA18

SDRASz

SDWEz

ED

35

ED

54

ED11

ED31

ED0

ED25

ED21

ED

11

ED

14

ED

21

EA16

EA22

DSP_TDO

DSP_EMU3

DSP_EMU8

ED29

ED

1

ED

15

BEz3

PDTz

ED

51

ED4

ED26

ED

19

EA17

ED

55

ED28

ED10

ED5ED

0

ED

5

ED

13

EA15

ED

32

DSP_EMU7

DSP_EMU10

ED24

ED

9

ED

24

EA21

BEz2

SOE3z

ED

52

DSP_TCLK

DSP_TDI

ED

3

ED27

ED3

ED

31

EA14

ED

36

DSP_EMU2

ED9

ED18

ED16

ED

26E

D27

ED

28

EA20

BEz1

SDCKE

ED

34

DSP_TRST#

TEA17

TEA15TEA14

TEA3

TEA13TEA12TEA11

TEA21

TEA5

TEA19TEA20

TEA4

TEA18

TEA22

TEA16

TEA21

TEA19TEA20

TEA22

GND

EA3 EA3EA4EA5

TEA7TEA6TEA10TEA9TEA8

EA4

EA9EA10

EA6EA5

EA7EA6

EA8EA7

EA10EA9EA8

CE0zCE1z

CE3zCE2z

ED

57

ED

62

ED

59

ED

63

ED

56

ED

61E

D60

ED

58

TED5

TED30TED31

TED

49

TED

34

TED

56

TED6

TED10

TED27

ED

41

TED19

TED16

TED9

TED11

ED

45

TED

52

TED4

TED22

TED

60

TED

32

TED7

TED17

ED

43

TED12

ED

47

TED

61

TED

35

TED

57

TED1

TED

47TE

D46

TED

45TE

D44

TED29

TED24

TED15

TED

51

TED13

TED

53

TED

63

TED

54

TED

62

TED8

TED

55

TED

50

ED

44

TED25

TED

48

TED

58

TED

33

TED

43

TED

40

TED3

TED

59

TED0

ED

46

TED26

TED21

TED18

TED

36

TED

39

ED

42TE

D41

TED2

TED28

TED

37

TED20

TED

38

TED14

TED23

ED

40

TED

42

TBE2# (9,10)TBE3# (9,10)

TBE1# (9,10)TBE0# (9,10)

TBE6# (9)TBE7# (9)

TBE4# (9)TBE5# (9)

TEA[3..22] (2,9,10)

TED[0..63] (9,10)

TSDRAS# (9,10)

TECLKOUT2 (10)TECLKOUT1 (9)

TSDCKE (9)

TPDT#TSOE3# (11,16)

TSDWE# (9,10)TSDCAS# (9,10)

TCE0# (9)TCE1# (11,16)TCE2# (10,11)TCE3# (10,11)

TEARDY(10)

DSP_EMU1(5)DSP_EMU0(5)

DSP_EMU2(5)DSP_EMU3(5)

DSP_TCLK(5)

DSP_TDI(5)DSP_TRST#(5)

DSP_TDO(5)

DSP_TMS(5)

DSP_EMU5(5)

DSP_EMU8(5)

DSP_EMU4(5)

DSP_EMU9(5)

DSP_EMU6(5)DSP_EMU7(5)

DSP_EMU11(5)DSP_EMU10(5)

BOOT_MODE1 (2,10)BOOT_MODE0 (2,10)

EMIF_ECLKINSEL0 (2,10)EMIF_ECLKINSEL1 (2,10)

VCC3.3

GND

TSDWE#(9,10)

TAOE# (9,10)TSDCAS#(9,10)

TAWE# (9,10)

TSDRAS#(9,10)TARE# (9,10)

VCC3.3

VCC3.3

RN

5

RP

AC

K8-

33

1 2 3 4 5 6 7 8910111213141516

R9733

RN17 RPACK8-3312345678 9

10111213141516

RN1 RPACK8-3312345678 9

10111213141516

R9433

RN

6

RP

AC

K8-

33

1 2 3 4 5 6 7 8910111213141516

R9833R374.7K

R9210K

RN8 RPACK8-3312345678 9

10111213141516

RN7 RPACK8-3312345678 9

10111213141516

R9633

EMIF and Emulation

U25A

DM642

B24

A24

B23

B22

C22

A23

C21

B21

D21

A21

C20

B20

D20

A20

D19

C19

H24

H23

G26

G23

G25

G24

F26

F23

F25

F24

E25

E24

D25

D26

C25

C26

M24M23N26N24N23P26P24P23

R24R23T25T24U26U25U24V23

V26V25V24U23

L24L23M26M25R26R25T23T22

K25K24K23L26

J24J25K26L25R22M22

J26J23

N22P22

AD

26A

D25

AC

25A

C26

AB

24A

B25

AB

23A

A24

AA

25A

A23

AA

26Y

24Y

25Y

23Y

26W

23

AD

19A

C19

AF2

0A

C20

AE

20A

D20

AF2

1A

C21

AE

21A

D21

AE

22A

D22

AD

23A

E23

AF2

3A

F24

W24

L22

E15

A18

A16

D14

B18

A15C14B15C15

D15B16C16A17D16B17

C17D17

ED

0E

D1

ED

2E

D3

ED

4E

D5

ED

6E

D7

ED

8E

D9

ED

10E

D11

ED

12E

D13

ED

14E

D15

ED

16E

D17

ED

18E

D19

ED

20E

D21

ED

22E

D23

ED

24E

D25

ED

26E

D27

ED

28E

D29

ED

30E

D31

EA03EA04EA05EA06EA07EA08EA09EA10

EA11EA12EA13EA14EA15EA16EA17EA18

ECLKINSEL0 / EA19ECLKINSEL1 / EA20

BOOTMODE0 / EA21BOOTMODE1 / EA22

BE0BE1BE2BE3BE4BE5BE6BE7

CE0CE1CE2CE3

SDRAS/AOESDCAS/ARESDWE/AWE

SDCKESOE3

PDT

ECLKOUT1ECLKOUT2

HOLDABUSREQ

ED

32E

D33

ED

34E

D35

ED

36E

D37

ED

38E

D39

ED

40E

D41

ED

42E

D43

ED

44E

D45

ED

46E

D47

ED

48E

D49

ED

50E

D51

ED

52E

D53

ED

54E

D55

ED

56E

D57

ED

58E

D59

ED

60E

D61

ED

62E

D63

HOLD

ARDY

TMS

TDI

TCLK

TRST

TDO

EMU0EMU1EMU2EMU3

EMU4EMU5EMU6EMU7EMU8EMU9

EMU10EMU11

TP22TP1

TP23TP1

R12733

RN2 RPACK8-3312345678 9

10111213141516

RN16 RPACK4-331234 5

678

RN

11

RP

AC

K8-

33

1 2 3 4 5 6 7 8910111213141516

R9533

RN

12

RP

AC

K8-

33

1 2 3 4 5 6 7 8910111213141516

RN15 RPACK8-3312345678 9

10111213141516

R9333

RN13 RPACK4-331234 5

678

RN14 RPACK8-33

12345678 9

10111213141516

R12633

TP7TP1

DSP JTAG HEADER

ROUTE TRACES ASONE GROUP. MATCHSIGNAL LENGTH.

LOCATE R-PACK NEAR DSP

EMULATION

J1 AND J2 NEED TOBE AS CLOSETOGETHER ASPHYSICALLYPOSSIBLE

506842 B

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL INCORPORATED

B

5 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

HUR_EMU9HUR_EMU8

HUR_EMU5HUR_EMU4

HUR_EMU7HUR_EMU6

HUR_EMU11

HUR_EMU2HUR_EMU3

HUR_EMU10

HUR_EMU1XDS_TRST#

GND

B.XDS_EMU0XDS_TCK B.XDS_TCK

B.XDS_TMS

XDS_TDI

XDS_EMU0

B.XDS_TDO

B.XDS_EMU0

XDS_EMU0

XDS_TMS

B.XDS_EMU1

XDS_EMU1

XDS_TDOB.XDS_TDI

XDS_TDO

HUR_EMU0XDS_TDI

XDS_EMU1

B.XDS_TCKRET HUR_TCKRTN

B.XDS_EMU1

B.XDS_TCKRET

XDS_TCKRET

XDS_TRST#

XDS_TCK

HUR_TCK

XDS_TMS

XDS_TCKRET

B.XDS_TRST#

DSP_TDO (4)

DSP_TDI (4)

DSP_TMS (4)

DSP_EMU9 (4)DSP_EMU8 (4)

DSP_EMU2 (4)

DSP_EMU7 (4)

DSP_EMU3 (4)

DSP_EMU5 (4)DSP_EMU4 (4)

DSP_EMU6 (4)

DSP_EMU0 (4)

DSP_EMU1 (4)

DSP_EMU10 (4)DSP_EMU11 (4)

DSP_TCLK (4)

DSP_TRST# (4)

GND

VCC3.3

EMULATOR_RSTn (3)

VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

R27210K

R244NO-POP

R1831K

R17833

R18033

RN4D39

RN3E39

RN4C39

RN3D39

U31

SN74LVC1G32

1

24

53

R179100 1%

RN4B39

RN4A39

U30

SN74LVC1G321

24

53

J19

HEADER 4x15

A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15

D1D2D3D4D5D6D7D8D9D10D11D12D13D14D15

B14C14B13C13

B12

C12B11C11B10C10

B9C9

B7

C7B6C6B5C5

B4

C4B3

C3B2

C2

B1B15C1

C15

B8

C8

GNDGNDGNDGNDGNDGNDGND

TYPE0GNDGNDGNDGNDGNDGND

TGTRST

GNDGNDGNDGNDGNDGNDGND

TYPE1GNDGNDGNDGNDGNDGNDGND

EMU0EMU1EMU2EMU3

TCLK

EMU4EMU5EMU6EMU7EMU8EMU9EMU10

TDO

EMU11EMU12EMU13EMU14EMU15

TDI

EMU16EMU17

TRSTnTMS

EMU18

ID0ID1ID2ID3

TVD

TCKRTN

C280

18pF

J7

HEADER 7x2, Emulation

13579

24

810

11 1213 14

C2790.1uF

RN3G39

RN4E39

RN4F39

RN4G39

RN3C39RN3A39

RN3B39

RN4H39

RN3F39

R177 1K

C3710.1uF

R277 0

R276NO-POP

R274NO-POP

R275NO-POP

U57

74CBTLV3245A

218317416515614713812911

191

20

10

A1B1A2B2A3B3A4B4A5B5A6B6A7B7A8B8

GNC

VCC

GND

RN3H39

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

DM642 VIDEO PORTS

PCI SPEED CONFIGURATION

R170

1K

NO POP PCI ENABLED @66MHZ

OR DISABLED

PCI ENABLED @33MHZ

507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL INCORPORATED

B

6 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

VP2D11

VP2D0

VP2D4

VP2D12

VP2D7

VP2D5

VP2D13

VP2D1

VP2D6

VP2D14

VP2D16

VP2D2

VP2D10

VP2D17

VP2D8

VP2D15

VP2D9

VP2D18VP2D19

VP2D3

STCLK

STCLK

GND

4.1V

VP0D6

VP0D19AHCLKX0

VP0D15AMUTEIN

VP0D1

VP0D4

VP0D10VP0D9

AHCLKX0

VP0D7

VP0D12ACLKR0

VP0D14AHCLKR0

VP0D8

VP0D13AFSR0

VP0D17ACLKX0

VP0D0

VP0D5

VP0D2

VP0D11

VP0D16AMUTE

VP0D18AFSX0

VP0D3

ACLKR0AFSR0

AFSX0ACLKX0

VP1D8

VP1D5

AXR2

VP1D6

VP1D10VP1D9

VP1D7

VP1D4

VP1D1

VP1D15AXR3

VP1D17AXR5

VP1D14AXR2VP1D13AXR1

VP1D11

VP1D2

VP1D16AXR4

VP1D18AXR6

VP1D0

VP1D19AXR7

AXR1AXR0VP1D12AXR0

VP1D3

AXR0

AXR1

AXR2

VP1CTL2(13,14)

VP1D[0:19] (13,14)

VP1CTL0(13,14)VP1CLK0(13,14)

VP1CTL1(13,14)

VP1CLK1(14)

VP2D[0..19] (13,14)

VP0D[0..19] (13,14)

VP0CTL0(13,14)

VP0CTL2(13,14)

VP0CLK1(14)

VP0CLK0(13,14)

VP0CTL1(13,14)

VP2CTL0(13,14)

VP2CLK1(13,14)

VP2CTL2(13,14)VP2CTL1(13,14)

VP2CLK0(13,14)

PLL_MS(16)

PLL_MD(16)PLL_MC(16)

EXP_AUDIO_EN#(2,14)

BCLK2 (23)LRCOUT (23)

AIC23_STCLK (23)

SAA7105_STCLK (20)DCARD_STCLK (14)

VCC3.3 GND

4.1V (13,25)

BCLK1 (23)

AIC23SDATAOUT (23)

LRCIN (23)

AIC23SDATAIN (23)

SPDIF_OUT (2)

VCC3.3

VCC3.3

4.1V

VCC3.3

VCC3.3

VCC3.3

VCC3.3

4.1V

4.1V

R11210K

Video Port 0

McBSP0

McASP

Control

Video Port 1

McBSP1

McASP Data

Video Port 2

VIC

U25B

DM642

AF18AE18AF17AF16AE16AD16AC16AB16AE15AD15AC15AB15AD14AC14AB14AD13AC13AB13AD12AC12

AF5AF6AE6AD6AC6AE7AD7AC7AD8AC8AE9AD9AC9AD10AC10AE11AD11AC11AB11AB12

AF14AF12

AE17AC17AD17

AF8AF10

AF4AE5AD5

C8D8A9B9C9D9A10B10C10D10A11B11C11D11E11B12C12D12E12E13

A7A13

B8D7C7

AD1AC1

VP0_D00VP0_D01

CLKX0/VP0_D02FSX0/VP0_D03DX0/VP0_D04

CLKS0/VP0_D05DR0/VP0_D06

FSR0/VP0_D07CLKR0/VP0_D08

VP0_D09VP0_D10VP0_D11

ACLKR0/VP0_D12AFSR0/VP0_D13

AHCLKR0/VP0_D14AMUTEIN/VP0_D15

AMUTE/VP0_D16ACLKX0/VP0_D17

AFSX0/VP0_D18AHCLKX0/VP0_D19

VP1_D00VP1_D01

CLKX1/VP1_D02FSX1/VP1_D03DX1/VP1_D04

CLKS1/VP1_D05DR1/VP1_D06

FSR1/VP1_D07CLKR1/VP1_D08

VP1_D09VP1_D10VP1_D11

AXR0/VP1_D12AXR1/VP1_D13AXR2/VP1_D14AXR3/VP1_D15AXR4/VP1_D16AXR5/VP1_D17AXR6/VP1_D18AXR7/VP1_D19

VP0_CLK0VP0_CLK1

VP0_CTL0VP0_CTL1VP0_CTL2

VP1_CLK0VP1_CLK1

VP1_CTL0VP1_CTL1VP1_CTL2

VP2_D00VP2_D01VP2_D02VP2_D03VP2_D04VP2_D05VP2_D06VP2_D07VP2_D08VP2_D09VP2_D10VP2_D11VP2_D12VP2_D13VP2_D14VP2_D15VP2_D16VP2_D17VP2_D18VP2_D19

VP2_CLK0VP2_CLK1

VP2_CTL0VP2_CTL1VP2_CTL2

VDAC / GP08STCLK

RN23RPACK8-33

12345678 9

10111213141516

R175 33

C2440.1uF

R1701K

U54 74CBT3245A2 183 174 165 156 147 138 129 11

191

20

10

A1 B1A2 B2A3 B3A4 B4A5 B5A6 B6A7 B7A8 B8

GNC

VCC

GND

RN22RPACK8-33

12345678 9

10111213141516

C344NO POP C345

NO POP

U27

PLL1708

11310

11

20

8

4167

65

19

9

17

3

18

2

1514

12

VDD1VDD2XT1

XT2

VDD3

VCC

DGND1DGND2MS

MCMD

SCKO1

AGND

DGND3

SCKO3

SCKO0

SCKO2

MCKO2MCKO1

CSEL

RN20 RPACK4-33

12345

678

C245

100pF

C2420.1uF

Q22N3904

R1682.2K

R167 100K

R166

33

R169 22.1K 1%

U28 74CBT3245A2 183 174 165 156 147 138 129 11

191

20

10

A1 B1A2 B2A3 B3A4 B4A5 B5A6 B6A7 B7A8 B8

GNC

VCC

GND

R117 33R116 33

R165 33R164 33

C340

0.1uF

Y2

27MHz

C182

0.1uF

U32

PI6CX100-27W

1 8

43 6

5

2 7X1 X2

GNDVIN VDD

CLKOUT

NC1 NC2

TP17

TP1

TP18TP1

TP19TP1

C185

0.1uF

C243

10pF

R124 33

RN21 RPACK4-33

12345

678

R125 33

RN24 RPACK4-33

12345

678

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

DM642 PCI/HPI/EMACINTERFACES

R206 AND R207 ARE

USED TO CONFIGURE

THE HPI WIDTH

507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL INCORPORATED

B

7 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

PCI_AD24

PCI_AD30

PCI_AD28

PCI_AD16

PCI_AD18

PCI_AD20

PCI_AD22PCI_AD21

PCI_AD19

PCI_AD17

PCI_AD23

PCI_AD27

PCI_AD31

PCI_FRAMEzPCI_TRDYz

PCI_STOPz

PCI_PAR

PCI_CBEz0

PCI_CBEz3

PCI_IRDYz

PCI_DEVSELz

PCI_PERRzPCI_SERRz

PCI_CBEz1

PCI_REQzPCI_GNTz

PCI_IDSEL

PCI_INTAz

PCI_RSTz

PCI_CLK

PCI_AD26PCI_AD25

PCI_AD29

PCI_CBEz2

PCI_AD21

PCI_AD29

R_MTXD3

MRXER

MRXD1

MRCLK

MCOL

PCI_AD19

PCI_AD17

PCI_AD27

PCI_AD31

R_MTXD1

MRXD3

PCI_AD25

PCI_EN

S_PCI_AD25

S_PCI_AD29

S_PCI_AD27

S_PCI_AD31

S_PCI_AD19

S_PCI_AD17

S_PCI_AD21

PCI_DETECT#

S_PCI_AD23

PCI_AD23

PCI_AD4

PCI_AD0

PCI_AD2PCI_AD1

PCI_AD15

PCI_AD13

PCI_AD3

PCI_AD10PCI_AD11

PCI_AD5

PCI_AD8PCI_AD9

PCI_AD12

PCI_AD7PCI_AD6

PCI_AD14

PCI_AD5

PCI_DETECT#

MRXD0

PCI_AD30

S_PCI_AD28

R_MTXD2

PCI_AD16

PCI_AD18

PCI_AD28S_PCI_AD24

PCI_AD22

S_PCI_AD30

PCI_AD20S_PCI_AD16

S_PCI_AD22

R_MTXEN

PCI_AD24MCRS

S_PCI_AD26

R_MTXD0

PCI_DETECT#

S_PCI_AD20

MRXDV

S_PCI_AD18

MTCLK

PCI4.1V

PCI_AD26

MRXD2

PCI4.1VPCI4.1V

PCI_DETECT#

XSPCS

GND

XSPDI

PCI_PAR

PCI_DEVSELzPCI_STOPzPCI_TRDYz

PCI_SERRzPCI_PERRz

PCI_DETECT#

PCI_EN

R_MTXD3R_MTXD1

R_MTXD2R_MTXD0

R_MTXEN

XSPDO_MDIOXSPCLK_MDCLK

S_PCI_AD[16:31](22)PCI_AD[0:15](22)

PCI_CBEz0(22)PCI_CBEz1(22)PCI_CBEz2(22)PCI_CBEz3(22)

PCI_REQz(22)PCI_GNTz(22)

PCI_IDSEL(22)

PCI_INTAz(22)

PCI_FRAMEz(22)

PCI_IRDYz(22)

PCI_RSTz(22)

PCI_CLK(22)

MCOL(21)

MRCLK(21)

MRXER(21)

MRXD3(21)

MRXD1(21)

PCI_DETECT#(22)

ENET_PWRDN (21)

VCC3.3

GND

VCC5

PCI4.1V(22)

MCRS(21)

MRXD0(21)

MRXD2(21)

MRXDV(21)

MTCLK(21)

XSPCLK_MDCLK(21)XSPDO_MDIO(21)

PCI_TRDYz(22)PCI_STOPz(22)

PCI_DEVSELz(22)

PCI_PERRz(22)PCI_SERRz(22)

PCI_PAR(22)

MTXD3 (21)MTXD1 (21)

MTXD2 (21)MTXD0 (21)

MTXEN (21)

EMAC_ENABLE (3,14)

VCC3.3

VCC5

VCC3.3 VCC5

VCC3.3

VCC3.3

VCC3.3

VCC3.3

U51

SN74CBT16233DGGR

56

1

30

14

13 44

27

2535

508

4711

553

526

499

4612

544517481045

2928

4216391936223325

4117382035233226

1540183721342431

43

1B1

1A

SEL1

VC

C

DG

ND

DG

ND

TEST1

2B13B14B15B16B17B18B1

1B22B23B24B25B26B27B28B2

2A3A4A5A6A7A8A

SEL2TEST2

9B110B111B112B113B114B115B116B1

9B210B211B212B213B214B215B216B2

9A10A11A12A13A14A15A16A

VC

C

R248 33

R24733

R24633

U39 74AHC1G14

42

5

31

YA

VCC

GNDNC

U50

93LC66B

1234

678

5

CSCLKDIDO

NCNC

VCC

VSS

R2144.7k

R20410k

C336

0.1uF

R206NO POP

R207

NO POP

PCI / HPI / EMAC

U25D

DM642

Y3AA1

Y2W3Y1W4W2V2V3

Y4

V1U4U2U3U1T3M3M2M4L2L3K2L4K1K4J1J3H2J4G2H3G1

R2

T2

N3N4

M1

N1

V4

E2

J2

F1H4

G4

C1

G3

K3

P3

R3P1

R1

T4R4P5R5

HD00 / AD00HD01 / AD01

HD03 / AD03HD04 / AD04

HWDTHSEL / HD05 / AD05HD06 / AD06HD07 / AD07HD08 / AD08HD09 / AD09

HD02 / AD02

HD10 / AD10HD11 / AD11HD12 / AD12HD13 / AD13HD14 / AD14HD15 / AD15

MTXD0 / HD16 / AD16MTXD1 / HD17 / AD17MTXD2 / HD18 / AD18MTXD3 / HD19 / AD19MTXEN / HD20 / AD20

MCOL / HD21 / AD21MTCLK / HD22 / AD22

HD23 / AD23MRXD0 / HD24 / AD24MRXD1 / HD25 / AD25MRXD2 / HD26 / AD26MRXD3 / HD27 / AD27MRXDV / HD28 / AD28MRXER / HD29 / AD29

MCRS / HD30 / AD30MRCLK / HD31 / AD31

PSERR / HDS1

PCBE1 / HDS2

PTRDY / HHWILPFRAME / HINT

PCBE2 / HR/W

PIRDY / HRDY

PCBE0

PCIEN

PCBE3 / GP10

PREQ / GP11PGNT / GP12

PINTA / GP13

PCLK / GP14

PRST / GP15

PIDSEL / GP9

PPAR / HAS

PSTOP / HCNTL0PDEVSEL / HCNTL1

PPERR / HCS

XSPCSXSPDIXSPDO / MDIOXSPCLK / MDCLK

RN28

RPACK4-33

12345

678

U41

SN74CBT16233DGGR

56

1

30

14

13 44

27

2535

508

4711

553

526

499

4612

544517481045

2928

4216391936223325

4117382035233226

1540183721342431

43

1B1

1A

SEL1

VC

C

DG

ND

DG

ND

TEST1

2B13B14B15B16B17B18B1

1B22B23B24B25B26B27B28B2

2A3A4A5A6A7A8A

SEL2TEST2

9B110B111B112B113B114B115B116B1

9B210B211B212B213B214B215B216B2

9A10A11A12A13A14A15A16A

VC

C

R2114.7k

R2094.7k

R2104.7k

C321

0.1uF

R2124.7k

C315

0.1uF

C337

0.1uF

C334

0.1uF

R2084.7k

C323

0.1uF

R2221K

R224NO POP

R249 0

D8LM4040DCIM3-4.1

21

R216 1.6K

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

DM642 POWER PINS

CORE CAPACITORS ARE 0402 SIZE

507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL INCORPORATED

B

8 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

COREMONIOMON

GND

DSP_CVDD VCC3.3

GND

DSP_CVDD

DSP_CVDD

DSP_CVDD

VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3DSP_CVDDVCC3.3

VCC3.3

DSP_CVDD

DSP_CVDD

DSP_CVDD

DSP_CVDD

VCC3.3

VCC3.3

DSP_CVDD

C263

0.1uF

C264

0.1uF

C275

0.1uF

C196

0.1uF

C253

0.1uF

C272

0.1uF

C203

0.1uF

C268

0.1uF

+C7

33uF

C278

0.1uF

C214

0.1uF

+C38

10uF

C319

0.1uF

C206

0.1uF

C265

0.1uF

C200

0.1uF

C212

0.1uF

C195

0.1uF

C204

0.1uF

+C2

33uF

C210

0.1uF

C247

0.1uF

+C3

33uF

C274

0.1uF

C209

0.1uF

C202

0.1uF

C267

0.1uF

C270

0.1uF

C205

0.1uF

C259

0.1uF

C269

0.1uF

C258

0.1uF

C273

0.1uF

C197

0.1uF

C208

0.1uF

C271

0.1uF

C249

0.1uFC257

0.1uF

C246

0.1uF

C211

0.1uF

C201

0.1uF

C194

0.1uF

C260

0.1uF

C207

0.1uF

C191

0.1uF

+C25

10uF

C213

0.1uF

C199

0.1uF

C277

0.1uF

Power and Ground

Connections

U25C

DM642101562-0001

F6F7

F20F21G6G7G8

G10G11G13

G16G17G19G20G21H20

K7K20

L7L20

N7

P20

T7T20U7

U20W20

Y6Y7Y8

Y10Y11

Y14Y16Y17Y19Y20Y21AA6AA7

AA20AA21

A2A25B1

B14

B26

E7E8E10E17E19E20

F9F12F15F18G5G22H5H22

J21K5K22M6M21N2P25R21U5U22V21W5W22

Y5Y22AA9AA12AA15AA18

AB7AB8AB10AB17AB19AB20

AE1

AE13

AE26AF2AF25

A1

A3

A6

A8

A12

A14

A19

A22

A26

B3

B6

B7

B13

B19

C2

C4

C13

C18

C23

D1

D2

D5

D13

D18

D22

D24

E3

E6

E9

E16

E18

E21

E23

E26

F5 F8 F10

F11

F13

F14

F16

F17

F19

F22

G9

G12

G15

G18

H1

H6

P2

P6

P21

R7

R20

T1 T5 T6 T21

T26

U6

U21

V5

V7

V20

V22

W1

W6

W21

W26

Y9

Y12

Y15

Y18

AB

4

AA

4A

A5

AA

8A

A10

AA

11A

A13

AA

14A

A16

AA

17A

A19

AA

22A

B1

AB

2

AB

6A

B9

AB

18A

B21

AB

26A

C3

AC

5A

C18

AC

22A

C24

AD

2

B2

B25

C3C24D4D23E5

E22

G14

J6N20P7

W25

Y13

AB5

AB22AC23AD24

AE2

AE25

M12

M13

M14

M15

N12

N13

N14

N15

P12

P13

P14

P15

R12

R13

R14

R15

H21

H26

J5 J7 J20

J22

K6

K21

L1 L6 L21

M7

M20

N5

N6

N21

N25

AD

4A

D18

AE

3A

E8

AE

10A

E12

AE

14A

E19

AE

24A

F1A

F7A

F9A

F11

AF1

3A

F15

AF1

9A

F22

AF2

6

H7R6

W7

CVDDCVDDCVDDCVDDCVDDCVDDCVDDCVDDCVDDCVDD

CVDDCVDDCVDDCVDDCVDDCVDDCVDDCVDDCVDDCVDD

CVDD

CVDD

CVDDCVDDCVDDCVDDCVDDCVDDCVDDCVDDCVDDCVDD

CVDDCVDDCVDDCVDDCVDDCVDDCVDDCVDDCVDDCVDD

DVDDDVDDDVDD

DVDD

DVDD

DVDDDVDDDVDDDVDDDVDDDVDD

DVDDDVDDDVDDDVDDDVDDDVDDDVDDDVDD

DVDDDVDDDVDDDVDDDVDDDVDDDVDDDVDDDVDDDVDDDVDDDVDDDVDD

DVDDDVDDDVDDDVDDDVDDDVDD

DVDDDVDDDVDDDVDDDVDDDVDD

DVDD

DVDD

DVDDDVDDDVDD

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

S

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

S

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

S

DVDD

DVDD

DVDDDVDDDVDDDVDDDVDD

DVDD

CVDD

DVDDCVDDCVDD

DVDD

CVDD

DVDD

DVDDDVDDDVDD

DVDD

DVDD

CVDD

VS

S

CVDD

VS

S

VS

S

CVDD

VS

S

CVDD

CVDD

VS

S

CVDD

VS

S

VS

S

CVDD

VS

S

CVDD

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

S

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

VS

SV

SS

CVDDMONDVDDMONVSSMON

C317

0.1uF

C193

0.1uF

C320

0.1uF

C266

0.1uF

C310

0.1uF

R213 0R215 0

+C24

10uF

C261

0.1uF

C316

0.1uF

C276

0.1uF

C251

0.1uF

C318

0.1uF

C311

0.1uF

C312

0.1uF

C262

0.1uF

C255

0.1uF

C198

0.1uF

C256

0.1uF

C254

0.1uF

C252

0.1uF

C248

0.1uF

C250

0.1uF

C192

0.1uF

1

1

2

2

3

3

4

4

5

5

A A

B B

C C

D D

SDRAM MEMORY

507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL. INCORPORATED

B

9 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

TSDCAS#

TSDCKE

TSDWE#

TECLKOUT1

TSDCAS#TSDRAS#

TCE0#

TED[0:63]

TSDCKETECLKOUT1

TCE0#TSDRAS#

TED45

TED40TED41

TED43TED42

TED44

TED47TED46

TSDWE#

TEA8TEA7

TEA9

TEA15

TEA11TEA12

TEA10

TEA14

TEA4

TEA9

TEA6

TEA12

TEA3

TEA6

TEA10

TEA14TEA13

TEA15

TEA11

TEA7

TEA5

TEA16

TEA3

TEA16

TEA8

TEA4

TEA13

TEA5

TED58

TED62TED63

TED10

TED14

TED26

TED56

TED29

TED13

TED31

TED12

TED9

TED59

TED30

TED60

TED25

TED11

TED28TED61

TED8

TED57

TED27

TBE3#TBE2#

TBE7#

TBE1#

TBE5#TBE6#

TBE4#

TBE0#

TBE0#

TBE1#TBE2#TBE3#

TBE4#TBE5#TBE6#

TBE7#

TED5

TED1

TED6

TED2

TED0

TED7

TED4TED3

TED24

TED19TED20

TED18

TED16

TED15

TED22TED21

TED17

TED23

TED32

TED38

TED36

TED33TED34

TED37

TED35

TED39

TED50TED49TED48

TED51

TED54TED55

TED53TED52

GND

TEA[3..22](2,4,10)

TED[0..63](4,10)

TBE2#(4,10)

TBE5#(4)

TBE7#(4)

TBE4#(4)

TBE0#(4,10)

TBE3#(4,10)

TBE6#(4)

TBE1#(4,10)

TECLKOUT1(4)

TSDCAS#(4,10)TSDWE#(4,10)

TSDRAS#(4,10)

TCE0#(4)

TSDCKE(4)

VCC3.3

GND

VCC3.3 VCC3.3

VCC3.3

VCC3.3

VCC3.3

U13

MT48LC4M32B2

24578101113

2223

24

252627

4547485051535456

68

77

60616263646566

7476

79808283853133343637394042

44587286

126

323846527884

115294339

354149557581

18

67

19

17

20

16712859

21

143057697073

DQ0DQ1DQ2DQ3DQ4DQ5DQ6DQ7

BA0BA1

A10

A0A1A2

DQ24DQ25DQ26DQ27DQ28DQ29DQ30DQ31

CLK

DQ10

A3A4A5A6A7A8A9

DQ8DQ9

DQ11DQ12DQ13DQ14DQ15DQ16DQ17DQ18DQ19DQ20DQ21DQ22DQ23

VSSVSSVSSVSS

VSSQVSSQ

VSSQVSSQVSSQVSSQVSSQVSSQ

VDDVDDVDDVDDVDDQVDDQVDDQVDDQVDDQVDDQVDDQVDDQ

CAS

CKE

RAS

WE

CS

DQM0DQM1DQM2DQM3

A11

NC1NC2NC3NC4NC5NC6

C153

0.1uF

+C347

4.7uF

C152

0.1uF

C123

0.1uF

C151

0.01uF

C150

0.1uF

C155

0.01uF

C122

0.01uF

C121

0.1uF

C124

0.01uF

C154

0.1uF

U14

MT48LC4M32B2

24578101113

2223

24

252627

4547485051535456

68

77

60616263646566

7476

79808283853133343637394042

44587286

126

323846527884

115294339

354149557581

18

67

19

17

20

16712859

21

143057697073

DQ0DQ1DQ2DQ3DQ4DQ5DQ6DQ7

BA0BA1

A10

A0A1A2

DQ24DQ25DQ26DQ27DQ28DQ29DQ30DQ31

CLK

DQ10

A3A4A5A6A7A8A9

DQ8DQ9

DQ11DQ12DQ13DQ14DQ15DQ16DQ17DQ18DQ19DQ20DQ21DQ22DQ23

VSSVSSVSSVSS

VSSQVSSQ

VSSQVSSQVSSQVSSQVSSQVSSQ

VDDVDDVDDVDDVDDQVDDQVDDQVDDQVDDQVDDQVDDQVDDQ

CAS

CKE

RAS

WE

CS

DQM0DQM1DQM2DQM3

A11

NC1NC2NC3NC4NC5NC6

#OE DIR OPERATIONL L A <-- BL H A --> BH X ISOLATION

DAUGHTER CARD BUFFERING 507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL. INCORPORATED

B

10 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

TED30

TED26

TED29

TED16

TED31

TED23

TED28TED27

TED25TED24

TED22TED21TED20TED19TED18TED17

GND

TED12

TED1

TED10

TED14

TED8

TED0

TED15

TED2TED3TED4TED5TED6TED7

TED9

TED11

TED13

DC_D9DC_D8

DC_D4

DC_D13

DC_D3

DC_D15

DC_D12

DC_D6

DC_D1

DC_D5

DC_D0

DC_D11

DC_D7

DC_D14

DC_D2

DC_D10

DC_D25

DC_D16

DC_D29

DC_D21

DC_D30

DC_D19

DC_D23

DC_D31

DC_D22

DC_D17

DC_D20

DC_D24

DC_D27

DC_D18

DC_D28

DC_D26

TEA9

TEA4

TEA12

TEA14

TEA10

TEA6

TEA11

TEA7

TEA5

DC_A11

DC_A6

DC_A4

DC_A3

DC_A5

DC_A17

DC_A12

DC_A13

DC_A18

TEA8

TEA15TEA16

TEA3TEA13

TEA18TEA17

TEA19TEA20

TEA22TEA21

DC_A19DC_A20DC_A21DC_A22

DC_A16DC_A15DC_A14

DC_A7DC_A8DC_A9DC_A10

DC_A[22..3] (11,15,16)

TEA[3..22](2,4,9)DC_D[31..0] (11,15,16)

TECLKOUT2(4)

DC_ARDY(15)

DC_ECLKOUT2 (15,16)

DC_EMIFA_DIR(11)

DC_EMIFA_OE#(11)

TED[0..63](4,9)

TEARDY (4)

VCC3.3

GND

TBE3#(4,9)TBE0#(4,9)

TBE1#(4,9)

TBE2#(4,9)

DC_BE3# (15)

DC_BE2# (15)

DC_BE1# (15)

DC_BE0# (15)

TSDWE#(4,9)TSDCAS#(4,9)TSDRAS#(4,9)

DC_ARE# (11,15,16)DC_AOE# (11,15,16)

DC_AWE# (11,15,16)

DC_CE2# (15,16)DC_CE3# (15,16)TCE3#(4,11)

TCE2#(4,11)

VCC3.3

VCC3.3 VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

R39360

R43360

U3

SN74LVT16245B

718 31

42

4746444341403837

235689

1112

3635333230292726

1314161719202223

4812524

4101521

28343945

VccVcc Vcc

Vcc

1A11A21A31A41A51A61A71A8

1B11B21B31B41B51B61B71B8

2A12A22A32A42A52A62A72A8

2B12B22B32B42B52B62B72B8

1OE1DIR2OE2DIR

GNDGNDGNDGND

GNDGNDGNDGND

U5

SN74LVT16245B

718 31

42

4746444341403837

235689

1112

3635333230292726

1314161719202223

4812524

4101521

28343945

VccVcc Vcc

Vcc

1A11A21A31A41A51A61A71A8

1B11B21B31B41B51B61B71B8

2A12A22A32A42A52A62A72A8

2B12B22B32B42B52B62B72B8

1OE1DIR2OE2DIR

GNDGNDGNDGND

GNDGNDGNDGND

U2

SN74LVT16245B

718 31

42

4746444341403837

235689

1112

3635333230292726

1314161719202223

4812524

4101521

28343945

VccVcc Vcc

Vcc

1A11A21A31A41A51A61A71A8

1B11B21B31B41B51B61B71B8

2A12A22A32A42A52A62A72A8

2B12B22B32B42B52B62B72B8

1OE1DIR2OE2DIR

GNDGNDGNDGND

GNDGNDGNDGND

C900.1uF

C870.1uF

C890.1uF

C880.1uF

R38 33

U4

SN74LVT16245B

718 31

42

4746444341403837

235689

1112

3635333230292726

1314161719202223

4812524

4101521

28343945

VccVcc Vcc

Vcc

1A11A21A31A41A51A61A71A8

1B11B21B31B41B51B61B71B8

2A12A22A32A42A52A62A72A8

2B12B22B32B42B52B62B72B8

1OE1DIR2OE2DIR

GNDGNDGNDGND

GNDGNDGNDGND

C840.1uF

C830.1uF

C860.1uF

C850.1uF

C800.1uF

C790.1uF

R45360

C810.1uF

C820.1uF

C770.1uF

C760.1uF

C750.1uF

C780.1uF

+ C350

4.7uF

+ C349

4.7uF

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FLASH MEMORY/DUAL UART507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL. INCORPORATED

B

11 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

DC_D0DC_D1DC_D2DC_D3DC_D4DC_D5DC_D6DC_D7

DC_D0DC_D1DC_D2DC_D3DC_D4DC_D5DC_D6DC_D7

DC_A3DC_A4DC_A5

DC_A22

DC_A21

DC_A14

DC_A5

DC_A9

DC_A11

DC_A16DC_A15

DC_A13

DC_A3

DC_A6

DC_A18

DC_A20

DC_A4

DC_A7DC_A8

DC_A10

DC_A12

DC_A17

DC_A19

FLASH_CE#

DC_A22

GND

UART_CLK

DC_A8

DC_A7DC_A6

SYSTEM_RESET#(3,14,16,17,18,19,20,21,25)

FLASH_EXT_A20(16)FLASH_EXT_A21(16)

DC_D[31..0](10,15,16)

DC_A[22..3](10,15,16)

DC_AWE#(10,15,16)DC_ARE#(10,15,16)

UART_INTA (16)UART_INTB (16)

SYSTEM_RESET(20,25)

UART_B_DCD (12)

UART_B_RI (12)

UART_A_RI (12)

TCE1#(4,16)

FLASH_EXT_A19(16)

DC_AOE#(10,15,16)

DC_AWE#(10,15,16)DC_ARE#(10,15,16)

UART_A_RX (12)UART_A_TX (12)

UART_A_DTR (12)UART_A_RTS (12)

UART_B_RTS (12)

UART_B_RX (12)

UART_B_DTR (12)

UART_B_CTS (12)

UART_B_TX (12)

UART_B_DSR (12)

UART_RXDY_A# (16)UART_TXDY_A# (16)UART_RXDY_B# (16)UART_TXDY_B# (16)

UART_A_DCD (12)

UART_A_DSR (12)UART_A_CTS (12)

DC_AWE#(10,15,16)DC_ARE#(10,15,16)

DC_EMIFA_OE# (10)

DC_EMIFA_DIR (10)

VCC3.3

GND

FPGA_DC_EMIF_DIR(16)FPGA_DC_EMIF_OE#(16)

TCE2#(4,10)TCE3#(4,10)

TSOE3#(4,16)

FLASH_EXT_A22(16)

VCC3.3

VCC3.3

VCC3.3VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

C730.1uF

C71

NO POP

R36

33

L1

BLM21P221SN

C72.001uF

R8

10K

U9

TL16C752B

4445464748123

282726

24

1011

36 9

19

15

4

5740

8162320

3839

21

12

1314

31

29

22

30

42

17

43186

34

35

4133

32

2537

D0D1D2D3D4D5D6D7

A0A1A2

NC1

CSACSB

RESET OPB

IORD

IOWR

RXB

RXATXACDA

TXBCDB

CTSBDSRB

CTSADSRA

RIB

NC0

XTAL1XTAL2

RXRDYA

INTB

RTSB

INTA

VCC

GND

TXRDYARXRDYBTXRDYB

DTRA

DTRB

RIARTSA

OPA

NC2NC3

C1200.1uF

R243 33

R242 33

R6910K

C54

0.1uF

R7110K

C55

0.1uFTP30TestPoint1

R68 33R70 33

U15

GAL16LV8-3100710-0003

123456789

11

1213141516171819

20

10

I0I1I2I3I4I5I6I7I8I9

F0F1F2F3F4F5F6F7

VCC

GND

R72 33

R910K

U10

29.4912 MHz

4

32

1 VCC

OUTGND

EN

U6

AM29LV033C

212019181716151487

36654321

4013

29

2526272832333435

31

11

38

22249

12

10

37

30

23 39

A0A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17A18

A21

DQ0DQ1DQ2DQ3DQ4DQ5DQ6DQ7

VC

C2

ACC

A20

CEOEWE

RDY-BY

RESET

A19

VC

C

VS

S1

VS

S2

R13 NO POP

R12 10K

+C351

10uF

R1110K

R1010K

C74

0.1uF

R6510K

R6410K

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

UART

1

2

3

4

5

6

7

8

9

NAME

CARRIER DETECT

OUT

OUT

OUT

DTR

GND

RTS

CTS

TX DATA

IN

IN

IN

IN

IN

RING INDICATOR

GND

DSR

RX DATA

UART IN/OUT

UART DRIVERS 507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL. INCORPORATED

B

12 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

GND

S_A_RTSS_A_RXD

S_A_CTS

S_A_RI

S_A_DCD

S_A_DTR

S_A_DSR

S_A_TXD

S_A_TXD

S_A_DSRS_A_DCD

S_A_RTS

S_A_RIS_A_CTSS_A_RXD

S_A_DTR

UART_A_DSR(11)UART_A_DCD(11)

UART_A_DTR(11)

UART_A_CTS(11)

UART_A_TX(11)

UART_A_RI(11)

UART_A_RTS(11)

UART_A_RX(11)

S_B_TXD

S_B_DSRS_B_DCD

S_B_RTS

S_B_RIS_B_CTSS_B_RXD

S_B_DTR

UART_B_DSR(11)UART_B_DCD(11)

UART_B_DTR(11)

UART_B_CTS(11)UART_B_RI(11)

UART_B_RTS(11)

UART_B_RX(11)

S_B_RTSS_B_RXDS_B_CTSS_B_RI

S_B_DCD

S_B_DTR

S_B_DSR

S_B_TXD

GND

VCC3.3

UART_B_TX(11)

VCC3.3

VCC3.3

VCC3.3

VCC3.3 VCC3.3

+ C6

47uF

C53

0.1uFJ12

HEADER 5X2

1 23 45 67 89 10

J11

DB9 MALE

594837261

R7

10

R610K

+ C521uF

+ C501uF

+ C511uF

+ C671uF

+ C9

47uF

C70

0.1uF

R35

10

R3410K

+ C681uF

+ C661uF

+ C691uF

+ C491uF

U11

MAX3243

141312

1516

21

20191817

28

24

27

26 25

3

2

1

456

2322

91011

78

T1INT2INT3IN

R5OUTR4OUT

INVALID

R2OUTBR1OUTR2OUTR3OUT

C1+

C1-

V+

VC

C

GN

D

V-

C2-

C2+

R1INR2INR3IN

FORCEONFORCEOFF

T1OUTT2OUTT3OUT

R4INR5IN

U7

MAX3243

141312

1516

21

20191817

28

24

27

26 25

3

2

1

456

2322

91011

78

T1INT2INT3IN

R5OUTR4OUT

INVALID

R2OUTBR1OUTR2OUTR3OUT

C1+

C1-

V+

VC

C

GN

D

V-

C2-

C2+

R1INR2INR3IN

FORCEONFORCEOFF

T1OUTT2OUTT3OUT

R4INR5IN

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VIDEO PORT SWITCHES 507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL. INCORPORATED

B

13 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

VDATA9

VP2D2

VDATA10

VDATA15VDATA16

VDATA14VDATA13

VDATA8

VP2D4

VDATA1

VDATA5

VP2D0

VP2D19

VP2D14

VP2D12

VP2D8

VDATA17

VDATA4

VP2D6

VDATA19

VP2D1

VDATA12VDATA11

VDATA6

VP2D15

VDATA18

VP2D11

VP2D9

VDATA7

VP2D18

VP2D7

VP2D3

VDATA[0..19]

VP2D[0..19]

VDATA2

VP2D17

VP2D5

VP2D10

VP2D16

VP2D13

VDATA0

VDATA3

4.1V

EXP_DISPLAY_EN#

EXP_CAPTURE2_EN#

EXP_CAPTURE1_EN#

GND

B_INData6B_INData7

B_INData2

B_INData5

B_INData3

B_INData0B_INData1

B_INData4

VP1D2VP1D3VP1D4VP1D5VP1D6VP1D7VP1D8VP1D9

EXP_DISPLAY_EN#

EXP_CAPTURE2_EN#

A_INData4

A_INData9A_INData8A_INData7A_INData6A_INData5

EXP_CAPTURE1_EN#

VP0D4VP0D3

VP0D9VP0D8VP0D7VP0D6VP0D5

VP0D2VP0D1VP0D0 A_INData0

A_INData2A_INData1

A_INData3

XHSYNC_IDQ_A (18)

XHSYNC_IDQ_B (19)

IXVSYNC_A (18)

IXVSYNC_B (19)

VP2D[0..19](6,14)

VDATA[0..19] (16)

VP0D[0..19](6,14)

VP0CTL2(6,14)VP0CTL1(6,14)

VP0CLK0(6,14)

VP0CTL0(6,14)

VP1CLK0(6,14)

VP1CTL1(6,14)VP1CTL2(6,14)

VP1CTL0(6,14)

VP2CTL2(6,14)VP2CLK0(6,14)

VP2CLK1(6,14)VP2CTL0(6,14)VP2CTL1(6,14)

4.1V

SW_VP2CTL2 (16)SW_VP2CLK0 (16)

SW_VP2CLK1 (16)SW_VP2CTL0 (16)SW_VP2CTL1 (16)

IXCLK_A (18)

IXCLK_B (19)

GND VCC5

B_INData[0..7] (19)

VP1D[0..19](6,14)

EXP_DISPLAY_EN#(14)

EXP_CAPTURE1_EN#(14)

EXP_CAPTURE2_EN#(14)

FID_CTL2_B (19)

FID_CTL2_A (18)

A_INData[0..9] (18)

VCC5

4.1V

4.1V

4.1V

VCC5

4.1V

4.1V

4.1V

U48

SN74CBTS3384

1

13

3478

11

256910

1417182122

24

12

1516192023

1OE

2OE

1A11A21A31A41A5

1B11B21B31B41B5

2A12A22A32A42A5

Vcc

GND

2B12B22B32B42B5

U5274CBT3245A

2 183 174 165 156 147 138 129 11

191

20

10

A1 B1A2 B2A3 B3A4 B4A5 B5A6 B6A7 B7A8 B8

GNC

VCC

GND

C125

0.1uF

C183

0.1uF

U46

SN74CBTS3384

1

13

3478

11

256910

1417182122

24

12

1516192023

1OE

2OE

1A11A21A31A41A5

1B11B21B31B41B5

2A12A22A32A42A5

Vcc

GND

2B12B22B32B42B5

R4610K

R88360

U53

SN74CBTS3384

1

13

3478

11

256910

1417182122

24

12

1516192023

1OE

2OE

1A11A21A31A41A5

1B11B21B31B41B5

2A12A22A32A42A5

Vcc

GND

2B12B22B32B42B5

R15910K

C149

0.1uF

C339

0.1uF

C91

0.1uF

R16010K

U47CBTD16210DGGR_3101115-0001

47

48

2

13

46

35

8173241

15

345679101112

141618192021222324

1

454443424039383736

343331302928272625

2OE

1OE

1A1

2A1

1B1

2B1

GN

DG

ND

GN

DG

ND

VC

C

1A21A31A41A51A61A71A81A9

1A10

2A22A32A42A52A62A72A82A9

2A10

NC

1B21B31B41B51B61B71B81B91B10

2B22B32B42B52B62B72B82B92B10

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VIDEO PORTS DAUGHTER CARD CONNECTIONS 507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL. INCORPORATED

B

14 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

VP2D18VP2D16VP2D14

VP2D19VP2D17VP2D15

VP2D12VP2D10

VP2D13VP2D11

VP2D8VP2D6VP2D4

VP2D9VP2D7VP2D5

VP2D2VP2D0

VP2D3VP2D1

VP1D0VP1D3

GND

VP0D7

VP1D5

VP1D9

VP0D5

VP1D10

VP1D2

VP0D11

VP1D11

VP0D14

VP1D7

VP0D10

VP0D16

VP1D6

VP1D12

VP0D15

VP0D6

VP0D1

VP0D8

VP0D12

VP1D1

VP0D18VP0D17

VP0D3VP0D0

VP0D4

VP0D13

VP1D13

VP1D14

VP0D19

VP0D2

VP1D4

VP1D16VP1D19

VP1D8

VP1D18

VP1D15VP1D17

VP0D9

VP2CLK0(6,13)

VP2CLK1(6,13)

VP2CTL0(6,13)VP2CTL2(6,13)

VP1CTL1 (6,13)

VP1CTL0 (6,13)

VP1D[0:19] (6,13)

VP0D[0:19] (6,13)

DSP_SCL0(3,18,19,20,23)

DSP_TINP0(3)DSP_TOUT0(3,7)

DSP_TOUT1 (2,3)DSP_TINP1 (3)

DSP_GPIO_3(2,3)DSP_EXTINT5 (3)DSP_EXTINT4 (3)

DSP_NMI(3)

SYSTEM_RESET#(3,11,16,17,18,19,20,21,25)

EXP_CAPTURE1_EN# (13)EXP_CAPTURE2_EN# (13)

VP0CTL0 (6,13)

VP0CLK1 (6)

EXP_DISPLAY_EN# (13)

USER_GPIO_0(16) USER_GPIO_1 (16)USER_GPIO_2(16)USER_GPIO_4(16) USER_GPIO_5 (16)

USER_GPIO_6 (16)USER_GPIO_7 (16)

DCARD_STCLK(6)

DSP_SDA0(3,18,19,20,23)

USER_GPIO_3 (16)

VP2CTL1 (6,13)

VCC3.3

GND

VP2D[0:19] (6,13)

VCC5

VP1CLK1 (6)

VP0CTL2(6,13)

EXP_AUDIO_EN#(2,6)

VP1CLK0(6,13)

VP0CLK0(6,13)

VP0CTL1(6,13)

VP1CTL2(6,13)

VCC5

VCC3.3

VCC5

VCC3.3

VCC3.3 VCC5

DC_P2

CONNECTOR 45 X 2

1 23 45 67 89 10

11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 5051 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 80

908886848281

83858789

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 5051 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 80

908886848281

83858789

DC_P1

CONNECTOR 45 X 2

1 23 45 67 89 10

11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 5051 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 80

908886848281

83858789

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 5051 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 80

908886848281

83858789

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

EXTERNAL MEMORY INTERFACEDAUGHTER CARD CONNECTIONS

507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL. INCORPORATED

B

15 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

DC_D9 DC_D8

DC_D4

DC_D13

DC_D3

DC_D15DC_D12

DC_D6

DC_D1

DC_D5

DC_D0

DC_D11

DC_D7

DC_D14

DC_D2

DC_D10

DC_D29 DC_D28

DC_D18DC_D17

DC_D24DC_D27

DC_D31

DC_D22

DC_D19

DC_D23DC_D21 DC_D20

DC_D30

DC_D26

DC_D16

DC_D25

DC_A20 DC_A19DC_A22 DC_A21

DC_A15

DC_A7DC_A8

DC_A10

DC_A3DC_A6

DC_A9

DC_A14

DC_A5

DC_A18

DC_A11

DC_A16DC_A17

DC_A12DC_A13

DC_A4

GND

DC_A[22..3](10,11,16)

DC_D[31..0](10,11,16)

DC_BE2# (10)DC_BE3#(10)DC_BE0# (10)DC_BE1#(10)

DC_ECLKOUT2 (10,16)

DC_CE2# (10,16)DC_CE3#(10,16)

DC_AOE# (10,11,16)DC_ARE#(10,11,16)DC_AWE#(10,11,16) DC_ARDY (10)

VCC3.3

GND VCC3.3

VCC3.3

R2414.7K

DC_P3

CONNECTOR 45 X 2

1 23 45 67 89 10

11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 5051 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 80

908886848281

83858789

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 5051 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 80

908886848281

83858789

2

2

1

1

B B

A A

507342 B

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL. INCORPORATED

B

16 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

VD

ATA

17V

DA

TA16

VD

ATA

13V

DA

TA14

VD

ATA

3V

DA

TA2

VD

ATA

5V

DA

TA4

VD

ATA

7V

DA

TA6

VD

ATA

15

VD

ATA

8V

DA

TA9

VD

ATA

12

DC

_D9

DC

_D8

DC

_D4

DC

_D13

DC_D1

DC

_D15

DC

_D12

DC

_D6

DC_D3

DC

_D5

DC_D0

DC

_D11

DC

_D7

DC

_D14

DC_D2

DC

_D10

DC

_D16

DC_D29

DC

_D21

DC_D30

DC

_D19

DC

_D23

DC_D31

DC

_D17

DC

_D20

DC

_D24

DC

_D27

DC

_D18

DC_D28

DC

_D26

DC

_D25

DC

_D22

DC

_A3

DC

_A22

DC

_A7

DC

_A6

DC

_A5

DC

_A4

VDATA0VDATA19VDATA18

VDATA11VDATA10VDATA1

FPGA_INIT

DE

NC

DA

TA3

DE

NC

DA

TA6

DE

NC

DA

TA5

DE

NC

DA

TA4

DE

NC

DA

TA9

DE

NC

DA

TA11

DE

NC

DA

TA7

DE

NC

DA

TA0

DE

NC

DA

TA8

DE

NC

DA

TA10

DE

NC

DA

TA2

DE

NC

DA

TA1

FLASH_EXT_A20(11)FLASH_EXT_A21(11)

FLASH_EXT_A19(11)

UART_INTA(11)UART_INTB(11)

RTS0_B(19)RTS0_A(18)

DC_A[22..3](10,11,15)

DC_D[31..0](10,11,15)

PCLKOUT(20)

DC_ECLKOUT2 (10,15)

TCE1#(4,11)

DC_ARE#(10,11,15)DC_AWE#(10,11,15)

TV_DETECT (20)

FPGA_INIT_EINT6 (3)

USER_LED0 (2)USER_LED1 (2)USER_LED2 (2)USER_LED3 (2)USER_LED4 (2)USER_LED5 (2)USER_LED6 (2)

SW_VP2CLK0 (13)

SW_VP2CTL0 (13)SW_VP2CTL1 (13)SW_VP2CTL2 (13)

DC_AOE#(10,11,15)

USER_GPIO_0(14)USER_GPIO_1(14)USER_GPIO_2(14)USER_GPIO_3(14)USER_GPIO_4(14)USER_GPIO_5(14)USER_GPIO_6(14)USER_GPIO_7(14)

DSP_EXTINT7(3)

USER_LED7 (2)

SYSTEM_RESET#(3,11,14,17,18,19,20,21,25)

TSOE3#(4,11)

DC_CE2#(10,15)

DC_CE3#(10,15)

UART_TXDY_A# (11)UART_RXDY_B# (11)

UART_TXDY_B# (11)

VDATA[0..19] (13)

SW_VP2CLK1 (13)

UART_RXDY_A# (11)

PLL_MS (6)

PLL_MD (6)PLL_MC (6)

VCC3.3

PCLKIN(20)

FPGA_DC_EMIF_DIR (11)FPGA_DC_EMIF_OE# (11)

FLASH_EXT_A22(11)

DENC_FIELD(20)DENC_VSYNC(20)DENC_HSYNC(20)

FPGA_DIN(3)

DENCDATA[0..11](20)

VCC3.3

VCC3.3 VCC3.3

RN30RPACK8-33

123456789 10 11 12 13 14 15 16

U8A

XC2S300E-7TQ208C

160161162163164165166167

192193194198199200201202203204205206

11

153

154

169173174175176178179180181182

168

152

151

150

149

148

147

146

145

141

140

139

737170696864636261605958575655

242322212018171615109876543

191189188187185

27 29 30 31 33 34 35 36 40 41 42 43 44 45 46 47 48 49

138

136

135

134

133

132

129

127

126

125

123

122

121

120

116

115

114

113

112

111

110

109

108

107

747577

818283848687888993949596979899100101102

80

BK1_19_CSBK1_18_WRITEBK1_17BK1_16BK1_15BK1_14BK1_13BK1_12

BK0_12BK0_11BK0_10BK0_9BK0_8BK0_7BK0_6BK0_5BK0_4BK0_3BK0_2BK0_1

BK

7_10

BK

2_2_

DIN

BK

2_1_

DO

UT

BK1_10BK1_9BK1_8BK1_7BK1_6BK1_5BK1_4BK1_3BK1_2BK1_1_GCK2

BK1_11

BK

2_3

BK

2_4

BK

2_5

BK

2_6

BK

2_7

BK

2_8

BK

2_9

BK

2_10

BK

2_11

BK

2_12

BK

2_13

BK5_4BK5_5BK5_6BK5_7BK5_8BK5_9

BK5_10BK5_11BK5_12BK5_13BK5_14BK5_15BK5_16BK5_17BK5_18

BK

7_1

BK

7_2

BK

7_3

BK

7_4

BK

7_5

BK

7_6

BK

7_7

BK

7_8

BK

7_9

BK

7_11

BK

7_12

BK

7_13

BK

7_14

BK

7_15

BK

7_16

BK

7_17

BK

7_18

BK0_13BK0_14BK0_15BK0_16BK0_17_GCK3

BK

6_18

BK

6_17

BK

6_16

BK

6_15

BK

6_14

BK

6_13

BK

6_12

BK

6_11

BK

6_10

BK

6_9

BK

6_8

BK

6_7

BK

6_6

BK

6_5

BK

6_4

BK

6_3

BK

6_2

BK

6_1

BK

2_14

BK

2_15

BK

2_16

BK

2_17

BK

2_18

BK

2_19

BK

3_1

BK

3_2

BK

3_3

BK

3_4

BK

3_5

BK

3_6

BK

3_7

BK

3_8

BK

3_9

BK

3_10

BK

3_11

BK

3_12

BK

3_13

BK

3_14

BK

3_15

BK

3_16

BK

3_17

BK

3_18

_IN

IT

BK5_3BK5_2

BK5_1_GCK1

BK4_18BK4_17BK4_16BK4_15BK4_14BK4_13BK4_12BK4_11BK4_10BK4_9BK4_8BK4_7BK4_6BK4_5BK4_4BK4_3BK4_2

BK4_1_GCK1

BK4_19_GCK0

R237 33

RN29 RPACK4-33

1234 5

678

RN18RPACK8-10K

1 2 3 4 5 6 7 8910111213141516

RN31RPACK4-33

12345 6 7 8

R99 33

R1004.7K

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL. INCORPORATED

B

17 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

FPGA_TMS

FPGA_TCK

FPGA_TDI

FPGA_TDO

GND GND

FPGA1.8V

FPGA_CCLK (3)

FPGA_PROG# (3)

VCC3.3

FPGA_LOCK (3)SYSTEM_RESET#(3,11,14,16,18,19,20,21,25)

FPGA1.8V

FPGA1.8V

VCC3.3

VCC3.3

VCC3.3

FPGA1.8V

VCC3.3

VCC3.3

VCC3.3

C98

0.1uF

C94

0.1uF

J6

CONN 3x2

123

456

123

456

U8B

XC2S300E-7TQ208C

11219253239516572798592

103

13263853667891

105118130143

208

2

157

159

207

54

50

52

104

106

155

142837677690119

195196184

177

171156

186172142128

197190183

170158144137131124117

GND1GND2GND3GND4GND5GND6GND7GND8GND9GND10GND11GND12GND13

VCC01VCC02VCC03VCC04VCC05VCC06VCC07VCC08VCC09VCC10VCC11

VCC16

TMS

TDO

TDI

TCK

M2

M1

M0

DONE

PROG

CCLK

VCCINT1VCCINT2VCCINT3VCCINT4VCCINT5VCCINT6VCCINT7

VCCINT12VCC15VCC14

GND21

VCC13VCC12

VCCINT11VCCINT10VCCINT9VCCINT8

GND24GND23GND22

GND20GND19GND18GND17GND16GND15GND14

+C352

4.7uF

+C354

4.7uF+

C355

4.7uF

+C353

4.7uF

C95

0.1uF

C129

0.1uF

C97

0.1uF

C99

0.1uF

C157

0.1uF

C159

0.1uF

C128

0.1uF

C93

0.1uF

C96

0.1uF

C100

0.1uF

C130

0.1uF

C131

0.1uF

C126

0.1uF

C160

0.1uF

C156

0.1uF

C127

0.1uF

C92

0.1uF

C158

0.1uF

R49360

R4810K

R4710K

C346

0.1uF

R14150

DS9

GREEN

U55

SN74AHC1G08

3

4

5

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDEC_GND DDEC_GND DDEC_GND DDEC_GND

Video Input Section (Channel 1)DDEC_GND

DDEC_GND

DDEC_GND DDEC_GND DDEC_GND

DDEC_GND

DDEC_GND

DDEC_GNDDDEC_GND

DDEC_GND

DDEC_GND

DDEC_GND

DDEC_GND

DDEC_GND

DDEC_GND

DDEC_GND

DDEC_GNDDDEC_GND

FID CONNECTS TO

CTL2 PIN ON VIDEO

PORT

DDEC_GND

507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL INCORPORATED

B

18 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

GND

RA_INData8RA_INData9

A_INData1

A_INData4

A_INData2

A_INData7A_INData6

A_INData3

A_INData5

A_INData8A_INData9

RA_INData1

A_INData0RA_INData1

RA_INData0RA_INData3

RA_INData3

RA_INData[0..9]

RA_INData5

RA_INData5

RA_INData2

RA_INData7RA_INData6

RA_INData4

RA_INData6RA_INData7

RA_INData4

RA_INData2

RA_INData0

RA_INData9RA_INData8

LUMA

IXCLK_A (13)

A_INData[0..9] (13)

IXVSYNC_A (13)

GND

DSP_SCL0(3,14,19,20,23)

DSP_SDA0(3,14,19,20,23)

SYSTEM_RESET#(3,11,14,16,17,19,20,21,25)

XHSYNC_IDQ_A (13)

3.3VD_DDEC (19)

3.3VA_DDEC (19) 1.8VA_DDEC (19)

1.8VD_DDEC (19)

TVP5416_PBIN(19)

TVP5416_PRIN(19)

FID_CTL2_A (13)

RTS0_A (16)

3.3VA_DDEC 3.3VD_DDEC1.8VD_DDEC

3.3VD_DDEC

1.8VA_DDEC

3.3VD_DDEC

3.3VA_DDEC

1.8VD_DDEC

3.3VA_DDEC

3.3VD_DDEC

1.8VD_DDEC1.8VA_DDEC

1.8VA_DDEC3.3VD_DDEC

3.3VD_DDEC

3.3VD_DDEC

TP28TestPoint 1

C365

330pF

L28 2.7uHL27 2.7uH

C366

680pF

TP24TestPoint1TP25TestPoint1

R79

4.7K

TP26TestPoint1

R111

2.2K

R83 22

C163

330pF

C135330pF

RN19RPACK8-3312345678 9

10111213141516

R82 22

R239 0

C166330pF

J16750317-2

3 4

21

5 6

Y1

14.31818mhz

C140

0.1uF

C172

0.1uFC175

.1uF

C223680pF R104

75.0

J15RCA JACK-YELLOW

1

2C230

0.1uF

C141

0.1uFC231

0.1uF

C142

0.1uF

C138

0.1uF

C143

0.1uF

C179

0.1uF

C1760.1uF

C170

0.1uF

C178

0.1uF

C165

.1uF

C169

33pF

C180

0.1uFC171

0.1uF

C167

.1uF

C137

.1uF

C233

0.1uF

C173

0.1uFC174

0.1uF

C370

0.1uF

R143

NO POP

R141

4.7K

R10775.0

C164

330pF

R74

75.0

C134330pF

R76

100K

U23TVP5146

17

16

8

9

4443

45

81

15 24 79 563 196

18

23

5251

46

22 32 42 39 49 6277 27 681326

11 14 25 78 4 5 20 2112 31 41 55 67 38 48 6176

7

2

1

80

28

29

4750

5354

57585960636465666970

74

75

40

34

33

30

35

37

72

73

71

36

10

VI_3_B

VI_3_A

VI_2_B

VI_2_C

Y8Y9

Y7

THERMAL

CH

3_A

18G

ND

CH

4_A

18G

ND

CH

1_A

18G

ND

DG

ND

4

CH

1_A

33G

ND

CH

3_A

33G

ND

CH

2_A

33G

ND

VI_3_C

VI_4_A

Y2Y3

Y6

CH

4_A

33G

ND

DG

ND

2D

GN

D3

IOG

ND

1IO

GN

D2

IOG

ND

3

PLL

_A18

GN

D

DG

ND

1

DG

ND

5

A18

GN

D_R

EF

AG

ND

CH

2_A

18V

DD

CH

3_A

18V

DD

CH

4_A

18V

DD

CH

1_A

18V

DD

CH

1_A

33V

DD

CH

2_A

33V

DD

CH

3_A

33V

DD

CH

4_A

33V

DD

A18

VD

D_R

EF

DV

DD

1D

VD

D2

DV

DD

3D

VD

D4

IOV

DD

1IO

VD

D2

IOV

DD

3

PLL

_A18

VD

D

VI_2_A

VI_1_C

VI_1_B

VI_1_A

SCL

SDA

Y5Y4

Y1Y0

C9C8C7C6C5C4C3C2C1C0

XTAL1

XTAL2

DATACLK

RESETB

PWRDWN

INTREQ

FSS/GPIO

GLCO/12CA

HS/CS/GPIO

VS/VBLK/GPIO

FID/GPIO

AVID/GPIO

CH

2_A

18G

ND

R110 22

C367680pF

R135 NO POP

R77

2K

C168

33pF

R109 33

R108 33

L21 2.7uH

C136

0.1uF

C181

0.1uF

C177

0.1uF

L30 2.7uH

L22 2.7uH

L20 2.7uH

R73

2K

R78

NO POP

R26810K

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A ADDEC_GND

DDEC_GND

DDEC_GNDDDEC_GND

DDEC_GND

DDEC_GND

DDEC_GND

DDEC_GND

DDEC_GND

DDEC_GND

DDEC_GND

DDEC_GND DDEC_GND

DDEC_GND

Video Input Section (Channel 2)

RESISTOR IS FOR POPULATION

TO REDUCE EMI NOISE IF

NECESSARY

DDEC_GND DDEC_GND

DDEC_GNDDDEC_GND

DDEC_GND

DDEC_GND DDEC_GND

FID CONNECTS TO

CTL2 PIN ON VIDEO

PORT

DDEC_GND DDEC_GNDDDEC_GNDDDEC_GND

DDEC_GND DDEC_GND DDEC_GNDDDEC_GND

DDEC_GNDDDEC_GND

507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL INCORPORATED

B

19 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

B_INData6

B_INData0

B_INData3B_INData2

B_INData4

B_INData1

B_INData5

B_INData7

RB_INData0

RB_INData5

RB_INData3

RB_INData7 RB_INData1RB_INData2

RB_INData4

RB_INData6

RB_INData2RB_INData1

RB_INData[0..7]

RB_INData3

RB_INData5

RB_INData0

RB_INData6RB_INData7

RB_INData4

GND GND

B_INData[0..7] (13)

IXCLK_B (13)

IXVSYNC_B (13)

XHSYNC_IDQ_B (13)

DSP_SCL0(3,14,18,20,23)

DSP_SDA0(3,14,18,20,23)

SYSTEM_RESET#(3,11,14,16,17,18,20,21,25)

VCC5

3.3VD_DDEC (18)

3.3VA_DDEC (18)

1.8VA_DDEC (18)

1.8VD_DDEC (18)

TVP5416_PBIN (18)

FID_CTL2_B (13)

TVP5416_PRIN (18)

RTS0_B (16)

VCC3.3

1.8VA_DDEC

1.8VD_DDEC

VCC5

1.8VA_DDEC

3.3VD_DDEC

3.3VA_DDEC

1.8VA_DDEC 3.3VD_DDEC

1.8VD_DDEC

1.8VD_DDEC

3.3VD_DDEC1.8VD_DDEC 3.3VD_DDEC 1.8VA_DDEC

3.3VD_DDEC

3.3VD_DDEC

VCC3.3

3.3VD_DDEC

3.3VA_DDEC

3.3VD_DDEC

VCC3.3

TP16TestPoint1

TP29TestPoint 1

R258 0

C290

330pFR259

75

L50 2.7uHL49 2.7uH

C292

680pF

C294

680pF

R142

NO POP

C228

680pF

+ C45

22uF

U29 TPS73618DCQ

3

5

1 2

6

4GND

EN

IN1 OUT1

TAB

/GN

D

NR/FB

+ C357

22uF

C300

330pF

C227

.1uF

C299

330pFC369

330pF

R264 0

R265

75

R133 0

R134 NO POPR140

2K

R189100K

L54 BLM41P750SPT

+ C360

22uF

+ C356

22uF

TP27TestPoint1

C368

680pF

C296

.1uF

L52 2.7uH L53 2.7uH

L46

BLM41P750SPT

C232

0.1uF

L48 2.7uH

L51 2.7uH

L56

BLM41P750SPT

L55

BLM41P750SPT

+ C359

22uF

C291

0.1uF

R26910K

R261225

R262225

R137 22

L41 2.7uH

L39 2.7uH

R255 56

R257225

R256225

U35TVP515020

1

4 32

1617

8

3719 31

22

21

6

5

25

18

15

131211

14

10

2

24

9

23

28

29

30

27

DV

DD

AIP1A PLL

_AV

DD

CH

1_A

VD

D

YOUT2YOUT1

RESET

PLL

_AG

ND

AG

ND

_SU

B

DG

ND

CH

1_A

GN

D

SDA

SCL

XTAL2

XTAL1/OSC

HSYNC

YOUT0

YOUT3

YOUT5YOUT6YOUT7

YOUT4

IO_D

VD

D

AIP1B

VSYNC/PALI

PCLK/SCLK

FID/GLC0

PDN

REFP

REFM

INTREQ/GPCL

R263 NO POP

J17RCA JACK-RED

1

2

R145 0

C286

330pF

R238 0

C234

0.1uF

R260 56

J18RCA JACK-BLUE

1

2

C285

330pF

Y414.31818mhz

R185 0 C287

.1uFC284

330pF

R186

75

C288

33pF

R138

NO POP

R136

2K

R144 22

C235

0.1uF

R132

75

R131 0

C222

330pF

C297 1uF

C295 1uF

R187 NO POP

R139 22

C298

1uF

+ C35

22uF

C289

33pF

C224

.1uF

R188

4.7K

C229

0.1uFC293

0.1uF

C226

0.1uF

C236

0.1uF

C301

0.1uF

RN25 RPACK8-2212345678 9

10111213141516

2

2

1

1

B B

A A

DENC_GND

DENC_GND

DENC_GND

DENC_GND

DENC_GND

DENC_GND

DENC_GND

DENC_GND

DENC_GND

DENC_GND

DENC_GND

DENC_GND

Video Output Section

NOTE: 20-1USED WITH ALTERNATE CRYSTAL FREQUENCY

DENC_GNDDENC_GND

DENC_GND

DENC_GND

DENC_GND

DENC_GND

NOTE: 20-1

DENC_GND

NOTE: 20-1

DENC_GND

DENC_GND

DENC_GND

DENC_GND

DENC_GND

DENC_GND

DENC_GND

OUTPUT FILTERS ARE CONFIGURED FOR HD.

FOR SD VERSION FILTER CHANGES ARE

L9,L14,L23 REPLACE WITH 2.2uH InductorL10,L15,L24 REPLACE WITH 2.2uH InductorC132,C133,C161 REPLACE WITH 390pF CapacitorC162,C220,C221 REPLACE WITH 560pF CapacitorC341,C342,C343 Installed with 120pF Capacitor

DENC_GND DENC_GND

DENC_GND

507342 B

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL INCORPORATED

B

20 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

DENCDATA8

DENCDATA11DENCDATA10DENCDATA9

DENCDATA7DENCDATA6

DENCDATA[0..11]

DENCDATA5DENCDATA4DENCDATA3DENCDATA2DENCDATA1DENCDATA0

VSYNC_OUT

BLUE

CSYNC_OUT

GREEN

SYSTEM_RESET#

RED

GREEN

BLUE

RED

SYSTEM_RESET

VSYNC_OUT

SYSTEM_RESET

CSYNC_OUT

GND

DENC_VSYNC(16)

DENCDATA[0..11](16)

DENC_HSYNC(16)

TV_DETECT(16)

DENC_FIELD(16)

DSP_SDA0(3,14,18,19,23)SAA7105_STCLK(6)

DSP_SCL0(3,14,18,19,23)

SYSTEM_RESET#(3,11,14,16,17,18,19,21,25)

PCLKIN(16)

PCLKOUT(16)

SYSTEM_RESET(11,25)VCC5

GND

VCC3.3

VCC3.3DENC

VCC3.3_AN_DENCOUT_3.3V

OUT_3.3V

VCC3.3_AN_DENCVCC3.3DENC

VCC3.3

VCC3.3

OUT_3.3V

VCC5 VCC3.3

VCC5

J2RCA JACK

1

2

J3RCA JACK

1

2

C328

33pF

C326

33pF

+C46

10uF

C338

0.1uF

C324

0.1uF+

C47

10uF

U38TPS76833QPWP

35

67 13

14

16

1 2 9 10 11 12 2019

48 18

17

15

21

GNDENn

IN1IN2 OUT2

OUT1

RESET/PG

HS

/GN

D1

HS

/GN

D2

HS

/GN

D3

HS

/GN

D4

HS

/GN

D5

HS

/GN

D6

HS

/GN

D8

HS

/GN

D7

NC1NC2 NC4

NC3

FB

PW

RP

AD

Y3

27.000Mhz

C216

0.1uF

C215

0.1uF

L31

NO POP-10uH

R10382

C281

0.1uF

C217

0.1uF

C325

L33

BLM41P750SPT

R270NO POP

R271NO POP

L32

BLM41P750SPT C283

0.1uF

C282

0.1uF

C218

0.1uF

C219

0.1uF

C133

100pF

C132

100pF

C341

NO-POP

L47BLM41P750SPT

L10 1uH

L15 1uH

L24 1uH

R1811K

R18212

R18482

J1750317-2

3 4

21

5 6

TP15TP1

VGA Connector

J5 749374-3

2

6

8

13

1

3

7

14

5

10

4

11

12

15

9

GREEN

GNDR

GNDB

HSYNC

RED

BLUE

GNDG

VSYNC

GND1

GND2

NC1

NC2

DATA

CLK

KEY

U24

SAA7105H

6463626121222324

27

29

18

8

17

15

41

50

5137

14

43 44 52 536 12 25

2613 48 497

46

42

552345

45

5691011

58

20

1957

36

47

39

40

54

60

59

28

1 16 30 31 32 33 34

38

35

PD7PD6PD5PD4PD3PD2PD1PD0

PIXCLKO

HSVGC

VSVGC

RESET

FSVGC

IICData

RED_CR_C_CVBS

XTALO

XTALIRTCI

IICClk

VD

DA

1V

DD

A2

VD

DA

3V

DD

A4

VD

DD

1V

DD

D2

VD

DD

3

VS

SD

3

VS

SD

2

VS

SA

1

VS

SA

2

VS

SD

1

RSET

GREEN_VBS_CVBS

TRSTPD8PD9PD10PD11

BLUE_CB_CVBS

TDITMSTD0TCK

VD

DD

4

PIXCLKI

PIXCLKINotV

SS

D4

LLC

DUMP

VSM

HSM_CSYNC

TVDetect

TTXIn

TTXOut

CBO

NC

1N

C2

NC

3N

C4

NC

5N

C6

NC

7

SRES

OUT_EN

R240

100687-0001

C161

100pF

C162

100pF

R128 33

+ C362

4.7uF

C327

0.1uFU37

SN74LVC1G125DCKR

3

4

5

2

1

U36

SN74LVC1G125DCKR

3

4

5

2

1

C342

NO-POP

C329

0.1uF

C343

NO-POP

+ C363

4.7uF

R225 NO POP

C221

100pF

C220

100pF

L9 0 OHM

L14 0 OHM

L23 0 OHM

R13082

J4RCA JACK

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DUPLEX

STATUS

Plac

e te

rmin

atio

nscl

ose

to P

HY

sour

cepi

ns.

COLLISION/LINK/ SPEEDACTIVITY

Route pairs together,pairs are (3 and 6) and(1 and 2).

ETHERNET PHY AND INTERFACE

LED1 CAN INDICATE EITHER OR BOTH STATUS

507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL INCORPORATED

B

21 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

LXT_

TDC

T

LXT_RDM

LXT_

TXC

T

LXT_RDP

LXT_TDP

MII_RXDV

MII_CRS

XSPDO_MDIO

MII_RXD3

MII_RCLK

MII_TXCLK

RBIAS

MII_RDX2

MTXD3LXT_RDP_c

MII_RXD1

MTXEN

MTXD2

LXT_TDMMTXD1

LXT_RDM_c

MII_RXD0

MDINT_TP

MTXD0

PWRDWN

LXT_

RX

CT

SLEEP

PAUSE

MII_COL

SYS_RSTz

MII_RXER

XSPCLK_MDCLK

SLEEP

PAUSETXSLEW1TXSLEW0

TXSLEW1

TXSLEW0

LXT_TXM

LXT_RXP

LXT_TXP

LXT_RXM

LINKLED-

LED1-

LINKLED-

LED1-

GND

MRXER (7)

XSPDO_MDIO (7)XSPCLK_MDCLK (7)

MRXDV (7)MRXD3 (7)MRXD2 (7)MRXD1 (7)MRXD0 (7)MRCLK (7)MCRS (7)

MCOL (7)MTCLK (7)

MTXD0(7)MTXD1(7)MTXD2(7)MTXD3(7)

MTXEN(7)

ENET_PWRDN(7)

SYSTEM_RESET# (3,11,14,16,17,18,19,20,25)

VCC3.3

GND

GND

VCC3.3

VCC3.3 AVCC3.3

AVCC3.3

VCC3.3

AVCC3.3VCC3.3

VCC3.3

VCC3.3

VCC3.3

U44

25 MHz

4

32

1 VCC

OUTGND

EN

R19549.9

R15749.9

R230 NO POP

R200 NO POP

U45

LXT971ALC

5557585960

5654

62635248474645

49533

434264

2728

1920

2324

38

37

36

1213141516

21

39

17

35

4

34

22

25

26

7 11 18 41 50 61

51 8 40 21

293031

56

3332

91044

TX_CLKTXD0TXD1TXD2TXD3

TX_ENTX_ER

COLCRSRX_CLKRXD0RXD1RXD2RXD3

RX_DVRX_ERMDDISMDCMDIOMDINT#

TDITDO

TPFOPTPFON

TPFIPTPFIN

LED/CFG1

LED/CFG2

LED/CFG3

ADDR0ADDR1ADDR2ADDR3ADDR4

XOREFCLK/XI

PWRDWN

RBIAS

GND8

RESET#

GND7

VCCA

GND6

SD/TP#

GN

D0

GN

D1

GN

D2

GN

D3

GN

D4

GN

D5

VC

CD

VC

CIO

VC

CIO

VC

CA

TMSTCKTRST#

TxSLEW0TxSLEW1PAUSESLEEP

N/C1N/C2N/C3

J8CON16

12345678

9

1011

12

SH

IELD

1

SH

IELD

2

R162150

R22749.9

R232 33

L37

BLM21P221SN

R231 10k

C3050.01uF

RN26 RPACK8-3312345678 9

10111213141516

C3300.01uF

R199 10k

R161150

L38

BLM21P221SN

C303

270pF

C421000pF 2kV

C307

0.1uF

R22649.9

R193 49.9

TP12

TP

1

R197 10k

R201 33

C3080.1uF

C431000pF 2kV

R202 33

R198 1.5k

R194 49.9

C3320.1uF

L40

BLM21P221SN

C333.001uF

C3060.1uF

C302

0.1uF

C3310.1uF

L36EXC-3BB102H

12

T1 BelFuse S558-5999-T7

6

7

8

1

2

3

11

10

9

16

15

14

C3090.1uF

R192 49.9

R228 22.1k

C304

270pF

R196 10k

C241

0.1uF

+ C41

10uF

R163150

R229 10k

R15849.9

C481000pF 2kV

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCI INTERFACE 507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL INCORPORATED

B

22 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

S_PCI_CBEz3

S_PCI_SERRz

S_PCI_AD7

S_PCI_AD12

S_PCI_AD1

S_PCI_AD10

S_PCI_AD3

S_PCI_AD8

S_PCI_CBEz1

S_PCI_AD5

S_PCI_AD14

S_PCI_CBEz2

S_PCI_PAR

S_PCI_AD4

S_PCI_AD9

S_PCI_IDSEL

S_PCI_AD13

S_PCI_AD0

S_PCI_CBEz0

S_PCI_INTAz

S_PCI_AD15

S_PCI_AD2

S_PCI_AD11

S_PCI_AD6

S_PCI_FRAMEz

S_PCI_AD23

S_PCI_CBEz2

PCI_INTAz

S_PCI_AD22

PCI_FRAMEz

S_PCI_AD31

S_PCI_AD16

S_PCI_AD24

PCI_CBEz2

S_PCI_AD30

S_PCI_AD19

PCI_RSTzS_PCI_RSTz

S_PCI_AD26

S_PCI_AD21

S_PCI_AD25

S_PCI_AD18

S_PCI_AD27S_PCI_AD28

S_PCI_INTAz

S_PCI_FRAMEz

S_PCI_AD20

S_PCI_AD29

S_PCI_AD17

PCI_TRDYzPCI_DEVSELz

PCI_IRDYz

PCI_STOPzPCI_PERRz

S_PCI_DEVSELz

S_PCI_DEVSELzS_PCI_TRDYz

S_PCI_PERRz

S_PCI_PERRzS_PCI_STOPz

S_PCI_IRDYz

S_PCI_TRDYz

S_PCI_STOPz

S_PCI_IRDYz

S_PCI_CLKS_PCI_GNTz

S_PCI_RSTz

PCI_IDSELPCI_CBEz3

S_PCI_CLK PCI_CLKPCI_GNTzPCI_REQz

S_PCI_REQz

S_PCI_REQzS_PCI_GNTz

S_PCI_IDSELS_PCI_CBEz3

PCI4.1V

PCI4.1V

PCI_AD2PCI_AD1

S_PCI_AD13

S_PCI_AD11

PCI_CBEz0PCI_AD7

PCI_AD11

PCI_CBEz1

PCI_AD6

S_PCI_AD14

S_PCI_AD2

S_PCI_AD0

PCI_AD5

PCI_SERRz

S_PCI_AD15 PCI_AD15PCI_AD14

PCI_AD4

PCI_AD0

S_PCI_AD4S_PCI_AD3

PCI_AD10

S_PCI_SERRz

S_PCI_AD8

S_PCI_CBEz1

S_PCI_CBEz0

S_PCI_AD1

PCI_AD3

S_PCI_AD5

GNDS_PCI_AD7

PCI_PAR

PCI_AD8

S_PCI_AD6

S_PCI_AD9

PCI_AD12

S_PCI_PAR

PCI_AD13

PCI_AD9

S_PCI_AD12

S_PCI_AD10

S_PCI_AD[16:31] (7)

PCI_SERRz (7)PCI_PAR (7)PCI_CBEz1 (7)

PCI_AD[0:15] (7)

PCI_DETECT# (7)

PCI_CBEz2 (7)

PCI_INTAz (7)

PCI_FRAMEz (7)

PCI_RSTz (7)

PCI_CBEz0 (7)

GND

PCI_TRDYz (7)

PCI_STOPz (7)

PCI_IRDYz (7)

PCI_DEVSELz (7)

PCI_PERRz (7)

PCI_IDSEL (7)PCI_CBEz3 (7)

PCI_CLK (7)PCI_GNTz (7)PCI_REQz (7)

PCI4.1V (7)

VCC3.3 VCC5

PCIVCC3.3

PCIVCC3.3

VCC5

VCC5

VCC3.3

VCC5

VCC3.3VCC5

R233 0

U40

74CBT3245A

2 183 174 165 156 147 138 129 11

191

20

10

A1 B1A2 B2A3 B3A4 B4A5 B5A6 B6A7 B7A8 B8

GNC

VCC

GND

U43

CBTD16210DGGR_3

47

48

2

13

46

35

8 17 32 41

15

345679

101112

141618192021222324

1

454443424039383736

343331302928272625

2OE

1OE

1A1

2A1

1B1

2B1

GN

DG

ND

GN

DG

ND

VC

C

1A21A31A41A51A61A71A81A91A10

2A22A32A42A52A62A72A82A92A10

NC

1B21B31B41B51B61B71B81B9

1B10

2B22B32B42B52B62B72B82B9

2B10

R234 0

R235 0

U42

74CBT3245A

2 183 174 165 156 147 138 129 11

191

20

10

A1 B1A2 B2A3 B3A4 B4A5 B5A6 B6A7 B7A8 B8

GNC

VCC

GND

P2

3.3V/5V universal PCI-32

A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17A18A19A20A21A22A23A24A25A26A27A28A29A30A31A32A33A34A35A36A37A38A39A40A41A42A43A44A45A46A47A48A49A50A51A52A53A54A55A56A57A58A59A60A61A62

B1B2B3B4B5B6B7B8B9

B10B11B12B13B14B15B16B17B18B19B20B21B22B23B24B25B26B27B28B29B30B31B32B33B34B35B36B37B38B39B40B41B42B43B44B45B46B47B48B49B50B51B52B53B54B55B56B57B58B59B60B61B62

TRST+12VTMSTDI+5V

INTAINTC+5V

Rsvd+V I/O

RsvdKeyKey

3.3VauxRST

+V I/OGNTGNDPME

AD30+3.3VAD28AD26GNDAD24

IDSEL+3.3VAD22AD20GNDAD18AD16+3.3V

FRAMEGND

TRDYGND

STOP+3.3V

SDONESBOGNDPAR

AD15+3.3VAD13AD11GNDAD9KeyKey

C/BE0+3.3V

AD6AD4

GNDAD2AD0

+V I/OREQ64

+5V+5V

-12VTCKGNDTDO+5V+5VINTBINTDPRSNT1RsvdPRSNT2KeyKeyRsvdGNDCLKGNDREQ+V I/OAD31AD29GNDAD27AD25+3.3VC/BE3AD23GNDAD21AD19+3.3VAD17C/BE2GNDIRDY+3.3VDEVSELGNDLOCKPERR+3.3VSERR+3.3VC/BE1AD14GNDAD12AD10M66ENKeyKeyAD8AD7+3.3VAD5AD3GNDAD1+V I/OACK64+5V+5V

R236

10K

C3350.1uF

C3220.1uF

R250 NO POP

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AIC23 STEREO AUDIO INTERFACE 507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL INCORPORATED

B

23 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

LLINE_OUT

RLINE_OUT

AIC23LRCIN

AIC23CS

SPIMODE

GND

AIC23_STCLK(6)

BCLK2(6)

AIC23SDATAOUT(6)

LRCOUT(6)

AIC23SDATAIN(6)LRCIN(6)

BCLK1(6)

DSP_SCL0(3,14,18,19,20)

DSP_SDA0(3,14,18,19,20)

VCC3.3

GND

3.3VA

3.3VA

AIC3.3V

AIC3.3V

AIC3.3V

VCC3.3

VCC3.3

VCC3.3

VCC3.3

VCC3.3

R60 0

R30

NO POP

+

C2310uF

R294.7K

C1390.1uF

+

C2210uF

R55 4.7K

R322.2K

C1060.1uF

R31 4.7K

C103NO POP

R28 4.7K

R274.7K

L13BLM21P221SN

L6BLM21P221SN

C112

0.1uF

R500C113

0.1uF

C104NO POP

C102NO POP

C105NO POP

+C64

1uF

C62

33pF

R51 0

C110470nF

R56 33

C1070.1uF

C111470nF

C109470nF

C63NO POP

C108470nF

+ C21

10uF

J14

Line Out

3

421

L4BLM21P221SNR26

0R75 100

R5447K

R5347K

C59NO POP

+

C1210uFC58

NO POP C61NO POP

L7BLM21P221SN

L2 BLM21P221SN

PW PackageU19

TLV320AIC23

22

141115

25

3

45

21

2423

109

28

16

17182019

26

1312

8

1

67

2

27

MODE

AVddHPGND

AGND

XTI/MCLK

BCLK

DINLRCIN

CS

SCLKSDIN

RHPOUTLHPOUT

DGND

VMID

MIC_BIASMIC_INLLINE_INRLINE_IN

XTO

RLINE_OUTLLINE_OUT

HPVdd

BVdd

DOUTLRCOUT

CLKOUT

DVdd

R52 100

RN9

RPACK4-33

1234 5

678

L8BLM21P221SN

R33 2.2

L3 BLM21P221SN

C101NO POP

R250

+C11

10uFRN10

RPACK4-10K

1234 5

678

+C10

10uF

R81 NO POP

C60NO POP

R80 33

L5

BLM21P221SN

C65

NO POP

C115.001uF

U18

SN74LVC1G32

1

24

53

R59

NO POP

C1140.1uF

R570

R580

C144

0.1uF

U12

12.288 MHz

4

32

1 VCC

OUTGND

EN

J13

DUAL JACK

5U1U4U5L1L4L

123456

3.3 sq in AGND,

min thermal pad

Connect

at pin 1

Sets

Voltage

3.3V @1.5Amp Max

3.3 sq in AGND, minthermal pad

1.4V @1.5Amp Max

Connect at pin 1

WARNING:DO NOT SUPPLY POWER TO PCIAND STANDALONE POWERCONNECTORS AT THE SAMETIME!

2.5 MM JACK

POWER INPUT

POWER

POWER ESTIMATES BASED ON SPRU190

1.4V@600MHz

3.3V@600MHz

1.09 W

0.52 W

0.778A

0.157A ( no emif

clk)MEASURED CURRENT ON C6416TEB, ~0.7A@5V

EACH REGULATOR CAN SUPPLY UP TO 3A OF

CURRENT. HOWEVER COMPONENT VALUES HAVE

BEEN SELECTED FOR 1.5A OPERATION.

VALUES CALCULATED WITH SWIFT DESIGN TOOL 2.0.

EMI SUPPRESION. LOCATE NEAR EACH REGULATOR. 6

VIAS FROM PAD TO PLANE OR DIRECT TIE.

FOLLOW TPS54310 EVM LAYOUT

1.4V -> 17.4K

1%1.2V -> 28.0K

1%1.1V -> 42.2K

1%

OPTIONAL CROSS COUPLE

507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL INCORPORATED

B

24 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

GND

POWER_OK (25)

DSP_CVDD (8)

VCC3.3

GND

VCC5

AGND

DSP_CVDD

VCC3.3 VCC5

VCC3.3

VCC5

VCC3.3

VCC3.3

AGND

VCC5+C5

10uF

+C37

10uF

TP1

TP1

TP6

TP

1

TP3

TP

1

TP5

TP

1

TP10

TP

1

TP11

TP

1

U22

TPS54310PWP

12345

67891011

1213

141516

1718192021

AGNDVSENSE

COMPPWRGD

BOOT

PH1PH2PH3PH4PH5PGND1

PGND2PGND3

VIN1VIN2VIN3

VBIASSS/ENASYNCRTPOWERPAD

C148

1000pF

C1450.1uF

C34

0.1uF

+C31

10uF LESR

U17

TPS54310PWP

12345

67891011

1213

141516

1718192021

AGNDVSENSE

COMPPWRGD

BOOT

PH1PH2PH3PH4PH5PGND1

PGND2PGND3

VIN1VIN2VIN3

VBIASSS/ENASYNCRTPOWERPAD

C15560pF

C16

0.047uFL11

2.7 uHC1160.1uF

C18

0.1uF

+C17

10uF LESR

L12

BLM41P750SPT

C1170.01uF

TP2TP1

C1181000pF

R117.4K 1%

+ C14100uF 4V

R6210K 1%

R61107 1%

C83300pF

R631.65K 1%

D1

MURS120T3

L182.7 uH

C28

0.047uFC147

NO-POP

J10

RASM712

CENTERSHUNTSLEEVE

R8510K 1%

R84107 1%

C303300pF

C29470pF

R862K 1%

C1468200pF

R33.74K 1%

+C27

100uF 4V

R87

10K

+ C4447uF

R2

71.5KC20

0.1uF

R4

71.5K 1%C33

0.1uF

DS12

GREEN

C19

0.039uF

C32

0.039uF

TP8TP1

TP4TP1

+C26

100 uF

+C13

100 uF

L19

BLM41P750SPTR146220

D2

MURS120T3

D3

MURS120T3

D5

MURS120T3

D4

MURS120T3

TP9TP1

+C36

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Rs

CBT VOLTAGE DIVIDER

FPGA POWER ANDRESET CIRCUITRY

BBB

AAA

507342 A

DM642 Evaluation Module with TI Decoders (Version 3)

SPECTRUM DIGITAL INCORPORATED

B

25 25Thursday, December 02, 2004

Title

Size Document Number Rev

Date: Sheet of

4.1V

4.1V

GND

PBSW_RST#

GND

FPGA1.8V

4.1V

POWER_OK(24) SYSTEM_RESET# (3,11,14,16,17,18,19,20,21)SYSTEM_RESET (11,20)

VCC3.3 VCC5

FPGA1.8V

FPGA1.8V

4.1V

4.1V

VCC3.3

VCC5

VCC3.3

VCC3.3

VCC3.3

VCC5

VCC3.3

VCC3.3VCC5

R147360100687-3601

R14810K

C2401uF

R155

33

R15210K

R113

1.6K

DS11YELLOW

TP14TP1

R151NO POP

R15410K

R15310K

R150NO POP

U33

TPS3307-18D

8

7

123

4

65

VDD

MR

SENSE1SENSE2SENSE3

GND

RESETRESET

S3

PUSHBUTTON SW

C239

0.1uF

D6LM4040DCIM3-4.1

21

U1TPS76701QPWP

35

67 13

14

16

1 2 9 10 11 12 2019

48 18

17

15

21

GNDENn

IN1IN2 OUT2

OUT1

RESET/PG

HS

/GN

D1

HS

/GN

D2

HS

/GN

D3

HS

/GN

D4

HS

/GN

D5

HS

/GN

D6

HS

/GN

D8

HS

/GN

D7

NC1NC2 NC4

NC3

FB

PW

RP

AD

D7BAS16TA

13

+C1

10uF

C57

0.1uF

C56

0.1uF+

C4

10uF

R15610K

R149 0

Q1

BSS138

TP13TP1

R24100K, 1%

R2352.3K, 1%

JP1

HEADER 2

12