A PAPER PRESENTATION ON SELF POWERED EMITTER TURN-OFF THYRISTOR DESIGN & EXPERIMENTAL DEMONSTRATION

BY

K.MOUNIKA Y10EE2623 EMAIL: mounikareddyindia@gmail.com

P.SUPRAJA Y10EE2641 EMAIL: pulugusupraja@gmail.com

BAPATLA-522101

Abstract:This paper presents the design and experimental demonstration of a superior high-powerdevice selfpowered emitter turn-off thyristor (SPETO). Different from conventional high power devices which require external power input for their gate drivers, the SPETO achieves optically controlled turn on and turn off, and all of the internal power required is self-obtained. A low-loss gate-drive circuit is implemented which allows the simple power-up operation. During a normal switching operation, the SPETO obtains a power for the gate drive during its turn-on operation. A novel switching strategy is also introduced to minimize the gate-drive power requirement. The SPETO greatly reduces costs and increases the reliability of power converters since no external power supply for device gate drive is required. Therefore, the SPETO is suitable for highpower high-frequency voltage-source converter applications. I. INTRODUCTION A conventional high-power semiconductor device requires external power input for its gate driver. In voltage-source-converter applications, external power supplies for device gate drivers need to be individually designed. The power for each device gate driver is normally provided from a low voltage potential (usually ground potential). The insulation transformer is hence required to deliver power to the device gate driver that is at a higher voltage potential. In a high-voltage converter, the insulation transformer is usually large, and it is often difficult to implement a reliable insulation design. These external power supplies for gate drivers increase costs and may reduce the reliability of the whole system. Several gate-drive power-supply methods were proposed by which the gate-drive power is not provided from a low voltage potential through insulation transformer. However, each of these methods obtains the gate-drive power through the dv/dt snubber circuit and has low power efficiency. The power supply for the gate drive needs to be individually designed according to the operation voltage and switching frequency of the device. For high-power converters using snubberless turn-off devices, such as integrated gate-commutated thyristors and emitter turn-off thyristors (ETOs), the dv/dt snubbers are not required, and these methods are difficult to apply. ETO (Emitter Turn Off thyristor): The Emitter-Turn-off Thyristor (ETO) is a hybrid MOS-Bipolar high power semiconductor device with the advantages of GTOs high current/voltage capability and MOS gate control. Its superior control

characteristics combined with its high speed, wider RBSOA, higher controllable maximum current, forward current saturation capability, its on-device current sensing and low cost make the E T 0 the most promising power device in high power, smart control applications.The Emitter Turn-off Thyristor (ETO) is a MOS-GTO hybrid device that forces the GTO to operate under the hard-driven condition. Figure l-a shows the equivalent circuit of the ETO. In the ETO, a GTO is in series with an emitter switch Q1, and another switch Q2 is connected to its gate.The turnoff of the emitter switch cuts off the GTOs cathode current path and all of the cathode currents are commutated to the gate path. In this way, the harddriven turn-off condition is realized. It is important to note that the turn-off process is a voltage controlled process. A traditional gate-2 is used to turn-on the ETO. It is very important to mention that both the emitter switch Q1 and the gate switch Q2 are not subject to high voltages, no matter how high the voltage is applied to the ETO. Q2 is connected with gate-drain shorted, hence it always operates along its transfer characteristic. The voltage across Q2 is clamped at a value slightly higher than its threshold voltage. And because the inner structure of the GTOs gate-cathode is a PN junction, the maximum voltage applied to the emitter switch Q1 cant exceed that of Q2. In the development of high power ETOs, several practical issues have to be addressed. First, it is difficult to realize an ideal emitter switch Q1 and the gate switch Q2, as both of them are supposed to conduct the full anode current. Second, the stray inductance in the emitter-gate current commutating loop in practice determine whether the hard-driven condition or unity turn-off gain can be reached. That is to say, the stray inductance has to be reduced as low as possible. Based on the ETO, we propose a novel high-power device: self-powered ETO (SPETO). Different from conventional high-power devices which require external power input for their gate drivers, the SPETO achieves optical turn on and turn off, and the internal gate-drive power required is self-obtained. The SPETO obtains power for the gate drive through its turn-on operation. A novel switching strategy to minimize the gate-drive-power requirement for the SPETO is also introduced. This paper presents the design and experimental demonstration of the SPETO.

device. The SPETO utilizes a double-side press-packcooling package and achieves a small thermal resistance. The power resistor R2 is placed on a copper layer, so that the heat of R2 is easily transferred to the heat sink.

II. ELECTRICAL AND DESIGN OF THE SPETO

MECHANICAL

The SPETO is a gate turn-off thyristor (GTO), MOSFETs, and gate-drive circuit-integrated highpower device. The SPETO does not require an external power input for the gate drive. The turn-on and turn-off commands to the SPETO are transferred through an optical fiber. Fig. 1 shows the circuit symbol of the SPETO. The SPETO can be seen as a two-electricalterminal device with an optical command input (CMD).

Fig 3. Cross section of SPETO The SPETO includes a conventional ETO, a powerobtaining circuit, and a turn-on suppression circuit. The power-obtaining circuit is used to obtain power from the anode of the SPETO and from the turn-on operation of the SPETO. In the power-obtaining circuit, R2, D2-4, and C1 are used to obtain power and store the energy into a capacitor bank C1. Then, the power from C1 is supplied to the input of a dcdc converter through filter L1 and C2.The dcdc converter is a conventional flyback converter with transformer isolation. The dcdc converter generates the multiple dc output power for the internal control and gate drive of the SPETO. The turn-on suppression circuit includes two voltage references V1 and V2, a comparator Q1, and a power resistor R1. The turn-on suppression circuit is used to suppress the turn-on operation of the SPETO when its anti-parallel diode is conducting current.

Fig 1. Circuit symbol of SPETO Fig. 2 shows the picture of the developed 4.5-kV/4kA SPETO.

Fig 2. Photo graph of SPETO Fig. 3 shows the cross section of the SPETO indicating the various components of the integrated Circuit diagram of the SPETO III. OPERATION PRINCIPLE OF SPETO

A.Power Consumption of SPETO in OFF State and During Switching Gate-drive power consumptions of the SPETO in OFF state and during switching are quite different. During the OFF state (no switching), the power consumption of the SPETO is only the control ICs quiescent power consumption. As described in [6], when the SPETO is commanded to turn on, the emitter switch Qe is turned on, and the gate switch Qg is turned off. At the same time, a pulse current is injected into the GTOs gate by a current source to turn on the GTO. While the SPETO is ON, the current source provides a 3-A dc current to the GTOs gate in order to ensure that the GTO remains in a low-conduction loss state. When the SPETO is commanded to turn off, Qe is turned off, and Qg is turned on. During switching, pulse current injection, dc current injection, and the gate drive of Qe and Qg will consume power. Fig. 4 shows measurement results of power consumptions of the SPETO in OFF state and during switching at different frequencies with 90% duty cycle.

Qg gate-drive power consumption, which is also proportional to the switching frequency. It can be seen that the SPETOs gate-drive power consumption in OFF state is small. The SPETOs gate-drive power consumption increases dramatically from OFF state to switching state and also increases with the switching frequency. B. Three Operation Modes of SPETO For the designing of the power-obtaining strategy, we define the operation of the SPETO into three operation modes: startup mode, active switching mode, and inactive switching mode. Fig. 5 shows a simplified two-level voltage-sourceconverter phase leg where the snubber circuits are not shown.

Fig 4. SPETOs gate drive power consumption in off state and during switching at different frequencies.. In Fig 4, P_IC denotes the control ICs quiescent power consumption, which is about 0.5 W. P_IDC denotes SPETOs 3-A dc current injection power consumption, which is about 9W. P_IPULSE denotes SPETOs pulse current injection power consumption. The pulse current has 100-A peak and 10-s length. The energy consumed by each pulse is about 1.8 mJ. The SPETOs pulse current injection power consumption is proportional to the switching frequency. P_MOSFET denotes the SPETOs Qe and

SPETOp and SPETOn are the upper switch and the lower switch, respectively, of the phase leg. Dp and Dn are the anti-parallel diodes of SPETOp and SPETOn. CMDp and CMDn are the ON/OFF commands to SPETOp and SPET On.The SPETO works at a startup mode when the converter first powers ON. In this mode, both SPETOp and SPETOn are in OFF state. The dc-link voltage rises gradually from zero to final voltage. We define that the output current Iout of the phase leg is positive when it flows out of the phase leg, and negative when it flows into the phase leg. When Iout is positive, we define that the upper switch SPETOp works in the active switching mode. Iout will flow through SPETOp if SPETOp is ON and SPETOn is OFF; Iout will flow through Dn if SPETOp is OFF and SPETOn is ON. When Iout is negative, we define that the upper switch SPETOp works in the inactive switching mode. Iout will flow through SPETOn if SPETOp is OFF and SPETOn is ON; Iout will flow through Dp if SPETOp is ON and SPETOn is OFF. We know that in the inactive mode, Iout will never flow through SPETOp, no matter SPETOp is ON or OFF.The lower switch SPETOn follows the same working principle as that of SPETOp. When Iout is

negative, SPETOn works in the active switching mode. When Iout is positive, SPETOn works in the inactive switching mode. In the following sections, we will describe the SPETOs operation principle in three working modes. C. Operation Principle of SPETO in Startup Mode At power-up of the SPETO, the power for gate drive is received through R2 by the SPETOs anode voltage Vanode, as shown in Fig. 6. The charge current Icl charges capacitor bank C1 and then provides the power input to the dc dc converter through filter L1 and C2. The power that is delivered to dcdc by R2 is expressed as P1=VC [Vanode-Vc]/R2 (1) From (1), it can be seen that the higher the Vanode, the more power can be obtained by the dcdc converter, and at a given Vanode, the maximum power can be obtained by the dcdc converter when VC=V(anode0/2 (2)

During startup, the SPETO works at OFF state. From Fig. 4, it can be seen that the SPETOs gate-drive power consumption P1 is about 0.5 W. The minimum Vanode for the SPETO to get enough power for startup is set at 500 V. The line under-voltage detection function (UV) is designed for the dcdc converter. At power-up, UV keeps dcdc OFF until Vc reaches the UV threshold, which is set at 250 V according to (2). Then, from (1), the value of R2 is designed to be 125 k..Once dcdc powers up, the UV is disabled to extend input voltage operation range: DCDC can still work even when Vc drops to 20 V. A Zener diode D4 is used to limit the Vc to be within 300 V.Suppose a SPETOs maximum anode voltage

during operation is 2800 V, most of which will apply across R2. The maximum power consumption of R2 is about 60 W. R2 is mounted at the heat sink of the SPETO as shown in Fig. 3. The capability of the cooling system for each SPETO is normally designed around several kilowatts. Therefore, R2 adds only a very small burden to the SPETOs cooling system. E. Operation Principle of SPETO in Inactive Switching Mode In designing a voltage-source pulse width-modulation (PWM) converter, the gate drivers of the upper witch and the lower switch of a phase leg are usually fed with complimentary (with dead-time) ON/OFF commands, no matter if they are working in active switching mode or inactive switching mode. When the SPETO works in the inactive mode, Iout will never flow through this SPETO (Iout flows through the other SPETO or the anti-parallel diode), no matter if the SPETO is ON or OFF. Therefore, in inactive switching mode, the SPETO is not able to obtain power through charging turn-on operation as shown in Fig. 7(a). From Fig. 4, we know that the gate-drive power consumption of the SPETO is much larger in switching modes than that in OFF state. In inactive switching mode, the SPETO gate driver consumes power but cannot obtain power through charging turn-on operation. As a result, Vc will decrease. In order to keep the SPETO working well,the output line frequency has to be high enough to guarantee that the SPETO can obtain power through charging turn-on before Vc decreases too low and dcdc converter runs out of regulation. This minimum line frequency requirement may limit the application of the SPETO. When a device works at inactive switching mode, it does not conduct current. Therefore,the turn-on of the device is unnecessary. In this condition, the turn-on operation of the device can be suppressed to save the gate-drive power [8]. Conventional methods are implemented within the PWM controller and need the output current direction detection. A novel SPETO gate-drive suppression function that is implemented within the SPETO gate driver is proposed. The SPETO gate driver monitors the ON/OFF state of the SPETOs anti-parallel diode and keeps the SPETO OFF if its anti-parallel diode is conducting current. To reduce the turn-off switching loss of the SPETO, the anode short GTO [9], [10], which has a 4500-V voltage and 4000-A turn-off current rating, is used to build the SPETO. Inside the GTO, there is a parasitic diode Dp from GTOs gate to anode, as shown in Fig. 9. In our design, Dp is utilized to implement this novel SPETO gate-drive suppression function

Fig. 10 shows the circuit diagram of the SPETOs gate-drive suppression function. Da is the SPETOs anti-parallel diode. V2 is set to be 0 V, which is the same voltage potential as the cathode of the SPETO. When the SPETO is commanded to be OFF and Da is not conducting current, there will be a small current (about 10 mA) flowing through R1, D1, and Qg, as shown in Fig. 10(a), bringing VKG above 0 V. Then, VC0, the output of Q1, will be high. When Da starts to conduct current IDa , the voltage of the SPETOs anode will be lower than that of the SPETOs cathode. If IDa is high enough, the current flowing throughD1 and Qg will be diverted to Dp, making VKG lower than 0 V, as shown in Fig. 10(b). Then, VC0 will be low, and the output low is used to suppress any SPETOs turn-on command. By this approach, the SPETO will not be turned on when its antiparallel diode is conducting current. When Dp is conducting current, the magnitude of the current is limited to a small value by R1. Therefore, the current flowing through Dp will not cause any abnormal failure problems [11]. IV. EXPERIMENTAL DEMONSTRATION OF SPETO A. Experimental Demonstration of SPETO in Active Switching Mode The characteristics and performance of the SPETO in active switching mode are measured in a boost converter shown in Fig. 11.

results are shown in Fig. 12. Vref1 and Vref2 are set to be 120 and 160 V, respectively. Fig. 12(a) shows the experimental results in 200ms/div time scale. The SPETO works in a normal turn-on mode first, and the voltage Vc decreases gradually due to the gate-drive power consumption. When Vc reaches Vref1 at time t1, the charging turnon mode is activated, indicated by VQe increasing. After a sequence of charging turn-on operations, Vc is increased to Vref2, and the SPETO works at normal turn-on mode. Then, the Vc decreases gradually again. After about 800 ms, it reaches Vref1 at time t5, and the charging turn-on mode is activated again. The time duration between t1 and t5 depends on the gate-driver power consumption and the amount of energy stored in the capacitor C1, as shown in Fig. 10(a). Therefore, a higher switching frequency and/or a larger duty cycle cause the time duration between t1 and t5 to be shorter. On the other hand, a larger capacitance of C1 will lead to a longer time duration between t1 and t5.

In this circuit, the SPETO is turned off without dv/dt snubber. The dc-link voltage Vdc is 500 V. The SPETO switching frequency is 1 kHz. The boost converter works in discontinuous switching mode. The peak value of the current Ia is about 800 A. The output voltage Vout is 1500 V The experimental

Fig. 12(b) shows the experimental results in 1-ms/div time scale around time t1. From t1 to t3, it takes five charging turn on mode operations to bring Vc up from Vref1 to Vref2. The number of the charging turn-on mode operations will be lower if the SPETO switches at a high current and/or a larger duty cycle. In each charging turn-on operation, VQe increases to Vc, as explained in Fig. 7(a). It is shown from Fig.

12(b) that during the charging turn-on mode, the peak current of Ia decreases by 20% compared to that during the normal turn-on mode. This is because Vdc (500 V) is relatively low compared to Vc (about 120 V). This current distortion will be improved when Vdc is higher, which is true in most SPETO applications. For example, if Vdc is 2500 V, the current distortion is about 4%. The increasing of VQe during charging turn-on mode causes output voltage distortion as well. Similarly, if Vdc is high enough compared to Vc, the voltage distortion will be relatively small.It can be seen that in the normal switching mode (other than charging turn-on mode), there is a voltage ripple of VQe during each turn-off operation. Take the voltage ripple of VQe at time t4 for example; the voltage-ripple peak value is about 40 V. When the turn-off current increases, the peak value of the voltage ripples will increase, until it reaches Vc. Then, the peak value of the voltage ripples will be clamped to Vc as explained in Fig. 8(a). Fig. 12(c) shows the details of a charging turnon operation in 10-s/div time scale around time t1. At time t1, the SPETO is commanded to turn on. Since Vc is now lower than Vref1, the charging turnon mode is activated and the turn-on of Qe is delayed. After GTO is turned on, the SPETOs anode voltage Va drops. Since Qe is still OFF, VQe begins to rise very fast and eventually is clamped to Vc. Then, Ia starts to charge C1 and Vc starts to rise. At time t2, the SPETO is commanded to turn off. Qe is kept OFF, and Qg is turned on. The GTO starts to turn off. VQe drops down when the unity turn-off gain is achieved (the current which flows out of the GTO cathode is fully diverted to GTOs gate). Eventually, Va rises to above output voltage Vout, and Ia decreases to zero. During this switching cycle, Vc is charged from 120 V to about 130 V. The SPETO obtains about 1.25-J energy and stores it in the capacitor C1 (1000 F) in this switching cycle. B. Experimental Demonstration of SPETOs GateDrive Suppression Function The SPETOs gate-drive suppression function is tested in a SPETO-based high-power Hbridge converter as shown in Fig. 13.

S1, S2, S3, and S4 are four SPETOs. In this test, the upper and lower SPETOs are fed with complementary PWM signal with dead time. The SPETO suppresses the turn on command when its anti-parallel diode is conducting current. The SPETOs also send out their ON/OFF status feedback signal through optical fibers. The SPETO S2s input switching command, ON/OFF status feedback signal, S2s current plus D2s current, and the load current Iload are measured and showed in Fig. 14.

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