The Islamic University of Gaza

Engineering Faculty

Department of Computer Engineering

Spring 2018

ECOM 2022

Khaleel I. Shaheen

Sequential Digital Design

Laboratory Manual

Experiment #3

Flip Flop Storage Elements

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Objectives

• To become familiar with flip-flops.

• To implement and observe the operation of different flip-flops.

• To become familiar with flip-flops' timing diagrams.

Theoretical Background

Flip Flops

Flip-Flop is the common name given to two-state devices which offer basic memory for

sequential logic operations. Flip-flops are heavily used for digital data storage and transfer and

are commonly used in banks called "registers" for the storage of binary numerical data.

For a latch, the output essentially responds immediately to changes on the input lines (and

possibly the presence of a clock pulse).

A flip-flop is designed to change its output at the edge of a controlling clock signal.

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Types of Flip-Flops

There are several types of flip-flops and they are D, S-R, J-K and T flip-flops, but the two most

important kinds are the D and J-K flip-flops.

S-R Flip-Flop

An S-R flip-flop is similar to an S-R latch in that S = 1 sets the Q output to 1, and R = 1 resets

the Q output to 0. The essential difference is that the flip-flop has a clock input, and the Q

output can change only after an active clock edge.

The figure below shows an S-R flip-flop constructed from two S-R latches and gates. This flip-

flop changes state after the rising edge of the clock. The circuit is often referred to as a master-

slave flip-flop.

The following table shows the operation summary of the SR Flip-Flop.

S R CLK Q Q'

0 0 Q (No Change) Q' (No Change)

1 0 1 0

0 1 0 1

1 1 0 (undefined) 0 (undefined)

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For the master-slave flip-flop, if the inputs change while the clock is low, the flip-flop output

may be incorrect. Give a look at the following timing diagram.

D Flip-Flop

We can design a flip flop using two ways. The first one is the construction of a D flip-flop with

two D latches and an inverter, as shown in the figure below. The first latch is called the master

and the second the slave. The circuit samples the D input and changes its output Q only at the

positive edge of the synchronizing or controlling clock (designated as CLK).

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Here is the timing diagram for the master-slave D flip-flop.

Another construction of an edge-triggered D flip-flop uses three SR latches as shown in the

figure below. Two latches respond to the external D (data) and CLK (clock) inputs. The third

latch provides the outputs for the flip-flop.

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Below is the operation summary table for the D flip-flop.

D CLK Q

0 0

1 1

The graphic symbol for the edge-triggered D flip-flop is shown below. It is similar to the symbol

used for the D latch, except for the arrowhead-like symbol in front of the letter Clk, designating

a dynamic input. The dynamic indicator (>) denotes the fact that the flip-flop responds to the

edge transition of the clock. A bubble outside the block adjacent to the dynamic indicator

designates a negative edge for triggering the circuit. The absence of a bubble designates a

positive-edge response.

J-K Flip-Flop

The most economical and efficient flip-flop constructed in this manner is the edge-triggered D

flip-flop, because it requires the smallest number of gates. But other types of flip-flops still can

be constructed by using the D flip-flop and external logic. Two flip-flops less widely used in the

design of digital systems are the JK and T flip-flops.

There are three operations that can be performed with a flip-flop: Set it to 1, reset it to 0, or

complement its output. With only a single input, the D flip-flop can set or reset the output,

depending on the value of the D input immediately before the clock transition. Synchronized

by a clock signal, the JK flip-flop has two inputs and performs all three operations. The circuit

diagram of a JK flip-flop constructed with a D flip-flop and gates is shown below.

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The J input sets the flip-flop to 1, the K input resets it to 0, and when both inputs are enabled,

the output is complemented.

The J-K flip-flop can be an extended version of the S-R flip-flop. This is the same circuit as for

the S-R master-slave flip-flop, except S and R have been replaced with J and K, and the Q and

Q′ outputs are feeding back into the input gates.

The following table shows the operation summary for J-K flip-flop.

J K CLK Q

0 0 Q (No Change)

0 1 0

1 0 1

1 1 Q' (Complement)

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And here is the timing diagram for a J-K flip-flop.

T Flip-Flop

The T (toggle) flip-flop is a complementing flip-flop and can be obtained from a JK flip-flop

when inputs J and K are tied together, or with a D flip-flop and an exclusive-OR gate. T flip-

flop is frequently used in building counters.

The following table shows the operation summary for T flip-flop.

J CLK Q

0 Q (No Change)

1 Q' (Complement)

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Flip-Flop Applications

Frequency Division

The process of dividing or reducing the output frequency to half of its input signal frequency is

called “Frequency division”.

As the name implies, the frequency divider circuits are used to produce the digital signal output

exactly half the input frequency. This means if we process an input signal of frequency 100 Hz,

then the frequency divider circuit will provide the output of 50 Hz.

Simple Traffic Light

This is one simple application of D-type flip-flops. Traffic light simulation using two D-type flip-

flops, an AND gate and a clock, provided to one of flip-flops. Timing of the lights can be

maintained by changing the clock frequency. Higher the clock frequency, faster will the lights

blink and vice-versa.

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Question

Complete the following timing diagram for the previous circuit.

Solution

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Light On/Off Switch circuit

The T flip-flop can be used as a toggle switch to switch a lamp on or off.

But what if the switch in the previous circuit has bouncing problem, will the circuit work

correctly? If not, how can we solve it?

Of course, the circuit will not work correctly as there is so many presses on the switch at a

small amount of time. If the number of presses was odd, it will work correctly. But if it was

even, the lamp light will not change. We can solve it by using a debouncing circuit.

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Lab Work

Equipments required

• Circuit Wizard Simulation Software.

• KL-31001 trainer kit.

• Connecting wires and Breadboard.

• The Datasheets of the IC’s.

Implementation

Use Circuit Wizard to design, test and simulate the required circuits, then implement the circuits

practically in the laboratory.

1. Construct RS flip-flop using Basic Logic Gates.

2. Construct D flip-flop using D latch.

3. Construct D flip-flop using RS flip-flop.

4. Construct J-K flip-flop using D flip-flop.

5. Convert a J-K flip-flop to a T flip-flop.

6. Construct Frequency Divisor Circuit using J-K flip-flop.

7. Construct the simple traffic lights circuit.

8. Construct light on/off switch circuit.

Good Luck

😊