Set No. 1 - MIC ECE DEPARTMENT - Homemicecedepartment.weebly.com/uploads/1/2/7/6/12761138/pdc_q_papers.pdfFigure 1b 2. (a) Give the circuits of series clipper circuits and explain

Code No: 07A30401 Set No. 1

II B.Tech I Semester Regular Examinations, November 2008PULSE AND DIGITAL CIRCUITS

( Common to Electrical & Electronic Engineering and Electronics &Instrumentation Engineering)

Time: 3 hours Max Marks: 80Answer any FIVE Questions

All Questions carry equal marks⋆ ⋆ ⋆ ⋆ ⋆

1. (a) Explain the response of RC low pass circuit for exponestial input signal

(b) Derive the expression for percentage till for a square wave output of Rc highpass circuit. [8+8]

2. (a) Design a diode clamper to restore a d.c level of +3 Volts to an input sinusoidalsignal of peak value 10Volts. Assume drop across diode is 0.6 volts as shownin the figure 2a.

Figure 2a

(b) Compare series diode clipper and shunt diode clipper. [8+8]

3. (a) Explain the phenomenon of latching in a transistor

(b) Define the following for a transistor switch

i. Rise time

ii. Fall time

iii. Storage time

iv. Delay time. [8+8]

4. (a) Explain different triggering methods of binary circuits.

(b) A collector coupled Fixed bias binary uses NPN transistors with hFE = 100.The circuit parameters are VCC = 12v, VBB = -3v, RC = 1k Ω, R1 = 5k Ω,and R2 = 10 k Ω. Verify that when one transistor is cut-off the other is insaturation. Find the stable state currents and voltages for the circuit. Assumefor transistors VCE(sat) = 0.3V and VBE(sat) = 0.7V. [8+8]

5. (a) In a current sweep circuit, explain how linearity correction is made throughadjustment of driving waveform.

(b) Write the basic mechanism of transistor television sweep circuit. [16]

6. (a) What is the condition to be met for pulse synchronization?

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(b) Describe synchronization with 2:1 frequency division with neat waveforms.

(c) Define the terms phase delay and phase jitter. [4+8+4]

7. (a) What is a sampling gate.

(b) Illustrate the principle of sampling gates with series and parallel switches andcompare them.

(c) Draw the circuit diagram of unidirectional diode gate and explain its operation.[16]

8. (a) Draw the circuit diagram of diode - resistor logic AND gate and explain itsoperation.

(b) Design a transistor inverter circuit (NOT gate) with the following specifica-tions. VCC = VBB = 10V, icsat = 10mA; hfemin = 30; the input is varyingbetween 0 and 10V. Assume typical junction voltages of npn silicon transistor.[16]

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1. (a) A symmetrical square wave whose peak-to-peak amptitude id 2V and whoseaverage value is zero as applied to on Rc integrating circuit. The time constantis equals to half -period of th esquare wave find the peak to peak value of theoutput amplitude

(b) Describe the relationship between rise time and RCtime constant of a low passRC circuit. [8+8]

2. (a) Determine Vo for the network shown in fugure 2a for the given waveform.Assume ideal diodes.

Figure 2a

(b) Explain negative peak clipper with and without reference voltage. [8+8]

3. (a) For a common emitter circuit Vcc = 10V, RC = 1kΩ IB=0.2A. Determine

i. The valve of hFE(min) for saturation to occor

ii. If Rc is changed to 220Ω, will the transistor be saturated

(b) Explain the phenomenon of latching in a transistor. [8+8]

4. Draw the circuit diagram for Schmitt trigger and explain its operation. What arethe applications of the above circuit? Derive the expressions for UTP and LTP.

[16]

5. Explain the basic principal of Miller and Bootstrap time base generators and alsoderive the equations for sweep speed error. [16]

6. (a) With the help of a circuit diagram and waveforms explain frequency divisionof an a stable multivibrator with pulse signals.

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(b) Explain with the help of block diagram and waveforms for acheiving divisionof relaxation devices without phase jitter. [8+8]

7. (a) Distinguish between sampling gates and logic gates?

(b) Explain the operation of a chopper amplifier with neat block diagram andwaveforms.

(c) Distinguish between unidirectional and bidirectional gates. [4+8+4]

8. (a) Draw the circuit diagram of diode-transistor logic NOR gate and explain itsoperation.

(b) Draw the output waveform X for the given inputs figure 8b

Figure 8b

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1. (a) Explain about RLC Ringing Circuit

(b) Explain RC double differentiator circuit. [8+8]

2. (a) T=1000 µ secV= 10 VDuty cycle = 0.2

i. Sketch waveform with voltage levels at steady state figure 2(a)iii

ii. Forward and reverse direction tilt

iii. Af / Ar

Figure 2(a)iii

(b) Write a short note on non- linear wave shaping. [12+4]

3. Explain the following

(a) Storage and transition times of the diode as a switch

(b) Switching times of the transistor. [8+8]

4. What is a monostable multivibrator? Explain with the help of a neat circuit di-agram the principle of operation of a monostable multivibrator, and derive anexpression for pulse width. Draw the wave forms at collector and Bases of bothtransistors. [16]

5. (a) Define sweep time and restoration time of a voltage time base waveform. Whatis the difference between sweep and sawtooth waveforms?

(b) In the transistor bootstrap circuit, Vcc = 25V, VEE = − 15V, R = 10kΩ, RE

= 15kΩ, RB = 150 kΩ, C= 0.05 µF, C1 = 100 µF. The gating waveform hasa duration TG =300 µSec. The transistor parameters are hie = 1.1 kΩ, hre =2.5 × 10−4kΩ, hfe = 50, hoe = 1/40

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i. Draw the waveforms of ic, and vo, labeling all current and voltage levels.

ii. What is the slope error of the sweep?

iii. What is the sweep speed and the maximum value of the sweep voltage?

iv. What is the retrace time Tr for C to discharge completely?

v. Calculate the recovery time T1 for C1 to recharge completely. [16]

6. (a) With the help of a circuit diagram and waveforms, explain frequency divisionof an astable multivibrator with pulse signals.

(b) The relaxation oscillator, when running freely, generates an output signal ofpeak - to - peak amplitude 100V and frequency 1 kHz. Synchronizing pulsesare applied of such amplitude that at each pulse the breakdown voltage islowered by 20V. Over what frequency range may the sync pulse frequency bevaried if 1 : 1 synchronization is to result? If 5 : 1 synchronization is to beobtained (fP /fS = 5), over what range of frequency may the pulse source bevaried? [16]

7. (a) Explain the operation of a six - diode gate.

(b) Write the applications of sampling gates.

(c) Briefly describe the chopper amplifier and sampling scope. [16]

8. (a) Compare the Resistor Transistor logic and Diode Transistor logic families

(b) Explain the wired AND logic with the help of circuit diagram.[8+8]

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1. (a) Obtain the response of RC high pass cirucit for an exponential i/p lignal

(b) A square wave whose peak-to-peak valve is IV, exterds I 0.5V w.r.t. to ground.The half period is O.iSec this voltage impressed upon an RC differentatingcircuit whose time constant is 0.2 sec. Determine the maximum and minimumvalves of the l/p voltages int eh steady state. [8+8]

2. (a) The input voltage vi to the two level clipper shown in figure 2a varies linearlyfrom 0 to 75 V. Sketch the output voltage vo to the same time scale as theinput voltage. Assume Ideal diodes.

Figure 2a

(b) Explain positive peak voltage limiters below reference level. [12+4]

3. (a) Explain with relevant diagram the various transistor switching times

(b) Explain the storage and transition times of the diode as a switch. [8+8]

4. Explain about various switching conditions of Schmitt trigger. [16]

5. (a) What are the methods of generating a time base waveform? Explain eachmethod.

(b) Derive the expression Mathematical relationship between sweep speed error,Displacement error and transmission error for an exponential sweep circuit.

[16]

6. (a) Describe frequency division employing a transistor a stable multivibrator withwaveforms.

(b) Describe frequency division employing a transistor monostable multivibratorwith waveforms. [8+8]

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7. (a) Describe the working of a four diode gate with necessary diagrams and equa-tions.

(b) For the four diode gate, RL = RC = 100k Ω and that R2 = 2kΩ, RF = 50Ω.For Vs = 25V, compute gain A, Vmin and (Vc)min . Compute (Vn)min for V= Vmin.

[16]

8. (a) Define positive and negative logic system

(b) Define fan-In, fan-out

(c) Draw and explain the circuit diagram of a diode OR gate for positive logic.[4+4+8]

⋆ ⋆ ⋆ ⋆ ⋆

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Code No: RR221003 Set No. 1

II B.Tech II Semester Supplimentary Examinations, Apr/May 2008PULSE AND DIGITAL CIRCUITS

( Common to Electronics & Instrumentation Engineering, Bio-MedicalEngineering and Electronics & Control Engineering)



1. (a) The periodic wave form shown is applied to an RC integrating circuit whosetime constant is 10 µ sec. Sketch the output. (figure 1b) [8]

(b) Calculate the maximum and minimum values of output voltage with respectto ground. [8]

Figure 1b

2. (a) Give the circuits of series clipper circuits and explain their operation with thehelp of transfer characteristics. [8]

(b) For the circuit shown in the figure 2b : sketch the input and output waveformsif R = 1 KΩ [8]

Figure 2bVR = 10 V, Vi = 20 Sin ωt

Rf = 100 Ω Rr =∝

Vγ = 0

3. (a) Explain the behavior of a BJT as a switch. Give Applications. [8]

(b) Write a short note on switching times of a transistor. [8]

4. (a) Explain how a Schmitt trigger can be used as a comparator and as a squaringcircuit. [8]

(b) What do you understand by hysterisis? What is hysterisis voltage? Explainhow hystersis can be eliminated in a Schmitt trigger. [8]

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5. (a) Distinguish between voltage and current time base generators. [6]

(b) In the current-sweep circuit, how linearity can be corrected through adjust-ment of driving waveform. Illustrate with an example. [10]

6. (a) Bring out the importance of synchronization and frequency division. [8]

(b) The relaxation oscillator when running freely, generates an output sweep am-plitude of 100V and frequency 1kHz. Synchronizing pulses are applied suchthat at each pulse the breakdown voltage is lowered by 20V. Over what fre-quency range may the synchronizing pulse frequency be varied if 1:1 synchro-nization is to result? [8]

7. (a) Illustrate with neat circuit diagram, the operation of unidirectional samplinggate for multiple inputs. [8]

(b) Explain with circuit diagram the operation of a two input sampling gate whichdoes not have any loading effect on control signal. [8]

8. What is meant by blocking oscillator? Explain the principle of operation of monostableblocking oscillator with base timing. Sketch the current waveforms and derive anexpression for current pulse width. [16]

⋆ ⋆ ⋆ ⋆ ⋆

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1. (a) The periodic ramp voltage shown is applied to a low pass RC circuit. Findthe equations from which to determine the steady state output waveform(figure1a). [8]

Figure 1a

(b) If T1=T2=RC, find the maximum and minimum value of the output voltageand plot this waveform. [8]

2. (a) Draw the circuit diagram of slicer circuit using Zener diodes and explain itsoperation with the help of its transfer characteristic. [6]

(b) For the circuit shown in figure 2b:

Figure 2bIf R = 1KΩ, VR2 = 10V, VR1 = 7 VRf = 0 and Rr =∝

i. Sketch the transfer characteristic

ii. If Vi = 20 sin ωt sketch the input and output waveforms. [10]

3. (a) Explain how transistor can be used as a switch in the circuit, under whatcondition a transistor is said to be ‘OFF’ and ‘ON’ respectively. [6]

(b) A germanium transistor is operated at room temperature in the CE configu-ration. The supply voltage is 6 V, the collector-circuit resistance is 200 Ω andthe base current is 20 percent higher than the minimum value required to drivethe transistor into saturation. Assume the following transistor parameters:

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Ico=-5µA, IEO=-2µA, hFE=100, and rbb′=250 Ω. Find VBE(Sat) and VCE(Sat).[10]

4. A Self-bised binary uses n-p-n silicon transistors having values of Vce(sat)=0.4v,Vbe(sat)=0.8v and zero base to emitter voltage for cutoff. The circuit parameters are Vcc=20v,Rc=4.7kΩ, R1=30kΩ, R2=15kΩ and Re=390Ω.

(a) Find the stable-state currents and voltages. [10]

(b) Find the minimum value of hfe required to give the values in part(a) [2]

(c) As the temperature is increased, what is the maximum value to which ICBO

can increase before the condition is reached where neither transistor is OFF?[4]

5. (a) With a neat diagram explain the operation of a transistor TV sweep circuit.[8]

(b) In the TV current sweep circuit L= 5mH and total current change requiredto sweep the beam across the screen is 100mA. Of the 63.5 microsec availablefor a horizontal sweep and retrace combined, 7.0 microsec is to be used forretrace. Calculate

i. required supply voltage

ii. the capacitance C and

iii. the maximum voltage that appears across the transistor. [8]

6. (a) Explain how a sinusoidal oscillator can be used as a frequency divider. [8]

(b) Write short notes on

i. Phase delay and

ii. Phase jitters [8]

7. Explain the operation of bi-directional sampling gate using diodes. Give the equiv-alent circuit and derive the expression for gain. Derive the expressions for minimumcontrol voltages required. [16]

8. Explain the recovery and loading considerations in blocking oscillator and the effectof providing damping. Give an alternate circuit to have pulse period independentof RL. [16]

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1. (a) A symmetrical square wave whose peak-to-peak amplitude is 2V and whoseaverage value is zero is applied to an RC integrating circuit. The time constantis half the period of the square wave. Find the peak-to-peak value of the outputamplitude. [10]

(b) Write a short note on RC low pass circuit. Draw the output if a step input isapplied. [6]

2. (a) For the circuit shown in figure , sketch transfer characteristics, assume idealdiodes. (figure2a) [10]

Figure 2a

(b) Draw the basic circuit diagram of a DC restorer circuit and explain its oper-ation. [6]

3. (a) Describe the switching times of BJT by considering the charge distributionacross the base region. Explain this for cut off, active and saturation regions.

[8]

(b) Define the following terms:

i. storage time

ii. delay time

iii. rise time

iv. fall time. [8]

4. Describe multivibrators from the viewpoints of construction, priniciple of working,classification based on the output states, applications and specifications. Mentionone specific application of each. [16]


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7. (a) What is a sampling gate? Explain the operation of series gate using JFET.Sketch the input and output waveforms. [8]

(b) Illustrate the errors encountered in series sampling and what is the designprocedure to minimize these errors? [8]

8. Explain the recovery and loading considerations in blocking oscillator and the effectof providing damping. Give an alternate circuit to have pulse period independentof RL. [16]

⋆ ⋆ ⋆ ⋆ ⋆

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1. Compute and draw to scale the output wave form for C=50pF, C=75pF, and C=25pF if the input is a 20V step for the following circuit.(figure 1). [16]

Figure 1

2. (a) Design a clipping circuit with ideal components, which can give the waveformshown in figure 2a for a sinusoidal input. [8]

Figure 2a

(b) Design a diode clamper to restore a d.c level of +3 Volts to an input signalof peak to peak value of 10 Volts. Assume drop across diode is 0.6 Volts. asshown in the figure (figure 2b)below [8]

Figure 2b

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3. (a) Explain the phenomenon of “latching” in a transistor switch. [6]

(b) A transistor has fT = 50 MHz, hFE=40, Cb′c=3PF and operates with Vcc=12V and Rc=500 Ω. The transistor is operating initially in the neighbourhoodof the cut-in point. What base current must be applied to drive the transistorto saturation in 1µ sec? [10]

4. (a) Discuss the different methods of triggering a flip-flop. Explain the role ofcommutating capacitors in a binary circuit. [10]

(b) Draw the circuit diagram of a fixed bias binary with speed up capacitors. [6]

5. (a) Bring out the necessity and importance of Time base circuits. [6]

(b) In the UJT sweep circuit, VBB = 20V, Vyy = 50V, R=5k, C=0.01 micro F.UJT has η= 0.5. Calculate

i. amplitude of sweep signal

ii. Slope and displacement errors and

iii. estimated recovery time. [10]



i. Phase delay and


7. (a) Explain the operation of unidirectional diode sampling gate with neat sketchof waveforms. Illustrate the effect of different levels of control voltage on gateoutput. [10]

(b) Discuss the advantages and disadvantages. [6]


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II B.Tech II Semester Supplementary Examinations, Aug/Sep 2007PULSE AND DIGITAL CIRCUITS




1. A symmetrical square wave whose average value is zero has a peak-to-peak ampli-tude of 20 V and a period of 2 µsec. This waveform is applied to a low pass circuitwhose upper 3dB frequency is 1/2 π MHz. Calculate and sketch the steady stateoutput waveform. What is the peak-to-peak output amplitude. [16]

2. (a) For the circuit shown in figure 2a an input voltage Vi linearly varies from 0to 150V is applied. Sketch the output waveform V0 to the same time scale.Assume ideal diodes. [10]

Figure 2a

(b) State and prove clamping circuit theorem. [6]

3. (a) Describe the switching times of BJT by considering the charge distributionacross the base region. Explain this for cut off, active and saturation regions.[8]


i. storage time

ii. delay time

iii. rise time

iv. fall time. [8]

4. (a) Discuss the symmetrical and Asymmetrical triggering in case of Bistable tran-sistor multivibrator. [8]

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(b) For the given circuit ,find UTP & LTP. What is this circuit called? Data givenhfe(min)=40, VCE(sat)=0.1 V, UBE(sat)=0.7 V Vr=0.5V, VBE(active)=0.6V.[8](figure 4b)

Figure 4b

5. (a) If the amplifier gain is different from unity in a bootstrap circuit, what is theeffect on the sweep voltage? What is the effect of amplifier bandwidth on thesweep output? [8]

(b) With a neat circuit, explain a method of compensation used to improve thelinearity of a bootstrap time base circuit. [8]

6. (a) Explain the principle of “synchronization” and ‘synchronization with frequencydivision’. [8]

(b) Explain the method of pulse synchronization of relaxation devices, with ex-amples. [8]


8. Consider the triggered blocking oscillator circuit shown in figure 8 below., usinga silicon transistor with VCE (sat) = 0.3V and VBE (sat) = 0.7V and hFE = 50.There are twice as many turns in the base winding as in the collector winding. Themagnetizing inductance of the collector winding 3 mH , its leakage inductance is50 µH and its shunt capacitance is 100 pF. During the pulse, calculate

(a) the pulse amplitude at the collector [4]

(b) the collector current [4]

(c) the base current and [4]

(d) the pulse width. [4]

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Figure 8

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1. Draw the different output waveforms of a RC High Pass circuit when it is appliedwith different inputs like

(a) Step-voltage input, [5]

(b) pulse input [5]

(c) square wave input. [6]

Explain the same.

2. (a) Give the circuits of different types of shunt clippers and explain their operationwith the help of their transfer characteristics. [8]

(b) For the circuit shown in figure 2b: Sketch the input and output waveforms.[8]

Figure 2bVR = 10V, Vi = 20 Sin ωt

Rf = 100Ω Rr = 10K, Vγ = 0 and R= 1K,



i. storage time

ii. delay time

iii. rise time

iv. fall time. [8]

4. With the help of a neat circuit diagram, explain the operation of an emitter-coupledmonostable multi and derive an expression for the pulse width of the output [16]

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5. (a) Draw a neat circuit diagram of UJT relaxation oscillator and explain its op-eration. Can it be used as time-base circuit of a CRO? If so how and if notwhy? [8]

(b) Draw a Miller time-base circuit with n-p-n transistors and explain its opera-tion. Compare its performance with that of UJT relaxation oscillator. [8]

6. (a) Illustrate the terms ‘synchronization’ and ‘frequency division’ of a sweep gen-erator. [8]

(b) A free-running relaxation oscillator has sweep amplitude of 100 V and a periodof 1 msec synchronizing pulses are applied to the device such that breakdownvoltage is lowered by 50 V at each pulse. The synchronizing pulse frequencyis 4 kHz. What is the amplitude and frequency of synchronized oscillatorwaveform? [8]


8. (a) Compare the diode controlled and RC controlled astable operated blockingoscillator. [6]

(b) What are the advantages of RC controlled oscillator? [4]

(c) List the applications of blocking oscillators. [6]

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1. (a) Verify V1 = V

1+ e− T/2RC V′

1 = V

1+eT/ 2RC (figure1a)

Figure 1aFor a symmetrical square wave applied to a high pass RC circuit. [10]

(b) Draw the RC high pass circuit and explain its working with step voltage input.[6]

2. (a) Design a clipping circuit with ideal components, which can give the waveformshown in figure 2a for a sinusoidal input. [8]

Figure 2a


Figure 2b

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i. storage time

ii. delay time

iii. rise time

iv. fall time. [8]

4. What is a monostable multivibrator? with the help of a neat circuit diagram explainthe principle of operation of a monostable multi and derive an expression for pulsewidth. [16]

5. (a) Write important applications of time-base circuits. With reference to timebase circuits define the following terms: [8]

i. Flyback time

ii. Transmission error.

(b) What is meant by triggered sweep? What are the merits and demerits oftriggered sweep circuits. [8]



7. (a) Explain how the diodes in a four-diode gate are replaced by short circuits. [8]

(b) Calculate the control voltage for a four-diode gate. [8]


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1. A square wave whose peak-to-peak amplitude is 2V extends ± 1V with respect toground. The duration of the positive section is 0.1 Sec and that of the negativesection is 0.2 Sec. If this waveform is impressed upon an RC integrating circuitwhose time constant is 0.2 sec. What are the steady state maximum and minimumvalues of the output waveform? [16]


Figure 2a




i. storage time

ii. delay time

iii. rise time

iv. fall time. [8]

4. (a) Discuss about triggering of monostable multivibrators.Does a monostable mul-tivibrator need symmetrical triggering? explain. [8]

(b) Explain how to use a monostable multi as voltage to time converter derive theexpression for T in terms of VCC & V ? [8]

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5. (a) Explain the principle of working of Miller sweep circuit. Derive the expressionfor sweep speed by taking Miller integrator circuit. [8]

(b) Draw a simple single stage transistor Miller integration circuit and explainhow it behaves as a time-base circuit. [8]





8. Explain the operation of an RC controlled free running blocking oscillator withneat sketch of circuit and voltage waveforms. Derive the expression for duty cycle.What are the advantages of the circuit? [16]

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Code No: NR210202 NR

II B.Tech I Semester Supplementary Examinations, November 2006PULSE & DIGITAL CIRCUITS

( Common to Electrical & Electronic Engineering, Electronics &Communication Engineering, Electronics & Telematics and Electronics &

Computer Engineering)Time: 3 hours Max Marks: 80

Answer any FIVE QuestionsAll Questions carry equal marks

? ? ? ? ?

1. The square wave shown in figure1 is fed to an RC coupling network. What are thevoltage waveforms across R and across C if

(a) RC is very large, say RC = 10T [8]

(b) RC is very small, say RC=T/10? [8]

Figure 1

2. (a) Give the circuits of different types of shunt clippers and explain their operationwith the help of their transfer characteristics. [8]

(b) For the circuit shown in figure 2b below: Sketch the input and output wave-forms. [8]

Figure 2bVR = 10V, Vi = 20 Sin ωt

Rf = 100Ω Rr = 10K, Vγ = 0 and R= 1K,

3. (a) Explain the behavior of a BJT as a switch. Give Applications. [8]

(b) Write a short note on switching times of a transistor. [8]

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Code No: NR210202 NR

4. A collector-coupled monostable multi using silicon n-p-n transistors has the

Following parameters:

Vcc=12v,VBB=3v, Rc1=Rc2=1.8kΩ,R1=R2=18KΩ,hfe=25,rbb’=400 and C=1200pf.

Neglect ICBO.Use VCE(sat)=0.2V, VBE(sat)=0.7V and Vr=0.6V.

(a) Calculate and plot the waveforms at each base and collector. [12]

(b) Find the overshoot. [2]

(c) Find the output pulse width. [2]











? ? ? ? ?

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r’

Code No: V0421/R07II B.Tech II Semester, Regular Examinations, Apr – 2011

SET - 1

PULSE AND DIGITAL CIRCUITS(Com. to ECE, BME, ECC)


All Questions carry equal marks

1. a) Verify that one of the levels of the voltage across Capacitor V2= (V/2) (e2x−1) / (e2x+1) =(V/2) tan hx when a symmetrical square wave with time period of ‘T’ is applied to a low pass RCcircuit. Here x = T/(4RC).b) A 1 kHz symmetrical square wave of ±10 V is applied to an RC circuit having 1 ms timeconstant. Calculate and plot the output for the RC configuration as i) high-pass circuitii) Low pass circuit.

2. a) Explain transfer characteristics of the emitter coupled clipper and derive the necessaryequations.b) Draw the basic circuit diagram of positive peak clamper circuit and explain its operation.

3. Write the following in detail:a) Diode switching times, b) Switching characteristics of a transistor and c) FET as a switch.

4. a) With the aid of circuit diagram, obtain the mathematical relation that a collector coupledastable multivibrator can function as a voltage to frequency converter.b) Consider a symmetrical collector coupled astable multivibrator using n-p-n Si transistors. Thecircuit and device parameters are: VCC = 6 V, RC = 560 , R = 5.6 k , C = 50 pF, hFE = 40 andbb = 100 . Calculate i) the waveforms at the base and collector of one transistor and plot to thescale. Also find the recovery time and frequency of oscillations.

5. a) Draw and explain the typical waveform of a time-base voltage generator. Explain varioustypes of errors encountered in time base generators.b) Explain the principle of working of exponential sweep circuit with neat circuit diagram andalso derive the equations for slope, transmission and displacement error.

6. a) How an astable multivibrator can be synchronized? Illustrate with waveforms.b) A symmetrical astable multivibrator using Germanium transistors and operating from a 10 Vcollector supply voltage has a free period of 1ms. Triggering pulses whose spacing is 750 µ s areapplied to one base through a small capacitor from a high impedance source. Find the minimumtriggering pulse amplitude required to achieve 1:1 synchronization. Assume that the timingportion of the base waveform is linear.

7. a) Sketch circuit of a simple diode bidirectional sampling gate and describe its functioning withneat waveforms. Obtain the expressions for gain A, and the two minimum control voltage levels.b) Describe the operation of chopper amplifier. Give the operation of the transistor as a chopperswitch in ON state and in OFF state.

8. a) Realize a two input TTL NAND gate truth table and explain its operation with suitable circuitdiagram.b) With the help of neat circuit diagram and truth table, explain the working of diode logic ANDgate, and RTL AND gate.

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www.jntuhub.com

Code No: V0421/R07 SET - 2

II B.Tech II Semester, Regular Examinations, Apr – 2011



All Questions carry equal marks

1. a) Prove that an RC low pass circuit behaves like an integrator if RC>15T, where T is the timeperiod of the input sinusoidal signal.b) A 10 Hz square wave is applied to an RC high pass circuit. Calculate and draw the outputwaveform voltage levels under the following conditions: The lower 3-dB frequency is i) 0.3 Hzii) 3 Hz iii) 30 Hz.

2. a) Explain the operation of a clamping circuit whose output signal has negative offset. Whatmodifications are needed if the output voltage of the clamper circuit has positive offset?b) Design a diode clamper circuit to restore the positive peaks of 1 kHz input signal to a voltagelevel equal to 5V. Assume that the diode voltage during forward bias condition is 0.7 V.

3. a) Define rise time, storage time, fall time, and turn off time in the case of transistor as a switch.b) Design a common emitter transistor switch operating with two power supplies VCC = 18 V, -VBB = -12 V. The transistor is expected to operate at IC = 8 mA, and IB = 0.75 mA. The staticcurrent gain is 25. Assume Si transistor, and R2 = 5R1.

4. a) Draw the self biased symmetrical binary circuit and derive the necessary relations for steadystate analysis of the circuit.b) Discuss about different triggering methods used in multivibrator circuits.

5. a) What are the methods available for generating time-base waveforms? Explain the operation ofone of them.b) Design a relaxation oscillator to have 2 kHz output frequency using UJT for the givenspecifications: Supply voltage: 20 V, Intrinsic stand off ratio: 0.70, Peak Current = 2 µ A, Valleycurrent: 1mA, and Vv = 3V. Assume necessary data.

6. a) What do you mean by synchronization?b) What is the condition to be met for pulse synchronization?c) Compare sine wave synchronization with pulse synchronization.

7. a) With neat diagrams, explain the principle of operation of four diode bidirectional samplinggate. Compare the performance of the circuit with that of six diode bidirectional sampling gate.b) Describe the errors encountered in series sampling and what is the design procedure that isadopted to minimize these errors.

8. a) With the help of neat circuit diagram and truth table, explain the working of a three input DTLNAND gate.b) What do you mean by ‘fan in’ and ‘fan out’? Discuss about the DTL NAND gate circuit whichcan improve Fan out of the gate.

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All Questions carry equal marks1. a) Derive the expression for percentage tilt (P) of a square wave output of RC high pass circuit.

b) An ideal 1 µ s pulse is fed to a low pass circuit. Calculate and plot the output waveform underthe following conditions: the upper 3-dB frequency is i) 10 MHz ii) 0.1 MHz iii) 0.01 MHz.

2. a) Draw a circuit diagram for getting a slicing the input sinusoidal signal to 2V on either side ofthe signal. Assume that the amplitude of the applied signal is more than ±2V.b) Draw the transfer characteristics of double ended clipping circuit and explain its operationwith suitable circuit diagram.

3. a) A rectangular pulse of voltage is applied to the base of a transistor driving it from cutoff tosaturation. Discuss the changes in the output potential. Explain the various times involved in theswitching process.b) Design a transistor circuit that acts as switch for the given specifications: VCC = 20 V, IC = 5mA. It is a ‘Si’ transistor having hFEmin = 20. Assume necessary data.

4. a) Explain the operation of an emitter bistable multivibrator circuit with suitable sketches.b) Design a Schmitt trigger circuit to have UTP = 6 V, LTP = 3 V using silicon transistors whosehFE(min) = 40. Assume necessary data.

5. a) With the help of suitable sketches, explain the working of constant current sweep generator.b) Design a transistor ramp generator to provide an output amplitude of 12V over a time periodof 2 ms. The input signal is a negative going pulse with an amplitude of 5 V, a pulse width of2ms and the time interval between pulses is 0.5 ms. The total load resistance is 2 k ohms and theramp is to be linear within 1%. The supply is to be ±15 V, and hFEmin = 50. Assume necessarydata.

6. a) Illustrate the terms ‘Synchronization’ and ‘frequency division’ of a sweep generator.b) A free running relaxation oscillator has sweep amplitude of 100 V and a period of 1 mssynchronizing pulses are applied to the device such that breakdown voltage is lowered by 50 V ateach pulse. The synchronizing pulse frequency is 4 kHz. What is the amplitude and frequency ofsynchronized oscillator waveform?

7. a) Illustrate with neat circuit diagram, the operation of unidirectional sampling gate for multipleinputs.b) Explain the operation of a two input sampling gate which does not have any loading effect oncontrol signal.c) Give the importance of chopper amplifier.

8. Explain the following:a) Realization of AND, and OR gates using universal gates.b) What do you mean by ‘fan in’ and ‘fan out’? Discuss about the DTL NAND gate circuit whichcan improve ‘fan out’ of the gate.

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All Questions carry equal marks1. a) Derive suitable expression for output voltage of an RC high pass circuit if an exponential input

is applied as an input.b) A 10 Hz symmetrical square wave whose peak to peak amplitude of 2 V is applied to a highpass RC circuit whose lower 3-dB frequency is 5 Hz. Calculate and sketch the output waveformfor the first two cycles. What is the peak – to – peak output amplitude under steady stateconditions?

2. a) Draw the circuit diagram of slicer circuit using Zener diodes and explain its operation with thehelp of its transfer characteristic.b) Draw the circuit diagram of emitter coupled clipper. Draw its transfer characteristicsindicating all intercepts, slopes and voltage levels derive the necessary equations.

3. a) Describe the sequence of events that lead to reverse recovery time, storage time, and transitiontime in a semiconductor diode.b) A common emitter circuit with Si transistor has VCC = 15 V, RC = 15 k ohms, and IB = 0.3mA. Determine the value of hFE(min) for saturation to occur. If RC is changed to 500 ohms, will thetransistor be saturated?

4. a) Explain the operation of an emitter coupled monostable multivibrator circuit.b) Design a collector coupled monostable multivibrator circuit for the given specifications: VCC =8V, VBE = -1.5V, IC(sat) = 2 mA, period of the quasi stable state is 2.0 µs. hFE(min) = 20, the ONtransistor (Si) has base current which is 50% in excess of minimum base current. Assume R2 =2R1, and ICBO = 0. Assume suitable data.

5. a) Explain the basic principles of the Miller and Bootstrap time base generators with suitablesketches.b) Obtain expression for slope error in the case of a constant current sweep circuit.

6. a) Explain the factors which influence the stability of a relaxation divider with the help of neatwaveforms.b) A UJT sweep operates with Vv = 3V, Vp=16V and = 0.5. A sinusoidal synchronizingvoltage of 2V peak is applied between bases and the natural frequency of the sweep is 1kHz,over what range of sync signal frequency will the sweep remain in 1:1 synchronism with the syncsignal?

7. a) What is sampling gate? Explain how it differs from Logic gates?b) What is pedestal? How it effect the output of sampling gates?c) What are the drawbacks of two diode sampling gate?

8. a) Why totem pole is used in DTL? Draw the circuit diagram and explain a DTL gate with this.b) Verify the truth table of a two input RTL-NOR gate with the circuit diagram and explain itsoperation.

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Code No: R059210202 Set No. 1


( Common to Electrical & Electronic Engineering, Electronics &Communication Engineering, Electronics & Instrumentation Engineering

and Electronics & Telematics)Time: 3 hours Max Marks: 80


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1. (a) Prove that an RC circuit behaves as a reasonably good integrator if RC > 15T,Where T is the period of an input ‘Em sin ωt

′.

(b) What is the ratio of the rise time of the three sections in cascade to the risetime of Single section of low pass RC circuit. [8+8]

2. (a) Draw the circuit diagram of slicer circuit using Zener diodes and explain itsoperation with the help of its transfer characteristic.

(b) Draw the circuit diagram of emitter coupled clipper. Draw its transfer charac-teristics indicating all intercepts, slopes and voltage levels derive the necessaryequations. [8+8]

3. (a) Explain the terms pertaining to transistor switching characteristics.

i. Rise time.

ii. Delay time.

iii. Turn-on time.

iv. Storage time.

v. Fall time.

vi. Turn-off time.

(b) Give the expression for risetime and falltime in terms of transistor parametersand operating currents. [6+10]

4. In the nonsaturated binary shown in figure 4, the avalanche diodes D1 and D2 arenominally identical, as are diodes D3 and D4. The breakdown voltage V?Z of D3and D4 is larger than the breakdown voltage VZ of D1 and D2. Verify that thetransistors do not enter the saturation region. Assume that D3 and D4 are alwaysin the breakdown region and that either D1 or D2 but not both, is in the breakdownregion. Then verify these assumptions. [16]

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Figure 4

5. (a) Draw and clearly indicate the restoration time and flyback time on the typicalwaveform of a time base voltage.

(b) Derive the relation between the slope, transmission and displacement errors

(c) Explain how UJT is used for sweep circuit? [6+4+6]

6. (a) What do you mean by synchronization ?

(b) What is the condition to be met for pulse synchronization?

(c) Compare sine wave synchronization with pulse synchronization? [4+6+6]

7. (a) Why are sampling gates called Selection circuits?

(b) What are the advantages of unidirectional sampling gates?

(c) What are the applications of sampling gates? [6+4+6]

8. (a) With the help of circuit diagram explain the purpose of clamping diode in apositive diode AND gate.

(b) Explain the effect of and diode capacitance on the output pulse of diode ANDgate. [8+8]

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1. (a) Prove that an RC circuit behaves as a reasonably good integrator if RC > 15T,Where T is the period of an input ‘Em sin ωt′.


2. (a) State and prove clamping -circuit theorem.

(b) A clamping circuit and input wave form is shown in figure 2b calculate andplot to scale the steady state output [8+8]

Figure 2b

3. Write Short notes on:

(a) Diode switching times

(b) Switching characteristics of transistors

(c) FET as a switch. [4+8+4]

4. (a) Consider the symmetrical emitter triggering circuit of the figure 4 with Rc=3Re,R1=2R2, and VCC=6V. Indicate all the circuit voltages in the quiescent stateand indicate also the voltages immediately after a 5-V positive step is applied.Assume that D3 and D4 are always in the breakdown region and that eitherD1 or D2 but not both in the breakdown region.

1 of 2


(b) Repeat part (a) for a 25-V step. What limits the maximum size of the inputstep? What limits the minimum size of the input step? [16]

Figure 4




6. (a) Explain the factors which influence the stability of a relaxation divider withthe help of a neat waveforms.

(b) A UJT sweep operates with Vv = 3V, Vp=16V and η=0.5. A sinusoidalsynchronizing voltage of 2V peak is applied between bases and the naturalfrequency of the sweep is 1kHz, over what range of sync signal frequency willthe sweep remain in 1:1 synchronism with the sync signal? [8+8]

7. (a) What is sampling gate? Explain how it differ from Logic gates?

(b) What is pedestal? How it effects the output of a sampling gates?

(c) What are the drawbacks of two diode sampling gate? [6+6+4]

8. (a) Draw and explain the circuit diagram of integrated positive RTL NOR gate

(b) Compare the RTL and DTL logic families in terms of Fan out, propagationdelay, power dissipated per gate and noise immunity. [8+8]

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1. (a) Verify V2= (V/2)(e2x−1)/(e2x+1) = (V/2) tanhx for a symmetrical square

wave applied to a low pass RC circuit.

(b) Derive the expression for percentage tilt(P) of a square wave output of RChigh pass circuit. [8+8]

2. (a) Give the circuits of different types of shunt clippers and explain their operationwith the help of their transfer characteristics.

(b) Draw the diode differentiator comparator circuit and explain the operation ofit when ramp input signal is applied. [8+8]





4. (a) Draw the circuit diagram of a Schmitt trigger circuit and explain its operation.Derive the Expressions for its UTP and LTP.

(b) Explain how an Schmitt trigger circuit acts as a comparator. [12+4]

5. (a) Explain the basic principles of Miller and bootstrap time base generators.

(b) A transistor bootstrap ramp generator is to produce a 15V, 5ms output to a2kohms load resistor. The ramp is to be linear within 2%. Design a suitablecircuit using Vcc = 22V, −VEE = -22V and transistor with hfe(min) = 25. Theinput pulse has an amplitude of -5V, pulse width = 5ms and space width =2.5ms. [8+8]

6. (a) What is relaxation oscillator? Name some negative resistance devices used asrelaxation oscillators and give its applications.

(b) With the help of a circuit diagram and waveforms, explain the frequencydivision by an astable multivibrator? [8+8]

7. (a) Why are sampling gates called linear gates?

(b) What are the other names of a gate signal?

(c) Compare the unidirectional and bi-directional sampling gates. [6+4+6]

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8. (a) Why totem pole is used in DTL? Draw the circuit diagram and explain a DTLgate with this.

(b) Verify the truth table of RTL NOR gate with the circuit diagram of two inputs.[8+8]

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1. (a) What is the function of a comparator? Explain its operation.

(b) Explain the response of a low pass circuit to an exponential input is applied.

(c) Explain the response of RL circuit when a rectangular pulse is applied [4+6+6]

2. (a) For the circuit shown in figure 2a , Vi is a sinusoidal voltage of peak 100volts. Assume ideal diodes. Sketch one cycle of output voltage. Determinethe maximum diode Current.

Figure 2a

(b) Explain positive peak clipping with reference voltage. [12+4]





4. In the monostable circuit of the given figure 4 the resistor R is connected toan auxiliary supply V1 instead of VY Y . If A2 is in saturation or clamp andif A1 is OFF in the stable state, verify that the gate time T is given by Eq.T =τ ln(V

YY+I1RY−Vσ)/(V

YY−Vγ) with VY Y replaced by V1. [16]

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Figure 4

5. (a) How are linearly varying current waveforms generated?

(b) In the boot strap circuit shown in figure5 Vcc = 25 V, VEE = -15 V, R = 10 Kohms, RB = 150 K ohms, C = 0.05 µF. The gating waveform has a durationof 300 µs. The transistor parameters are hie = 1.1Kohms, hre = 2.5 x 10−4 Kohmshfe =50 hoe = 1/40K ohms.

i. Draw the waveform of IC1 and Vo , labeling all current and voltage levels,




v. Calculate the recovery time T1 for C1 to recharge completely. [6+10]

Figure 5

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6. (a) Explain how monostable multivibrator is used as frequency divider?

(b) Draw and explain the block diagram of frequency divider without phase jitter.[8+8]




8. (a) What are the basic logic gates which perform almost all the operations inDigital communication systems.

(b) Give some applications of logic gates.

(c) Define a positive and negative logic systems.

(d) Draw a pulse train representing a 11010111 in a synchronous positive logicdigital system. [4+4+4+4]

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II B.Tech I Semester Supplimentary Examinations, November 2008PULSE AND DIGITAL CIRCUITS




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1. (a) Derive the expression for rise time of integrating circuit and prove that itis proportional to time constant and inversely proportional to upper 3 dBfrequency.

(b) Explain the operation of RC low pass circuit for exponential input is applied.[8+8]

2. (a) T=1000 µ secV= 10 VDuty cycle = 0.2

i. Sketch waveform with voltage levels at steady state figure 2(a)iii

ii. Forward and reverse direction tilt

iii. Af / Ar

Figure 2(a)iii

(b) Write a short note on non- linear wave shaping. [12+4]

3. (a) Explain the behaviour of a BJT as a switch in electronic circuits. Give anexample.

(b) Write a short note on the switching times of transistor. [8+8]

4. What is a monostable multivibrator? Explain with the help of a neat circuit dia-gram the principle of operation of a monostable multi, and derive an expression forpulse width. Draw the wave forms at collector and Bases of both transistors. [16]

5. (a) With the help of a neat circuit diagram and waveforms explain the workingof a transistor Miller time base generator.

1 of 2


(b) Find the component values of a bootstrap sweep generator, given Vcc=18V,Ic(sat) = 2mA and hfe(min)=30. [8+8]








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1. (a) A square wave whose peak-to-peak value is 1V, extends ±0.5V with referenceto ground. The half period is 0.1 sec This voltage impressed upon an R.C.differentiating circuit whose time constant is 0.2 sec. Determine the maximumand minimum values of the output voltage in the steady state.

(b) Draw the response of high pass circuit for square wave and derive the expres-sion for percentage tilt. [8+8]

2. (a) For the circuit shown in figure 2a VS is a sinusoidal voltage of peak 75 volts.Assuming ideal diodes. Sketch one cycle of output voltage. Determine themaximum diode currents.

Figure 2a

(b) What are the uses of clipper circuits. [12+4]


i. Rise time.

ii. Delay time.

iii. Turn-on time.

iv. Storage time.

v. Fall time.

vi. Turn-off time.


4. Draw and explain about the response of Schmitt circuit for the following.

(a) for loop gain ≤1

1 of 3


(b) loop gain >1. [16]








Figure 5




7. (a) Explain the balance conditions in a bi-directional diode gate.

(b) Explain the utility of sampling gate in a sampling scope. [8+8]




2 of 3



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3 of 3






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1. Wtite short note on the following:

(a) Attenuators

(b) RC Double differentiator.

(c) RLC ringing circuit. [5+6+5]

2. (a) A symmetrical 10 kHz square wave whose peak -to-peak excursion are ±10Vwith respect to ground is impressed upon the diode clamping circuit shown infigure 2a. The Diodes has Rf = 100 Ω, Rr = α and Vγ = 0. Sketch the steadystate output waveform Indicating clearly the voltage levels.

Figure 2a

(b) Explain positive peak voltage limiters above and below reference level. [8+8]

3. (a) Sketch neatly the waveforms of current & voltages for a transistor switch withcapacitance loading circuit.

(b) What are catching diodes? [12+4]

4. (a) Draw the circuit of a bistable multivibrator with symmetrical collector trig-gering.

(b) Design a monostable circuit that produces a pulse width of 10msec. (Assumethe required date) [8+8]

5. (a) With the help of a neat circuit diagram and waveforms explain the workingof a transistor Miller time base generator.

(b) Find the component values of a bootstrap sweep generator, given Vcc=18V,Ic(sat) = 2mA and hfe(min)=30. [8+8]

6. (a) What is relaxation oscillator? Explain how it is used for synchronization?Name some negative resistance devices used as relaxation oscillators.

1 of 2


(b) Explain how Astable multivibrator is used for frequency division? [8+8]

7. (a) Draw and explain a sampling diode whose response is not sensitive to theupper level of the control voltage.

(b) Draw and explain a unidirectional gate which delivers an output only at acoincidence of a number of control voltages. [8+8]





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1. (a) Prove that an RC circuit behaves as a reasonably good integrator if RC > 15T,Where T is the period of an input ‘Em sin ωt’.


2. (a) For the circuit shown in figure 2a an input voltage Vi linearly from 0 to 150Vis applied. Sketch the output waveform V0 to the same time scale. Assumeideal diodes.

Figure 2a

(b) What in meant by a d.c restoration circuit and explain? [12+4]






YY+I1RY−Vσ)/(V


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Figure 4

5. (a) Compare the principle of operation of Miller sweep circuit and Bootstrap sweepcircuit

(b) Explain how linearity is obtained by adjusting the driving waveform of currentsweep circuit. [8+8]

6. (a) Draw the circuit diagram of an astable multivibrator to obtain frequency di-vision by 5. Explain its working with waveforms.

(b) What is phase jitter? Discuss the significance of it in a frequency divider.[8+8]








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2 of 2






⋆ ⋆ ⋆ ⋆ ⋆

1. (a) Prove that an RC circuit behaves as a reasonably good integrator if RC > 15T,Where T is the period of an input ‘Em sin ωt

′.





i. Rise time.

ii. Delay time.

iii. Turn-on time.

iv. Storage time.

v. Fall time.

vi. Turn-off time.


4. In the nonsaturated binary shown in figure 4, the avalanche diodes D1 and D2 arenominally identical, as are diodes D3 and D4. The breakdown voltage V?Z of D3and D4 is larger than the breakdown voltage VZ of D1 and D2. Verify that thetransistors do not enter the saturation region. Assume that D3 and D4 are alwaysin the breakdown region and that either D1 or D2 but not both, is in the breakdownregion. Then verify these assumptions. [16]

1 of 2


Figure 4







7. (a) Why are sampling gates called Selection circuits?

(b) What are the advantages of unidirectional sampling gates?

(c) What are the applications of sampling gates? [6+4+6]



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2 of 2






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1. (a) Prove that an RC circuit behaves as a reasonably good integrator if RC > 15T,Where T is the period of an input ‘Em sin ωt′.




Figure 2b





4. (a) Consider the symmetrical emitter triggering circuit of the figure 4 with Rc=3Re,R1=2R2, and VCC=6V. Indicate all the circuit voltages in the quiescent stateand indicate also the voltages immediately after a 5-V positive step is applied.Assume that D3 and D4 are always in the breakdown region and that eitherD1 or D2 but not both in the breakdown region.

1 of 2


(b) Repeat part (a) for a 25-V step. What limits the maximum size of the inputstep? What limits the minimum size of the input step? [16]

Figure 4









8. (a) Draw and explain the circuit diagram of integrated positive RTL NOR gate

(b) Compare the RTL and DTL logic families in terms of Fan out, propagationdelay, power dissipated per gate and noise immunity. [8+8]

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1. (a) Verify V2= (V/2)(e2x−1)/(e2x+1) = (V/2) tanhx for a symmetrical square

wave applied to a low pass RC circuit.

(b) Derive the expression for percentage tilt(P) of a square wave output of RChigh pass circuit. [8+8]









5. (a) Explain the basic principles of Miller and bootstrap time base generators.

(b) A transistor bootstrap ramp generator is to produce a 15V, 5ms output to a2kohms load resistor. The ramp is to be linear within 2%. Design a suitablecircuit using Vcc = 22V, −VEE = -22V and transistor with hfe(min) = 25. Theinput pulse has an amplitude of -5V, pulse width = 5ms and space width =2.5ms. [8+8]






1 of 2




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1. (a) What is the function of a comparator? Explain its operation.

(b) Explain the response of a low pass circuit to an exponential input is applied.

(c) Explain the response of RL circuit when a rectangular pulse is applied [4+6+6]

2. (a) For the circuit shown in figure 2a , Vi is a sinusoidal voltage of peak 100volts. Assume ideal diodes. Sketch one cycle of output voltage. Determinethe maximum diode Current.

Figure 2a

(b) Explain positive peak clipping with reference voltage. [12+4]






YY+I1RY−Vσ)/(V


1 of 3


Figure 4








Figure 5

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6. (a) Explain how monostable multivibrator is used as frequency divider?

(b) Draw and explain the block diagram of frequency divider without phase jitter.[8+8]








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II B.Tech I Semester Regular Examinations, November 2006PULSE & DIGITAL CIRCUITS




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1. (a) Explain the response of a high pass circuit to an exponential input is applied.

(b) Write short note on piping process. [8+8]

2. (a) Explain transfer characteristics of the emitter coupled clipper and derive thenecessary equations.

(b) Draw the basic circuit diagram of positive peak clamper circuit and explainits operation. [8+8]





4. (a) Design a collector coupled transistor monostable multivibrator to produce atime delay of 100 µsec. Use transistors have hFE of 250. Use ±12v sources,VCE(sat) = 0.3v, VBE(sat) = 0.7v and VBEcutoff = 0v

(b) Show that the astable multivibrator works as voltage controlled oscillator.[10+6]

5. (a) Draw and explain the typical waveform of a time-base voltage.

(b) Explain the principle of working of exponential sweep circuit with neat circuitdiagram and also derive the equations for slope , transmission and displace-ment error. [6+10]






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1. (a) A square wave of 5 V amplitude with an ON time of 1 msec and an OFF timeof 3 m sec is applied to a high pass RC circuit with R = 2K and C = 0.1 µ f.Sketch the steady state output waveform showing all the details

(b) Explain the operation of RC high pass circuit when exponential input is ap-plied. [8+8]





4. (a) Explain the reason for the occurrence of overshoot at the base of normally ONtransistor of one shot. Derive an expression for overshoot.

(b) Discuss a few applications of a monostable multivibrator. Explain how itdiffers with that of a binary. [8+8]








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Figure 5




7. (a) Draw and explain an emitter coupled bi-directional sampling gate.

(b) For the four diode gate shown in figure 7 with a divider resistance R used .Vs=25V, Rf=20 ohms, RL=RC=200K ohms and R= 100 ohms. Find Vcmin,A and Vnmin? [8+8]

Figure 7

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1. (a) An ideal 1 µ -Sec pulse is fed to a low pass circuit. Calculate and plot theoutput waveform under the following conditions: The upper 3-dB frequencyis

i. 10 MHz

ii. .1 MHz

iii. .0.1 MHz.

(b) Explain RLC ringing circuit. [10+6]

2. (a) Design a clipping circuit with ideal components, which can give the waveformshown in figure 2a for a sinusoidal input.

Figure 2a

(b) State and prove clamping circuit theorem. [8+8]



4. (a) Explain the operation of Astable multivibrator with a circuit diagram withrelevant waveforms.

(b) A collector coupled monostable multi using n-p-n silicon transistor has thefollowing parameters Vcc = 12v, VBB = 3v, RC = 2k, R1 = R2 = R = 20k,hFE = 30, rbb = 200 Ω and c = 1000pF. Calculate and plot to scale the waveslopes at each base and collector. Also find width of the o/p pulse. [8+8]

5. (a) What type of Voltage input is required to obtain a linear current sweep?

(b) The transistor bootstrap circuit shown in Figure 5 has the following parame-ters VCC = 10 V, VEE = -10V, RB = 30 K ohms, C=0.002 µF, C1=0.25µF

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and CB may be taken as arbitrarily large. The input gate has an amplitudeof 1V and a width of 50µs. The transistor parameters are hFE = hfe = 60,hie=2kohms, 1/hoe = 10 K ohms, hre = 10−4. ICBO = 0, and the forwardbiased junction voltages are negligible. The diode is ideal.

i. Plot the gate voltage, collector current iC1, and the output voltage Vo.

ii. Evaluate the sweep speed and amplitude of the sweep at its maximumvalue

iii. Find time it takes to discharge C at the end of the sweep,

iv. Find peak voltage change across C1 and the time required to replace thelost charge

v. Find slope error. [6+10]

Figure 5




7. (a) With the help of a neat diagram, explain the working of two-diode samplinggate.

(b) Derive expressions for gain and minimum control voltages of a bi-directionaltwo- diode sampling gate. [8+8]

8. (a) Draw and explain the circuit diagram of a diode AND gate for positive logic.

(b) Derive the output equation for a diode OR gate for positive logic. [8+8]

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1. (a) Explain double differentiator with the help of neat sketches.

(b) A limited ramp is applied to an RC differentiator. What is the peak of theout put wave form for

i. T = RC

ii. T= 0.2RC

iii. T= 5RC. [8+8]



Figure 2b

3. (a) Describe the switching times of BJT by considering the charge distributionacross the base region. Explain this for cut-off, active and saturation region.

(b) Explain phenomenon of latching in a transistor. [12+4]



5. (a) What is a Linear time base generator? Give its Applications

(b) Write the differences between the voltage and current time base generators?

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(c) Why the time base generators are called sweep circuits? [6+6+4]








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Code No: RA221101 RA

III B.Tech I Semester Regular Examinations, November 2007PULSE AND DIGITAL CIRCUITS

(Instrumentation & Control Engineering)Time: 3 hours Max Marks: 80


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1. (a) A 10Hz square wave is fed to an amplifier. Calculate and plot the output waveform under the following conditions the lower 3dB frequency is

i. .0.3 Hz.

ii. 3.0 Hz,

iii. 30 Hz.

(b) Draw the output waveform of an RC High pass circuit with a square waveinput under different time constants. Explain same. [8+8]




i. Rise time.

ii. Delay time.

iii. Turn-on time.

iv. Storage time.

v. Fall time.

vi. Turn-off time.


4. Write short notes on:

(a) Gate width of mono-stable multi.

(b) Astable multivibrator as a voltage to frequency converter with circuit andwaveform. [8+8]

5. (a) Explain the following terms with respect to linearity of sweep in detail

i. Slope speed error

ii. displacement error

iii. transmission error

iv. Derive the relation between the (i), (ii) & (iii).

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Code No: RA221101 RA

(b) Design a relaxation oscillator to have 2 kHz output frequency , using a UJTand a 20 V supply. Calculate the output amplitude? The specifications forUJT are as follows η =0.68 to 0.82, Ip = 2µA, Iv = 1mA ,Vr = 0.7 VandVEB(sat) = 3 V.



7. (a) With the help of a neat diagram, explain the working of two-diode samplinggate.

(b) Derive expressions for gain and minimum control voltages of a bi-directionaltwo- diode sampling gate. [8+8]



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II B.Tech I Semester Supplementary Examinations, November 2006PULSE AND DIGITAL CIRCUITS




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1+ e− T/2RC V′

1 = V




2. (a) State and prove clamping-circuit theorem. [6]

(b) A square wave input as shown in figure 2b below is applied to the clamping

circuit. Sketch the steady-state output waveform and derive the

necessary expressions. [10]

Figure 2b

3. (a) Explain in detail the junction diode switching times. [8]

(b) Give a brief note on piece-wise linear diode characteristics. [8]

4. (a) Discuss the symmetrical and Asymmetrical triggering in case of Bistable tran-sistor multivibrator. [8]

(b) For the given circuit ,find UTP & LTP. What is this circuit called? Data givenhfe(min)=40, VCE(sat)=0.1 V, UBE(sat)=0.7 V Vr=0.5V, VBE(active)=0.6V.

(Figure 4b) [8]

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Figure 4b

5. (a) Define the three errors that occur in a sweep circuit and obtain an expressionfor these errors for an exponential sweep circuit. [8]

(b) Explain with a circuit the working of a UJT sweep circuit and obtain theexpressions for the intrinsic stand off ratio (η). [8]

6. (a) How astable multivibrator can be synchronized? Illustrate with waveforms.[8]

(b) A symmetrical astable multivibrator using transistor operates from 10V supplyhas a period of 1msec. Triggering pulses of spacing 750 microsec are appliedto one base through a small capacitor from a high-impedance source. Find theminimum triggering pulse amplitude required to achieve 1:1 synchronization.

[8]



8. Consider the triggered blocking oscillator circuit shown in figure 8 below., usinga silicon transistor with VCE (sat) = 0.3V and VBE (sat) = 0.7V and hFE = 50.There are twice as many turns in the base winding as in the collector winding. Themagnetizing inductance of the collector winding 3 mH , its leakage inductance is50 µH and its shunt capacitance is 100 pF. During the pulse, calculate

(a) the pulse amplitude at the collector [4]

(b) the collector current [4]

(c) the base current and [4]

(d) the pulse width. [4]

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Figure 8

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1+ e− T/2RC V′

1 = V




2. (a) State and prove clamping-circuit theorem. [6]

(b) A square wave input as shown in figure 2b below is applied to the clamping

circuit. Sketch the steady-state output waveform and derive the

necessary expressions. [10]

Figure 2b

3. (a) Explain how transistor can be used as a switch in the circuit, under whatcondition a transistor is said to be ‘OFF’ and ‘ON’ respectively. [6]

(b) A germanium transistor is operated at room temperature in the CE configu-ration. The supply voltage is 6 V, the collector-circuit resistance is 200 Ω andthe base current is 20 percent higher than the minimum value required to drivethe transistor into saturation. Assume the following transistor parameters:

Ico=-5µA, IEO=-2µA, hFE=100, and rbb′=250 Ω. Find VBE(Sat) and VCE(Sat).[10]

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4. A transistor Schmitt trigger uses n-p-n silicion transistors with hfe(min)=30Vce(sat)=0.1v,VBE(sat)=0.7v

Vcc=12v,Rc1=2k Rc2=1kΩ, R1=20kΩ, R2=100kΩ, Re=500Ω,Rs=2kΩ. (figure 4)

(a) Draw the circuit diagram. Calculate all the steady-state currents & voltages.[8]

(b) Determine UTP & LTP. [4]

(c) Find Hystersis voltage. [2]

(d) Sketch the output waveform if a triangular waveform as shown is applied tothe circuit. [2]

Figure 4

5. (a) Write important applications of time-base circuits. With reference to timebase circuits define the following terms: [8]

i. Flyback time

ii. Transmission error.

(b) What is meant by triggered sweep? What are the merits and demerits oftriggered sweep circuits. [8]





8. (a) Discuss the methods of controlling output current pulse width in blockingoscillators. [6]

(b) Write notes on hysteresis effect in blocking oscillators. [4]

(c) Discuss the method of improving rise time in blocking oscillator. [6]

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1. (a) A symmetrical square wave of peak to peak amplitude V and frequency ‘f ’ isapplied to a high pass RC circuit. Find the percentage tilt. [12]

(b) How can this tilt be reduced? [4]

2. (a) Design a clipping circuit with ideal components, which can give the waveformshown in figure 2a below for a sinusoidal input. [8]

Figure 2a


Figure 2b

3. (a) Explain the phenomenon of “latching” in a transistor switch. [6]

(b) A transistor has fT = 50 MHz, hFE=40, Cb′c=3PF and operates with Vcc=12V and Rc=500 Ω. The transistor is operating initially in the neighbourhoodof the cut-in point. What base current must be applied to drive the transistorto saturation in 1µ sec? [10]

4. (a) Design a collector coupled astable multivibrator to meet the following

specifications:

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f=10KHZ,VCC=12V,IC (sat)=4mA and hFE(min)=20.Assume that

VCE (sat)=0.3V and VBE (sat)=0.7V. [8]

(b) An astable multi is used as a voltage to frequency converter. Find the ratioof VCC/V,if the voltage to frequency converter generates oscillations of

frequency thrice that when V=VCC . [8]





i. Phase delay and


7. (a) Distinguish between logic gate and sampling gate. [4]

(b) Why is a sampling referred as a linear gate? [4]

(c) Illustrate the principle of operation of a linear gate using series switch andshunts witch. What are the disadvantages? [8]


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1. (a) A pulse is applied to a low-pass RC circuit. Prove by direct integration thatthe area under the pulse is same as the area under the output waveform acrossthe capacitor. Explain the result. [10]

(b) Write a short notes on Highpass RC circuit as a differentiator. [6]

2. (a) What is synchronized clamping? Explain. [8]

(b) Design a diode clamper circuit to clamp the positive peaks of the input signalat zero level. The frequency of the input signal is 500 Hz. [8]



i. storage time

ii. delay time

iii. rise time

iv. fall time. [8]

4. Design a Monostable circuit that produces a pulse width of 10 m sec. Assumehfe=30, VCE(sat)=0.3V, VBEsat=0.7V Ic=5mA, Vcc=6V. VBB=1.5V, Q1 ON andQ2 OFF. [16]






6. (a) Explain about synchronization of a sweep circuits with symmetrical signals.- [8]

(b) A UJT sweep operates with a valley voltage of Vv=2V and a peak voltageVp=12V. A sinusoidal synchronizing voltage of 2V peak is applied betweenbases. The stand-off ratio is η=0.5. If the natural frequency of sweep is 1kHz,over what range of synchronizing signal frequency will the sweep remain in 1:1synchronization with the synchronizing signal? [8]

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8. In the circuit (figure 8) shown below, D is a germanium diode with Vγ << VCC .

(a) Explain why this circuit operates as high duty-cycle astable blocking oscillator[8]

(b) Indicate the relative winding polarities [2]

(c) Show that an approximately symmetrical square wave is obtained if n1 = n+1- [6]

Figure 8

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1. Draw the RC High pass circuit, sketch the response of this circuit for exponentialinput and ramp input. Derive the output equations for the same. [16]


Figure 2a



[8]


i. storage time

ii. delay time

iii. rise time

iv. fall time. [8]


5. (a) What are the essential requirements of TV horizontal sweep circuit? How doyou achieve them using a current sweep? [8]

(b) In the current sweep circuit used for TV, the transistor used must operate asa bidirectional switch. Explain. [8]

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7. (a) Give the disadvantages of a two-diode gate. [6]

(b) How a four-diode gate is superior to two-diode gate. [10]

8. (a) Compare the diode controlled and RC controlled astable operated blockingoscillator. [6]

(b) What are the advantages of RC controlled oscillator? [4]

(c) List the applications of blocking oscillators. [6]

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1+ e− T/2RC V′

1 = V




2. (a) For the circuit shown in figure 2a Rs = Rf = 100 ohms, R = 10 K,

C= 1.0 micro farad. At t=0 symmetrical square wave is applied

with an amplitude of 10V and a frequency of 5KHz, sketch the output

wave form for the first two cycles. [8]

Figure 2a

(b) In the circuit shown in figure 2b Rf= 100 ohms, Rr = 10K, Vr=0.

Sketch the steady state output voltage indicating all voltages and time

constants, for the given input periodic waveform. [8]

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Figure 2b


[8]


i. storage time

ii. delay time

iii. rise time

iv. fall time. [8]


5. (a) Draw the circuit of a two-stage transistor bootstrap circuit to get an exactlylinear sweep. [8]

(b) Draw a practical form of a bootstrap sweep circuit using a transistor. Writethe expressions for sweep speed and linearity of such circuit. [8]



7. (a) Explain in detail about uni-directional diode gates. [10]

(b) Explain in a uni-directional diode gate how the effect of control voltage canbe illustrated. [6]

8. Explain the operation of free running blocking oscillator (diode controlled) withneat sketch of current and voltage waveforms. Derive the expression for period andduty cycle of oscillations. [16]

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1+ e− T/2RC V′

1 = V




2. (a) Draw the circuit diagram of an emitter-coupled clipping circuit and draw

its transfer characteristic indicating all intercepts, slopes and voltage levels .[8]

(b) The input voltage Vi to the clipper shown in figure 2b below is a 10 micro sec.

pulse whose voltage varies between 0 and 10V. [8]

Figure 2bIf Rf = 100Ω, Vr = 0.5 V and Rr =∝, sketch the output wave form

V0 and indicate the time constants of the exponential portions.


[8]


i. storage time

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ii. delay time

iii. rise time

iv. fall time. [8]

4. Explain how to draw the various waveforms and calculate their volatage levels inan emitter-coupled monostable multi. [16]

5. (a) Draw a bootstrap circuit using a Darlington circuit. What are its merits andlimitations? [8]

(b) Discuss about the recovery time of a sweep circuit. How do you achieve shortrecovery time? [8]



7. (a) Distinguish between logic gate and sampling gate. [4]

(b) Why is a sampling referred as a linear gate? [4]

(c) Illustrate the principle of operation of a linear gate using series switch andshunts witch. What are the disadvantages? [8]

8. Explain the operation of free running blocking oscillator (diode controlled) withneat sketch of current and voltage waveforms. Derive the expression for period andduty cycle of oscillations. [16]

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1. (a) Prove that for any periodic input waveform the average level of the steadystate output signal from the RC high pass circuit is always Zero. [8]

(b) Prove the above statement for (different periodic input waveforms) Squarewave input. [8]

2. (a) Draw the basic circuit diagram of negative peak clamper circuit and explainits operation. [6]

(b) For the circuit shown in figure 2b, an input voltage Vi linearly varies

from 0 to 150 V is applied. Sketch the output voltage V0 to the same timescale. [10]

Assume ideal diodes.

Figure 2b


[8]


i. storage time

ii. delay time

iii. rise time

iv. fall time. [8]

4. Explain how to draw the various waveforms and calculate their volatage levels inan emitter-coupled monostable multi. [16]



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6. (a) Explain about synchronization of a sweep circuits with symmetrical signals.[8]

(b) A UJT sweep operates with a valley voltage of Vv=2V and a peak voltageVp=12V. A sinusoidal synchronizing voltage of 2V peak is applied betweenbases. The stand-off ratio is η=0.5. If the natural frequency of sweep is 1kHz,over what range of synchronizing signal frequency will the sweep remain in 1:1synchronization with the synchronizing signal? [8]

7. (a) Explain the operation of multiple input unidirectional sampling gate usingdiodes. [6]

(b) Illustrate with circuit diagram, the operation of the above with a number ofcontrol voltage inputs . [6]

(c) Give an alternate circuit whose output is not sensitive to upper level of controlvoltage. [4]


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Documents

Set No. 1 - MIC ECE DEPARTMENT - Homemicecedepartment.weebly.com/uploads/1/2/7/6/12761138/pdc_q_papers.pdfFigure 1b 2. (a) Give the circuits of series clipper circuits and explain