Si Photonics Design - SOI Industry Consortiumsoiconsortium.eu/wp-content/uploads/2018/10/Photonics_20181108… · Design Challenges –Circuit Level •The mind of a designer does

Si Photonics Design

Yoshimi KitagawaCadence JapanCustom IC & PCBField Engineering & Services

© 2018 Cadence Design Systems, Inc. All rights reserved.2

Integrated Photonics Growing and diversifying

Growing

Diversifying

(Sensors,…)


Active Market Segments

• High-end communication (rack to rack, datacenter)

– Lot of recent activity in SerDes design team

• Sensors

– Lidar (driven by automotive market)

– Bio sensors and environmental

• Neural networks and photonic RF


Electronic Photonics Design Automation Flow


Design Challenges – Circuit Level

• The mind of a designer does not scale to the size of the circuits that are designed today (# channels, size of switch arrays)

• Sequential simulation (E -> O -> E) does not allow dealing with feed-back loops

• The time scale of a EO optical system-level simulation is LARGE compared to that used to characterize optical elements, and abstraction is required not only to “hide” some of the details of the physical fabrication, but simply to enable circuit-level simulation with reasonable hardware requirements


Circuit SimulationElectro-optical transient analysis – Co-simulation

– Allow INTERCONNECT (an optical simulator) and Spectre® APS (and electrical (SPICE) simulator) to simulate their own domain specific representations

– Communicate (bi-directionally, i.e., push and pull) simulation data between all the specified connecting nodes by using DPI and API

Virtuoso Schematic EditorVirtuoso Schematic Editor

co

-sim

ula

tio

n in

terf

ace

Verilog DPI

INTERCONNECT API

Spectre

Electrical Circuit Simulation

Spectre

Electrical Circuit Simulation

INTERCONNECT

Photonic Circuit Simulation

INTERCONNECT

Photonic Circuit Simulation

Virtuoso Analog Design EnvironmentVirtuoso Analog Design Environment


Circuit SimulationCo-simulation – Timesteps management

– For each time step in the Spectre® simulation, data is pushed to and pulled from INTERCONNECT through the DPI and API interface

– Spectre simulation can use either adaptive or equal time step

Equal timestep mode Adaptive timestep mode


Circuit SimulationCo-simulation – Example

• Quadrature phase shift keying (QPSK) transmitter– Photonic building blocks: laser, QPSK transmitter, QPSK receiver

– Electronic building blocks: 25G drivers, TIA


Digital SourceElectronic Driver

Optical QPSK

Transmitter

Optical QPSK Receiver

Transimpedance

Amplifier









Received Signal Constellation

Diagram at TIA Outputs (Analog)

Electronic Driving Signals and

Received I&Q Signals at TIAs

Output (Analog)

Transmitted Digital Bitstream

(Digital)

Transmitted Optical Signal Phase



Design Challenges – Layout

• Generation of curvilinear layout

– Optimization of discretization

– Matching facets of waveguides

• Automation placement, routing

– Simulation of waveguides (optical interconnect)

• DRC, LVS

– “false” errors

– Parameter extraction on curvy linear layout


• Virtuoso® support multiple method

– Native SKILL® implementation (such as the one in production for GLOBALFOUNDRIES 90/45nm) PDKs

– Third-party tools

• We continue to improve the SKILL support for curvilinear shapes, to provide the most efficient and most maintainable solution

Curvilinear Editing


Coupled Circuit and Layout + Spec Validation


Design Challenges – System Level

• 3D IC traditional issues

– Thermal

– EM coupling

– …

• Packaging

– Models for optical connectors


Thermal


EM Coupling

• Photonics ICs are usually used in RF (high-frequency) type system

• The feature we are looking at is not specific to PIC, but is used for hybrid PICs

• Extraction of the S-parameter matrix at the coupling point between the CMOS chip and the PIC


EM Coupling


Conclusion

• Design automation still has a lot to do to enable true electro-optical co-design

• But we have strong foundations, and are engaged with the leaders

• LARGE integrated photonics designs are being made today!

• Strong collaboration with Lumerical

– Including several delivered features (co-simulation, ADE integration)

All screenshots used as illustrations in this presentation are from released (existing, available) software


How Photonics Impacts the Way We Live

• Day-long seminar featuring industry andacademic experts

• Proceedings available on cadence.com

Special Hands-On Photonics Workshop

• Learn to design, implement, and verify a photonics IC for lidar

Cadence Photonics Summit and Workshop

© 2018 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo, and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems,

Inc. Accellera and SystemC are trademarks of Accellera Systems Initiative Inc. All Arm products are registered trademarks or trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere. All MIPI specifications are registered

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Si Photonics Design - SOI Industry Consortiumsoiconsortium.eu/wp-content/uploads/2018/10/Photonics_20181108… · Design Challenges –Circuit Level •The mind of a designer does