Silicon Epitaxy for TW Presentation

Episil Technologies Inc.

Silicon Epitaxy

Silicon Epitaxy 2012

EPI – TAXIS = Ordered – onEpitaxy is the growth of a thin layer of single-crystalmaterial on the crystal face of the same (homoepitaxy)or another (heteroepitaxy).

• VPE - Vapor Phase Epitaxy

• LPE - Liquid Phase Epitaxy

• MBE - Molecular Beam Epitaxy

What is EPITAXY ?


Typical Epi Wafer Designs(Schottky Diode)

N+ Substrate

N- Epi

Device Structure Epi Layer Structure


Typical Epi Wafer Designs(FRED)

N+ Substrate

N- Epi



Typical Epi Wafer Designs(Power BJT)

N+ Substrate

N- Epi



Typical Epi Wafer Designs(Power MOSFET)

N+ Substrate

N- Epi


Drain

Source Gate


Typical Epi Wafer Designs(IGBT)

P+ Substrate

N- Epi


N+ buffer layer


Typical Epi Wafer Designs(CMOS)

P+ Substrate

P- Epi


P-Epi


Gemini 2 Reactor


Gemini 3 Reactor


NuFlare Reactor


LPE 3061 Reactor


ASM E2000 Reactor


AMAT Centura Reactor

3 Process chambers

Robot

Loadlocks

Cooldown Centerfinder


Epi Key Parameters

� Thickness

� Thickness variation (within wafer and wafer to wafer)

� Resistivity

� Resistivity variation(within wafer, wafer to wafer and vertical gradient)


Process Control ParametersTemperature of the substrate

Pressure within the chamber

Carrier gas flow (H 2)

Flow rate of reactive gases(silicon and dopant)

Flow patterns within the chamber

Temperature profile across the susceptor


Chemistry for Epi Deposition

SiCl4 + 2H2 ←→ Si + 4HCl

SiHCl3 + H2 ←→ Si + 3HCl

SiH2Cl2 ←→ Si + 2HCl

SiH4 ←→ Si + 2H2

chemical process for epi depositionin a SiHCl3-H2 system


Deposition RateThe growth rate depends on temperature and gas flow

Increasingflow rate

Deposition from SiHCl3 + H2

Activation energy = 22 kcal/mol

Reactioncontrolled

Mass transfer controlled

Temperature (℃)

10,000/ T (K)

Dep

ositi

on r

ate

(um

/min

)

For single wafer reactor, growth rate 4~5um/min

is available

G.R. increases linearlywith square root of gas flow


TCS Bubbler System

The TCS concentration depends on pressure , temperature and TCS level

TCS Main Tank TCS Bubbler


Thickness Uniformity Adjustment

Flow patterns within the chamber

Main H2 flow rate

Silicon source flow rate

Deposition Temperature


Thickness Uniformity Adjustment


The dopant is co-deposited with silicon. Usually, a lightly doped layer is deposited on a heavily doped substrate.

Doping

dopant precursors :p-type : diborane (B 2H6) in H 2

n-type : phosphine (PH 3) in H 2arsine (AsH 3) in H 2


Dopant Mix / Delivery System

SRC

DILINJ

mixer

vent line

Chamber A

INJ2

SRC DIL

mixer

INJ3

INJ1

Chamber A

vent lineChamber

BChamber

CChamber

B


Temperature Dependence of Doping


Resistivity Uniformity Adjustment



Radial lamp array




Autodoping

Lightly doped epi

Heavily doped substrate

Gas-phase autodoping:Dopant fromwafer backsideand edges.

System autodoping:Dopant fromother wafers, susceptor andreactor wall.

Solid-phaseout-diffusion:Dopant diffusion up from substrate.


Breakdown Voltage Mapping

With light autodoping With serious autodoping


1 1 1λm+1 λm 2n2d ─── － ─── ＝ ───

� Fourier Transform Infra redSpectrometer(Bio-Rad QS-300)

Epi Thickness Measurements


Epi Layer Resistivity Measurements� Capacitance / Voltage

(Hg-CV: SSM 490i/495)

� 4 Point Probe(Tencor RS-35)

Epi layer of at least 3 um are required for reliable 4PP evaluation


SSM Mercury Probe


CV Profiling


Doping Profile Measurements

� Spreading Resistance Probe(SSM 150, SSM 2000)


Probes and Probe Contacts


Calibration ChartSpreading Resistance vs. Resistivity (traceable Si bulk standards)


SR Profile Sample

analysisalgorithms

Rm: resistanceRho: resistivityCC: concentration


N/N++ SR Profilesfrom different correction methods


Epi Wafer Visual Inspection

� Human InspectionDiffuse LightHigh Density LightOptical Microscope

� Automatic InspectionLaser Scanner

Wafer Mechanical Inspection

� Multifunction DimensionalMeasurements(ADE 9X00 UltraGage)

ThicknessGlobal ShapeFlatness

D = a + t + bD = a + t + bD = a + t + bD = a + t + b

t = D t = D t = D t = D –––– (a + b)(a + b)(a + b)(a + b)


TTV(Total Thickness Variation)


Global Flatness


Site Flatness


Site-partitions on 8” Wafer

( 25*25 sq.mm) (20*20 sq.mm)

* 194 mm as diameter for FQA (Fixed Quality Area)


Stepper Focus at the Edge

Defocus at the edge because of poor edge site flatness


Bow


Warp

ASTM F1390entire surface scanned ASTM F657

partial surface scanned


Taper

T2

T1



Typical Defects in Epi Layers

Schematic representation of typical epi defects

a) epi stacking faultb) growth hillockc) dislocation (continuation from the bulk)d) stacking fault (continuation from the bulk)e) epi spike

a b c d e


Thank you

Documents

Silicon Epitaxy for TW Presentation