Sistem Mikroprosesor

1. Blok Diagram Minimum System(CPU,ROM,RAM)2. Sistem Bus(Address Bus, Control Bus, Data Bus)3. Cara Kerja Minimum System

Sistem MikroprosesorSistem MikroprosesorSlide 2 Mikroprosesor Sub. Sistem Mikroprosesor, Sistem Bus___ [email protected]

Sistem MikroprosesorSistem Mikroprosesor

Definition: Definition: A complete electronic system built A complete electronic system built around the microprocessor to support the around the microprocessor to support the microprocessor operation.microprocessor operation.

Terdiri dari :Terdiri dari :•CPUCPU•MemoryMemory•I/O (disk drives, keyboard, mouse)I/O (disk drives, keyboard, mouse)•system bussystem bus•supporting circuitrysupporting circuitry

CPU as the “brain” – controls actions of all components.CPU as the “brain” – controls actions of all components.

Slide 2 Mikroprosesor Sub. Sistem Mikroprosesor, Sistem Bus___ [email protected]

Microprocessor System - PCMicroprocessor System - PC

ROM

Keyboard Mouse HDD

Floppy RAM

CD-ROMSupporting

CircuitryCPU


Microprocessor System - CalculatorMicroprocessor System - Calculator

Keypad

Memory

Power Supply LCD DisplayCPU


System BusSystem Bus

A A µµP-based system consists of many P-based system consists of many components:components: CPU.CPU. Memory.Memory. I/O: disk drives, keyboard, mouse.I/O: disk drives, keyboard, mouse. System Bus.System Bus. Supporting circuitry.Supporting circuitry.

All components communicate using All components communicate using System System BusBus..


System BusSystem Bus

Communication “highway” for all Communication “highway” for all components.components.

Contains:Contains: Data lines.Data lines. Address lines.Address lines. Control lines: regulate information transfer, Control lines: regulate information transfer,

interrupts, error signals. interrupts, error signals.


Block DiagramBlock Diagram

Parallel I/O Serial I/OInterrupt

Circuit

Timing CPU Memory

System Bus


Minimum System/Mikrokomputer

1. CPU 2. Memory Unit 3. I/O Unit



Address Bus The size of the address bus determines the total number of memory addresses available in which programs can be executed by the microprocessor

For example, a microprocessor with 32 address pins can generate 2^32 = 4,294,964,296 bytes [4 gigabytes(GB)] of different possible addresses (combinations of 1 ’ s and 0’s) on the address bus. The microprocessor includes addresses from 0 to 4,294,964,295 (00000000HEX through FFFFFFFFHEX).


The CPUThe CPU

““Master” of all components.Master” of all components. Job:Job:

Get instructions from memory.Get instructions from memory. Execute instructions.Execute instructions. Perform calculations (may use math co-Perform calculations (may use math co-

processor). processor). Control bus operations. Control bus operations.

CPU


The CPUThe CPU CPU consists of:CPU consists of:

ALU (Arithmetic/Logic Unit)ALU (Arithmetic/Logic Unit) Performs arithmetic/ logic computations.Performs arithmetic/ logic computations.

CU (Control Unit)CU (Control Unit) Responsible to retrieve instructions, analyze, then execute.Responsible to retrieve instructions, analyze, then execute.

RegistersRegisters Fast internal storage.Fast internal storage. Used to temporarily store addresses, data, processor Used to temporarily store addresses, data, processor

status.status.


MemoryMemory

Stores instructions and dataStores instructions and data for CPU. for CPU. Each memory location given unique Each memory location given unique

address.address. CPU refers to address to access.CPU refers to address to access.

Types: Types: Read-Only Memory (ROM).Read-Only Memory (ROM). Random-Access Memory (RAM).Random-Access Memory (RAM). Non-Volatile Memory (NVM). Non-Volatile Memory (NVM).

Memory


RAM, ROM and NVMRAM, ROM and NVM

Memory NVM

RAM

ROM

Stores start-up instructions and critical system data and variables.

Stores general data and applications


ROMROM

Read-Only Memory:Read-Only Memory: Data Data can be readcan be read, but , but cannot be written (read-only)cannot be written (read-only).. Contents stayContents stay without power (non-volatile). without power (non-volatile). Usually contains basic start-up instructions, data.Usually contains basic start-up instructions, data. Contents Contents hard-wiredhard-wired during manufacturing. during manufacturing. Newer versions can be reprogrammed:Newer versions can be reprogrammed:

PROM: Fuse & anti-fuse.PROM: Fuse & anti-fuse. EPROM: UV light.EPROM: UV light. EEPROM: Electrical current.EEPROM: Electrical current.


ROM ExamplesROM Examples

Quartz Window

EEPROM Programmer

EPROM


NVMNVM

Non-Volatile MemoryNon-Volatile Memory Contents can be Contents can be readread and and writtenwritten.. Contents stayContents stay without power without power (non-volatile).(non-volatile). Advantages:Advantages:

Keeps memory even with no power.Keeps memory even with no power. Data is protected against blackouts.Data is protected against blackouts. Rewriteable.Rewriteable.

Disadvantages:Disadvantages: Slower than RAM.Slower than RAM.

RAMRAM

Random Access Memory.Random Access Memory. Contents can be Contents can be readread and and writtenwritten.. Loses dataLoses data without electrical power ( without electrical power (volatilevolatile).). Advantages:Advantages:

Programs can be loaded and reloaded.Programs can be loaded and reloaded. Larger capacity.Larger capacity.

Disadvantages:Disadvantages: Requires power, refresh cycles.Requires power, refresh cycles.


RAM vs. ROMRAM vs. ROM

Computer is turned on

CPU looks for instructions from memory

RAM is still empty because the computer has just been started.

CPU loads instructions from ROM.


RAM vs. ROMRAM vs. ROM

ROM only has basic functions to start the computer.

RAM loads more advanced functions, suchas the OS.


Timing CircuitTiming Circuit Timing

Synchronizes all componentsSynchronizes all components in the system. in the system. All components refer to the clock timing for All components refer to the clock timing for

operations. operations.

Generates Generates square wavessquare waves at constant intervals. at constant intervals. Crystal oscillatorCrystal oscillator + timing circuitry. + timing circuitry. Higher clock speedHigher clock speed allow computers to function allow computers to function

fasterfaster..


Crystal OscillatorCrystal Oscillator

Symbol

Equivalent Circuit

Sample


Clock SignalClock Signal

T T T


I/OI/O

Input/Output.Input/Output. Connects Connects µPµP with with external devices:external devices:

Add functionality to µP.Add functionality to µP.

Interfaces with µP using Interfaces with µP using portsports.. Examples:Examples:

Keyboard.Keyboard. Mouse.Mouse. Display monitor.Display monitor.


How do ports connect to system How do ports connect to system bus?bus?

Built into board

Using card slots.


Serial I/OSerial I/O

Sends/receives data Sends/receives data sequentiallysequentially across 2 channels. across 2 channels. One for One for receivereceive, one for , one for transmittransmit..

Connects using Connects using serial portsserial ports.. Advantages:Advantages:

Less crosstalk.Less crosstalk. Disadvantages:Disadvantages:

Slow.Slow. Needs special circuit to convert back to parallel (Needs special circuit to convert back to parallel (UARTUART – –

Universal Asynchronous Receiver/Transmitter).Universal Asynchronous Receiver/Transmitter).

Serial I/O


Serial PortSerial Port


Parallel I/OParallel I/O

Sends/receives data across Sends/receives data across multiple linesmultiple lines at at one time.one time.

Connects using Connects using parallel portsparallel ports.. Advantages:Advantages:

Faster than serial.Faster than serial. Simpler circuits – doesn’t need UART.Simpler circuits – doesn’t need UART.

Disadvantages:Disadvantages: Crosstalk.Crosstalk.

Parallel I/O


Parallel PortParallel Port


Parallel vs. Serial I/OParallel vs. Serial I/O

1011011010101010011010101010100011101100101

1011011010101010011010101010100011101100101

1011011010101010011010101010100011101100101

1011011010101010011010101010100011101100101

Serial Port

Parallel Port

1011011010101010011010101010100011101100101 Receive

Transmit

.

.

Receive/Transmit

Receive/Transmit

Receive/Transmit


UARTUART

UART

1

0

0

1

1001

UART

1

0

0

1

1001

To System BusFrom Device

From System BusTo Device


Interrupt CircuitInterrupt Circuit

Allows other components to “interrupt” normal Allows other components to “interrupt” normal CPU operation:CPU operation: PrioritizePrioritize CPU tasks. CPU tasks. Error detectionError detection mechanism. mechanism. Accept inputsAccept inputs from devices – keystroke, mouse from devices – keystroke, mouse

press.press. Depends on task importance:Depends on task importance:

Important tasksImportant tasks given given higher interruptshigher interrupts.. Less important tasks queued.Less important tasks queued. CPU keeps trackCPU keeps track of current interrupt level. of current interrupt level.

Interrupt Circuit


How Interrupts WorkHow Interrupts WorkCPU Device

1. CPU is performing tasks normally.

2. Device has more important task that requiresimmediate attention.

3. Device requests interrupt fromCPU.

4. CPU saves its current task so that it can return to it when the interrupt completes.

5. CPU services the interrupt.

6. CPU reloads saved task, and resumes normally.


Watchdog MonitorWatchdog Monitor

Watchdog monitor:Watchdog monitor: Special circuit - Special circuit - monitors the system for errorsmonitors the system for errors.. Informs the CPU.Informs the CPU. CPU takes appropriate actions – re-execute instruction, reset CPU takes appropriate actions – re-execute instruction, reset

system, halt processor.system, halt processor. May work in two ways:May work in two ways:

Constantly monitor the system, and sends signal if error Constantly monitor the system, and sends signal if error detected.detected.

Continuously sending signal to CPU after certain interval:Continuously sending signal to CPU after certain interval: If CPU receives signal, continues processing. If CPU receives signal, continues processing. If CPU doesn’t receive signal, something’s wrong. If CPU doesn’t receive signal, something’s wrong.


How Watchdogs WorkHow Watchdogs WorkCPU Watchdog

1. CPU is performing tasks normally.

1. Watchdog monitors bus for errors.

2. If error detected, inform CPU.3. CPU saves its current task so that it can return to it when error is resolved.

4. CPU fixes the error.

5. CPU reloads saved task, and resumes normally.

5. If error is too serious, CPU may reset/halt system.


Source Chapter 7

The 68000 is provided with two Vcc (+5 V) and two ground pins

Do-D15 are the 16 data bus pins.

A1-A23 are the 23 address lines.

A0 is obtained by encoding the …UDS (upper data strobe) LDS (lower data strobe)


Arsitektur MikrokomputerArsitektur Mikrokomputer

A129

A230

A331

A432

A533

A634

A735

A836

A937

A1038

A1139

A1240

A1341

A1442

A1543

A1644

A1745

A1846

A1947

A2048

A2150

A2251

A2352

D05

D14

D23

D32

D41

D564

D663

D762

D861

D960

D1059

D1158

D1257

D1356

D1455

D1554

AS6

UDS7

LDS8

R/W9

BG11

BR13

BGACK12

DTACK10

E20

CLK15

FC028

FC127

FC226

IPL025

IPL124

IPL223

VMA19

VPA21

HALT17

RESET18

BERR22

U2

68000


CPU Execution CPU Execution CycleCycle


CPU Execution CycleCPU Execution Cycle

CPU executes instructions in CPU executes instructions in endless fetch, decode, endless fetch, decode, execute cyclesexecute cycles..

It only knows how to do three things:It only knows how to do three things: Fetch instructions from somewhere.Fetch instructions from somewhere. Analyze instruction, get more data if necessary.Analyze instruction, get more data if necessary. Execute instruction.Execute instruction.

Keeps track of instruction using Keeps track of instruction using Program Counter Program Counter (PC):(PC): Tells CPU location of next instruction.Tells CPU location of next instruction.


Fetch, Decode, ExecuteFetch, Decode, Execute

Reset

Fetch

Decode

Execute


Fetch – Step 1Fetch – Step 1

Program Counter

Instruction #1

$1001

$1009$1008$1007$1006$1005$1004$1003$1002

$1000Instruction #1

Instruction #2

Instruction #2

Empty

Empty

Empty

Data #1

Data #2

Data #3

$1000

Control

CPU Memory

Instruction Register

Data Registers

CPU gets instruction address from PC



Program Counter

Instruction #1

$1001

$1009$1008$1007$1006$1005$1004$1003$1002

$1000Instruction #1

Instruction #2

Instruction #2

Empty

Empty

Empty

Data #1

Data #2

Data #3

$1000

Control

CPU Memory


Data Registers

CPU outputs instruction address through Address Bus

$1000

Address Bus



Program Counter

Instruction #1

$1001

$1009

$1008

$1007

$1006

$1005

$1004

$1003

$1002

$1000

Instruction #1

Instruction #2

Instruction #2

Empty

Empty

Empty

Data #1

Data #2

Data #3

$1000

Control

CPU Memory


Data Registers

Memory gets the instruction and sends in to CPU using Data Bus.

Instruction #1

Data Bus



Program Counter

Instruction #1

$1001

$1009

$1008

$1007

$1006

$1005

$1004

$1003

$1002

$1000

Instruction #1

Instruction #2

Instruction #2

Empty

Empty

Empty

Data #1

Data #2

Data #3

$1000

Control

CPU Memory

Instruction #1Instruction Register

Data Registers

CPU stores instruction in Instruction Register



Program Counter

Instruction #1

$1001

$1009$1008$1007$1006$1005$1004$1003$1002

$1000Instruction #1

Instruction #2

Instruction #2

Empty

Empty

Empty

Data #1

Data #2

Data #3

$1002

Control

CPU Memory


Data Registers

After instruction has been loaded, CPU updates Program Counter.


Decode – Step 1Decode – Step 1

Program Counter

Instruction #1

$1001

$1009$1008$1007$1006$1005$1004$1003$1002

$1000Instruction #1

Instruction #2

Instruction #2

Empty

Empty

Empty

Data #1

Data #2

Data #3

$1002

Control

CPU Memory


Data Registers

CPU analyzes instructions before executing it.

Type of instruction.Does the instruction require any data to perform calculations?Where are the data located?


Execute – Step 1Execute – Step 1

Program Counter

Instruction #1

$1001

$1009$1008$1007$1006$1005$1004$1003$1002

$1000Instruction #1

Instruction #2

Instruction #2

Empty

Empty

Empty

Data #1

Data #2

Data #3

$1002

Control

CPU Memory


Data Registers

If instruction requires data from memory, data address is placed on address bus.

$1007

Address Bus



Program Counter

Instruction #1

$1001

$1009$1008$1007$1006$1005$1004$1003$1002

$1000Instruction #1

Instruction #2

Instruction #2

Empty

Empty

Empty

Data #1

Data #2

Data #3

$1002

Control

CPU Memory


Data Registers

Memory gets the instruction and sends in to CPU using Data Bus.

Data #1

Data Bus



Program Counter

Instruction #1

$1001

$1009$1008$1007$1006$1005$1004$1003$1002

$1000Instruction #1

Instruction #2

Instruction #2

Empty

Empty

Empty

Data #1

Data #2

Data #3

$1002

Control

CPU Memory

Instruction #1

Data #1


Data Registers

CPU puts data inside internal data registers and execute instructions.



Program Counter

Instruction #1

$1001

$1009$1008$1007$1006$1005$1004$1003$1002

$1000Instruction #1

Instruction #2

Instruction #2

Empty

Empty

Empty

Data #1

Data #2

Data #3

$1002

Control

CPU Memory

Instruction #1

Data #1Result #1


Data Registers

If instruction wants to write data to memory, CPU puts its data and address on the bus.

$1005

Address Bus

Result #1

Data Bus



Program Counter

Instruction #1

$1001

$1009$1008$1007$1006$1005$1004$1003$1002

$1000Instruction #1

Instruction #2

Instruction #2

Empty

Result #1

Empty

Data #1

Data #2

Data #3

$1002

Control

CPU Memory

Instruction #1

Data #1Result #1


Data Registers

Memory receives instructions and puts data in the location.


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