Slides created by: Professor Ian G. Harris Test and Debugging Controllability and observability are required Controllability Ability to control sources

Slides created by: Professor Ian G. Harris

Test and Debugging

Controllability and observability are required

Controllability• Ability to control sources of data used by the system• Input pins, input interfaces (serial, ethernet, etc.)• Registers and internal memory

Observability• Ability to observe intermediate and final results• Output pins, output interfaces• Registers and internal memory


I/O Access is Insufficient

Control and observation of I/O is not enough to debug

main(){ x = f1(RA0,RA1); foo (x);}

foo(x){ y = f2(x); bar (y);}

bar(y){ RA2 = f3(y);}

RA0

RA1RA2

If RA2 is incorrect, how do you locate the bug?Control/observe x and y at function calls?


Embedded Debugging

Properties of a debugging environment:

1. Run Control of the target- Start and stop the program execution

2. Ability to change code and data on target- Fix errors, test alternatives

3. Real-Time Monitoring of target execution- Non-intrusive in terms of performance

4. Timing and Functional Accuracy- Debugged system should act like the real system


Host-Based Debugging

Compile and debug your program on the host system, not target- Compile C to your laptop, not the microcontroller

Advantages:1.Can use a good debugging environment2.Easy to try it, not much setup (register names, etc)

Disadvantages:1.Timing is way off2.Peripherals will not work, need to simulate them3.Interrupts probably implemented differently4.Different data sizes and “endian”ness


Instruction Set Simulator

Instruction Set Simulator (ISS) runs on the host but simulates the targetEach machine instruction on the target is converted into a set of instructions on the host

Example:

Target Instruction - add x: Adds register x to the acc register, result in the acc register

Host equivalent: add acc, x, acc: Adds second reg to third, result in the first reg


ISS Tradeoffs

Advantages:1. Total run control2. Can change code and data easily

Disadvantages:1. Simulator assumptions can cause inaccuracies2. Timing is off, no real-time monitoring

- initial register values, timing assumptions3. “Hardware environment” of target cannot be easily modeled


Hardware Environment

RAMPIC

RA0

RA1

RA2

PIC communicates with the switch and the RAMCommunications must be modeled to test PIC codeSimulators allow generation of simple event sequencesResponsiveness is more difficult to model


Remote Debug/Debug Kernel

Remote debugger on the host interacts with a debug kernel on the target

Communication through a spare channel (serial or ethernet)

Debug kernel responds to commands from remote debugger

Debug kernel is an interrupt, so control is possible at any time

Host(PC)

Target (PIC)Serial or Ethernet


Remote Debug Tradeoffs

Advantages:1.Good run control using interrupts to stop execution2.Debug kernel can alter memory and registers3.Perfect functional accuracy

Disadvantages:1.Debug interrupts alter timing so real-time monitoring is not possible2.Need a spare communication channel3.Need program in RAM (not flash) to add breakpoints


ROM Emulator

RAM

ucontroller

Targetucontroller

Host

InstructionsSerial orethernet

TargetucontrollerROM

Instructions

Common to read instructions from a separate ROM on the target ROM emulator substitutes the ROM for a RAM with a controller


ROM Emulator Features

Remote debugger where ROM is replaced by RAM- Debug kernel is in the RAM

Solves the “non-writable ROM” problem of remote debugging

ROM emulator completely controls the instructions- Full data access is possible

ROM emulator can contain a debug communication channelNo need for a spare channel


ROM Emulator Disadvantages

Instruction ROM must be separate from the microcontroller- No embedded ROM

There must be a way to write to the ROM- May be done with a complex sequence of reads

Alters timing, just as any debug kernel would


In-Circuit Emulation (ICE)

TargetucontrollerROM

Instructions

Replace the microcontroller with an new oneCan select instructions from external ROM (normal mode) or internal shadow RAM (test mode)

ShadowRAM

TargetucontrollerM

uxROMHost


ICE Advantages

ICE can always maintain control of the program - Interrupt cannot be masked

Works even if system ROM is broken

Generally the best solution

Documents

Slides created by: Professor Ian G. Harris Test and Debugging Controllability and observability are required Controllability Ability to control sources