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SMPS design from systemSMPS design from systemto component: to component:
shortening the cycle with simulation shortening the cycle with simulation
March 2008Madrid
ce
i@u
pm
.es
Universidad PolitUniversidad Politéécnica de Madridcnica de Madrid
Centro de Electrónica Industrial (CEI)
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Outline
The application: Interleaved
converters
Design of magnetic components for
power converters using PExprt
Advantages of Integrated magnetics
in Interleaved Converters
Integrated magnetics component
design using PExprt
Digital control implementation with
Simplorer
System design: from the circuit level
to the system level
Simplorer + SMPS
PExprt
Simplorer + SMPS
PExprt
Simplorer
Simplorer + PTool
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Advantages of Interleaved Converters
Advantages:Power distributionDynamic response improvesOutput current ripple cancellationComponent size reduction
Limitations:One magnetic component for each phaseDynamic response may not be good enoughPhase current ripple may be quite large
Vs = 9V, Is = 10AVs = 9V, Is = 10A
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Application of Interleaved Converters
AmpRF
Pow
erC
onve
rter
Filte
r
Control
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Interleaved Converters design with Simplorer
0
1.00
500.00m
0 10.005.00
Efficiency ~86%Efficiency ~86%Efficiency ~86%
2.00
5.00
3.00
4.00
9.95m 10.00m9.96m 9.98m
Current at each phase (1.6A p-p)Current at each phase (1.6A Current at each phase (1.6A pp--pp))
2.00
6.00
0
2.50
5.00
0 1.02m500.00u
Output VoltageOutput VoltageOutput VoltageVin = 12 V; Vin = 12 V; VoutVout = 3.3 V= 3.3 V
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Magnetic Component design with PExprt
0
3.00
1.00
2.00
1.95m 2.00m1.96m 1.98m
Phase Currents
AM1.I ... AM2.I ... AM3.I ...
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Comparison of models at circuit level with Simplorer
0
1.00
500.00m
50.00m 10.005.00
Efficie...
Efficie...
0
3.00
1.00
2.00
4.87m 4.92m4.88m 4.90m
Phase Currents
AM1.I ... AM2.I ... AM3.I ...
85%
0
1.00
500.00m
0 10.005.00
2.00
5.00
3.00
4.00
9.95m 10.00m9.96m 9.98m
1.6A p-p1.6A p-p
86%
EfficiencyEfficiencyEfficiency
Current at each phaseCurrent at each phaseCurrent at each phase
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Integrated Magnetics vs Discrete Components
-12.27
13.98
0
10.00
360.05u 400.00u370.00u 380.00u 390.00u
Phase Currents
-2.00
2.00
0
360.08u 400.00u370.00u 380.00u 390.00u
Phase Currents
0
4.94
2.00
4.00
0 800.00u500.00u
Output Voltage
0
5.23
2.00
4.00
0 800.00u500.00u
Output Voltage
Discrete ComponentsDiscrete ComponentsDiscrete Components Integrated MagneticsIntegrated MagneticsIntegrated Magnetics
5x Faster
20x Less ripple
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Design of Integrated Magnetics with PExprt
FeaturesFrequency dependentCapacitive effectsNonlinear core
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Comparison of models at circuit level with Simplorer
0
3.00
1.00
2.00
4.87m 4.92m4.88m 4.90m
Phase Currents
AM1.I ... AM2.I ... AM3.I ...
0
1.00
500.00m
50.00m 10.005.00
Efficie...
Efficie...
85%
1.6A p-p
2.00
6.00
0
2.50
5.00
0 1.02m500.00u
0
1.00
500.00m
0 10.005.00
Efficiency
84%
2.00
2.00
0
949.27u 999.90u960.00u 980.00u
The currents are in phase
2.2A p-p
2.00
6.00
0
2.50
5.00
0 1.02m500.00u
5x Faster than the uncoupled version
p
n
mMOSFET_LEG
M1
M2
pwm
pwm1
p
n
mMOSFET_LEG
M1
M2pwm
pwm2
p
n
mMOSFET_LEG
M1
M2pwm
pwm3E1
PEX
PExprtLink1
R1
A
AM1
A
AM2
A
AM3
C1
STEP1
DiscreteDiscreteDiscrete IntegratedIntegratedIntegrated
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Control: Simplorer Implementation Alternatives
G(sG(s))Continuous time blocks: S-Transfer function
Discrete time blocks: Z-Transfer function
Discrete Fixed-Point : Synthesized VHDL code
11
AnalogAnalogAnalog
DigitalDigitalDigital
33
44
G(zG(z))
Discrete_PID
22 Continuous time electrical elements
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Digital Control Implementation
Output Voltage
Duty Cycle
Soft Start(Electric circuit)
Discrete PID(VHDL-AMS block)
Simplorer blocks
DigitalImplementationDigitalImplementation
Mixed simulation:Electric circuitsDigital blocksContinuous blocks
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Digital Control Implementation: Simplorer Results
2.50
3.50
3.00
250.00u 450.00u300.00u 400.00u
Output Voltage
-10.00
20.00
0
10.00
250.00u 450.00u300.00u 400.00u
Phase Currents
2.50
3.50
3.00
250.00u 450.00u300.00u 400.00u
Output Voltage
-10.00
20.00
0
10.00
250.00u 450.00u300.00u 400.00u
Phase Currents
Continuous time PID (Analog)Continuous time PID (Analog)Continuous time PID (Analog)
Discrete time PID (Digital): sampling = 600kHzDiscrete time PID (Digital): sampling = 600kHzDiscrete time PID (Digital): sampling = 600kHz
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System and Sub-System levels
Complete systemComplete system Power systemPower system
The power system involves:LossesDynamic limitationsTemperature issuesFailures
The power system can not The power system can not be modeled as an ideal be modeled as an ideal
system system
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Simulation time
Voutn
Voutp
Vinn
VinpHalf BridgeRegulado
28V/1.8VVom
Vop
Vinm
Vinp BuckRegulado
42V/28V
+ V
VM28
Voutn
Voutp
Vinn
VinpHalf BridgeRegulado
28V/1.8V
Voutn
Voutp
Vinn
VinpHalf BridgeRegulado
28V/1.8V
Vom
Vop
Vinm
Vinp BuckRegulado
42V/28VVinm
Vinp
SubsistemaBaterias
Vm
Vp
SubsistCargasReg2
Vm
Vp
SubsistemaGenerad
Vm
Vp
SubsistemaCargasNoRe
Vm
Vp
SubsistCargasReg
Vm
Vp
SubsistemaCargasNoReg2
+ V
VMc2
+ VVMc
+ V
VMbat
A
AMbat
+ V
VMin
0
43.00
10.00
20.00
30.00
0 150.00m25.00m 50.00m 75.00m 100.00m
Simulation time
-Averaged models -> 157 seconds-Behavioral models -> 29 seconds
5 times faster!!!
Simulation levels:Switch levelAveragedBehavioral
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SMPS Library: PTool
Problems designing power systemsThe lack of models for each DC/DC converterThe lack of information on commercial convertersDifficulty to develop the modelsLong simulation timeAll above problems multiplied by the number of converters
Get optimized VHDLGet optimized VHDL--AMS models for DC/DC AMS models for DC/DC converters in minutesconverters in minutes
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SMPS Library: PTool
PToolPTool converterconverter’’s features:s features:
Input characteristicsOutput characteristicsDynamic responseStatic responseRemote controlThermal behaviorProtectionsPower sharingCross regulation
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Simplorer System Level Models
vi_n
vi_p
vo1_n
vo1_p
Behavioral
0
100.00
50.00
0 10.005.00
Efficiency comparison
Behavioral
Switch level
0
3.40
2.00
0 520.00u200.00u 400.00u
System Level and Switch
Total simulation time: 700us
Behavioral: 1second
Switch level: 6 minutes
Output voltage
Load step