Snap log based Monitoring and Controlling System …...Shivprasad Sir, Mr. Soumitra Sir, Mr. Dipankar Sir, Mr. Pavan Sir and Mr. Anirudh for their invaluable advice. I express thanks

Snap log based Monitoring and

Controlling System for IM Motor Drive

A Project Report

Submitted in Partial Fulfillment of the

Requirements for the Degree of

Master of Engineering

InElectrical Engineering

By

Sanjay K. Patel

Department of Electrical Engineering

Indian Institute of Science

Bangalore - 560 012

India

June 2010

Acknowledgements

I am grateful to Dr. Vinod John for guiding me for my project work. Many of the

ideas presented in the thesis are results of numerous sessions of lively discussions with

him. I have learnt a lot of lessons in problem solving approach from him, which will

inspire me for the rest of my life.

I express my sincere thanks to Prof. V. Ramanarayanan and Prof. V. T. Ran-

ganathan and Dr. G. Narayanan for helping me to build up on strong fundamentals,

which helped me through out my work.

I am also grateful to all professors of Electrical Engineering Department for pro-

viding me knowledge and proper understanding during course work.

I acknowledge the MHRD, Government of India for the financial support.

I would like to thank IISc administration for a nice Hostel accommodation and

Mess facility during my memorable two years.

I also thank Mrs. Silvi Jose for maintaining the power electronics store and helping

to provide components.

I am thankful to Mr. D. M. Channegowda and his colleagues for their assistance

and cooperation. I also extend my thanks to Mr.Paul, Mr. Devraj, Mr. Ravi, Mr.

Ramachandra and other workshop staff for their help during my work.

I sincerely acknowledge the support of Mr. Amit Sir, Mr. Kamlesh Sir, Mr.

Shivprasad Sir, Mr. Soumitra Sir, Mr. Dipankar Sir, Mr. Pavan Sir and Mr. Anirudh

for their invaluable advice. I express thanks to all members of PEG for their support,

cordial assistance, guidance and lively working.

I also thank all my seniors, my classmates Tarak, Vishnu, Prakash, Venkat, Anand,

Manoj, Raghava, Shan, Raju, Sriya, Mohammad, Kiran, Laxmi Narayan, Ravibabu,

Aneesa, Amar, Madhav, Ramesh, Shanmughnathan and All my juniors of Electrical

Engineering Department and all IISc friends for giving me a nice company during the

two years.

i

ii Acknowledgements

Finally, I attribute all of my joy, success, and achievements to my beloved parents

and my fiancee. They remain an incessant source of inspirations and support all

through my academic career.

Finally it is time to say good bye to IISc. I have grown as a student and as a

person in this esteemed Institute. In my stay at IISc for the past 2 years, I came

across a lot of people and made a lot of friends. I would like to thank all of them who

directly and indirectly made my stay at IISc a fine and memorable experience.

Abstract

The aim of this project is to design and develop a monitoring and controlling sys-

tem for induction motor drive setup. These includes the related issues in sensing of

important electrical quantities, serial communicating and displaying the monitoring

quantities.

The main objectives of this project are:

1. Sense the line current(Iline), line voltage(Vline) and DC bus voltage (Vdc) signals

from the induction motor drive setup.

• sense the line currents (Ir&Iy) through current sensing card.

• sense the line voltages (Vry&Vyb) and DC link voltage (Vdc) through voltage

sensing card.

2. Store the acquired signals on data memory of TMS320LF2407 Digital Signal

Processor (DSP) such that in post fault condition, it stores up to 50 samples.

• store the two cycles means 200 samples of current signals (with 100 sample

per cycle)

• measure the duty ratio of feed back signal of line voltages and store in a

same way as discussed above.

3. Display in to the Graphical User Interface (GUI) built in Visual Basic (VB)

platform in Personal Computer (PC) screen to monitor these electrical quanti-

ties.

In Present scenario The power quality for industrial and commercial customers

is a serious issue and it needs improvement because of the reliability, efficiency and

necessity to increase the quality of receiving end power and also the detection of dy-

namic changes or power system disturbances in certain variables require the adequate

iii

iv Abstract

monitoring and controlling system. So These System can identify problem condition

before it cause equipment malfunction or failure.

A digital signal processor (DSP) is used to implement different algorithm for data

storing, data receiving and data transmitting. These DSP is different from all other

processor i.eMicrocontroller in the aspect of its architecture HarvardArchitecture

and optimized instruction set as well as high clock frequency to meet the require-

ments of fast signal processing. It has separate data and program memory and direct

memory access (DMA controller) facility for fast operation.

The data got from voltage and current sensors of electrical quantities in DSP, are

transmitted to personal computer via RS232 serial communication link and displayed

on PC screen using GUI built in VB.

Contents

Acknowledgements i

Abstract iii

List of Tables vii

List of Figures viii

Nomenclature ix

1 Introduction 1

2 Hardware overview of the System 4

2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.2 Block Diagram of Induction Motor Drive System . . . . . . . . . . . 4

2.3 Hardware Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.3.1 Voltage sensing card . . . . . . . . . . . . . . . . . . . . . . . 5

2.3.2 Current sensing card . . . . . . . . . . . . . . . . . . . . . . . 6

2.3.3 Gate drive card . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.3.4 Isolation and Grounding Scheme . . . . . . . . . . . . . . . . 7

3 Serial Communication in DSP 9

3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3.2 Serial Communication Interface (SCI) in DSP . . . . . . . . . . . . . 9

3.2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3.2.2 UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3.2.3 Synchronous Serial Communication . . . . . . . . . . . . . . . 10

3.2.4 Asynchronous Serial Communication . . . . . . . . . . . . . . 10

v

vi Contents

3.2.5 Serial Communication Interface (SCI) Module . . . . . . . . . 11

3.2.5.1 Features Description . . . . . . . . . . . . . . . . . . 12

3.2.5.2 Communication Data Format . . . . . . . . . . . . . 13

3.2.5.3 Communications Modes . . . . . . . . . . . . . . . . 14

3.2.5.4 Multiprocessing Communication format . . . . . . . 14

3.2.5.5 Communication Format . . . . . . . . . . . . . . . . 15

3.2.5.6 Baud Rate Calculation . . . . . . . . . . . . . . . . . 15

4 Serial Communication in PC and GUI 17

4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4.2 Serial Communication and GUI in PC . . . . . . . . . . . . . . . . . 17

4.2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4.2.2 Design of Graphical User Interface in VB . . . . . . . . . . . . 17

4.2.3 Communication Control . . . . . . . . . . . . . . . . . . . . . 19

4.2.4 Selection of Baud Rate . . . . . . . . . . . . . . . . . . . . . . 24

4.2.5 Calculation of Data Display Refresh Rate . . . . . . . . . . . 24

4.2.6 Data file access mode in VB . . . . . . . . . . . . . . . . . . . 25

5 Algorithm Implementation and Results 26

5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

5.2 DSP Implementations . . . . . . . . . . . . . . . . . . . . . . . . . . 26

5.2.1 DSP Code Flowchart . . . . . . . . . . . . . . . . . . . . . . . 26

5.2.2 Generation of Sine Wave . . . . . . . . . . . . . . . . . . . . . 26

5.2.3 Data Monitoring Algorithm . . . . . . . . . . . . . . . . . . . 27

5.2.3.1 Algorithm Steps for data monitoring in DSP: . . . . 27

5.2.3.2 Calculation of duty ratio in DSP: . . . . . . . . . . . 29

5.2.4 Time Requirement for all Algorithm . . . . . . . . . . . . . . 30

6 Conclusion 35

References 36

List of Tables

2.1 Feedback Signals from Drive system . . . . . . . . . . . . . . . . . . . 4

4.1 Communication errors . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4.2 Communications events . . . . . . . . . . . . . . . . . . . . . . . . . . 21

4.3 Handshaking settings . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5.1 pu representation of analog quantity . . . . . . . . . . . . . . . . . . 29

5.2 Time requirements for all Algorithm including Data Monitoring Func-

tions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

vii

List of Figures

1.1 Induction Motor setup with Controlling System . . . . . . . . . . . . 2

1.2 Interface of Monitoring System with DSP . . . . . . . . . . . . . . . . 2

2.1 Block Diagram of Induction Motor Drive System . . . . . . . . . . . 5

2.2 Linearity test result of voltage sensing card . . . . . . . . . . . . . . . 6

2.3 Delay between i/p and o/p due to GD card . . . . . . . . . . . . . . . 7

4.1 Monitoring GUI during Sending . . . . . . . . . . . . . . . . . . . . 18

4.2 Monitoring GUI during Receiving . . . . . . . . . . . . . . . . . . . 19

4.3 VB Flowchart for communication and display . . . . . . . . . . . . . 23

5.1 Flow Chart for DSP Codes . . . . . . . . . . . . . . . . . . . . . . . 27

5.2 Algorithm for generating Reference Sinusoidal waveforms . . . . . . . 28

5.3 Algorithm for data storing in DSP . . . . . . . . . . . . . . . . . . . . 30

5.4 Algorithm for serial communication in DSP . . . . . . . . . . . . . . 31

5.5 Result for line currents . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.6 Result1 for duty ratio for line voltages . . . . . . . . . . . . . . . . . 33

5.7 Result2 for duty ratio function for line voltages . . . . . . . . . . . . 33

5.8 Result1 for line voltages . . . . . . . . . . . . . . . . . . . . . . . . . 34

5.9 Result2 for line voltages . . . . . . . . . . . . . . . . . . . . . . . . . 34

viii

Nomenclature

Symbols : Definitions

Vdc : DC bus voltage

Vry : Voltage between R phase and Y phase of Converter

Vyb : Voltage between Y phase and B phase of Converter

Vbr : Voltage between B phase and R phase of Converter

Ir : R phase Current of Converter

Iy : Y phase Current of Converter

Ib : B phase Current of Converter

dr : duty ratio for R phase of Converter

dy : duty ratio for Y phase of Converter

db : duty ratio for B phase of Converter

dry : duty ratio for Line RY of Converter

dyb : duty ratio for Line YB of Converter

dbr : duty ratio for Line BR of Converter

Vrms : RMS line to line Voltage

Vm : Maximum line to line Voltage

Irms : RMS line Current

Im : Maximum line Current

Ts : Sampling Time

Ns : Number of Samples per cycle

m : Modulation index

ix

Chapter 1

Introduction

This project is to design and develop a real time monitoring system and controlling

system for 3-phase Squirrel Cage Induction Motor operating with V/F control. This is

to Monitored the line current(Iline) and line voltage(Vline) which have to be carried out

in Digital Signal Processor (DSP) . The TMS320LF2407, which have high processing

speed capability and also have separate program and data memory, is used for this

purpose. This Induction Motor drive system consists of three Subsystem, as shown

in block diagram (Figure. 1.1):

1. Front End Converter System

2. Induction Machine Drive System

3. TMS320LF2407 DSP Controlling System

Front End Converter(FEC) system is combination of Uncontrolled Diode Bridge

rectifier and 3-Phase IGBT based Voltage Source Inverter (VSI) ,which can regulate

the dc link voltage(Vdc). It can be controlled so that the ac line current at Machine

side is near sinusoidal. Also it has been used as a voltage source for PWM Inverter

driving 3-Phase ac Squirrel Cage Induction Motor.

Induction Machine Drive System consists of SCIM (Squirrel Cage Induction Mo-

tor) mechanically coupled to SRIM (Slip Ring Induction Motor) by a common shaft.here

Slip Ring Induction Motor acts as a load for Squirrel Cage Induction Motor,So No

load operation is not possible.

Digital Signal Processor , which is used to control the drive system. This DSP is

Texas Instruments made TMS320LF2407 DSP Board, which has 40 MIPS operating

speed at maximum with 25ns cycle time and has 16 Channels 10-bit ADC (Analog to

1

2 Chapter 1. Introduction

Figure 1.1: Induction Motor setup with Controlling System

Digital Converter) with minimum conversion time of 500ns and Serial Communication

Interface (SCI) Module. It is a modified Harvard Architecture DSP.

The interface of monitoring system with the induction motor drive control system

i.e. DSP is shown in Figure. 1.2. This is for data storing and data transfer from DSP

to Personal Computer (PC) via RS-232 serial Communication link for monitoring

and display. These data can be sent at different baud rate by choosing proper count

value for baud select register in processor, the data acquired from the serial link is

displayed on PC screen using Graphical User Interface (GUI) in Visual Basic (VB).

Figure 1.2: Interface of Monitoring System with DSP

3

Outline of the project

Organization of this report is stated as:

• In chapter 2: Hardware Overview of the System for Induction Motor Drive

Setup is presented.

• In chapter 3: ”Serial Communication in DSP” is illustrated.

• In chapter 4: ”Serial Communication in PC and GUI” is illustrated.

• In chapter 5: Algorithm Implementation and Results is explained with wave-

form.

• In chapter 6: The conclusions and scope of the future development are ex-

plained.

Chapter 2

Hardware overview of the System

2.1 Introduction

This chapter explains in brief, It includes testing of 10 KVA of inverter with adequate

testing procedure and result[4].It also explains the interfacing scheme between the

Drive set up and the Monitoring processor which acquires all electrical quantities.

2.2 Block Diagram of Induction Motor Drive Sys-

tem

Below given diagram illustrates the general layout of Drive setup as shown in Fig-

ure. 2.1. There converter connected with DSP controller module. These types of con-

verters are Front End Converters (FEC). They are capable of handling bi-directional

power flow and can regulate dc link voltage.The list of feedback signals are shown in

the following Table 2.1.

Sr No Feedback Signals Rated Value Sensor o/p Range

1 Line Voltages Vry, Vyb 400 V -10V to +10V

2 Line currents Iy, Ib 13.9 A -10V to +10V

3 DC bus Voltage Vdc 600 V 0V to +10V

Table 2.1: Feedback Signals from Drive system

4

2.3. Hardware Details 5

Figure 2.1: Block Diagram of Induction Motor Drive System

2.3 Hardware Details

All the signals, sensed as in the converter panels using current sensor and voltage

sensing cards, are isolated from the power circuit. The details of the sensors and

interface cards used are explained.

2.3.1 Voltage sensing card

Voltage sensing card is used to sense the voltage and to provide electrical isolation

between power circuit and control circuit, It also scale down the voltage.The specifi-

cations of a voltage sensing card used are given below:

1. Range of input voltage is ±600V

2. Range of output voltage is ±10V

3. Bandwidth is 20kHz.

4. Isolation Amplifier between input and output.

In Voltage sensing card, HP7800 a high CMR (15kV/s at = 1000 V) isolation am-

plifier has been used. The input voltage to HP7800 is divided by using the voltage

divider circuit to a range within specified limit, Typical gain of the device is 8 with a

tolerance of ±5%. So for around ±200mV differential input voltage range, its output

6 Chapter 2. Hardware overview of the System

varies between ±1.6V approximately[4]. For Voltage sensing card, Linearity test is

performed, In which different values of DC voltage is apply and corresponding output

is measured and tabulated in Table 2.2. Figure. 2.2 shows the result of linearity test.

−300 −250 −200 −150 −100 −50 0 50 100 150 200 250 300−4

−3

−2

−1

0

1

2

3

4

input voltage (V)

outp

ut v

olta

ge (

V)

Linearity Test

Figure 2.2: Linearity test result of voltage sensing card

2.3.2 Current sensing card

Current sensing card is used to sense Line current[9]. The specifications and features

of a Current sensing card used are given below:

• Specifications:

1. Maximum Range of i/p current is ±50A

2. Maximum Range of o/p voltage is ±10V

3. Bandwidth is 100kHz.

4. Maximum Non-linearity is 0.2%.

• Features:

1. Low non-linearity and High bandwidth.

2. Precision ac / dc current transducer.

2.3. Hardware Details 7

3. Dual current sensor to sense two line currents.

4. Uses low profile Hall effect current transformer HTP50.

2.3.3 Gate drive card

Functionalities available with Gate drive card is below:

1. Provides the optical isolation between power ground and DSP ground using

HP3101.

2. Increase the driving capability by using MIC4425 driver ICs which improve the

current sourcing and sinking ability.

3. In built isolated (Fly back converter) power supply for driver circuits.

4. Provide the negative voltage to turn off the device to avoid conduction due to

charge accumulate in internal capacitance.

Figure 2.3: Delay between i/p and o/p due to GD card

2.3.4 Isolation and Grounding Scheme

All the signals, sensed as in the converter panels using current sensor and voltage

sensing cards, are isolated from the power circuit. The current sensors are Hall-

effect sensors which are having in built isolation. The voltage sensors are also having

8 Chapter 2. Hardware overview of the System

isolation amplifiers for electrical isolation which are supplied by the fly-back converters

on the voltage sensing cards. Though all the direct signals are not isolated in the

scheme. They are taken as differential signals. The current sensor outputs are taken

as current signals to avoid the Electro Magnetic Interference (EMI) noise pickup and

terminated in the interfacing board locally and then those currents are passed through

the burden (resistors) to get voltage signals.

All signals are taken as the differential ones to minimize the common mode voltage

present in the signals and EMI noise pickup. All signals coming from the setup is

first passed through the differential amplifier and then filtered by using first order low

pass filter as anti-aliasing filter to limit the bandwidth before getting sampled by the

ADC.

Chapter 3

Serial Communication in DSP

3.1 Introduction

In this chapter the basic structure of serial communication interface in DSP TMS320LF2407

board and the communication protocols are described.

3.2 Serial Communication Interface (SCI) in DSP

3.2.1 Introduction

In this section the basic theory of asynchronous serial communication in DSP ’LF2407

board is described. This section also describes the architecture, functions, and pro-

gramming of the Serial communication interface (SCI) module in the DSP. The pro-

grammable SCI module supports digital communications between the CPU and other

asynchronous peripherals like other CPU or any other PC that use the standard NRZ

(non return-to-zero) format.

3.2.2 UART

An UART, universal asynchronous receiver / transmitter is responsible for performing

the main task in serial communications with computers. The device changes incoming

parallel information (in terms of Bytes) to serial data (in terms of individual Bit)

which can be sent on a communication line. The UART performs all the tasks,

timing, parity checking, etc. needed for the communication. A second UART can

be used to receive the information and re-assemble the bits into complete bytes.

Serial communication is commonly used in communication between computers, DSPs,

Terminals and other devices.

9

10 Chapter 3. Serial Communication in DSP

There are two primary forms of serial transmissions:

• Synchronous

• Asynchronous

Depending on the modes that are supported by the hardware, the name of the

communication sub-system will usually include A if it supports Asynchronous com-

munications, and an S if it supports Synchronous communications.

Some common acronyms are:

• UART: Universal Asynchronous Receiver/Transmitter

• USART:Universal Synchronous-Asynchronous Receiver/Transmitter

3.2.3 Synchronous Serial Communication

Synchronous serial transmission requires that the sender and the receiver share a

clock with one another, or that the sender provides a strobe or other timing signal

so that the receiver knows when to ”read” the next bit of the data. in most forms of

serial synchronous communication, if there is no data available at a given instant to

transmit, a fill character must be sent instead so that data is always uninterruptedly

being transmitted. Synchronous communication is usually more efficient because only

data bits are transmitted between sender and receiver, and it is costly communication

if extra wiring for sharing same clock is required between sender and receiver.

A form of synchronous data transfer is used with printer and fixed disk devices in

that the data is sent on one set of wires while a clock or strobe is sent on a different

wire. Printers and fixed disk interface standards send an entire word of data for

each clock or strobe signal by using a separate wire for each bit of the word. In the

PC industry these are known as parallel instead synchronous serial communication.

The standard serial communication hardware does not support the serial synchronous

operations. This mode is described for comparison purpose only.

3.2.4 Asynchronous Serial Communication

Asynchronous serial transmission allows data to be transmitted without the sender

having to send a clock signal to the receiver. Instead, the sender and receiver must

agree on the timing parameters in advance and special bits are added to each word,

which are used to synchronize the sending and receiving units.

3.2. Serial Communication Interface (SCI) in DSP 11

When a word is given to the UART for asynchronous transmission, a bit called

the ”Start-bit” is added to the beginning of each word that is to be transmitted. The

start bit is used to alert the receiver that a word is about to come and to force the

clock in the receiver into synchronization with the clock in the transmitter. Those

two clocks must be accurate enough not to have the frequency drift more than 10%

during transmission of the remaining bits of the word.

After the start bit, the individual bits of the word is sent, with the least significant

bit (LSB) being sent first. each bit in the transmission is transmitted for exactly the

same amount of time as all the other bits, and the receiver ”looks” at the wire

approximately halfway through the period assigned to each bit to determine if the bit

is ”0” or ”1”. The sender does not also know when the receiver has ”looked” at the

value of the bit. The sender only knows when the clock says to begin transmitting

the next bit of the word.

The transmitter may add a parity bit to the data being sent. It may be used by

the receiver to perform simple error checking. then at least one stop bit is sent by

the transmitter to indicate the end of data. When the receiver has received all of the

bits in the data word, it may check for the parity bits (both sender and receiver must

agree on weather a parity bit is to be used), and the receiver looks for stop bit. if

the stop bit does not appear when it is supposed to, the UART considers the entire

word to be garbled it will report a ”Framing Error” to the host processor when the

data word is read. The usual cause of a framing error is that the sender and receiver

clocks were not running at same speed, or that the signal was interrupted.

Regardless of whether the data was received correctly or not, the UART automat-

ically discards the ”Start”, ”Parity” and ”Stop” bits. If the sender and the receiver

is configured identically, these bits are not passed to the host. If another word is

ready for transmission, the ”Start” bit for the word can be sent as soon as possible

as the ”Stop” bit for the previous word has been sent. Because synchronous data is

Self Synchronizing, if there is the new data to transmit, the transmission line could

be idle.

3.2.5 Serial Communication Interface (SCI) Module

This is to give brief description of the features, functions and programming of the

SCI module. The SCI module supports digital communications between the CPU

and other asynchronous peripherals that use the standard non-return-to-zero (NRZ)


format. The SCI receiver and transmitter are double-buffered, and each has its own

separate enable and interrupt bits. Both can be operated independently or simultane-

ously in the full-duplex mode. To ensure data integrity, the SCI checks received data

for break detection, parity, overrun, and framing errors. The bit rate is programmable

to over 65000 different speeds through a 16-bit baud-select register[7].

3.2.5.1 Features Description

Features of the SCI module include:

• Two external pins:

1. SCITXD: SCI transmit-output pin

2. SCIRXD: SCI receive-input pin

NOTE: Both pins can be used as GPIO if not used for SCI.

• Baud rate programmable to 64K different rates

• Up to 1875 Kbps at 30-MHz CPUCLK

• Data-word format

1. One start bit

2. Data word length programmable from one to eight bits

3. Optional even/odd/no parity bit

4. One or two stop bits

• Four error-detection flags: parity, overrun, framing, and break detection

• Two wake-up multiprocessor modes: idle-line and address bit

• Half- or full-duplex operation

• Double-buffered receive and transmit functions

• Transmitter and receiver operations can be accomplished through interrupt-

driven or polled algorithms with status flags.

1. Transmitter: TXRDY flag (transmitter-buffer register is ready to receive

another character) and TX EMPTY flag (transmitter-shift register is empty)


2. Receiver: RXRDY flag (receiver-buffer register is ready to receive another

character), BRKDT flag (break condition occurred), and RX ERROR flag

(monitoring four interrupt conditions)

• Separate enable bits for transmitter and receiver interrupts (except BRKDT)

• NRZ (non-return-to-zero) format

The major elements used in the full duplex operation are :

• A transmitter (TX) and its major registers:

1. SCITXBUF: transmitter data buffer register. Contains data (loaded by

the CPU) to be transmitted.

2. TXSHF:transmitter shift register. Loads data from SCITXBUF and shifts

data onto the SCITXD pin, one bit at a time.

• A receiver (RX) and its major registers:

1. RXSHF receiver shift register. Shifts data in from SCIRXD pin, one bit

at a time

2. SCIRXBUF receiver data buffer register. Contains data to be read by the

CPU. Data from a remote processor is loaded into RXSHF and then into

SCIRXBUF and SCIRXEMU

• A programmable baud generator.

• Data memory-mapped control and status registers.

The SCI receiver and transmitter can operate independently or simultaneously.

3.2.5.2 Communication Data Format

The basic unit of data is called a character and is one to eight bits in length. Each

character of data is formatted with a start bit, one or two stop bits, and optional

parity and address bits. A character of data with its formatting information is called

a frame.


3.2.5.3 Communications Modes

The SCI has two multiprocessor protocols, the idle-line multiprocessor mode and the

address-bit multiprocessor mode. These protocols allow efficient data transfer be-

tween multiple processors. The SCI offers the universal asynchronous receiver/transmitter

(UART) communications mode for interfacing with many popular peripherals. The

asynchronous mode requires two lines to interface with many standard devices such as

terminals and printers that use RS-232 C formats. Data transmission characteristics

include:

• One start bit

• One to eight data bits

• An even/odd parity bit or no parity bit

• One or two stop bits

3.2.5.4 Multiprocessing Communication format

The multiprocessor communication format allows one processor to efficiently send

blocks of data to other processors on the same serial link. On one serial line, there

can be only one transfer (or transmitter) at a time. The first byte of a block of

information that the transmitter sends contains an address byte, that is read by all

receivers. Only receivers with the correct address can be interrupted by the data

bytes that follow the address byte. The receivers with an incorrect address remain

uninterrupted until the next address byte. A processor recognizes an address byte

according to the multiprocessor mode. For example:

Idle-Line Multiprocessor Mode: The idle-line mode leaves a quiet space before

the address byte. This mode does not have an extra address/data bit and is more

efficient than the address-bit mode for handling blocks that contain more than ten

bytes of data. The idle-line mode should be used for typical non-multiprocessor SCI

communication. In the Idle-line multiprocessor protocol (ADDR / IDLEMODE bit =

0), the blocks are separated by a longer idle time between blocks than between frames

in the blocks. An idle time of ten or more high-level bits after a frame indicates the

start of a new block the time of a single bit is calculated directly from the baud value

(bits per second).


Address-Bit Multiprocessor Mode: The address-bit mode adds an extra bit

(address bit) into every byte to distinguish addresses from data. This mode is more

efficient in handling many small blocks of data because, unlike the idle mode, it does

not have to wait between blocks of data. However, at high transmit speeds, the

program is not fast enough to avoid a 10-bit idle in the transmission stream. In the

address-bit protocol (ADDR / IDLE MODE bit = 1), frames have an extra bit, called

an address bit, that immediately follows the last data bit. The address bit is set to 1

in the first frame of the block and to 0 in all other frames. The idle period timing is

irrelevant.

3.2.5.5 Communication Format

The SCI asynchronous communication format uses either single-line (one-way) or two-

line (two-way) communications. In this mode, the frame consists of a start bit, one

to eight data bits, an optional even/odd parity bit, and one or two stop bits. There

are 8 SCI clock (SCICLK) periods per data bit. The receiver begins operation on

receipt of a valid start bit. A valid start bit is identified by four consecutive internal

SCICLK periods of 0 bits. If any bit is not 0, then the processor starts over and

begins looking for another start bit.

For the bits following the start bit, the processor determines the bit value by

making three samples in the middle of the bits. These samples occur on the fourth,

fifth, and sixth SCICLK periods, and bit-value determination is on a majority (two

out of three) basis. Since the receiver synchronizes itself to frames, the external

transmitting and receiving devices do not have to use a synchronized serial clock; the

clock can be generated locally.

3.2.5.6 Baud Rate Calculation

The internally-generated serial clock is determined by the system clock (SYSCLK)

frequency and the baud-select registers. The SCI uses the 16-bit value of the baud-

select registers to select one of the 64K different serial clock rates. The SCI baud rate

for the different communication modes is determined in the following ways:

SCIAsynchronousbaud =CLKOUT

(BRR + 1)× 8(3.1)

Alternatively,


BRR =CLKOUT

(SCIAsynchronousBaud)× 8− 1 (3.2)

Where BRR is the 16-bit value in the baud-select registers.[7]

Chapter 4

Serial Communication in PC and

GUI

4.1 Introduction

This chapter discusses how Visual Basic can be used to access serial communica-

tion functions.This chapter also illustrates the serial communication from personal

computer (PC) side ,The communication interface and the Graphical User Interface

(GUI) in the Visual Basic (VB) platform.

4.2 Serial Communication and GUI in PC

4.2.1 Introduction

In this section the design, communication protocol from Visual Basic (VB) for Graph-

ical User Interface (GUI) is described.such that it puts received characters in a receive

buffer and characters sent into a transmission buffer.the receive buffer can be read by

the program whenever it has time and the transmit buffer is emptied when it is free

to send characters.

4.2.2 Design of Graphical User Interface in VB

The GUI is built in the VB environment which is done just by dragging all components

like labels and text boxes from object browser and drop in the ”Form” in VB window.

The project is built using a ”standard exe” type project [1]. The project is built

with three forms. The first form is ”Flash form” which flashes for 1 seconds during

startup.The flash interval is controlled by a programmable timer added to the project.

After that flash form will be closed and a new form, ”main form” will be loaded and

17

18 Chapter 4. Serial Communication in PC and GUI

the it will show a message ”press Sending Button” (as shown in Figure. 4.1). when

Sending command is pressed, First PC send a Character ”Y” for Yes to DSP and

then DSP send all data of the setup one by one to PC.when PC with the help of VB

program receive these all data,it will show a message ”Data has been received”(as

shown in Figure. 4.2). These all data also be stored in file.While to exit from the

main window ,it is required to press the ”Exit” button. The RS-232 is used to transfer

the data from the PC to the DSP and vice a versa. Below Figures shows the GUI

layout for the monitoring system.

Figure 4.1: Monitoring GUI during Sending

4.2. Serial Communication and GUI in PC 19

Figure 4.2: Monitoring GUI during Receiving

4.2.3 Communication Control

Visual Basic also allows additional components to be added to toolbox.The Microsoft

Communication components(MSComm) is used to add a serial communication facil-

ity.There are many other ways to access the serial port in the VB as follow:

1. MS Comm

2. Calling API (Applications Programmer’s Interface) Functions.

3. Using a DLL (Dynamic Link Library) programming.

4. Other driver that enables reading and writing directly to the port registers.


MS Comm: MS Comm is VB’s communication control module for serial communi-

cation. This helps to communicate with the help of protocol defined for both the VB

program and external CPU (in this case DSP). The data comes continuously and are

read by the receive buffer, which can be of 2048 in size at the maximum case. Receive

buffer size is defined in the initialization subroutine of the port.This Communication

control provides following two way to handling serial communication:

1. Event-driven: In Event-driven communication, the computer is free to do other

thing.The event can be defined as the reception of character, a change in

CD(carrier detect line) or a change in RTS (request to send line ).The OnComm

event can be used to capture these events. and also to detect communication

errors.

2. Polling: In Polling, The computer program can loop waiting for a character to

received. Once it is the character is read from the receive buffer.This method

is normally used when computer has time to poll the communication receive.

Communication errors include the following settings:

Constant Description

comEventBreak A Break signal was received.

comEventFrame Framing Error. The hardware detected a framing error.

comEventOverrun Port Overrun. A character was not read from the hardware

before the next character arrived and was lost.

comEventRxOver Receive Buffer Overflow. There is no room in the

receive buffer.

comEventRxParity Parity Error. The hardware detected a parity error.

comEventTxFull Transmit Buffer Full. The transmit buffer was full while

trying to queue a character.

comEventDCB Unexpected error retrieving Device Control Block (DCB)

for the port.

Table 4.1: Communication errors


Communications events include the following settings:

Constant Description

comEvSend There are fewer than Sthreshold number of characters in

the transmit buffer.

comEvReceive Received Rthreshold number of characters. This event is

generated continuously until you use the Input property to

remove the data from the receive buffer.

comEvCTS Change in Clear To Send line.

comEvDSR Change in Data Set Ready line. This event is only fired

when DSR changes from 1 to 0.

comEvCD Change in Carrier Detect line.

comEvRing Ring detected. Some UARTs (universal asynchronous

receiver-transmitters) may not support this event.

comEvEOF End Of File (ASCII character 26) character received.

Table 4.2: Communications events

Handshaking refers to the internal communications protocol by which data is

transferred from the hardware port to the receive buffer. When a character of data

arrives at the serial port, the communications device has to move it into the receive

buffer so that your program can read it. If there is no receive buffer and your program

is expected to read every character directly from the hardware, you will probably lose

data because the characters can arrive very quickly.

A handshaking protocol insures data is not lost due to a buffer overrun, where

data arrives at the port too quickly for the communications device to move the data

into the receive buffer.The settings for value are:


Setting Description

comNone No handshaking.(Default)

comXOnXOff XON/XOFF handshaking.

comRTS RTS/CTS (Request To Send/Clear To Send) handshaking.

comRTSXOnXOff Both Request To Send and XON/XOFF handshaking.

Table 4.3: Handshaking settings

Serial Communication settings

• Comport setting

1. MScomm.settings = ”BBBB,P,D,S” i.e.”9600, N, 8, 1”

2. MScomm.Portopen = True or False

• Input data setting

1. MScomm.InputLenth

2. MScomm.InputBufferSize

3. MScomm.RThresold

4. MScomm.ParityReplace = ” ”

• Output data setting

1. MScomm.OutputBufferSize

2. MScomm.SThresold

Event driven generates an ”Communication Event” Whenever the receive buffer

is full. In that event one function is called for data conversions to make the hex data

to meaningful physical variable and to store those data in one array in file.the flow

diagram is shown in (Figure. 4.3).


Figure 4.3: VB Flowchart for communication and display

Flowchart Steps for data conversion in VB:

1. Read continuous data bytes.

2. Store in variant in binary data mode.

3. Store in array of bytes.

4. Read Low and High Bytes.

5. Calculate: Number = High Byte × 256 + Low Byte.

6. Calculate: Display Quantity = Number × scale factor to convert to physical

values.


4.2.4 Selection of Baud Rate

A link’s bit rate is the number of bits transmitted or received per unit of time, usually

it is expressed in bits per second (bps). Baud rate is the number of possible events,

or data transitions per second. These two values are often identical because in most

of the links each transmission period represents a new bit. Over phone lines, high

speed modems use phase shifters and other tricks to encode multiple bits in each data

period, so the baud rate actually much lower than the bit rate.

All of the bits required to transmit a value from start to stop bit form ”word”. The

data bit in the ”word” form a ”character”. In some links, the ”characters” actually

do represent text characters (letters or numbers), while in others the characters are

binary values that have nothing to do with the text.

Adding one ”start” and one ”stop” bit to each byte, the transmission time in-

creases by 25% (because of 10 bits instead of 8). So for 9600 bits/sec link will transfer

960 bytes in one second.

Baud Rate Limitations:

1. DSP side:

Maximum baud rate = SCICLK16

Where, SCICLK = SCI module clock frequency

System clock of DSP (SYSCLK) = 40MHz

SCICLK (max) = SYSCLK

So, maximum baud rate = 2.5Mbps

2. PC side:

The UART usually uses a receive clock that is 16 times of the bit rate.

In PC, the standard UART clock frequency = 1.18432MHz

So, the maximum baud rate = 115.2kbps

4.2.5 Calculation of Data Display Refresh Rate

1. Total Number of display data = 800 ( 200 samples for one signal).

2. Each data is of 16 bit.

3. Each data is divided into two 8-bit data.

4. Each byte is added with start and stop bits .


5. So, each splited-data has 10 bits.

6. Current baud rate = 9600 baud per second (bps).

7. Calculate: Total time to send one signal from DSP = tsend (is given by 4.1).

8. Calculate: Total time to send all signal from DSP = Tsend (is given by 4.2).

tsend = 2× 200× 10× 1

9600Seconds = 416.7mSec (4.1)

Tsend = 2× 800× 10× 1

9600Seconds = 1.667Sec (4.2)

4.2.6 Data file access mode in VB

This is important to save the data of current , voltage, etc. for further analysis. So,

one data capture option is present in the main monitoring GUI. The data could be

stored in a file which can be access in five ways:

1. Input: open for sequential input; the file will be read sequentially starting at

the beginning.

2. Output: open for sequential output; records will be written sequentially starting

at the beginning; if the file does not exist, it is created; if it does exist, it is

overwritten.

3. Random: open for random read and write; any specific record can be accessed.

4. Append: sequential output to the end of an existing file; if the file does not

exist it is created; it does not overwrite the file.

5. Binary: open for binary read and write; access is at byte level. If access mode

is not specified in the Open statement, For Random is used by default. Once

processing is finished, you need to Close all the files that have been opened.

Chapter 5

Algorithm Implementation and

Results

5.1 Introduction

This chapter discuss all software implementation and all results are shown. The

required software have been implemented in DSP ’LF2407.

5.2 DSP Implementations

In this section the software flow diagram and results, implemented in DSP ’LF2407

[8], are shown which has been developed with the help of Code Composer Studio

(CCS).

5.2.1 DSP Code Flowchart

The flowchart for the codes developed in DSP ’LF2407are given in Figure. 5.1. In

the ”Monitoring Quantities” all the operation are done. If the SCI transmit buffer is

empty (ready) then only the next byte is loaded. For sending ”Number of bytes to

be sent” the count is increased one by one as the bytes are sent sequentially.

5.2.2 Generation of Sine Wave

Code composer studio software package is used as code development tool for the above

DSP in micro-controller mode. The three reference sine waves are generated using

sine table stored in the data memory of the DSP to represent a balanced three phase

system. All three reference sine waves are phase shifted by 1200. In the Figure. 5.2

Flow Chart for generating Reference Sinusoidal waveforms is shown.

26

5.2. DSP Implementations 27

count = 0

Calculate Monitoring Quantities

Is Transmit Buffer

Ready ?

NO

NO

YES

Load One Byte +

Increase Count

Initialize Processor

yes

Transmit Byte

Assign No. of Bytes to be Sent

Is Count

> No. of Bytes to be

Sent ?

Figure 5.1: Flow Chart for DSP Codes

5.2.3 Data Monitoring Algorithm

5.2.3.1 Algorithm Steps for data monitoring in DSP:

1. Store and update the data in a memory block with known starting address in

the code in DSP.

2. Access the memory block with a count value initialized to zero stored in an

Auxiliary register.

3. Read the 16 bit data to be sent.

4. Split it into two 8 bit data.

28 Chapter 5. Algorithm Implementation and Results

Figure 5.2: Algorithm for generating Reference Sinusoidal waveforms

5. Send the low byte first.

6. Send higher byte.

7. Increase count.

8. Check the count is exceeded the defined no of bytes to be sent.

9. If count is not zero then go to step 3 after increasing the indirect memory

address by 1. otherwise go to step 1.

These steps in DSP can be implemented with following algorithm as shown in (Fig-

ure. 5.3) and (Figure. 5.4).


Sr No Quantity Analog Value Digital Value pu (per unit)

1 Voltage 10 V 7FFFh 2

5 V 3FFFh 1

0 V 0000h or FFFFh 0

-5 V BFFFh -1

-10 V 8000h -2

2 Time 20 mSec 3FFFh 1

40 mSec 7FFFh 2

3 Angular frequency 314.2 rad 3FFFh 1

4 Theta 2π 3FFFh 1

π 1FFFh 0.5

Table 5.1: pu representation of analog quantity

5.2.3.2 Calculation of duty ratio in DSP:

We know that for balanced system,the 3 phase Voltage is given by (5.3).

Vr(t) = Vm sin(ωt) (5.1)

Vy(t) = Vm sin(ωt− 1200) (5.2)

Vb(t) = Vm sin(ωt− 2400) (5.3)

Where, ω is angular frequency given by.

In Time domain, ω = 2πT

In Discrete domain, ω = 2πNsTs

The duty ratio function (modulation index m = 1)for all three phases is given by

(5.6)[3].

dr(t) = 0.5 + 0.5 sin(ωt) (5.4)

dy(t) = 0.5 + 0.5 sin(ωt− 1200) (5.5)

db(t) = 0.5 + 0.5 sin(ωt− 2400) (5.6)

The duty ratio function for line voltages can be calculated as(5.9).

dry(t) = dr(t)− dy(t) = 0.866× sin(ωt+ 300) (5.7)

dyb(t) = dy(t)− db(t) = 0.866× sin(ωt− 900) (5.8)

dbr(t) = db(t)− dr(t) = 0.866× sin(ωt− 2100) (5.9)


Figure 5.3: Algorithm for data storing in DSP

5.2.4 Time Requirement for all Algorithm

The timing requirements for the different calculation parts are as in the Table 5.2


Figure 5.4: Algorithm for serial communication in DSP


Sl. No: Functions Time Required

(in µSec)

1 V/f Algorithm for PWM generation 5.325

2 ADC Reading time 3.075

3 Data storing algorithm for four signal 3.425

(200 Samples per signal)

4 Data receiving algorithm 1.600

5 Data transmission algorithm with 4.560

high and low byte conversion

6 DAC conversion time 1.850

7 Total time requirement for all algorithm 19.835

Table 5.2: Time requirements for all Algorithm including Data Monitoring Functions

Figure 5.5: Result for line currents


0 20 40 60 80 100 120 140 160 180 200−1

−0.5

0

0.5

1

No of Samples (N)

Dry

(du

ty r

atio

)

0 20 40 60 80 100 120 140 160 180 200−1

−0.5

0

0.5

1

No of Samples (N)

Dyb

(du

ty r

atio

)

Figure 5.6: Result1 for duty ratio for line voltages

0 20 40 60 80 100 120 140 160 180 200−1

−0.5

0

0.5

1

No of Samples (N)

Dry

(du

ty r

atio

)

0 20 40 60 80 100 120 140 160 180 200−1

−0.5

0

0.5

1

No of Samples (N)

Dyb

(du

ty r

atio

)

Figure 5.7: Result2 for duty ratio function for line voltages


0 20 40 60 80 100 120 140 160 180 200−1000

−500

0

500

1000

No of Samples (N)

Vry

(lin

e vo

ltage

)

0 20 40 60 80 100 120 140 160 180 200−1000

−500

0

500

1000

No of Samples (N)

Vyb

(lin

e vo

ltage

)

Figure 5.8: Result1 for line voltages

0 20 40 60 80 100 120 140 160 180 200−400

−200

0

200

400

No of Samples (N)

Vry

(lin

e vo

ltage

) in

Vol

t

0 20 40 60 80 100 120 140 160 180 200−400

−200

0

200

400

No of Samples (N)

Vyb

(lin

e vo

ltage

) in

Vol

t

Figure 5.9: Result2 for line voltages

Chapter 6

Conclusion

In this project, Serial communication between DSP and PC is very slow with respect

to Universal Serial Bus (USB) and parallel communication.In sensing of monitoring

quantities, there are noise issues which is not covered. It needs isolation for each

signals so that any fault from the monitoring side should not propagate through the

main control of Induction Motor Drive.

Work Summery:

1. The required hardware has been tested.

2. Implementation of Algorithm for controlling the IM Drive has been done.

3. Bi-directional Serial communication logic has implemented in DSP.

4. GUI has been made in VB environment.

5. The Visual Basic code for recollecting the data and storing in data file has been

made.

Observations:

• The algorithm is able to store data on memory and Successfully transmit these

electrical quantities serially over RS-232 link to PC.

• The Visual Basic code is able to retrieval all monitoring quantities and stored

in data file with date and time for future diagnostic.

• This data file can be easily plotted with the help of MATLAB tool, it gives

result as expected without any data loss.

35

36 Chapter 6. Conclusion

Scope of further Work:

1. The data file available in VB can be used to calculate RMS and Average value

of monitoring quantities.

2. Further this can useful for a calculation of Phase, Frequency, Active and Reac-

tive Power etc.

3. All this calculation can be display on PC screen.

4. The VB code can be sophisticated for logging the error message.

5. This kind of algorithm structure allows to implement other vector control method

such as DTC (Direct Torque Control), FOC (Field Oriented Control) etc.

References

[1] Rabindra Nath Bhuniya and Vinod John, ”Monitoring system for High Power

Induction Motor Drive”, National Power Electronic conference -2007,Bangalore.

[2] V Sravan and Vinod John, A project report on ”Grid Power Quality Analysis of

3-Phase and 1-Phase Systems”.

[3] V.T. Ranganathan, ”Course notes on electric drives”, Dept. of Electrical Engg.,

Indian Institute of Science, Bangalore, India.

[4] ”Hardware design documentation of 3 phase, 10kVA Inverter”,Technical Docu-

ment, Power Electronics Group, Department of Electrical Engineering, Indian

Institute of Science, June 2003.

[5] ”Design and application documentation of DSP2407A board”, Technical Docu-

ment, Power Electronics Group, Department of Electrical Engineering, Indian

Institute of Science.

[6] ”TMS320LF240 DSP controllers Reference Guide”, CPU and Instruction set, Lit-

erature number SPRU160C, ”Texas instruments”, ”www.ti.com”.

[7] ”TMS320F/C24x DSP controllers Evaluation Module Technical Reference”, Lit-

erature number SPRU248B,”Texas Instruments”,”www.ti.com”.

[8] TMS320X24X family datasheet,”Texas Instruments”,”www.ti.com”.

[9] Cuttent sensor,TELCON ”HTP50” Datasheet and Voltage sensor, ”HP7800”

Datasheet.

37

Documents

Snap log based Monitoring and Controlling System …...Shivprasad Sir, Mr. Soumitra Sir, Mr. Dipankar Sir, Mr. Pavan Sir and Mr. Anirudh for their invaluable advice. I express thanks