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DP83816SNLS164E SEPTEMBER 2005REVISED DECEMBER 2015
DP83816 10/100 Mb/s Integrated PCI Ethernet Media Access Controller and Physical Layer(MacPhyter-II)
1 Device Overview
1.1 Features1
(MIB II), RFC 1398 (Ether-Like MIB), IEEE 802.3 IEEE 802.3 Compliant, PCI V2.2 Media AccessLME, Reducing CPU Overhead for ManagementController (MAC) and Bus Interface Unit (BIU)
Supports Traditional Data Rates of 10 Mb/s Internal 2KB Transmit and 2KB Receive DataEthernet and 100 Mb/s Fast Ethernet (Through FIFOsInternal PHY) Serial EEPROM Port With Auto-Load of
Bus Master Burst Sizes of up to 128 Dwords Configuration Data From EEPROM at Power On(512 Bytes) Flash or PROM Interface for Remote Boot Support
BIU Compliant With PC 97 and PC 98 Hardware Fully Integrated IEEE 802.3 3.3-V CMOS PhysicalDesign Guides, PC 99 Hardware Design Guide LayerDraft, ACPI v1.0, PCI Power Management IEEE 802.3 10BASE-T Transceiver With IntegratedSpecification v1.1, OnNow Device Class Power Filters IEEE 802.3u 100BASE-TX TransceiverManagement Reference Specification Network Fully integrated ANSI X3.263 Compliant TP-PMDDevice Class v1.0a Physical Sublayer With Adaptive Equalization and
Wake on LAN (WoL) Support Compliant With Baseline Wander CompensationPC98, PC99, SecureOn, and OnNow, Including IEEE 802.3u Auto-Negotiation AdvertisedDirected Packets, Magic Packet VLAN Packets, Features Configurable Through EEPROMARP Packets, Pattern Match Packets, and PHY
Full-Duplex Support for 10- and 100-Mb/s DataStatus ChangeRates Clkrun Function for PCI Mobile Design Guide
Single 25-MHz Reference Clock Virtual LAN (VLAN) and Long Frame Support 144-pin LQFP Package Support for IEEE 802.3 Full-Duplex Flow Control Low-Power 3.3-V CMOS Design With Typical Extremely Flexible Rx Packet Filtration Including: Consumption of 383 mW Operating, 297 mWSingle Address Perfect Filter With MSb Masking, During WoL, and 53 mW During Sleep ModeBroadcast, 512 Entry Multicast and Unicast Hash IEEE 802.3u MII for Connecting AlternativeTable, Deep Packet Pattern Matching for up to
External Physical Layer DevicesFour Unique Patterns 3.3-V Signaling With 5-V Tolerant I/O Statistics Gathered for Support of RFC 1213
1.2 Applications PC Motherboards Embedded Systems PCI Network Interface Cards
1.3 DescriptionThe DP83816 device is a single-chip 10/100 Mb/s ethernet controller for the PCI bus. It is targeted at low-cost, high-volume PC motherboards, adapter cards, and embedded systems. The DP83816 device fullyimplements the V2.2 33-MHz PCI bus interface for host communications with power management support.Packet descriptors and data are transferred via bus-mastering, reducing the burden on the host CPU. TheDP83816 device can support full-duplex 10/100 Mb/s transmission and reception with minimum interframegap.
Device Information (1)PART NUMBER PACKAGE BODY SIZE (NOM)
DP83816 LQFP (144) 20.00 mm 20.00 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,intellectual property matters and other important disclaimers. PRODUCTION DATA.
http://www.ti.com/product/DP83816?dcmp=dsproject&hqs=SNLS164pfhttp://www.ti.com/product/DP83816?dcmp=dsproject&hqs=SNLS164sandbuysamplebuyhttp://www.ti.com/product/DP83816?dcmp=dsproject&hqs=SNLS164tddoctype2http://www.ti.com/product/DP83816?dcmp=dsproject&hqs=SNLS164swdesKithttp://www.ti.com/product/DP83816?dcmp=dsproject&hqs=SNLS164supportcommunityhttp://www.ti.com/product/dp83816?qgpn=dp83816
PCI Bus
DP83816
EEPROM
Isolation
10/100 Twisted Pair
BIOS ROM
(optional) (optional)
DP83816SNLS164E SEPTEMBER 2005REVISED DECEMBER 2015 www.ti.com
1.4 System Diagram
2 Device Overview Copyright 20052015, Texas Instruments IncorporatedSubmit Documentation FeedbackProduct Folder Links: DP83816
http://www.ti.com/product/dp83816?qgpn=dp83816http://www.ti.comhttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SNLS164E&partnum=DP83816http://www.ti.com/product/dp83816?qgpn=dp83816
DP83816www.ti.com SNLS164E SEPTEMBER 2005REVISED DECEMBER 2015
Table of Contents1 Device Overview ......................................... 1 5.4 Device Functional Modes ........................... 31
1.1 Features .............................................. 1 5.5 Programming ........................................ 341.2 Applications........................................... 1 5.6 Register Block ....................................... 651.3 Description............................................ 1 6 Application and Implementation................... 1001.4 System Diagram...................................... 2 6.1 Application Information ............................ 100
2 Revision History ......................................... 3 6.2 Typical Application ................................. 1003 Pin Configuration and Functions..................... 4 7 Power Supply Recommendations................. 106
3.1 Pin Attributes ......................................... 6 8 Layout ................................................... 1074 Specifications ........................................... 11 8.1 Layout Guidelines.................................. 107
4.1 Absolute Maximum Ratings ......................... 11 8.2 Layout Example.................................... 1104.2 ESD Ratings ........................................ 11 9 Device and Documentation Support ............. 1114.3 Recommended Operating Conditions............... 11 9.1 Documentation Support............................ 1114.4 Thermal Information................................. 11 9.2 Trademarks ........................................ 1114.5 Electrical Characteristics DC Specifications ...... 12 9.3 Electrostatic Discharge Caution ................... 1114.6 AC Timing Requirements ........................... 12 9.4 Glossary............................................ 111
5 Detailed Description ................................... 23 10 Mechanical Packaging and OrderableInformation ............................................. 1115.1 Overview ............................................ 2310.1 Packaging Information ............................. 1115.2 Functional Block Diagram........................... 23
5.3 Feature Description ................................. 24
2 Revision HistoryNOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (September 2005) to Revision E Page
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application andImplementation section, Power Supply Recommendations section, Layout section, Device and DocumentationSupport section, and Mechanical, Packaging, and Orderable Information section. ......................................... 1
Changed the Thermal Information table values ................................................................................. 11
Copyright 20052015, Texas Instruments Incorporated Revision History 3Submit Documentation FeedbackProduct Folder Links: DP83816
http://www.ti.com/product/dp83816?qgpn=dp83816http://www.ti.comhttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SNLS164E&partnum=DP83816http://www.ti.com/product/dp83816?qgpn=dp83816
DP83816SNLS164E SEPTEMBER 2005REVISED DECEMBER 2015 www.ti.com
3 Pin Configuration and Functions
The DP83816 pins are classified into the following interface categories (pins of each interface aredescribed in Section 3.1. PCI bus interface Media independent interface 10/100 Mb/s PMD interface BIOS ROM and flash interface Clock interface LED Interface Serial EEPROM interface Special connections Power supply pins
All DP83816 signal pins are I/O cells regardless of the particular use. The tables in Section 3.1 define thefunctionality of the I/O cells for each pin.
4 Pin Configuration and Functions Copyright 20052015, Texas Instruments IncorporatedSubmit Documentation FeedbackProduct Folder Links: DP83816
http://www.ti.com/product/dp83816?qgpn=dp83816http://www.ti.comhttp://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SNLS164E&partnum=DP83816http://www.ti.com/product/dp83816?qgpn=dp83816
144
MA
2/L
ED
100
LN
K37
NC
1MA3/EEDI 108 AD10
143
MA
1/L
ED
10
LN
K38
VS
S
2MA4/EECLK 107 PCIVDD
142
MA
0/L
ED
AC
T39
IAU
XV
DD
3MA5 106 AD11
141
MD
740
VR
EF
4MDIO 105 AD12
140
MD
641
NU
5MDC 104 AD13
139
MD
542
NC
6RXCLK 103 VSS
138
MD
4/E
ED
O43
NC
7RXD0/MA6 102 AD14
137
AU
XV
DD
44
VS
S
8VSS 101 AD15
136
VS
S45
TP
RD
M
9AUXVDD 100 CBEN1
135
MD
346
TP
RD
P
10RXD1/MA7 99 PAR
134
MD
247
IAU
XV
DD
11RXD2/MA8 98 SERRN
133
MD
1/C
FG
DIS
N48
RE
GE
N
12RXD3/MA9 97 PERRN
132
MD
049
VS
S
13RXOE 96 STOPN
131
MW
RN
50
NU
14RXER/MA10 95 DEVSELN
130
MR
DN
51
VS
S
15RXDV/MA11 94 PCIVDD
129
MC
SN
52