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Solar-B EIS Preliminary Design Review 6-7 July 2000
CCD Camera Design
Chris McFee
Mullard Space Science Laboratory
Solar-B EIS Preliminary Design Review 6-7 July 2000
Introduction
• Science drivers for CCD camera design;• CCD features;• Camera Mechanical Design;• Camera Electronic Design;• Camera Design Trade Offs;• Challenges;• Test Plan and Facilities;
Solar-B EIS Preliminary Design Review 6-7 July 2000
CCD Camera Assembly
The Camera Assembly consists of:
• Focal Plane Assembly (FPA).– Two CCDs at focal plane;– Mechanical mounting of CCDs at focal plane;
• Read Out Electronics.
Three Flight Model CCDs procured with option for further CCDs.
Three Engineering models and six Commercial Devices.
Solar-B EIS Preliminary Design Review 6-7 July 2000
CCD Camera Requirements
Heading Requirement Camera Implications
Spectral resolution High CCD pixel size 13.5µm.
Minimisation of charge transfer inefficiency.
Minimisation of the effects of radiation induced dark noise.
Spatial resolution Equal to or less than 2” CCD pixel size 13.5µm.
Solar-B EIS Preliminary Design Review 6-7 July 2000
CCD Camera Requirements
Heading Requirement Camera implications
Temporal Resolution
High temporal resolution for both imaging and spectroscopy
Readout speed of 500 kpixels/s.
On chip windowing.
Provision of dump drain.
Wavelength range Two wavelength ranges
Two CCDs.
Backthinned to maximise QE
Solar-B EIS Preliminary Design Review 6-7 July 2000
CCD Camera Requirements
Heading Requirement Camera Implications
Read out Read out fractions of the CCD
Windowing will be implemented
Read out in fractions of a second
Readout speed of 500 kpixels/s
On chip windowing
Provision of dump drain
Solar-B EIS Preliminary Design Review 6-7 July 2000
CCD features
• Marconi (EEV) 42-20;• Size – 2048x1024 (13.5µm square pixels);• MPP device (dark noise ~ 300 e/p/s @ +20C);• Basic backthining process - ~80% QE;• Electronic readnoise ~ 5/6 electrons;• Full well - ~90k electrons (~7000 photons);• Two readout amplifiers per CCD.
Solar-B EIS Preliminary Design Review 6-7 July 2000
CCD Camera Mechanical design
• CCDs mechanically supported at Focal plane;• CCDs bonded to individual invar plates;• These invar plates then attached to backplates built at MSSL;• Can be moved in two dimensions for alignment;• CCDs connected to ROE by short cable to minimise noise
pickup.
Solar-B EIS Preliminary Design Review 6-7 July 2000
CCD Camera Design
• Operating temperature -55 °C;• CCD can be heated to +30 °C to remove contamination; • Three phase clocking;• Up to two windows per CCD;• Gain ~ 5.5 electrons per DN;• Binning in spatial and spectral direction;• Dumping of unwanted lines;• Programmable voltages to minimise the effects of ionising
radiation damage;• Overclocking for testing, offset bias determination, etc.• Stim patterns for testing;• Flat fielding/Pre flash LEDs.
Solar-B EIS Preliminary Design Review 6-7 July 2000
CCD Camera Design
• Status monitoring.– CCD temperatures;– Current monitoring of supply lines;– Voltage monitoring of supply lines;– Monitor voltage of substrate bias, reset drain bias and output
drain bias;– Reflect back register values for check.
Solar-B EIS Preliminary Design Review 6-7 July 2000
CCD Camera Design
Science data via high speed linkCommunication with ICU via LVDS drivers
@ 16 Mbits/s for each data link
Commands and Status information via low speed link @ 9.6 k baud
Solar-B EIS Preliminary Design Review 6-7 July 2000
CCD Camera DesignWindow counters
Imageclocks
Readoutclocks
CCD biasVariable biasVrd, Vod, Vss
CCD 0
CCD 1
Sync
Sample and convert logic
Para
llel
to
Seri
al c
onve
rsio
n
Pre-
ampl
ific
atio
n
AD
C
High SpeedLink
LowSpeedLink
Science data
Commands and status
Solar-B EIS Preliminary Design Review 6-7 July 2000
CCD Camera Design Trade Offs
• Operating temperature– low operating temperature to minimise dark current and the potential effects of radiation damage. But very low temperatures difficult to obtain without major redesign of radiator, requires use of MPP device but this lowers the full well capacity
• Shielding– maximise shielding to minimise radiation damage but this will add mass. Use of programmable voltages minimises the effects of this damage.
Solar-B EIS Preliminary Design Review 6-7 July 2000
CCD Camera Design Trade Offs
• Read Out Rates.– 500 kpixels/s baselined. Faster readouts are difficult to achieve in
current power budget and design and faster readout also increases CCD readout noise;
• On Chip windowing.– Design of electronics is greatly simplified by reducing the number of
windows that are available;
• Mass– Shielding.
Solar-B EIS Preliminary Design Review 6-7 July 2000
CCD Camera Challenges
• Cleanliness – EUV demands extreme cleanliness;– All operations will use at least a class 100 cleanroom or better, high
standards from GOES-SXI programme adopted with great care taken to eliminate molecular contamination;
• Readout speed – current designs 330 kpixels/s;– 500 kpixels/s and 14 bit digitisation challenging but achievable;
• Physically fitting electronics within the ROE box constraints.
Solar-B EIS Preliminary Design Review 6-7 July 2000
CCD Camera Test Plan
• Read out electronics– Verification of correct functionality
– Optimisation of design with CCD
– Read out noise
– Validate grounding
• CCD characterisation– Establish and Monitor chamber cleanliness levels
– Defects, hot pixels, QE
• Integration with spectrometer
Solar-B EIS Preliminary Design Review 6-7 July 2000
Current CCD Camera Test Facilities
• Camera Test Facilities based on Facilities developed for GOES/SXI;– (large amount of redundancy available)
Solar-B EIS Preliminary Design Review 6-7 July 2000
Current CCD Camera Test Facilities
CCD
Focal plane
Assembly
Preamps
Clock level
shifters
Bias Control
box
Control of CCD bias
voltages
Monitor CCD voltages
Control image clocks
PC 500 MHz,128Mb ram
DAC card
CCD bias control
ADC Card
CCD bias monitoring
DMA Card
MSSL built ISA Card
Control of clocking
Receive CCD data via high speed
link (5.2 MHz)
Generate CCD commands via low
speed link (64 kbaud)
Generate bilevel command lines
and receive status lines
Read out
Electronics
Card 1:
CCD bias supplies
Power switching
Amp-cds-adc
Card 2:
Clock pulse generator
Card 3:
Interface to PC
(FIFO-PISO-HSL)
Solar-B EIS Preliminary Design Review 6-7 July 2000
CCD Camera Schedule
• CCD Camera completed 20 December 2000;• PM delivery 12 March 2001.
Solar-B EIS Preliminary Design Review 6-7 July 2000
Summary
• Resolution.– pixel size 13.5µm.– MPP device to minimise dark current;
• Temporal resolution.– Readout rate 500 kpixels/s;– Dump drain facility;– On-chip windowing;– Two readout amplifiers per CCD.