5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number R ev

Date: Sheet o fLA-1711 X02-D

1 60Wednesday, July 23, 2003

Compal Electronics, Inc.

Cover Sheet

Prescott & Springdale Schematic with Capture CISand Function field

uFCPGA Prescott

REV: X02-D

@ : Depop Component1@ : Depop on Nimitz(Inspiron)2@ : Depop on Beijing(Precision)

Prescott : Prescott processor Electrial,Mechanical andThermal Specification Rev0.5 [Check by HW:Henry,Steve]

Cature library ball out check document

Springdale(GMCH): Springdale GMCH External DesignSpecification (EDS) REV1.0 [Check by HW: Henry,Rita]

ICH5: N/A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

2003-07-23

hexain

f@hotm

ail.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

2 60Wednesday, July 23, 2003

Compal Electronics, Inc.

Block Diagram

MINI PCI

PCI BUS

Prescott

page 23

GMCH

page 32

Slot 0

ATA100

page 7,8,9

Transformer

AMP& PhoneJack Interface

page 35

LPC BUS

BATTIN

Page33,34

page 26

page 18

page 27

Fan Control

USBFDD

478 uFCPGA CPU

IDSEL:AD20(PIRQA/B#,GNT#2,REQ#2)

Macallen

AGP CONN.

page 423.3V 24.576MHz

VCORE

page 6

page31

page 21

Touch Pad

LPC to X-BUS& Super I/O

page 14

USB2.0

1.5V/+VTT_GMCH

page10,11,12,13

HA#(3..31)

Springdale

page 47

BT

SST39VF080

page 44

AGP4X/8X(1.5V)

page 41

3.3V ATA100

Clock Generator

HD#(0..63)

RJ45

Compal confidential

page 27

AC97Codec

page 19

DC IN

CK409

3.3V 33MHz

page31

VCORE_CTRL

page 30

page 48

MemoryBUS(DDR)

MDC

page 25

BACK

Int.KBD

USBPORT 1

HUB Link

CDROM

ADT7460 Thermal sensor

CHARGER

page 24

page 28

ICH5

3.3V 33MHz

page 46

STAC9750

USBPORT 2

PCI7510/PCI4510LANBCM5705MBCM4401

DOGUSBPORT 3

1394, Smartcard

[CRT CONN. & TV-OUT]

System Bus

page 35

USBPORT 4

page 29

MOD

460 BGA

page 35

3.3V/5V

X BUS

CardBus Controller

Block Diagram

533/800MHz

ATA100

2.5V266/333/400MHz

HDD

VGABoard

1.5V66Mhz266MB/S

page 43

932 FC-BGA

page 29

AC-LINK

1.25V/2.5Vpage 45

page 16BANK 0, 1, 2,3Channel B SO-DIMM

BANK 0, 1, 2,3 page 15

Channel A SO-DIMM

2.5V266/333/400MHz

Page20,21,22

USBPORT 6BACK

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

BACKUSBPORT 5

page 50

Subwoofer

SATA

USBPORT 4

hexain

f@hotm

ail.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

3 60Wednesday, July 23, 2003

Compal Electronics, Inc.

Index and Config.

PM TABLE

ON

ON

AD17

OFF

PCI DEVICE

TABLE

CARD BUS

IDSEL

S0

TABLE

3

1

PCI

ON

ON

MINI PCI

S3

USB

ON

OFF

ON

+3VSUS

OFF

+5VSUS

AD19

+5VALW

S1

S5 S4/AC don't exist

+VCC_CORE

AD16

REQ#/GNT#

+5VRUN

ON

powerplane

+3VRUN

4

S5 S4/AC

ON

ON

+3VALW

State

OFFOFF

LAN

+2.5V_MEM

OFF

Note : "@" means all model depop

"2@" means Beijing depoped only"1@" means Nimitz depoped only

Configuration List

Function

BOM Structure

VGA

PIRQ

D,C

C

D,B(NP)

A,B(NP)

2

BT

3 DOG

BACK

1

4

BACK

MOD

USB PORT#

0

DESTINATION

5

6

7

BACK

Reserved

Reserved

+1.5VRUN

V_1P25V_DDR_VTT

+12V

+VCCVID

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

Nimitz BeijingModel

Smart Card

LAN

Dog House

YES

10/100(4401)

1000(5705M)

YES YES

Function

No

QT-Build

ST-Build

SST-BuildRG828SDGP

A2(QE45)

FW82801EB

A3(QE51ES)

Bring up

RG828SDGES FW82801EB

A1(QE16ES)A1(QE18)

MCH Rev. ICH5 Rev.

Pilot-Build

PT-Build+3.3VRTC

+RTC_PWR

hexain

f@hotm

ail.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

4 60Wednesday, July 23, 2003

Compal Electronics, Inc.

Power Rail

+5VHDD

+5VALW

+5VSUS

BATTERY

RBAT

+RTCSRC

+5VMOD

PWR_SRC

+12V

+RTC_PWR

+3VALW+3.3VRTC

DOCK _PWR_SRC

ADAPTER

+5VRUN

+5VSUS

+3VSUS

SUSPWROK

VDDA

+VCC_CORE+VCCP

+2.5V_MEM

+2.5VMEMP

V_1P25V_DDR_VTTV3P3LAN

+3VSRC

+3VRUN +3VSUS+1.5VRUN

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

hexain

f@hotm

ail.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

5 60Wednesday, July 23, 2003

Compal Electronics, Inc.

SMBUS TOPOLOGY

VGA

+3VRUN

CK_SDATA

DIMM1

CLK GEN.

SBAT_SMBCLK

Macallen

7002ICH5

7002

SBAT_SMBDAT

DAT_SMB

7002

+3VALW7002

DH PORT

CLK_SMB

7002

ADT7460

+5VALW

V_3P3_LAN

NIC

ICH_SMBDATA +3VSUS

ICH_SMBCLK

MPCI

DIMM0

24C05

7002

CK_SCLK

LAN_SMBDATA

LAN_SMBCLK

SIO

PBAT_SMBCLK

PBAT_SMBDAT +5VALW1'ndBATTERY

CHARGER

7002

7002

EC SMBus Address

DDR Temp.(AD7414ART-0) : 90h/91h (P.15)

CPU Temp.(ADT7460ARQ) : 5Ch/5Dh (P.19)

CPU Power Temp.(AD7414ART-0) : 92h/93h (P.?)

EC EEPROM(FM24C05U) : A0h/A1h/A2h/A3h (P.37)

VID Select(PCA9561PW) : 9Ch/9Dh (P.38)

AD7414 PCA9561

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

hexain

f@hotm

ail.com

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CK_BCLK

CLK_STP_CPU#C K_HCLK

ICH_SLP_S1#

C K_HCLK#

CK_ITP

CK_ITP#

CK_BCLK#

CLK66M_OUT1

PCICLK6

C K_CPU1

PCICLK5

PCICLK1

C K_CPU2#

PCICLK_F2

C K_CPU1#

CLK66M_OUT3

CLK66M_OUT0

C K_CPU2

C K_CPU0#

PCICLK2

C K_CPU0H_STP_PCI#

CK_SCLKCK_SDATA

CK_VTT_PG#

CLKSEL0CLKSEL1

ICH_SMBDATA

CK_SCLKICH_SMBCLK

CK_SDATA

CLKSEL0

CLKSEL1

CLK_VDD_PLL

CLK48M_OUT1

CLK48M_OUT0

C LKREF0C LKREF1

CK_SATA

CK_SATA#

H_STP_PCI#

ICH_SLP_S1#

CK_XTAL_OUT

CK_XTAL_IN

PCICLK0

CK_VDD_MAIN+ 3VRUN

+ 3VRUN

+ 3VRUN

+ 3VRUN

+3VRUN

+ 3VRUN

+ 3VRUN

ICH_SLP_S1#<21>

CK_48M_SCR<30>

CK_48M_ICH<20>

CK_66M_MCH <12>

CK_66M_AGP <18>

CLK_STP_CPU#<36>

CK_VTT_PG#<37>

CK_33M_CBPCI <30>

CK_33M_LANPCI <28>

CK_33M_MINIPCI <32>

CK_33M_SIOPCI <34>

CK_33M_ICHPCI <20>

CK_66M_ICH <20>

CK_14M_ICH<21>

CK_ITP <8>

CK_ITP# <8>

ICH_SMBCLK<15,16,21,32>

ICH_SMBDATA<15,16,21,32>

CPU_CLKSEL0 <8>

CPU_CLKSEL1 <8>

MCH_CLKSEL0 <10>

MCH_CLKSEL1 <10>

CK_14M_SIO<34>

CK_100M_ICH<21>

CK_100M_ICH#<21>

C K_HCLK <10>

CK_HCLK# <10>

CK_BCLK# <7>

CK_BCLK <7>

CK_33M_CPLD <36>

CK_14M_CODEC<24>

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

6 60Wednesday, July 23, 2003

Compal Electronics, Inc.

Clock Generator

Place near each pinW>40 mil

Place near CK409

SL0 SL1 CPU 3V66[0..3] REF0 REF1 SRC USB/Dot

Trace wide=20 mils

CK409

Place crystal within500 mils of CK409

13G

D

S2

2N7002

0 0 100 66 14.3 14.3 100/200

0 MID REF REF REF REF REF

0 1 200

48

REF

66 14.3 100/200 48

1 0 133 66 14.3

1 1 166

1 MID Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z

66 14.3 100/200

48

48

Check SPEC (250mA,300 ohm)

14.3

14.3

14.3

Place near CK409

CK_XTAL_IN and CK_XTAL_OUT equal length traces,Please place R_J between Pins 4,5 of CK409 Pinsbefore X'tal

R_J

Close to X'tal pin

Bring Up: Populate R509 (Because CPUis Northwood-MT, Frequency 533MHz)

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

100/200

R50033_0402_5%~D

12

R206 0_0402_5%~D12

R508 0_0402_5%~D12

R47249.9_0402_1%~D

1 2

R208

2.49K_0603_1%~D

12

L45BLM11A601S_0603~D

1 2

C59810P_0402_50V8J~D@

12

R54433_0402_5%~D

1 2

R53933_0402_5%~D

12

R49133_0402_5%~D

1 2

R536

100K_0402_5%~D

12

R5482M_0603_5%~D @

12

R47649.9_0402_1%~D

1 2

R484

33_0402_5%~D

1 2

G

D S

Q692N7002_SOT23~D

2

1 3

R 2181K_0603_1%~D@

12

R48833_0402_5%~D

1 2

R49233_0402_5%~D

1 2

R54033_0402_5%~D

1 2

G

D S

Q682N7002_SOT23~D

2

1 3

C554

0.1U_0402_10V6K~D

1

2

R478

49.9_0402_1%~D

1 2

C551

0.1U_0402_10V6K~D

1

2

C585

0.1U_0402_10V6K~D

1

2

R49333_0402_5%~D

1 2

R479

49.9_0402_1%~D

1 2

R215 0_0402_5%~D@12

C553

0.1U_0402_10V6K~D

1

2

C552

0.1U_0402_10V6K~D

1

2

C 193

4.7U_0805_6.3V6K~D

1

2

C59710P_0402_50V8J~D@

12

C587

0.1U_0402_10V6K~D

1

2

R54233_0402_5%~D

1 2

R587 33_0402_5%~D

1 2

R50133_0402_5%~D

12

C550

0.1U_0402_16V4Z~D

1

2

R47349.9_0402_1%~D

1 2

R47449.9_0402_1%~D

1 2

R48933_0402_5%~D

1 2

R518

1K_0603_1%~D1

2

C588

0.1U_0402_10V6K~D

1

2

R53833_0402_5%~D

12

R509 0_0402_5%~D@12

U 39

CY28409ZCT_TSSOP56~D

REF_11

VD

D_P

CI

10V

DD

_PC

I16

VD

D_3

V66

24

VD

D_4

834

VS

S_R

EF

6V

DD

_RE

F3

REF_02

CPUCLKT2 47

CPU_CLKC2 46

CPUCLKT1 44

CPUCLKC1 43

CPUCLKT0 41

CPUCLKC0 40

48/66MHZ_OUT/3V66_4 29

66MHZ_OUT2/3V66_2 26

66MHZ_OUT1/3V66_1 23

66MHZ_OUT0/3V66_0 22

PCICLK_F2 9

PCICLK_F1 8

PCICLK_F0 7

PCICLK6 20

PCICLK5 19

PCICLK4 18

PCICLK3 15

PCICLK2 14

PCICLK1 13

PCICLK0 12

XTAL_IN4

XTAL_OUT5

VS

S_P

CI

11V

SS

_PC

I17

PWRDWN#21

VS

S_3

V66

25

66MHZ_OUT3/3V66_3 27

SCLK28SDATA30

USB_48MHZ31

DOT_48MHZ32

VS

S_4

833

VTT_PWRGD#35

VD

D_S

RC

36

SRCLKN_100MHZ37

SRCLKP_100MHZ38

VS

S_S

RC

39V

DD

_CP

U42

VSS_CPU 45

VD

D_C

PU

48

PCI_STP#49CPU_STP#50

SEL051

IREF52

VS

S_I

RE

F53

VSS_PLL54

SEL156

VDD_PLL55

R54733_0402_5%~D

1 2

R47549.9_0402_1%~D

1 2

R54133_0402_5%~D

1 2

R519

2K_0603_1%~D

12

R214

2.49K_0603_1%~D

12

R 47749.9_0402_1%~D

1 2

R 1921K_0603_1%~D

12

R61133_0402_5%~D@

12

R49033_0402_5%~D

1 2

L17BLM21PG600SN1D_0805~D

1 2

X6

14.31818MHz_20P_1BX14318CC1A~D

12

R529

1K_0603_1%~D

12

R199

475_0603_1%~D

1 2

C204

10U_1206_6.3V7K~D

1

2

R54533_0402_5%~D

1 2

R54333_0402_5%~D

1 2

C166

10U_1206_6.3V7K~D

1

2

R530

2K_0603_1%~D

12

R54633_0402_5%~D

1 2

R524

100K_0402_5%~D

12

C586

0.1U_0402_10V6K~D

1

2

R485

33_0402_5%~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CK_BCLK#

H_A#3H_A#4H_A#5H_A#6H_A#7H_A#8H_A#9H_A#10H_A#11H_A#12H_A#13H_A#14H_A#15H_A#16H_A#17H_A#18H_A#19H_A#20H_A#21H_A#22H_A#23H_A#24H_A#25H_A#26H_A#27H_A#28

H_A#31

H_A#29H_A#30

H _D#0H _D#1H _D#2H _D#3H _D#4H _D#5H _D#6H _D#7H _D#8H _D#9H_D#10H_D#11H_D#12H_D#13H_D#14H_D#15H_D#16H_D#17H_D#18H_D#19H_D#20H_D#21H_D#22H_D#23H_D#24H_D#25H_D#26H_D#27H_D#28H_D#29H_D#30H_D#31H_D#32H_D#33H_D#34H_D#35H_D#36H_D#37H_D#38H_D#39H_D#40H_D#41H_D#42H_D#43H_D#44H_D#45H_D#46H_D#47H_D#48H_D#49H_D#50H_D#51H_D#52H_D#53H_D#54H_D#55H_D#56H_D#57H_D#58H_D#59H_D#60H_D#61H_D#62H_D#63

H_ IERR#

H_REQ#0H_REQ#1H_REQ#2H_REQ#3H_REQ#4

CK_BCLK

+ VCC_CORE

+VCC_CORE

+ VCC_CORE

+ VCC_CORE

H_REQ#[0..4]<10>

CK_BCLK#<6>

H_D#[0..63] <10>H_A#[3..31]<10>

H_HIT#<10>

H_BPRI#<10>H _BR0#<10>

H _ADS#<10>

H_HITM#<10>

CK_BCLK<6>

H_ BNR#<10>H_LOCK#<10>

H_ DEFER#<10>

VCORE_BOOTSELECT <49>

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

Prescott Processor in uFCPGA478C

7 60Wednesday, July 23, 2003

Compal Electronics, Inc.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

Pull-up56ohmto +VCC_CORE

Pull-up 56ohmto +VCC_CORE

Pull-up 62ohmto +VCC_CORE

Prescott

B6 FERR# FERR#/PBE# Pull-up 62ohmto +VCC_CORE

Pull-up 62ohmto +VCC_CORE

Reference Intel documentDesktop P4 Spec.: 10988 P4 0.13u 512KB L2 EMTS Rev.2.0

Desktop Prescott Spec.: 11910 Prescott EMTS Rev.0.5

Pin number NorthwoodPin name

PrescottPin name

Comment Comment

AA20 ITPCLKOUT0 Pull-up56ohmto +VCC_CORE

TESTHI6 Pull-up 62ohmto +VCC_CORE

Pop

Pop

Pop

Pop

Pop

PopDepop

Pop

Pop

DepopPop

Northwood

Pop

Depop

Depop

AB22 ITPCLKOUT1 Pull-up 56ohmto +VCC_CORE

TESTHI7 Pull-up 62ohmto +VCC_CORE

AD2 NC VIDPWRGD Pull-up 2.43K ohmto +VCCVID

float

AD3 NC float VID5 Pull-up1Kohm to+3VRUN & connectto PWRIC

AF3 NC float VCCVIDLB Connect to +VCCVID

NorthwoodMT

Northwood MTPin name

AD20 VCCA VCCIOPLLConnect to CPUFilter

FERR#

ITPCLKOUT0

ITPCLKOUT1

Connect to CPUFilter

AF23 Connect to CPUFilter

Connect to CPUFilter

NC

NC

NC

VCCA

VCCIOPLL VCCA VCCIOPLL

VSSAE26 VSS Connect to GND OPTIMIZED/COMPAT#

Comment

float

Pop

Pop

Pop

TESTHI12 TESTHI12AD25 DPSLP

Connect to CPUFilter

Connect to CPUFilter

Connect to GNDPop

float

float

float

Depop

Depop

Depop

Pull-up 62ohmto +VCC_CORE Pop

Pull-up 200ohmto +VCC_CORE

Connect to PLDthrough 0ohm Pop Pop

A6 TESTHI11 GHIPull-up 200ohmto +VCC_CORE

Pull-up 62ohmto +VCC_CORE

Connect to PLDCPUPREF through0ohm PopPop Pop

TESTHI11

Note: AD2,AD3 pop(bring up)

Prescott

JCP UA

AMP_3-1565030-1_Prescott~D

A#3K2A#4K4A#5L6A#6K1A#7L3A#8M6A#9L2A#10M3A#11M4A#12N1A#13M1A#14N2A#15N4A#16N5A#17T1A#18R2A#19P3A#20P4A#21R3A#22T2A#23U1A#24P6A#25U3A#26T4A#27V2A#28R6A#29W1A#30T5A#31U4A#32V3A#33W2A#34Y1A#35AB1

REQ#0J1REQ#1K5REQ#2J4REQ#3J3REQ#4H3ADS#G1

AP#0AC1AP#1V5BINIT#AA3IERR#AC3

BNR#G2 BPRI#D2 BR0#H6

LOCK#G4

DEFER#E2 HITM#E3 HIT#F3

D#0 B21D#1 B22D#2 A23D#3 A25D#4 C21D#5 D22D#6 B24D#7 C23D#8 C24D#9 B25

D#10 G22D#11 H21D#12 C26D#13 D23D#14 J21D#15 D25D#16 H22D#17 E24D#18 G23D#19 F23D#20 F24D#21 E25D#22 F26D#23 D26D#24 L21D#25 G26D#26 H24D#27 M21D#28 L22D#29 J24D#30 K23D#31 H25D#32 M23D#33 N22D#34 P21D#35 M24D#36 N23D#37 M26D#38 N26D#39 N25D#40 R21D#41 P24D#42 R25D#43 R24D#44 T26D#45 T25D#46 T22D#47 T23D#48 U26D#49 U24D#50 U23D#51 V25D#52 U21D#53 V22D#54 V24D#55 W26D#56 Y26D#57 W25D#58 Y23D#59 Y24D#60 Y21D#61 AA25D#62 AA22D#63 AA24

VC

C_0

A10

VC

C_1

A12

VC

C_2

A14

VC

C_3

A16

VC

C_4

A18

VC

C_5

A20

VC

C_6

A8

VC

C_7

AA

10V

CC

_8A

A12

VC

C_9

AA

14V

CC

_10

AA

16V

CC

_11

AA

18V

CC

_12

AA

8V

CC

_13

AB

11V

CC

_14

AB

13V

CC

_15

AB

15V

CC

_16

AB

17V

CC

_17

AB

19V

CC

_18

AB

7V

CC

_19

AB

9V

CC

_20

AC

10V

CC

_21

AC

12V

CC

_22

AC

14V

CC

_23

AC

16V

CC

_24

AC

18V

CC

_25

AC

8V

CC

_26

AD

11V

CC

_27

AD

13V

CC

_28

AD

15V

CC

_29

AD

17V

CC

_30

AD

19V

CC

_31

AD

7V

CC

_32

AD

9V

CC

_33

AE

10V

CC

_34

AE

12V

CC

_35

AE

14V

CC

_36

AE

16V

CC

_37

AE

18V

CC

_38

AE

20V

CC

_39

AE

6V

CC

_40

AE

8V

CC

_41

AF1

1V

CC

_42

AF1

3V

CC

_43

AF1

5V

CC

_44

AF1

7V

CC

_45

AF1

9V

CC

_46

AF2

VC

C_4

7A

F21

VC

C_4

8A

F5V

CC

_49

AF7

VC

C_5

0A

F9V

CC

_51

B11

VC

C_5

2B

13V

CC

_53

B15

VC

C_5

4B

17V

CC

_55

B19

VC

C_5

6B

7V

CC

_57

B9

VC

C_5

8C

10V

CC

_59

C12

VC

C_6

1C

14V

CC

_62

C16

VC

C_6

3C

18V

CC

_64

C20

VC

C_6

5C

8V

CC

_66

D11

VC

C_6

7D

13V

CC

_68

D15

VC

C_6

9D

17V

CC

_70

D19

VC

C_7

1D

7V

CC

_72

D9

VC

C_7

4E

12V

CC

_75

E14

VC

C_7

6E

16V

CC

_77

E18

VC

C_7

8E

20V

CC

_79

E8

VC

C_8

0F1

1

VS

S_0

H1

VS

S_1

H4

VS

S_2

H23

VS

S_3

H26

VS

S_4

A11

VS

S_5

A13

VS

S_6

A15

VS

S_7

A17

VS

S_8

A19

VS

S_9

A21

VS

S_1

0A

24V

SS

_11

A26

VS

S_1

2A

3V

SS

_13

A9

VS

S_1

4A

A1

VS

S_1

5A

A11

VS

S_1

6A

A13

VS

S_1

7A

A15

VS

S_1

8A

A17

VS

S_1

9A

A19

VS

S_2

0A

A23

VS

S_2

1A

A26

VS

S_2

2A

A4

VS

S_2

3A

A7

VS

S_2

4A

A9

VS

S_2

5A

B10

VS

S_2

6A

B12

VS

S_2

7A

B14

VS

S_2

8A

B16

VS

S_2

9A

B18

VS

S_3

0A

B20

VS

S_3

1A

B21

VS

S_3

2A

B24

VS

S_3

3A

B3

VS

S_3

4A

B6

VS

S_3

5A

B8

VS

S_3

6A

C11

VS

S_3

7A

C13

VS

S_3

8A

C15

VS

S_3

9A

C17

VS

S_4

0A

C19

VS

S_4

1A

C2

VS

S_4

2A

C22

VS

S_4

3A

C25

VS

S_4

4A

C5

VS

S_4

5A

C7

VS

S_4

6A

C9

BO

OTS

ELE

CT

AD

1

VS

S_4

7A

D10

VS

S_4

8A

D12

VS

S_4

9A

D14

VS

S_5

0A

D16

VS

S_5

1A

D18

VS

S_5

2A

D21

VS

S_5

3A

D23

VS

S_5

4A

D4

VS

S_5

5A

D8

BCLK0AF22BCLK1AF23

VC

C_8

1F1

3V

CC

_82

F15

VC

C_8

3F1

7V

CC

_84

F19

VC

C_8

5F9

VC

C_7

3E

10

R371 200_0402_5%1 2

R33962_0402_5%@1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_RS#0H_RS#1H_RS#2

H_ FERR#

H_RESET#

H_P WRGOOD

H_THERMDCH_THERMDA

H_THERMTRIP#

ITP_TDI

ITP_BPM#1

ITP_TDO

ITP_DBRESET#

ITP_BPM#3

ITP_BPM#0

ITP_TCK

ITP_BPM#5H_RESET#

ITP_BPM#4

ITP_TCK

ITP_BPM#2

ITP_TRST#

ITP_TMS

ITP_TDI

ITP_TCK

ITP_TDO

H_RESET#

ITP_BPM#0

ITP_BPM#3ITP_BPM#4

ITP_DBRESET#

ITP_TCKITP_TDI

ITP_TMSITP_TRST#

ITP_TDO

H_TESTHI2_7

H_TESTHI8H_TESTHI9H_TESTHI10

H_ FERR#

H_THERMTRIP#

H_RESET#

H_PROCHOT#

H_P WRGOOD

ITP_BPM#1ITP_BPM#2

ITP_BPM#5

H_VSSA

H_ VCCA

H_V ID_PWRGD

ITP_TMS

V ID3

V ID4

V ID5

CK_ITPCK_ITP#

CK_ITP_CPU#

V ID2V ID1V ID0

CK_ITP#CK_ITP

ITP_TRST#

H_V ID_PWRGD

H_DPSLP#H_TESTHI11

H_DPSLP#

H_TESTHI0H_TESTHI1

CK_ITP_JITP#CK_ITP_JITP

CK_ITP_JITPCK_ITP_JITP#

CK_ITP_CPU

CK_ITP_CPU#CK_ITP_CPU

H_PROCHOT#

+VCC_CORE

+ VCC_CORE

+ VCC_CORE

+ VCC_CORE

+ VCC_CORE

+CPU_GTLREF

+CPU_GTLREF

+CPU_GMCH_GTLREF

+ VCC_CORE

+ VCCVID

+VCC_CORE

+VCC_CORE

+3VRUN

+ VCCVID

+ VCC_CORE

+ VCCVID

+ VCC_CORE

+3VSUS

+3VSUS

+3VSUS

+3VSUS

+VCC_CORE

H_DSTBN#3 <10>

H _DINV#3 <10>

H_DSTBP#1 <10>

H _DINV#0 <10>

H _DINV#2 <10>H _DINV#1 <10>

H_RS#[0..2]<10>

H_A20M#<21>H_ FERR#<21>H _IGNNE#<21>

H_SMI#<21>

H_STPCLK#<36>

H_DB SY#<10>

H_RESET#<10>

H_DRDY#<10>

H_INIT#<21>

H_P WRGOOD<21>

H_THERMTRIP#<21,37>

H_THERMDC<19>H_THERMDA<19>

H_CPUSLP# <36>

H_DSTBN#0 <10>H_DSTBN#1 <10>H_DSTBN#2 <10>

H_DSTBP#2 <10>

H_DSTBP#0 <10>

H_DSTBP#3 <10>

H_ADSTB#0 <10>H_ADSTB#1 <10>

H_ TRDY#<10>

H_INTR<21>H_NMI<21>

CPU_CLKSEL0<6>CPU_CLKSEL1<6>

ITP_DBRESET# <37>

H_PROCHOT# <10>

V CCSENSE<46>VSSSENSE<46>

H _VID0<36>H _VID1<36>H _VID2<36>H _VID3<36>H _VID4<36>H _VID5<36>

V ID5<36,46>

V ID4<36,46>

V ID3<36,46>V ID2<36,46>V ID1<36,46>V ID0<36,46>

CK_ITP#<6>CK_ITP<6>

VID _PWRGD<46>

VCORE_ENLL <46>

CP UPREF# <36>

DPSLP#<36>

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

Prescott Processor in uFCPGA478C

8 60Wednesday, July 23, 2003

Compal Electronics, Inc.

Place near ICH

Place near CPU

Close to the CPU

3. Place decoupling cap 220PF near CPU.

GTL Reference Voltage

2. Place R_A and R_B near CPU.

Layout note :

R_A

R_B

+CPU_GMCH_GTLREF tracewide 12mils(min),Space15mils

1. +CPU_GTLREF Trace wide12mils(min),Space 15mils

1.Place cap within 600 mils ofthe VCCA and VSSA pins.

10uH, DC current of 100mA partsand close to cap

PLL Layout note :

2.H_VCCIOPLL,HVCCA,HVSSA trace wide12 mils(min)

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Close to the ITP

Close to the ITP

R_D

Pop: PrescottDepop: Northwood

R_E

REPop: PrescottDepop: Northwood

R_G

Pop: NorthwoodDepop: Prescott

Between the CPU and ITP

Level shift

R_H

RHPop: PrescottDepop: Northwood MT

H_TESTHI12

CPLD EnablePop R380

CPLD EnablePop R76, R78

Closely Pin AE25

L41 10U_LQH31MN100K01_100mA_10%_1206~D

1 2

R 3400_0603_5%~D

12

R35854.9_0603_1%~D1 2

R379 47_0402_5%~D @

12

R152

10K_0402_5%~D

1 2

U 6A

SN74LVC2G07DBVR_SOT23-6~D

O 6I1

P5

G2

R 70 0_0402_5%~D1 2

R 342 62_0402_5%1 2

RN7 1K_8P4R_1206_5%~D

18273645

R333 0_0402_5%~D1 2

R 35 1K_0402_5%~D1 2

R N9

0_4P2R_0404_5%~D

1423

B_VID5O PEN

@

11

22

R 78 0_0402_5%~D@1 2

C 386

0.1U_0402_10V6K~D

1

2

R 84 62_0402_5%@ 1 2

JITP

MOLEX_52435-2891_28P~D@

TDI1 TMS2 TRST#3 NC14 TCK5 NC26 TDO7 BCLKN8 BCLKP9 GND010 FBO11 RESET#12 BPM5#13

BPM4#15

BPM3#17BPM2#19

BPM1#21

BPM0#23 DBA#24 DBR#25 VTAP26 VTT027 VTT128

GND114

GND216

GND318

GND420

GND522

GN

D6

29G

ND

730

R N8

0_4P2R_0404_5%~D @

1423

R155 10K_0402_5%~D1 2

B_VID0O PEN

@

11

22

R 9761.9_0603_1%

12

R 79 62_0402_5%1 2

R 77 62_0402_5%1 2

R 346 62_0402_5%1 2

R344 62_0402_5%1 2

R 338 62_0402_5%1 2

R356

169_0603_1%

12

R354 62_0402_5%1 2

C121

0.1U_0402_16V4Z~D

1 2

R37639.2_0603_1%~D

1 2

+ C 36833U_D2_8M_R35~D

1

2

B_VID3O PEN

@

11

22

R36354.9_0603_1%~D1 2

R 337 62_0402_5%1 2

R336681_0603_1%1 2

C660

1000P_0402_50V7K~D@

12

R 82 62_0402_5%1 2

C372220P_0402_50V7K

1

2R370 27.4_0603_1%~D

1 2

R 76200_0402_5%@

12

B_VID1O PEN

@

11

22

U6B

SN74LVC2G07DBVR_SOT23-6~D

O 4I3

P5

G2

R361150_0402_5%~D

1 2

R108 150_0402_5%~D1 2

R347 62_0402_5%1 2

R129 62_0402_5%1 2

R382 62_0402_5%1 2

R34961.9_0603_1%

12

R36447_0402_5%~D

1 2

R 71

0_0402_5%~D

1 2

B_VID4O PEN

@

11

22

B_VID2OP EN

@

11

22

R131 62_0402_5%1 2

R 111 130_0402_5%1 2

C 131

0.1U_0402_16V4Z~D

1 2

C369

0.1U_0402_16V4Z~D 1

2

Prescott

JCP UB

AMP_3-1565030-1_Prescott~D

RS#0F1RS#1G5RS#2F4RSP#AB2TRDY#J6

A20M#C6FERR#B6IGNNE#B2SMI#B5PWRGOODAB23STPCLK#Y4

TESTHI12 AD25

LINT0D1LINT1E5INIT#W5RESET#AB25

DRDY#H2 DBSY#H5

THERMDCC4 THERMDAB3

TDIC1 TCKD4

TDOD5TMSF7TRST#E6

COMP1P1 COMP0L24

DP#0 J26DP#1 K25DP#2 K26DP#3 L25

VS

S_5

7A

E11

VS

S_5

8A

E13

VS

S_5

9A

E15

VS

S_6

0A

E17

VS

S_6

1A

E19

VS

S_6

2A

E22

VS

S_6

3A

E24

OPTIMIZED/COMPAT# AE26

VS

S_6

5A

E7

VS

S_6

6A

E9

VS

S_6

7A

F1V

SS

_68

AF1

0V

SS

_69

AF1

2V

SS

_70

AF1

4V

SS

_71

AF1

6V

SS

_72

AF1

8V

SS

_73

AF2

0

SK

TOC

C#

AF2

6

VS

S_7

5A

F6V

SS

_76

AF8

VS

S_7

7B

10V

SS

_78

B12

VS

S_7

9B

14V

SS

_80

B16

VS

S_8

1B

18V

SS

_82

B20

VS

S_8

3B

23V

SS

_84

B26

VS

S_8

5B

4V

SS

_86

B8

VS

S_8

7C

11V

SS

_88

C13

VS

S_8

9C

15V

SS

_90

C17

VS

S_9

1C

19V

SS

_92

C2

VS

S_9

3C

22V

SS

_94

C25

VS

S_9

5C

5V

SS

_96

C7

VS

S_9

7C

9V

SS

_98

D10

VS

S_9

9D

12V

SS

_100

D14

VS

S_1

01D

16V

SS

_102

D18

VS

S_1

03D

20V

SS

_104

D21

VS

S_1

05D

24V

SS

_106

D3

VS

S_1

07D

6V

SS

_108

D8

VS

S_1

09E

1V

SS

_110

E11

VS

S_1

11E

13V

SS

_112

E15

VS

S_1

13E

17V

SS

_114

E19

VS

S_1

15E

23V

SS

_116

E26

VS

S_1

17E

4V

SS

_118

E7

VS

S_1

19E

9V

SS

_120

F10

VS

S_1

21F1

2V

SS

_122

F14

VS

S_1

23F1

6V

SS

_124

F18

VS

S_1

25F2

VS

S_1

26F2

2V

SS

_127

F25

VS

S_1

28F5

VID

0A

E5

VID

1A

E4

VID

2A

E3

VID

3A

E2

VID

4A

E1

GTLREF0 AA21GTLREF1 AA6GTLREF2 F20GTLREF3 F6

NC1 A22NC2 A7

TESTHI0 AD24TESTHI1 AA2TESTHI2 AC21TESTHI3 AC20TESTHI4 AC24TESTHI5 AC23TESTHI6 AA20TESTHI7 AB22TESTHI8 U6TESTHI9 W4

TESTHI10 Y3TESTHI11 A6

VS

S_1

29F8

VS

S_1

30G

21V

SS

_131

G24

VS

S_1

32G

3V

SS

_133

G6

VS

S_1

34J2

VS

S_1

35J2

2V

SS

_136

J25

VS

S_1

37J5

VS

S_1

38K

21V

SS

_139

K24

VS

S_1

40K

3V

SS

_141

K6

VS

S_1

42L1

VS

S_1

43L2

3V

SS

_144

L26

VS

S_1

45L4

VS

S_1

46M

2V

SS

_147

M22

VS

S_1

48M

25V

SS

_149

M5

VS

S_1

50N

21V

SS

_151

N24

VS

S_1

52N

3V

SS

_153

N6

VS

S_1

54P

2V

SS

_155

P22

VS

S_1

56P

25V

SS

_157

P5

VS

S_1

58R

1V

SS

_159

R23

VS

S_1

60R

26V

SS

_161

R4

VS

S_1

62T2

1V

SS

_163

T24

VS

S_1

64T3

VS

S_1

65T6

VS

S_1

66U

2V

SS

_167

U22

VS

S_1

68U

25V

SS

_169

U5

VS

S_1

70V

1V

SS

_171

V23

VS

S_1

72V

26V

SS

_173

V4

VS

S_1

74W

21V

SS

_175

W24

VS

S_1

76W

3V

SS

_177

W6

VS

S_1

78Y

2V

SS

_179

Y22

VS

S_1

80Y

25V

SS

_181

Y5

BSEL0AD6BSEL1AD5

BPM#0AC6BPM#1AB5BPM#2AC4BPM#3Y6BPM#4AA5BPM#5AB4

DSTBN#0 E22DSTBN#1 K22DSTBN#2 R22DSTBN#3 W22

DSTBP#0 F21DSTBP#1 J23DSTBP#2 P23DSTBP#3 W23

ITP_CLK0AC26ITP_CLK1AD26

ADSTB#0 L5ADSTB#1 R5

DBI#0 E21DBI#1 G25DBI#2 P26DBI#3 V21

DBR# AE25

VCCIOPLLAD20

VCCSENSEA5

VCCAAE23

VC

CV

IDA

F4

THERMTRIP#A2

PROCHOT# C3MCERR# V6

SLP# AB26VSSAAD22

VSSSENSEA4

VID

PW

RG

DA

D2

VID

5A

D3

NC5 AE21NC4 AF24NC3 AF25

VCCVIDLBAF3

R381680_0402_5%~D

1 2

R 380 0_0402_5%~D@1 2

R 341 62_0402_5%1 2

R37747_0402_5%~D@

12

R 83 62_0402_5%@1 2

R350 62_0402_5%1 2

T1P AD@

R 343 62_0402_5%1 2

R357

200_0603_1%~D

12

L40 10U_LQH31MN100K01_100mA_10%_1206~D1 2

R 37 1K_0402_5%~D1 2

R 87 300_0402_5%~D1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+ VCC_CORE

+VCC_CORE

+VCC_CORE

+VCC_CORE

+VCC_CORE

+ VCC_CORE

+VCC_CORE

Title

Size Document Number R e v

Date: Sheet o f

LA-1711 X02-D

CPU DecouplingC

9 60Wednesday, July 23, 2003

Place 11 North of Socket(Stuff 6)

Place 12 Inside Socket(Stuff all)

Place 9 South of Socket(Unstuff all)

Compal Electronics, Inc.

Decoupling Reference Requirement:560uF Polymer, ESR:5m ohm(each) * 1022uF X5R * 32

Decoupling Reference Document:Springdale Chipset Platform Design guide Rev1.11(12474)page239

22uF depop referenceSpringdale Chipset Platform Design Guide Rev1.11(12474)

470uF _ERS10m ohm* 15, ESR=0.5m ohm

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

22uF depop referenceSpringdale Chipset Platform Design Guide Rev1.2(12837)Inside the socket cavity 12 pcs (all stuffed)North side 12pcs (4 sites stuffed)Delete south side

Note:For PT-phaseC33122U_1206_6.3VAM~D@

1

2

C 3122U_1206_6.3VAM~D

1

2

+ C295470U_D4_2.5V_R10M~D

1

2

+ C301470U_D4_2.5V_R10M~D@

1

2

C39522U_1206_6.3VAM~D

1

2

+ C302470U_D4_2.5V_R10M~D

1

2

C38222U_1206_6.3VAM~D

1

2

+ C296470U_D4_2.5V_R10M~D@

1

2

C 3222U_1206_6.3VAM~D @

1

2

C 4522U_1206_6.3VAM~D

1

2

C39422U_1206_6.3VAM~D

1

2

C 41122U_1206_6.3VAM~D

1

2

+ C294470U_D4_2.5V_R10M~D

1

2

C 3022U_1206_6.3VAM~D

1

2

C 2722U_1206_6.3VAM~D@

1

2

+ C 68470U_D4_2.5V_R10M~D

1

2

C 7322U_1206_6.3VAM~D@

1

2

C 7222U_1206_6.3VAM~D@

1

2

C 4622U_1206_6.3VAM~D

1

2

+ C 303470U_D4_2.5V_R10M~D

1

2

C 7022U_1206_6.3VAM~D@

1

2

C38122U_1206_6.3VAM~D

1

2

+ C 297470U_D4_2.5V_R10M~D@

1

2

C 5522U_1206_6.3VAM~D

1

2

C 7622U_1206_6.3VAM~D@

1

2

C 40422U_1206_6.3VAM~D

1

2

C 7722U_1206_6.3VAM~D@

1

2

+ C 299470U_D4_2.5V_R10M~D@

1

2

C 2822U_1206_6.3VAM~D

1

2

+ C 305470U_D4_2.5V_R10M~D

1

2

+ C300470U_D4_2.5V_R10M~D

1

2

C 2922U_1206_6.3VAM~D

1

2

C 7422U_1206_6.3VAM~D@

1

2

+ C304470U_D4_2.5V_R10M~D

1

2

+ C423470U_D4_2.5V_R10M~D@

1

2

C 7122U_1206_6.3VAM~D@

1

2

C 5622U_1206_6.3VAM~D

1

2

+ C298470U_D4_2.5V_R10M~D

1

2

C40322U_1206_6.3VAM~D

1

2

+ C422470U_D4_2.5V_R10M~D

1

2

C41222U_1206_6.3VAM~D

1

2

C 6922U_1206_6.3VAM~D@

1

2

C 7522U_1206_6.3VAM~D@

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_REQ#4

H_REQ#0

H_REQ#2H_REQ#1

H_REQ#3

H_D#11

H_D#23

H_D#46

H_D#21

H _D#2

H_D#50

H_D#31

H_D#37

H_D#58

H_D#35

H_D#39

H_D#27

H _D#5

H_D#52

H_D#30

H _D#8

H_D#10

H_D#51

H_D#44

H_D#60

H_D#18

H _D#4

H_D#43

H_D#56

H_D#59

H_D#14

H_D#63

H_D#28

H_D#48

H _D#3

H_D#62

H_D#34

H_D#36

H_D#24

H_D#13

H_D#55

H_D#57

H_D#22

H_D#20

H_D#16

H_D#29

H _D#9

H _D#1H _D#0

H_D#53

H_D#17

H_D#26

H_D#45

H_D#33

H_D#40

H _D#7

H_D#47

H_D#41

H_D#25

H_D#38

H_D#15

H_D#54

H_D#61

H_D#49

H_D#42

H _D#6

H_D#32

H_D#12

H_D#19

H_A#26

H_A#19

H_A#11

H_A#25

H_A#22

H_A#18

H_A#7

H_A#20

H_A#14

H_A#21

H_A#27

H_A#23

H_A#12

H_A#30H_A#29

H_A#16

H_A#4

H_A#6

H_A#10H_A#9

H_A#28

H_A#5

H_A#31

H_A#15

H_A#24

H_A#3

H_A#17

H_A#8

H_A#13

H_RS#2

H_RS#0H_RS#1

HD_ SWING

HD_ SWING

HD RCOMP

HD RCOMP

H_PROCHOT#

H_PROCHOT#

+GMCH_GTLREF

+VTT_GMCH

+GMCH_GTLREF

+CPU_GMCH_GTLREF

+VTT_GMCH

+ 3VRUN

+ VCC_CORE

H_REQ#[0..4]<7>

H_HITM#<7>

H_ BNR#<7>

H_DRDY#<8>

H_D BSY#<8>

H_ADS#<7>

H _DINV#1<8>

H _DINV#2<8>

H_D#[0..63] <7>

C K_HCLK<6>

H_A#[3..31]<7>

H_ADSTB#0<8>H_ADSTB#1<8>

CK_HCLK#<6>

H_DSTBN#0<8>H_DSTBP#0<8>

H _DINV#0<8>H_DSTBP#1<8>H_DSTBN#1<8>

H_DSTBP#2<8>H_DSTBN#2<8>

H _DINV#3<8>

H_DSTBP#3<8>H_DSTBN#3<8>

H _DEFER#<7>

H_ TRDY#<8>

H_HIT#<7>H_LOCK#<7>H_BR0#<7>

H_BPRI#<7>

H_RESET#<8>H_RS#[0..2]<8> MCH_CLKSEL0 <6>MCH_CLKSEL1 <6>

H_PROCHOT# <8>

PW RGD_3V<21,37>

H_PROCHOT_SIO# <34>

VCORE_PHOT# <34,46>

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

Springdale-Host/GNDC

10 60Thursday, July 24, 2003

Compal Electronics, Inc.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

2. Place decoupling cap 220PF near GMCH.

Layout note :GTL Reference Voltage

1. +GMCH_GTLREF Trace wide12mils(min),Space 15mils.

Trace width 12mils,Space10mils

Follow Intel design guide R1.11(12474) page80

Trace width 10mils,Space7mils

Settig CPU Output

Create

R329

0_0603_5%~D

12

R 901.24K_0402_1%~D

12

GND

U3G

RG828SDGES_FCBGA932_SPRINGDALE~D

VSSL31VSSL26VSSL25VSSL24VSSK33VSSK29VSSK27VSSK25VSSK22VSSK20VSSK18VSSK16VSSK14VSSK12VSSK11VSSJ35VSSJ32VSSJ28VSSJ22VSSJ20VSSJ18VSSJ16VSSJ14VSSJ12VSSJ10VSSH33VSSH30VSSH26VSSH24VSSH22VSSH20VSSH18VSSH16VSSH14VSSH12VSSH9VSSH8VSSH5VSSH2VSSG35VSSG31VSSG28VSSF26VSSF24VSSF22VSSF20VSSF18

VSS F16VSS F14VSS F12VSS F10VSS F8VSS F5VSS F3VSS F1VSS E3VSS E1VSS D35VSS D33VSS D31VSS D29VSS D27VSS D25VSS D23VSS D21VSS D19VSS D17VSS D15VSS D13VSS D11VSS D9VSS D1VSS C28VSS C26VSS C24VSS C22VSS C20VSS C18VSS C16VSS C14VSS C12VSS C10VSS C8VSS C4VSS A32VSS A29VSS A27VSS A25VSS A23VSS A20VSS A16VSS A13VSS A11VSS A9VSS A7

C366220P_0402_50V7K

1

2

R605

0_0402_5%~D@

1 2

Q24

MMBT3904_SOT23~D

2

31

R 323

200_0603_1%~D

12

R33520_0603_1%~D

12

R331301_0402_1%~D

12

C365

0.01U_0402_16V7K~D

1

2

R 91 10K_0402_5%~D1 2

GND

U3F

RG828SDGES_FCBGA932_SPRINGDALE~D

VSSAR32VSSAR29VSSAR27VSSAR25VSSAR23VSSAR20VSSAR16VSSAR13VSSAR11VSSAR9VSSAN32VSSAN30VSSAN28VSSAN26VSSAN24VSSAN22VSSAN20VSSAN18VSSAN16VSSAN14VSSAN12VSSAN10VSSAM35VSSAM29VSSAM27VSSAM25VSSAM23VSSAM21VSSAM19VSSAM17VSSAM15VSSAM13VSSAM11VSSAM9VSSAL32VSSAL1VSSAK28VSSAK26VSSAK24VSSAK22VSSAK20VSSAK18VSSAK16VSSAK14VSSAK12VSSAK10VSSAK8VSSAK3VSSAJ35VSSAJ32VSSAJ9VSSAJ4VSSAJ1VSSAH33VSSAH30VSSAH24VSSAH22VSSAH20VSSAH18VSSAH16VSSAH14VSSAH12VSSAH10VSSAH6VSSAH3VSSAG35VSSAG32VSSAG28VSSAG26VSSAG24VSSAG22VSSAG20VSSAG18VSSAG16VSSAG14VSSAG8VSSAG4VSSAF33VSSAF30VSSAF25VSSAF24VSSAF22VSSAF20VSSAF18VSSAF16VSSAF14VSSAF11VSSAF9VSSAF6VSSAF3VSSAE35VSSAE32VSSAE26VSSAE25VSSAE13VSSAE12

VSS AE11VSS AE10VSS AE4VSS AE1VSS AD33VSS AD30VSS AD28VSS AD10VSS AD9VSS AD8VSS AD6VSS AD3VSS AC35VSS AC32VSS AC4VSS AC1VSS AB33VSS AB30VSS AB28VSS AB27VSS AB26VSS AB10VSS AB9VSS AB8VSS AB6VSS AB3VSS AA32VSS AA4VSS AA1VSS Y35VSS Y33VSS Y30VSS Y28VSS Y27VSS Y26VSS Y10VSS Y9VSS Y8VSS Y6VSS Y3VSS W32VSS W18VSS W17VSS W4VSS V33VSS V30VSS V28VSS V27VSS V26VSS V19VSS V17VSS V10VSS V9VSS V8VSS V6VSS V3VSS U32VSS U19VSS U18VSS U4VSS T35VSS T33VSS T30VSS T28VSS T27VSS T26VSS T10VSS T9VSS T8VSS T6VSS T3VSS T1VSS R32VSS R4VSS R1VSS P33VSS P30VSS P28VSS P27VSS P26VSS P9VSS P8VSS P6VSS P3VSS N35VSS N32VSS N4VSS N1VSS M33VSS M30VSS M28VSS M27VSS M26VSS M6VSS M3VSS L35

R332102_0402_1%~D

12

FSB

U 3A

RG828SDGES_FCBGA932_SPRINGDALE~D

HA3#D26HA4#D30HA5#L23HA6#E29HA7#B32HA8#K23HA9#C30HA10#C31HA11#J25HA12#B31HA13#E30HA14#B33HA15#J24HA16#F25HA17#D34HA18#C32HA19#F28HA20#C34HA21#J27HA22#G27HA23#F29HA24#E28HA25#H27HA26#K24HA27#E32HA28#F31HA29#G30HA30#J26HA31#G26

HREQ0#B29HREQ1#J23HREQ2#L22HREQ3#C29HREQ4#J21HADSTB0#B30HADSTB1#D28

HCLKPB7HCLKNC7

HDSTBP0#B19HDSTBN0#C19DINV0#C17HDSTBP1#L19HDSTBN1#K19DINV1#L17HDSTBP2#G9HDSTBN2#F9DINV2#L14HDSTBP3#D12HDSTBN3#E12DINV3#C15

ADS#F27HTRDY#D24DRDY#G24DEFER#L21HITM#E23HIT#K21HLOCK#E25BREQ0#B24BNR#B28BPRI#B26DBSY#E27RS0#G22RS1#C27RS2#B27CPURST#E8PWROK#AE14

HDRCOMPE24HDSWINGC25HDVREFF23

HD0# B23HD1# E22HD2# B21HD3# D20HD4# B22HD5# D22HD6# B20HD7# C21HD8# E18HD9# E20

HD10# B16HD11# D16HD12# B18HD13# B17HD14# E16HD15# D18HD16# G20HD17# F17HD18# E19HD19# F19HD20# J17HD21# L18HD22# G16HD23# G18HD24# F21HD25# F15HD26# E15HD27# E21HD28# J19HD29# G14HD30# E17HD31# K17HD32# J15HD33# L16HD34# J13HD35# F13HD36# F11HD37# E13HD38# K15HD39# G12HD40# G10HD41# L15HD42# E11HD43# K13HD44# J11HD45# H10HD46# G8HD47# E9HD48# B13HD49# E14HD50# B14HD51# B12HD52# B15HD53# D14HD54# C13HD55# B11HD56# D10HD57# C11HD58# E10HD59# B10HD60# C9HD61# B9HD62# D8HD63# B8

PROCHOT# L20

BSEL0 L13BSEL1 L12

C 670

100P_0402_50V8J~D

12

R608

0_0402_5%~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DD RA_SDQ2

D DRA_SDQ33

D DRA_SDQ56

D DRA_SDQ26

DD RA_SDQ0

D DRA_SDQ21D DRA_SDQ22

D DRA_SDQ12

DD RA_SDQ3

D DRA_SDQ14

DDRA_SMA3

D DRA_SDQ29

DDRA_SMA7

D DRA_SDQ62

D DRA_SDQ18

D DRA_SDQ38

D DRA_SDQ17

D DRA_SDQ34

D DRA_SDQ40

D DRA_SDQ23

D DRA_SDQ27

D DRA_SDQ41

D DRA_SDQ46

DD RA_SDQ1

D DRA_CKE1

DDRA_SMA2

D DRA_SDQ60D DRA_SDQ59D DRA_SDQ58

D DRA_SDQ61

DD RA_SDQ4

D DRA_SDQ57

D DRA_SDQ43

D DRA_CKE0

D DRA_SDQ52

D DRA_SDQ39

DD RA_SDQ7

DDRA_SMA0DDRA_SMA1

D DRA_SDQ47

DD RA_SDQ6

D DRA_SDQ31

D DRA_SDQ15

D DRA_SDQ45

D DRA_SDQ20

DDRA_SMA10

DDRA_SMA6

DDRA_SMA[0..12]

D DRA_SDQ37

D DRA_SDQ10

DD RA_SDQ5

D DRA_SDQ50

D DRA_SDQ16

DD RA_SDQ9

D DRA_SDQ13

D DRA_SCS#1

DD RA_SDQ8

D DRA_SDQ30

D DRA_SDQ51

D DRA_SDQ24

DDRA_SMA5

D DRA_SDQ35

DDRA_SMA12

DDRA_SMA9

D DRA_SDQ25

D DRA_SDQ54

D DRA_SDQ42

D DRA_SDQ28

D DRA_SDQ63

D DRA_SDQ48D DRA_SDQ49

D DRA_SDQ55

DDRA_SDQ[0..63]

D DRA_SDQ36

D DRA_SDQ32

D DRA_SDQ53

D DRA_SDQ19

D DRA_SCS#0

D DRA_SDQ44

D DRA_SDQ11

DDRA_SMA4

DDRA_SMA8

DDRA_SMA11

D DRB_SDQ52

D DRB_SDQ48

D DRB_SDQ45

D DRB_SDQ25

DD RB_SDQ1

DDRB_SMA1

D DRB_SDQ43

D DRB_SDQ28

D DRB_SDQ16

D DRB_SDQ15

DD RB_SDQ7

D DRB_SDQ31

D DRB_SDQ26

D DRB_SDQ13D DRB_SDQ12

D DRB_SDQ10

DDRB_SMA4

D DRB_SDQ60

D DRB_SDQ50

D DRB_SDQ46

D DRB_SDQ39

DDRB_SMA6

DDRB_SDQ[0..63]

D DRB_SDQ18

DD RB_SDQ6

DD RB_SDQ4

DDRB_SMA12

D DRB_SCS#0

D DRB_SDQ55

D DRB_SDQ49

D DRB_SDQ38

D DRB_SDQ27

DDRB_SMA10DDRB_SMA11

D DRB_SDQ51

D DRB_SDQ44

D DRB_SDQ35

D DRB_SDQ30

D DRB_SDQ22

D DRB_SDQ17

DD RB_SDQ0

DDRB_SMA7

DDRB_SMA5

D DRB_SDQ62

D DRB_SDQ14

DD RB_SDQ3DD RB_SDQ2

DDRB_SMA2

DDRB_SMA9

D DRB_SCS#1

D DRB_SDQ58

D DRB_SDQ24

D DRB_SDQ54

D DRB_SDQ47

D DRB_SDQ19

DDRB_SMA0

D DRB_SDQ42

D DRB_SDQ40

DDRB_SMA[0..12]

D DRB_SDQ36

D DRB_SDQ29

DDRB_SMA3

D DRB_SDQ63

D DRB_SDQ34

D DRB_SDQ21

DDRB_SMA8

D DRB_SDQ61

D DRB_SDQ59

D DRB_SDQ56

D DRB_SDQ33

D DRB_SDQ20

D DRB_SDQ53

D DRB_SDQ41

D DRB_SDQ32

D DRB_SDQ23

DD RB_SDQ9DD RB_SDQ8

D DRB_SDQ57

D DRB_SDQ37

D DRB_SDQ11

DD RB_SDQ5

D DRB_CKE0D DRB_CKE1

SMYRCOMPVOH

SMYRCOMPVOH

SMYRCOMPVOL

SMYRCOMPVOL

SMXRCOMPVOH

SMXRCOMP

SMXRCOMPVOH

SMXRCOMPVOL

SMXRCOMPVOL

SMYRCOMP

SMXRCOMP

SMYRCOMP

+2.5V_MEM+2.5V_MEM

+2.5V_MEM SM_VREF_BSM_VREF_A

+2.5V_MEM

+2.5V_MEM+2.5V_MEM

+2.5V_MEM

DDRA_SMA[0..12]<15,17>

DDRA_SDQ[0..63] <15,17>

DD RA_SWE#<15,17>D DRA_SCAS#<15,17>D DRA_SRAS#<15,17>

DDRA_SBS0<15,17>DDRA_SBS1<15,17>

D DRA_CLK0<15>DDRA_CLK0#<15>D DRA_CLK1<15>DDRA_CLK1#<15>D DRA_CLK2<15>DDRA_CLK2#<15>

DDRB_SMA[0..12]<16,17>

DDRB_SBS1<16,17>

DD RB_SWE#<16,17>

DDRB_SBS0<16,17>

D DRB_SRAS#<16,17>D DRB_SCAS#<16,17>

D DRB_CLK1<16>DDRB_CLK1#<16>

DDRB_CLK2#<16>

D DRB_CLK0<16>

D DRB_CLK2<16>

DDRB_CLK0#<16>

DDRB_SDQ[0..63] <16,17>

DD RA_SDQS0 <15,17>DDRA_SDM0 <15,17>

DDRA_SDM1 <15,17>DD RA_SDQS1 <15,17>

DDRA_SDM2 <15,17>DD RA_SDQS2 <15,17>

DDRA_SDM3 <15,17>DD RA_SDQS3 <15,17>

DDRA_SDM4 <15,17>DD RA_SDQS4 <15,17>

DDRA_SDM5 <15,17>DD RA_SDQS5 <15,17>

DDRA_SDM6 <15,17>DD RA_SDQS6 <15,17>

DDRA_SDM7 <15,17>DD RA_SDQS7 <15,17>

DDRB_SDM0 <16,17>D DRB_SDQS0 <16,17>

D DRB_SDQS1 <16,17>DDRB_SDM1 <16,17>

D DRB_SDQS2 <16,17>DDRB_SDM2 <16,17>

D DRB_SDQS3 <16,17>DDRB_SDM3 <16,17>

D DRB_SDQS4 <16,17>DDRB_SDM4 <16,17>

D DRB_SDQS5 <16,17>DDRB_SDM5 <16,17>

D DRB_SDQS6 <16,17>DDRB_SDM6 <16,17>

D DRB_SDQS7 <16,17>DDRB_SDM7 <16,17>

D DRA_SCS#0<15,17>D DRA_SCS#1<15,17>

DDRB_SCS#0<16,17>DDRB_SCS#1<16,17>

D DRA_CKE0<15,17>D DRA_CKE1<15,17>

D DRB_CKE0<16,17>D DRB_CKE1<16,17>

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

Springdale-DDR InterfaceC

11 60Wednesday, July 23, 2003

Compal Electronics, Inc.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

Trace width of 12milsand space 10mils(min)

Trace width of 12mils and space10mils(min)

Trace width of 12mils and space10mils(min)

Trace width of 12mils and space10mils(min)

Trace width of 12mils and space10mils(min)

Trace width of 12mils and space10mils(min)

Close to GMCH <1" Close to GMCH <1"

Close to GMCH <1" Close to GMCH <1"

Close to GMCH

Close to GMCH

SM_VREF_A trace width of 12mils and space12mils(min)

SM_VREF_B trace width of12mils and space12mils(min)

*

*

*

*

Follow Intel design guideR1.11(12474) page124,125

Note: Intel recommend is 31.12K,the value isn't popularize.Follow Dell's DT team use 30.9K

R10942.2_0603_1%~D

12

R37410K_0603_1%~D

12

C 66

2.2U_0805_16VFZ~D 1

2

C6360.01U_0402_16V7K~D

1

2

R11042.2_0603_1%~D

12

C 611U_0603_6.3V6M~D

1

2

DDR

Channel

A

U 3B

RG828SDGES_FCBGA932_SPRINGDALE~D

SMAA_A0AJ34SMAA_A1AL33SMAA_A2AK29SMAA_A3AN31SMAA_A4AL30SMAA_A5AL26SMAA_A6AL28SMAA_A7AN25SMAA_A8AP26SMAA_A9AP24SMAA_A10AJ33SMAA_A11AN23SMAA_A12AN21

SMAB_A1AL34SMAB_A2AM34SMAB_A3AP32SMAB_A4AP31SMAB_A5AM26

SWE_A#AB34SCAS_A#Y34SRAS_A#AC33

SBA_A0AE33SBA_A1AH34

SCS_A0#AA34SCS_A1#Y31SCS_A2#Y32SCS_A3#W34

SCKE_A0AL20SCKE_A1AN19SCKE_A2AM20SCKE_A3AP20

SCMDCLK_A0AK32SCMDCLK_A0#AK31SCMDCLK_A1AP17SCMDCLK_A1#AN17SCMDCLK_A2N33SCMDCLK_A2#N34SCMDCLK_A3AK33SCMDCLK_A3#AK34SCMDCLK_A4AM16SCMDCLK_A4#AL16SCMDCLK_A5P31SCMDCLK_A5#P32

SMVREF_AE34

SMXRCOMPAK9

SMXRCOMPVOHAN9

SMXRCOMPVOLAL9

SDQS_A0 AN11SDM_A0 AP12SDQ_A0 AP10SDQ_A1 AP11SDQ_A2 AM12SDQ_A3 AN13SDQ_A4 AM10SDQ_A5 AL10SDQ_A6 AL12SDQ_A7 AP13

SDQS_A1 AP15SDM_A1 AP16

SDQ_A8 AP14SDQ_A9 AM14

SDQ_A10 AL18SDQ_A11 AP19SDQ_A12 AL14SDQ_A13 AN15SDQ_A14 AP18SDQ_A15 AM18

SDQS_A2 AP23SDM_A2 AM24

SDQ_A16 AP22SDQ_A17 AM22SDQ_A18 AL24SDQ_A19 AN27SDQ_A20 AP21SDQ_A21 AL22SDQ_A22 AP25SDQ_A23 AP27

SDQS_A3 AM30SDM_A3 AP30

SDQ_A24 AP28SDQ_A25 AP29SDQ_A26 AP33SDQ_A27 AM33SDQ_A28 AM28SDQ_A29 AN29SDQ_A30 AM31SDQ_A31 AN34

SDQS_A4 AF34SDM_A4 AF31

SDQ_A32 AH32SDQ_A33 AG34SDQ_A34 AF32SDQ_A35 AD32SDQ_A36 AH31SDQ_A37 AG33SDQ_A38 AE34SDQ_A39 AD34

SDQS_A5 V34SDM_A5 W33

SDQ_A40 AC34SDQ_A41 AB31SDQ_A42 V32SDQ_A43 V31SDQ_A44 AD31SDQ_A45 AB32SDQ_A46 U34SDQ_A47 U33

SDQS_A6 M32SDM_A6 M34

SDQ_A48 T34SDQ_A49 T32SDQ_A50 K34SDQ_A51 K32SDQ_A52 T31SDQ_A53 P34SDQ_A54 L34SDQ_A55 L33

SDQS_A7 H31SDM_A7 H32

SDQ_A56 J33SDQ_A57 H34SDQ_A58 E33SDQ_A59 F33SDQ_A60 K31SDQ_A61 J34SDQ_A62 G34SDQ_A63 F34

R10510K_0603_1%~D

12

R10210K_0603_1%~D

12

R36930.9K_0603_1%~D

12

R10130.9K_0603_1%~D

12

C 571U_0603_6.3V6M~D

1

2

C4000.01U_0402_16V7K~D

1

2

R100

150_0603_1%~D

12

R36742.2_0603_1%~D

12

C6370.01U_0402_16V7K~D

1

2

R 37330.9K_0603_1%~D

12

R104

150_0603_1%~D

12

C 63

2.2U_0805_16VFZ~D 1

2

C 4010.01U_0402_16V7K~D

1

2

DDR

Channel

B

U 3C

RG828SDGES_FCBGA932_SPRINGDALE~D

SMAA_B0AG31SMAA_B1AJ31SMAA_B2AD27SMAA_B3AE24SMAA_B4AK27SMAA_B5AG25SMAA_B6AL25SMAA_B7AF21SMAA_B8AL23SMAA_B9AJ22SMAA_B10AF29SMAA_B11AL21SMAA_B12AJ20

SMAB_B1AE27SMAB_B2AD26SMAB_B3AL29SMAB_B4AL27SMAB_B5AE23

SWE_B#W27SCAS_B#W31SRAS_B#W26

SBA_B0Y25SBA_B1AA25

SCS_B0#U26SCS_B1#T29SCS_B2#V25SCS_B3#W25

SCKE_B0AK19SCKE_B1AF19SCKE_B2AG19SCKE_B3AE18

SCMDCLK_B0AG29SCMDCLK_B0#AG30SCMDCLK_B1AF17SCMDCLK_B1#AG17SCMDCLK_B2N27SCMDCLK_B2#N26SCMDCLK_B3AJ30SCMDCLK_B3#AH29SCMDCLK_B4AK15SCMDCLK_B4#AL15SCMDCLK_B5N31SCMDCLK_B5#N30

SMVREF_BAP9

SMYRCOMPAA33

SMYRCOMPVOHR34

SMYRCOMPVOLR33

SDQS_B0 AF15SDM_B0 AG11SDQ_B0 AJ10SDQ_B1 AE15SDQ_B2 AL11SDQ_B3 AE16SDQ_B4 AL8SDQ_B5 AF12SDQ_B6 AK11SDQ_B7 AG12

SDQS_B1 AG13SDM_B1 AG15

SDQ_B8 AE17SDQ_B9 AL13

SDQ_B10 AK17SDQ_B11 AL17SDQ_B12 AK13SDQ_B13 AJ14SDQ_B14 AJ16SDQ_B15 AJ18

SDQS_B2 AG21SDM_B2 AE21

SDQ_B16 AE19SDQ_B17 AE20SDQ_B18 AG23SDQ_B19 AK23SDQ_B20 AL19SDQ_B21 AK21SDQ_B22 AJ24SDQ_B23 AE22

SDQS_B3 AH27SDM_B3 AJ28

SDQ_B24 AK25SDQ_B25 AH26SDQ_B26 AG27SDQ_B27 AF27SDQ_B28 AJ26SDQ_B29 AJ27SDQ_B30 AD25SDQ_B31 AF28

SDQS_B4 AD29SDM_B4 AC31

SDQ_B32 AE30SDQ_B33 AC27SDQ_B34 AC30SDQ_B35 Y29SDQ_B36 AE31SDQ_B37 AB29SDQ_B38 AA26SDQ_B39 AA27

SDQS_B5 U30SDM_B5 U31

SDQ_B40 AA30SDQ_B41 W30SDQ_B42 U27SDQ_B43 T25SDQ_B44 AA31SDQ_B45 V29SDQ_B46 U25SDQ_B47 R27

SDQS_B6 L27SDM_B6 M29

SDQ_B48 P29SDQ_B49 R30SDQ_B50 K28SDQ_B51 L30SDQ_B52 R31SDQ_B53 R26SDQ_B54 P25SDQ_B55 L32

SDQS_B7 J30SDM_B7 J31

SDQ_B56 K30SDQ_B57 H29SDQ_B58 F32SDQ_B59 G33SDQ_B60 N25SDQ_B61 M25SDQ_B62 J29SDQ_B63 G32

C 64

2.2U_0805_16VFZ~D 1

2

C 53

2.2U_0805_16VFZ~D 1

2

C 62

2.2U_0805_16VFZ~D 1

2

C4061U_0603_6.3V6M~D

1

2C4071U_0603_6.3V6M~D

1

2

C 50

0.1U_0402_16V4Z~D 1

2

C 48

2.2U_0805_16VFZ~D 1

2C 47

0.1U_0402_16V4Z~D 1

2

C 65

2.2U_0805_16VFZ~D 1

2

R10630.9K_0603_1%~D

12

C 540.01U_0402_16V7K~D

1

2R 36810K_0603_1%~D

12

C 59

2.2U_0805_16VFZ~D 1

2

C 52

2.2U_0805_16VFZ~D 1

2

C 580.01U_0402_16V7K~D

1

2

R37242.2_0603_1%~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

G_AD4

G_SBA#2

G_SBA#7

G_C/BE#3

G_PAR

CK_66M_MCH G_AD3

G_AD13

G_AD22

G_SBA#1

G_ST1

HUB_HL10

G_SBA#0

G_SBA#3

G_SBA#6

G_AD0G_AD1

G_AD28

G_AD30

H UB_HL5

H UB_HL9

G_AD27

G_ST2

H UB_HL1

G_AD8

G_AD17

G_AD11G_AD12

G_AD16

G_AD24

G_C/BE#1

G_AD5G_AD6

H UB_HL6

G_AD15

G_AD29

G_C/BE#2

H UB_HL3

H UB_HL8

G_AD2

G_AD7

G_AD20

G_AD26

G_ST0

H UB_HL4

G_AD18

G_AD23

G_SBA#5

G_AD14

H UB_HL0

H UB_HL2

CK_66M_MCH

G_AD25

G_C/BE#0

G_AD19

G_AD31

G_SBA#4

H UB_HL7

G_AD9G_AD10

G_AD21

GRCOMP

GRCOMP

GC_DET_REF

AGP_SWINGVR EFGC

AGP_SWING

HI_RCOMP_MCH

HI_RCOMP_MCHH I_SWING_MCHHI_VREF_MCH

H I_SWING_MCH

HI_VREF_MCH

CI_SWING_GMCHCI_VREF_GMCH

CI_SWING_GMCH

CI_VREF_GMCH

VR EFCG

G_PAR

+1.5VRUN

+1.5VRUN +12V +1.5VRUN

+1.5VRUN

+1.5VRUN

+1.5VRUN

+1.5VRUN

+1.5VRUN

G_SB_STBF <18>

HUB_HL[0..10]<20>

G_GNT#<18>

G_DEVSEL#<18>

G _WBF#<18>G _RBF#<18>

HUB_HLSTRS<20>

G_AD[0..31] <18>

G_SB_STBS# <18>

G_C/BE#[0..3]<18>

G_PIPE#_DBI_HI<18>G_DBI_LO<18>

CK_66M_MCH<6>

HUB_HLSTRF<20>

G_AD_STBS0# <18>

G_AD_STBF1 <18>

G_FRAME#<18>

G_ST[0..2]<18>

G_IR DY#<18>

G_REQ#<18>

G_AD_STBF0 <18>

G_AD[0..31] <18>G_AD_STBS1# <18>

G_SBA#[0..7] <18>

G _PAR<18>

G _TRDY#<18>G_STOP#<18>

AGP8X_DET_GC<18>

PCI_PCIRST#<20,36>

VRE FCG <18>VR EFGC <18>

ICH_S YNC#<21>

Title

Size Document Number R e v

Date: Sheet o f

LA-1711 X02-D

Springdale-AGP/HUB/VGA/CSAC

12 60Wednesday, July 23, 2003

Close to GMCH ball <250mils

Close to GMCH ball <250mils

Note:CI_SWING_MCH, CI_VREF_MCHtrace width of 12mils andspace 20mils

Note:Springdale Customer Schematic R1.2 page18AGP_SWING only had 0.1u cap ; But Springdale Chipset Platform Designguide Rev1.11(12474) page138 had a 0.01uf cap. need confirm with Intel.

Close GMCH ball less than 250mils

Follow Springdale Chipset Platform Design guide Rev1.11(12474)

Close to VGA Conn.

Close GMCH ballless than250mils

0.8V

0.35V

Analog RGB/CRT guidelines for Springdale-P

1: External AGP0: Internal Graphics

Trace 10mils, space 7mils

Note:HI_SWING_MCH, trace width of12mils and space 10mils

Note:HI_VREF_MCH trace width of10mils and space 7mils

Note:AGP_SWING_MCH, trace width of12mils and space 10mils

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

R 39 0_0402_5%~D12

C385 0.1U_0402_16V4Z~D

12

R 458.2K_0402_5%~D

12

C362

0.01U_0402_16V7K~D

1

2

R 74

226_0603_1%~D

12

R 488.2K_0402_5%~D

12

R 75

147_0603_1%~D

12

C360

0.1U_0402_16V4Z~D 1

2

R 66 0_0402_5%~D12

C32410P_0402_50V8J~D@

1

2

C355

0.1U_0402_16V4Z~D 1

2

R 69

113_0603_1%

12

R 55

39.2_0603_1%~D

1 2

R 68

147_0603_1%~D

12

R32022_0402_5%~D @

12

R 5839.2_0603_1%~D

12

C 43

0.1U_0402_16V4Z~D 1

2

C3630.01U_0402_16V7K~D

1

2

R 43 0_0402_5%~D12

R 38 0_0402_5%~D12

R328

52.3_0603_1%~D

12

C3610.01U_0402_16V7K~D

1

2R 57 100_0603_1%~D

1 2

R 41 0_0402_5%~D12

C 38

0.1U_0402_16V4Z~D 1

2

Q10

MMBT3904_SOT23~D

2

31

C3640.01U_0402_16V7K~D

1

2

G

D

SQ13

2N7002_SOT23~D

2

13

R 44 0_0402_5%~D12

C 41

0.1U_0402_16V4Z~D 1

2

VGA

AGP

HUB

CSA

U 3D

RG828SDGES_FCBGA932_SPRINGDALE~D

GCBE0Y7GCBE1W5GCBE2AA3GCBE3U2

GFRAMEU6GCLKINH4GDEVSELAB4GIRDYV11GTRDYAB5GSTOPW11GPAR/ADD_DETECTAB2GREQN6GGNTM7

GRCOMP/DVOBCGCOMPAC2GVSWINGAC3GVREFAD2

GRBFR10GWBFR9DBI_HIM4DBI_LOM5

GST0N3GST1N5GST2N2

HI0AF5HI1AG3HI2AK2HI3AG5HI4AK5HI5AL3HI6AL2HI7AL4HI8AJ2HI9AH2HI10AJ3HISTRFAH5HISTRSAH4

HI_RCOMPAD4HI_SWINGAE3HI_VREFAE2

CI0AK7CI1AH7CI2AD11CI3AF7CI4AD7CI5AC10CI6AF8CI7AG7CI8AE9CI9AH9CI10AG6CISTRFAJ6CISTRSAJ5

CI_RCOMPAG2CI_SWINGAF2CI_VREFAF4

DREFCLKG4EXTTS#AP8ICH_SYNC#AJ8RSTIN#AK4

RESERVED_1AG10RESERVED_2AG9RESERVED_3AN35RESERVED_4AP34RESERVED_5AR1

GADSTBF0 AC6GADSTBS0# AC5

GAD0 AE6GAD1 AC11GAD2 AD5GAD3 AE5GAD4 AA10GAD5 AC9GAD6 AB11GAD7 AB7GAD8 AA9GAD9 AA6

GAD10 AA5GAD11 W10GAD12 AA11GAD13 W6GAD14 W9GAD15 V7

GADSTBF1 V4GADSTBS1# V5

GAD16 AA2GAD17 Y4GAD18 Y2GAD19 W2GAD20 Y5GAD21 V2GAD22 W3GAD23 U3GAD24 T2GAD25 T4GAD26 T5GAD27 R2GAD28 P2GAD29 P5GAD30 P4GAD31 M2

GSBSTBF U11GSBSTBS# T11

GSBA0# R6GSBA1# P7GSBA2# R3GSBA3# R5GSBA4# U9GSBA5# U10GSBA6# U5GSBA7# T7

DDCA_DATA H3DDCA_CLK F2

RED F4RED# E4

GREEN H6GREEN# G5

BLUE H7BLUE# G6

HSYNC G3VSYNC E2

REFSET D2

NC_1 A3NC_2 A33NC_3 A35NC_4 AF13NC_5 AF23NC_6 AJ12NC_7 AN1NC_8 AP2NC_9 AR3

NC_10 AR33NC_11 AR35NC_12 B2NC_13 B25NC_14 B34NC_15 C1NC_16 C23NC_17 C35NC_18 E26NC_19 M31NC_20 R25

R330

226_0603_1%~D

12

R 61

10K_0402_5%~D@

12

R 6443.2_0603_1%~D

12

C 420.01U_0402_16V7K~D

1

2

C 440.01U_0402_16V7K~D

1

2

R334

113_0603_1%

12

R 42 0_0402_5%~D12

R 81

52.3_0603_1%~D

1 2

R 5960.4_0603_1%

12

R 40 0_0402_5%~D12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VTT_DCAP1VTT_DCAP2

VTT_DCAP3

VCC_AGP_DCAP1

VCC_AGP_DCAP2

VCC _DDR_DCAP5VCC _DDR_DCAP4

VCC _DDR_DCAP1

VCC _DDR_DCAP2

VCCA_FSB1 V CCA_FSB

V CCA_FSB

VCC A_DDR

VCCA_DPLLVC CA_DAC

VCCA1P5_DDR_SM

VCCA1P5_DDR_SM

+1.5VRUN

+2.5V_MEM

+VTT_GMCH

+1.5VRUN

+ 3VRUN

+1.5VRUN

+1.5VRUN

+1.5VRUN

+VTT_GMCH

+2.5V_MEM +1.5VRUN

+VTT_GMCH

+2.5V_MEM

+1.5VRUN

+2.5V_MEM

+2.5V_MEM

+1.5VRUN

+1.5VRUN

+1.5VRUN

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

Springdale-DecouplingC

13 60Wednesday, July 23, 2003

Compal Electronics, Inc.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

Trace 14mils

Trace 14mils

Trace 14mils

Close to GMCH

0.82uH, DC current of 30mAparts and close to cap

Close to GMCH

Trace 50mils, min:35mils on ball field

1uH(0.54uH-D-IN), DC current of1000mA parts and close to cap

Place near ballY11,routing tracefrom cap to ball

Place near GMCH Place near GMCH

Bulk Decopuling

Note:Placed less than 100 mils from ball

Note:Placed less than 100 mils from ball

Decoupling Reference Document:Springdale Chipset Platform Design guide Rev1.11(12474)page246,248

Place at the output of the 1.5V VR

Place between the VR and GMCH

Decoupling Reference Document:Springdale Customer Schematic R1.2 page84

C3380.1U_0402_10V6K~D@

1

2

C 288

4.7U_0805_6.3V6K~D

1

2

C284

4.7U_0805_6.3V6K~D

1

2

+ C308

470U_D4_2.5V_R10M~D

1

2

C367 0.1U_0402_10V6K~D1 2

POWER

U 3E

RG828SDGES_FCBGA932_SPRINGDALE~D

VTTF7 VTTE7 VTTE6 VTTD7 VTTD6 VTTD5 VTTC6 VTTC5 VTTB6 VTTB5

VCCA_FSBA31

VTTA21 VTTA15

VCC_DDRAA35

VCCA_DDRAL35

VCC_DDRAL6VCC_DDRAL7VCC_DDRAM1VCC_DDRAM2VCC_DDRAM3VCC_DDRAM5VCC_DDRAM6VCC_DDRAM7VCC_DDRAM8VCC_DDRAN2VCC_DDRAN4VCC_DDRAN5VCC_DDRAN6VCC_DDRAN7VCC_DDRAN8VCC_DDRAP3VCC_DDRAP4VCC_DDRAP5VCC_DDRAP6VCC_DDRAP7VCC_DDRAR15VCC_DDRAR21VCC_DDRAR31VCC_DDRAR4VCC_DDRAR5VCC_DDRAR7VCC_DDRE35VCC_DDRR35

VCC_DACG1VCC_DACG2

VCCA_AGPY11

VCCA_FSBB4VCCA_DPLLB3VCCA_DACC2

VCCA_DDRAB25VCCA_DDRAC25VCCA_DDRAC26

VCC J6VCC J7VCC J8VCC J9VCC K6VCC K7VCC K8VCC K9VCC L6VCC L7VCC L9VCC L10VCC L11VCC M8VCC M9VCC M10VCC M11VCC N9VCC N10VCC N11VCC P10VCC P11VCC R11VCC T16VCC T17VCC T18VCC T19VCC T20VCC U16VCC U17VCC U20VCC V16VCC V18VCC V20VCC W16VCC W19VCC W20VCC Y16VCC Y17VCC Y18VCC Y19VCC Y20

VCCA_AGPAG1

VCC_AGP J1VCC_AGP J2VCC_AGP J3VCC_AGP J4VCC_AGP J5VCC_AGP K2VCC_AGP K3VCC_AGP K4VCC_AGP K5VCC_AGP L1VCC_AGP L2VCC_AGP L3VCC_AGP L4VCC_AGP L5VCC_AGP Y1

VSSA_DAC D3

VTTA4

VTTA6 VTTA5

C3530.1U_0402_10V6K~D@

1

2C 421 0.1U_0402_10V6K~D

1 2

C 49 0.47U_0603_16V7K~D1 2

C354

0.1U_0402_10V6K~D

1 2

C3760.1U_0402_10V6K~D@

1

2

+ C 276

100U_D_10VM~D

1

2

C3370.1U_0402_10V6K~D

1

2

C3790.1U_0402_10V6K~D@

1

2

C2900.47U_0603_16V7K~D

1

2

+ C398100U_D_10VM~D

1

2

L34

0.82U_LQM21NNR82K10_150mA_10%_0805~D

1 2

C3470.1U_0402_10V6K~D@

1

2

R3010_0603_5%~D

12

C3510.1U_0402_10V6K~D@

1

2

C289

1U_0603_6.3V6M~D

1

2

C3590.1U_0402_10V6K~D@

1

2

C 3900.1U_0402_10V6K~D@

1

2

C3740.1U_0402_10V6K~D@

1

2

R315 0_0402_5%~D12

C3750.1U_0402_10V6K~D@

1

2

C3930.1U_0402_10V6K~D@

1

2

C3460.1U_0402_10V6K~D@

1

2

C 3870.1U_0402_10V6K~D@

1

2

C370

4.7U_0805_6.3V6K~D

1

2

R3510_0603_5%~D

12

C280

0.1U_0402_16V4Z~D 1

2

C 3190.1U_0402_10V6K~D@

1

2

C 3730.1U_0402_10V6K~D@

1

2

C 410 0.22U_0603_10V7M~D

1 2

C371 0.1U_0402_10V6K~D1 2

R314 0_0402_5%~D12

C 327

0.1U_0402_16V4Z~D 1

2

C3580.1U_0402_10V6K~D

1

2

C384

22U_1206_10V4Z~D

1

2

C 402

0.1U_0402_16V4Z~D 1

2

C3960.1U_0402_10V6K~D

1

2

L42

1U_LQH32CN1R0M11_1A_20%_1210~D

1 2

C4140.1U_0402_10V6K~D1

2

C287

4.7U_0805_6.3V6K~D

1

2

C3480.47U_0603_16V7K~D

1

2

C 419 0.22U_0603_10V7M~D

1 2

C3770.1U_0402_10V6K~D@

1

2

C3890.1U_0402_10V6K~D@

1

2

C 3560.47U_0603_16V7K~D

1

2

C3450.1U_0402_10V6K~D@

1

2

C 3800.1U_0402_10V6K~D@

1

2

C 322

10U_0805_10V4M~D

1

2

C3910.1U_0402_10V6K~D@

1

2

+ C 329470U_D4_2.5V_R10M~D

1

2

C3780.1U_0402_10V6K~D@

1

2C405 0.1U_0402_10V6K~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FAN1_VFB

FAN1TACH_ON

FAN1_TACH_FB

FAN2TACH_ON

FAN1_VOUT

FAN2_VOUT

FAN2_ONFAN2VREF

FAN1VREFFAN1_ON

FAN2_VFB

FAN2_TACH_FB

+5VRUN

+12V

+12V

+3VRUN

+5VRUN

+3VRUN+12V

+12V

FAN2_PWM<34>FAN2_TACH <34>

FAN1_TACH <34>FAN1_PWM<34>

FAN1_VOUT <25>FAN1_TACH_FB <25>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

14 60Wednesday, July 23, 2003

Compal Electronics, Inc.

FAN CONTROL

FAN2

FAN1 Control and Tachometer

FAN1

1

E 3

2222 SYMBOL(SOT23-NEW)

2

C

B

FAN2 Control and Tachometer

SI3457DV P channelVds max: +/- 30VVgs max: +/- 20VId max: 4.3A @ Vgs = -10V65mohm @ Vgs = -10V

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

+ C62247U_D_16VM_R70~D

1

2

R286100K_0402_5%~D

1 2

C6252200P_0603_50V7K~D@

1 2

D17

RB751V_SOD323~D

21

U30BLM358M_SO8~D

P8

IN+5

IN-6 G4

O 7

SG

D

Q72

SI3457DV-T1_TSOP6~D

3

624

51

R13310K_0402_5%~D

12

C117

0.1U_0402_16V4Z~D

1

2

D2

RB751V_SOD323~D

21

JFAN2

MOLEX_53398-0490~D11 22 33 44

C2541U_0805_10V6K~D

1

2

SG

D

Q31SI3457DV-T1_TSOP6~D

3

624

51

R28710K_0402_5%~D

12

R580300K_0402_5%1 2

R151300K_0402_5%1 2

R2901K_0402_5%~D

1 2

+ C11047U_D_16VM_R70~D

1

2

C2551U_0805_10V6K~D

1

2

R1371K_0402_5%~D

1 2Q30

PMBT2222_SOT23~D2

31

R150100K_0402_5%~D

12

C1020.47U_0603_16V7K~D

1

2

R291100K_0402_5%~D

1 2

R13610K_0402_5%~D

12

R28910K_0402_5%~D

12

R288100K_0402_5%~D

12

U30A

LM358M_SO8~D

P8

IN+3

IN-2 G4

O 1

C1082200P_0603_50V7K~D @

1 2

C256

0.47U_0603_16V7K~D

1

2

Q61

PMBT2222_SOT23~D2

31

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDRA_SDQS[0..7]

DDRA_SDM[0. .7]

DDRA_SMA[0..12]

DDRA_SDQ[0..63]

D DRA_SDQ56

D DRA_SDQ26

D DRA_SDQ23

D DRA_SDQ36

D DRA_SDQ28

D DRA_SDQ15

D DRA_SDQS1

D DRA_SDQS0

D DRA_SDQ55

D DRA_SDQ60

D DRA_SDQ51

DDRA_SMA8

D DRA_SDQ12

D DRA_CKE1

D DRA_SDQ42

D DRA_SCAS#

DDRA_SMA0

D DRA_SDQ31

DDRA_SDM7D DRA_SDQ61

DDRA_SMA11

D DRA_SDQ25

D DRA_SDQ35

D DRA_SDQ10

D DRA_SDQ53D DRA_SDQ48

D DRA_SDQ43

DDRA_SMA10

D DRA_SDQ63

D DRA_SDQ50

D DRA_SDQS6

D DRA_SDQ39

D DRA_SDQ24

DDRA_SDM2

DD RA_SDQ3

D DRA_SDQ54

DDRA_SMA6

D DRA_SDQ11

DD RA_SDQ4DD RA_SDQ1

D DRA_SDQS4

DDRA_SMA1

DD RA_SDQ8

D DRA_SDQ58

D DRA_SDQ46

DDRA_SDM5

D DRA_SDQ62

D DRA_SCS#0

DD RA_SDQ5

D DRA_SDQ52

DD RA_SDQ2

DD RA_SWE#

D DRA_SDQS2

DDR A_VREF

D DRA_SDQ49

DDRA_SDM4

DDRA_SMA4

D DRA_SDQ21

D DRA_SDQ30

D DRA_SDQ19

D DRA_SDQ37

D DRA_SRAS#

D DRA_SDQ16

DDRA_SMA5

D DRA_SDQ13

D DRA_SDQ57

DDRA_SDM6

D DRA_SDQ47

D DRA_SCS#1

D DRA_SDQ14

DDRA_SDM0

D DRA_SDQ32

D DRA_SDQ27

D DRA_SDQ40

DDRA_SMA2

DDRA_SDM3

DDRA_SMA9DDRA_SMA12

D DRA_SDQ17

DD RA_SDQ6

D DRA_SDQS5

D DRA_SDQ34

DD RA_SDQ9

DDRA_SMA7

D DRA_SDQS7

D DRA_SDQ45

DDRA_SBS1

D DRA_SDQ33

DDRA_SMA3

D DRA_SDQ20

DD RA_SDQ7

D DRA_SDQ41

D DRA_SDQ38

DD RA_SDQ0

D DRA_SDQ59

D DRA_CKE0

D DRA_SDQ18

DDRA_SDM1

D DRA_SDQ44

DDRA_SBS0

D DRA_SDQS3D DRA_SDQ29

D DRA_SDQ22

+2.5V_MEM

+3VSUS

+2.5V_MEM

+2.5V_MEM

+2.5V_MEM

+2.5V_MEM

D DRA_CLK2# <11>

D DRA_SCS#0<11,17>

ICH_SMBDATA<6,16,21,32>

D DRA_CKE1<11,17>

D DRA_CLK2 <11>

DDRA_CLK0#<11>

D DRA_SCS#1 <11,17>

DDRA_SMA[0..12]<11,17>

DDRA_SDQS[0..7]<11,17>

DDRA_SDM[0..7]<11,17>

DD RA_CKE0 <11,17>

D DRA_CLK0<11>

D DRA_CLK1<11>DDRA_CLK1#<11>

ICH_SMBCLK<6,16,21,32>

DDRA_SDQ[0..63]<11,17>

DD RA_SWE#<11,17>DDRA_SBS0<11,17>

D DRA_SCAS# <11,17>D DRA_SRAS# <11,17>DDRA_SBS1 <11,17>

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

15 60Wednesday, July 23, 2003

Compal Electronics, Inc.

DDR-SODIMM SLOT1

DIMM0STANDARD

System Memory Decoupling caps

DDRA_VREF trace width of12mils and space 12mils(min)

Decoupling Reference Document:Springdale Chipset Platform Design guide Rev1.11(12474)pag 271 each DIMM(two) requirement 0.1uF*42

Decoupling Reference Document:Springdale Customer Schematic R1.2 page22each Channel(two DIMMs) requirement 22uF*1 ; 0.1uF*21

Follow

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

C123

0.1U_0402_10V6K~D

1

2

C129

0.1U_0402_10V6K~D

1

2

C5070.1U_0402_16V4Z~D

1

2

C124

0.1U_0402_10V6K~D

1

2

C111

22U_1206_10V4Z~D

1

2

C126

0.1U_0402_10V6K~D

1

2

C 133

0.1U_0402_10V6K~D

1

2

C 104

0.1U_0402_10V6K~D

1

2

C 79

0.1U_0402_10V6K~D

1

2

JDIM1

AMP_1565917-1~D

VREF1VSS3DQ05DQ17VDD9DQS011DQ213VSS15DQ317DQ819VDD21DQ923DQS125VSS27DQ1029DQ1131VDD33CK035CK0#37VSS39

DQ1641DQ1743VDD45DQS247DQ1849VSS51DQ1953DQ2455VDD57DQ2559DQS361VSS63DQ2665DQ2767VDD69CB071CB173VSS75DQS877CB279VDD81CB383DU85VSS87CK289CK2#91VDD93CKE195DU/A1397A1299A9101VSS103A7105A5107A3109A1111VDD113A10/AP115BA0117WE#119S0#121DU123VSS125DQ32127DQ33129VDD131DQS4133DQ34135VSS137DQ35139DQ40141VDD143

VREF 2VSS 4DQ4 6DQ5 8VDD 10DM0 12DQ6 14VSS 16DQ7 18

DQ12 20VDD 22

DQ13 24DM1 26VSS 28

DQ14 30DQ15 32VDD 34VDD 36VSS 38VSS 40

DQ20 42DQ21 44VDD 46DM2 48

DQ22 50VSS 52

DQ23 54DQ28 56VDD 58

DQ29 60DM3 62VSS 64

DQ30 66DQ31 68VDD 70CB4 72CB5 74VSS 76DM8 78CB6 80VDD 82CB7 84

DU/RESET# 86VSS 88VSS 90VDD 92VDD 94

CKE0 96DU/BA2 98

A11 100A8 102

VSS 104A6 106A4 108A2 110A0 112

VDD 114BA1 116

RAS# 118CAS# 120

S1# 122DU 124

VSS 126DQ36 128DQ37 130VDD 132DM4 134

DQ38 136VSS 138

DQ39 140DQ44 142VDD 144

DQ41145DQS5147VSS149DQ42151DQ43153VDD155VDD157VSS159VSS161DQ48163DQ49165VDD167DQS6169DQ50171VSS173DQ51175DQ56177VDD179DQ57181DQS7183VSS185DQ58187DQ59189VDD191SDA193SCL195VDD_SPD197VDD_ID199

DQ45 146DM5 148VSS 150

DQ46 152DQ47 154VDD 156

CK1# 158CK1 160VSS 162

DQ52 164DQ53 166VDD 168DM6 170

DQ54 172VSS 174

DQ55 176DQ60 178VDD 180

DQ61 182DM7 184VSS 186

DQ62 188DQ63 190VDD 192SA0 194SA1 196SA2 198DU 200

C103

0.1U_0402_10V6K~D

1

2

C128

0.1U_0402_10V6K~D

1

2

C112

0.1U_0402_10V6K~D

1

2

C134

0.1U_0402_10V6K~D

1

2

C 106

0.1U_0402_10V6K~D

1

2

C 92

0.1U_0402_10V6K~D

1

2

C114

0.1U_0402_10V6K~D

1

2

C113

0.1U_0402_10V6K~D

1

2

C 101

0.1U_0402_10V6K~D

1

2

R440

75_0603_1%~D

12

R442

75_0603_1%~D

12

C107

0.1U_0402_10V6K~D

1

2

C 132

0.1U_0402_10V6K~D

1

2

C105

0.1U_0402_10V6K~D

1

2

C 81

0.1U_0402_10V6K~D

1

2

C109

0.1U_0402_10V6K~D

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDRB_SMA4

D DRB_SDQ10

DD RB_SDQ5

DDRB_SDM7

D DRB_SDQ47

DDRB_SMA3

D DRB_SDQ36

D DRB_SDQ54

D DRB_SDQ15

DDRB_SDQ[0..63]

D DRB_SCS#0

DDRB_SMA[0..12]

DDRB_SDM3

DDRB_SMA7

D DRB_SDQ21

D DRB_SDQ18

DDRB_SMA6

D DRB_SDQ30

DD RB_SDQ3

D DRB_SDQS4

D DRB_SDQ49

D DRB_SDQS6

DDRB_SMA2

DD RB_SDQ8

DD RB_SDQ2

DDRB_SMA8

D DRB_SDQ41

DDRB_SDM2

D DRB_SDQ62

D DRB_SDQ16

D DRB_SDQ24

D DRB_SDQ61

D DRB_SDQ35

DDRB_SDQS[0..7]

D DRB_SDQ57

D DRB_SDQ60

D DRB_SDQS5

D DRB_SDQ20

DDRB_SMA12

D DRB_SDQ19

DDRB_SDM[0. .7]

DDRB_SDM0

DD RB_SDQ1

D DRB_SDQ44

D DRB_SRAS#

D DRB_SDQ43

D DRB_SDQ63

D DRB_SDQ55

DDRB_SDM5

DD RB_SDQ9

DDRB_SDM4

DDRB_SBS0

D DRB_SDQ59

DDRB_SDM6

D DRB_SDQ56

D DRB_SDQ12

D DRB_SDQ25

D DRB_SCAS#

DD RB_SDQ6

D DRB_SDQ31D DRB_SDQ27

D DRB_SDQ26

D DRB_SDQ34

D DRB_SDQ58

D DRB_SDQ53

D DRB_SDQ13

DDRB_SMA11

D DRB_SDQ39

D DRB_SDQ50

D DRB_SDQ40

DDRB_SMA10

D DRB_SDQ23

D DRB_SDQ28D DRB_SDQ22

D DRB_SDQ17

D DRB_SDQ45

D DRB_SDQ32

D DRB_SDQ51

D DRB_SDQ52

DDRB_SDM1

DDRB_SMA0

D DRB_SDQ37

DD RB_SDQ0

D DRB_SCS#1

D DRB_SDQ11

D DRB_SDQ29

DDRB_SBS1

D DRB_SDQS7

DDRB_SMA1

D DRB_CKE0

D DRB_SDQ46

D DRB_SDQ42

D DRB_SDQS3

D DRB_SDQ14

DDRB_SMA5

DD RB_SWE#

D DRB_SDQ48

DDRB_SMA9

DD RB_SDQ4

D DRB_SDQS0

D DRB_SDQ38

DD RB_SDQ7

D DRB_SDQS2

D DRB_SDQS1

D DRB_SDQ33

D DRB_CKE1

DDR B_VREF

+2.5V_MEM+2.5V_MEM

+3VSUS

+3VSUS

+2.5V_MEM

+2.5V_MEM

+2.5V_MEM

DDRB_SDM[0..7]<11,17>

D DRB_CLK1<11>

ICH_SMBCLK<6,15,21,32>

DDRB_SCS#0<11,17>

ICH_SMBDATA<6,15,21,32>

DDRB_SMA[0..12]<11,17>

D DRB_SCS#1 <11,17>

D DRB_CKE1<11,17>

DDRB_SDQ[0..63]<11,17>

DDRB_CLK1#<11>

D DRB_CKE0 <11,17>

DDRB_CLK2# <11>

DDRB_SDQS[0..7]<11,17>

D DRB_CLK2 <11>

DDRB_CLK0#<11>D DRB_CLK0<11>

DD RB_SWE#<11,17>DDRB_SBS0<11,17>

D DRB_SCAS# <11,17>D DRB_SRAS# <11,17>DDRB_SBS1 <11,17>

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

16 60Wednesday, July 23, 2003

Compal Electronics, Inc.

DDR-SODIMM SLOT2

REVERSEDIMM1

System Memory Decoupling caps

DDRB_VREF trace width of12mils and space 12mils(min)

Decoupling Reference Document:Springdale Customer Schematic R1.2 page26each Channel(two DIMMs) requirement 0.1uF*24

Follow

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

C 85

0.1U_0402_10V6K~D

1

2

R 415

75_0603_1%~D

12

C 78

0.1U_0402_10V6K~D

1

2

C 99

0.1U_0402_10V6K~D

1

2

C116

0.1U_0402_10V6K~D

1

2

C 82

0.1U_0402_10V6K~D

1

2

C 95

0.1U_0402_10V6K~D

1

2

C 80

0.1U_0402_10V6K~D

1

2

C 97

0.1U_0402_10V6K~D

1

2

C 91

0.1U_0402_10V6K~D

1

2

C125

0.1U_0402_10V6K~D

1

2

C 93

0.1U_0402_10V6K~D

1

2

JDIM2

AMP_1565918-1~D

VREF1VSS3DQ05DQ17VDD9DQS011DQ213VSS15DQ317DQ819VDD21DQ923DQS125VSS27DQ1029DQ1131VDD33CK035CK0#37VSS39

DQ1641DQ1743VDD45DQS247DQ1849VSS51DQ1953DQ2455VDD57DQ2559DQS361VSS63DQ2665DQ2767VDD69CB071CB173VSS75DQS877CB279VDD81CB383DU85VSS87CK289CK2#91VDD93CKE195DU/A1397A1299A9101VSS103A7105A5107A3109A1111VDD113A10/AP115BA0117WE#119S0#121DU123VSS125DQ32127DQ33129VDD131DQS4133DQ34135VSS137DQ35139DQ40141VDD143

VREF 2VSS 4DQ4 6DQ5 8VDD 10DM0 12DQ6 14VSS 16DQ7 18

DQ12 20VDD 22

DQ13 24DM1 26VSS 28

DQ14 30DQ15 32VDD 34VDD 36VSS 38VSS 40

DQ20 42DQ21 44VDD 46DM2 48

DQ22 50VSS 52

DQ23 54DQ28 56VDD 58

DQ29 60DM3 62VSS 64

DQ30 66DQ31 68VDD 70CB4 72CB5 74VSS 76DM8 78CB6 80VDD 82CB7 84

DU/RESET# 86VSS 88VSS 90VDD 92VDD 94

CKE0 96DU/BA2 98

A11 100A8 102

VSS 104A6 106A4 108A2 110A0 112

VDD 114BA1 116

RAS# 118CAS# 120

S1# 122DU 124

VSS 126DQ36 128DQ37 130VDD 132DM4 134

DQ38 136VSS 138

DQ39 140DQ44 142VDD 144

DQ41145DQS5147VSS149DQ42151DQ43153VDD155VDD157VSS159VSS161DQ48163DQ49165VDD167DQS6169DQ50171VSS173DQ51175DQ56177VDD179DQ57181DQS7183VSS185DQ58187DQ59189VDD191SDA193SCL195VDD_SPD197VDD_ID199

DQ45 146DM5 148VSS 150

DQ46 152DQ47 154VDD 156

CK1# 158CK1 160VSS 162

DQ52 164DQ53 166VDD 168DM6 170

DQ54 172VSS 174

DQ55 176DQ60 178VDD 180

DQ61 182DM7 184VSS 186

DQ62 188DQ63 190VDD 192SA0 194SA1 196SA2 198DU 200

C 98

0.1U_0402_10V6K~D

1

2

C130

0.1U_0402_10V6K~D

1

2

C122

0.1U_0402_10V6K~D

1

2

C 90

0.1U_0402_10V6K~D

1

2

C4580.1U_0402_16V4Z~D

1

2

C 96

0.1U_0402_10V6K~D

1

2

C 84

0.1U_0402_10V6K~D

1

2

C 86

0.1U_0402_10V6K~D

1

2

C 127

0.1U_0402_10V6K~D

1

2

R 418

75_0603_1%~D

12

C 94

0.1U_0402_10V6K~D

1

2

C 87

0.1U_0402_10V6K~D

1

2

C100

0.1U_0402_10V6K~D

1

2

C115

0.1U_0402_10V6K~D

1

2

C 83

0.1U_0402_10V6K~D

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

D DRB_SDQ34

D DRB_SDQ33

D DRA_SDQ56

DDRA_SBS1D DRB_SDQ11

DDRA_SDM0

D DRA_SDQ50

D DRA_SDQ38

DDRA_SDM1

D DRA_SDQ29

DD RA_SDQ8

D DRA_SDQ59

DD RB_SDQ4

D DRB_SDQ13

D DRA_SDQ32

D DRB_SDQ31

D DRA_SDQS5

D DRA_SDQ30

D DRA_SDQ40

D DRA_SDQ47

DD RB_SDQ0

D DRB_SDQ40

D DRA_SDQ27

D DRB_SDQ18

DD RA_SDQ2

D DRA_SDQ13

D DRB_SDQ41

D DRB_SDQS6

D DRB_SDQ54

DDRB_SMA8

D DRB_CKE1

D DRB_SDQ17

D DRB_SDQ32D DRA_SRAS#

D DRB_SDQ27

DDRB_SMA0

DDRB_SMA10

DDRA_SMA8

D DRA_SDQ17

D DRB_SDQS4

DDRA_SMA9

D DRA_SDQ33

DD RB_SDQ2

DD RB_SDQ8

DDRA_SDM7

D DRB_SDQ45

D DRB_SDQ12

DDRB_SDM4

D DRA_SDQS1

DD RA_SDQ6

D DRA_SDQ54

D DRA_SDQ36

DD RB_SDQ3

DDRB_SDM5

D DRA_SDQ48

D DRB_SDQ21

DD RA_SDQ0

D DRB_SDQS0

D DRB_SDQ61

D DRA_SCAS#

DD RA_SDQ1

D DRB_SDQ58

D DRA_SDQ41

DDRA_SMA4

D DRB_SDQ26

D DRA_SDQ58 DDRB_SDM7

D DRA_SDQ14

DD RA_SDQ9

D DRB_SDQ49

DD RA_SDQ7

D DRA_SDQS7

D DRB_SDQ30

D DRA_SDQ39

D DRB_SDQ35

DDRA_SDM5

D DRA_SDQ12

DDRA_SMA3

D DRB_SDQ16

DD RB_SDQ6

D DRB_SDQ47

DDRA_SDM2

DDRB_SMA5

D DRB_SDQ53

D DRB_SDQ42

D DRA_SDQ57

D DRA_SDQ10

D DRB_SDQ28

DD RA_SDQ4

D DRB_SDQS5

DDRA_SMA6

D DRA_SDQS3

D DRB_SDQ37

D DRB_SDQ51

D DRB_SDQS1

D DRB_SDQS7

D DRB_SDQ48

D DRB_SDQ20

DDRB_SDM6

D DRB_SDQ63

D DRA_CKE0

D DRA_SDQS6

D DRB_SDQ44

D DRA_SCS#0

D DRA_SDQ28

D DRA_SDQ31

D DRB_SRAS#

D DRB_SDQ55

D DRB_SDQ46

D DRB_SDQ50

DDRB_SMA9D DRA_SDQS0

DD RA_SDQ5

DDRB_SMA1

DDRB_SMA3

D DRB_SDQ10D DRB_SDQ14

D DRB_SDQ29

D DRA_SDQ23

D DRA_SDQS4

D DRA_SDQ34

D DRA_SDQ19

DDRA_SMA10

D DRA_SDQ24

D DRA_SDQ53

DDRA_SDM4

D DRA_SDQ63

D DRA_SDQ45

D DRA_SDQ37

DD RB_SDQ9

D DRA_SDQ55

D DRB_SDQ59

DDRA_SMA7

D DRA_SDQ26

D DRA_SDQ51 D DRA_SDQ49

D DRB_SCAS#

DDRB_SDM3

DDRB_SMA6

D DRB_SDQ24

DDRB_SBS1

D DRB_SCS#1

DDRB_SMA12

D DRB_SDQS2

D DRB_SDQ15D DRA_SDQ11

DD RA_SDQ3

DDRB_SMA7

DD RB_SDQ1

D DRB_SDQ36

D DRA_SDQ44

DD RB_SDQ5

D DRB_SDQ60

D DRA_SDQ25

D DRB_SDQ62D DRB_SDQ38

DDRB_SDM2

DDRA_SMA1

DDRA_SMA5

D DRA_SDQ18

D DRA_SDQ21

D DRA_SDQ60

D DRA_SDQ42 D DRB_SDQS3

D DRB_SDQ39

D DRB_SDQ23

D DRA_SDQS2

D DRA_SDQ43

D DRA_SDQ62

D DRA_SDQ52

D DRA_SDQ22

DDRA_SDM3

D DRA_SDQ61

D DRA_SDQ16

D DRB_SDQ22

D DRA_SDQ46

D DRB_SDQ57

D DRB_SDQ25

DDRA_SMA0DDRB_SDM1

DDRB_SDM0

D DRA_SDQ15

D DRA_SDQ20

DDRA_SMA2

D DRB_SDQ43

D DRB_SDQ52

D DRB_SDQ56

D DRB_SDQ19D DRA_SDQ35

DD RB_SDQ7

DDRA_SMA11

DDRA_SDM6

DDRA_SDM[0. .7]

DDRA_SDQ[0..63]

DDRA_SMA[0..12]

DDRA_SDQS[0..7]

DDRB_SDQS[0..7]

DDRB_SDM[0. .7]

DDRB_SDQ[0..63]

DDRB_SMA[0..12]

DDRB_SBS0DD RB_SWE#

DDRB_SMA11D DRB_CKE0

D DRB_CKE0D DRB_CKE1

D DRB_SCS#0D DRB_SCS#1

DDRB_SMA4DDRB_SMA2

DDRB_SBS0DDRB_SBS1

D DRA_CKE1

DD RA_SWE#DDRA_SBS0

DDRA_SMA12

D DRA_CKE0D DRA_CKE1

D DRA_SCS#0D DRA_SCS#1

D DRA_SCS#1

DD RB_SWE#

D DRB_SCS#0

V_1P25V_DDR_VTTV_1P25V_DDR_VTT V_1P25V_DDR_VTT V_1P25V_DDR_VTT V_1P25V_DDR_VTTV_1P25V_DDR_VTT

V_1P25V_DDR_VTT

V_1P25V_DDR_VTT

V_1P25V_DDR_VTT

V_1P25V_DDR_VTT

V_1P25V_DDR_VTT

V_1P25V_DDR_VTT

V_1P25V_DDR_VTT

V_1P25V_DDR_VTT

V_1P25V_DDR_VTT

D DRA_SRAS# <11,15>

D DRB_SCAS# <11,16>

D DRA_SCAS# <11,15>

D DRB_SRAS# <11,16>

DDRA_SDQS[0..7]<11,15>

DDRA_SMA[0..12]<11,15>

DDRA_SDM[0..7]<11,15>

DDRA_SDQ[0..63]<11,15>

DDRB_SDQS[0..7]<11,16>

DDRB_SMA[0..12]<11,16>

DDRB_SDM[0..7]<11,16>

DDRB_SDQ[0..63]<11,16> D DRB_CKE0<11,16>D DRB_CKE1<11,16>

D DRB_SCS#0<11,16>D DRB_SCS#1<11,16>

DDRB_SBS1<11,16>DDRB_SBS0<11,16>

D DRA_CKE0<11,15>D DRA_CKE1<11,15>

D DRA_SCS#0<11,15>D DRA_SCS#1<11,15>

D DRA_SBS1 <11,15>

DD RA_SWE#<11,15>DDRA_SBS0<11,15>

DD RB_SWE#<11,16>

Title

Size Document Number R e v

Date: Sheet o f

LA-1711 X02-D

DDR Termination ResistorsC

17 60Wednesday, July 23, 2003

Channel A(DIMM0) Terminationresistors & Decoupling caps

Channel B(DIMM1) Terminationresistors & Decoupling caps

Decoupling Reference Document:Springdale Customer Schematic R1.2 page22each Channel(two DIMMs) requirement 4.7u*2 ;0.1uF*28

Decoupling Reference Document:Springdale Customer Schematic R1.2 page26each Channel(two DIMMs) requirement 4.7u*2 ;0.1uF*26

We used one DIMM, so place 4.7uF*2 ; 0.1uF*23(11/6/02')

We used one DIMM, so place 4.7uF*1 ; 0.1uF*20(11/6/02')

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

RN 37 56_4P2R_0404_5%~D1 42 3

C510

4.7U_1206_16V6K~D

1

2

RN 50 56_4P2R_0404_5%~D1423

RN 79 56_4P2R_0404_5%~D1 42 3

C667

0.1U_0402_10V6K~D@

1

2

C 663

0.1U_0402_10V6K~D@

1

2

RN 28 56_4P2R_0404_5%~D1 42 3

RN 36 56_4P2R_0404_5%~D1 42 3

C 493

0.1U_0402_10V6K~D

1

2

R433 56_0402_5%~D

1 2

RN 33 56_4P2R_0404_5%~D1 42 3

RN 98 56_4P2R_0404_5%~D1423

R N89 56_4P2R_0404_5%~D1423

RN 30 56_4P2R_0404_5%~D1 42 3

R N88 56_4P2R_0404_5%~D1423

C 487

0.1U_0402_10V6K~D

1

2

RN 27 56_4P2R_0404_5%~D1 42 3

R N105 56_4P2R_0404_5%~D1423

C512

0.1U_0402_10V6K~D

1

2

RN 96 56_4P2R_0404_5%~D1 42 3

RN 69 56_4P2R_0404_5%~D1423

RN 84 56_4P2R_0404_5%~D1 42 3

RN 41 56_4P2R_0404_5%~D1423

RN 80 56_4P2R_0404_5%~D1 42 3

C502

0.1U_0402_10V6K~D

1

2

C490

4.7U_1206_16V6K~D

1

2

R N65 56_4P2R_0404_5%~D1423

C483

0.1U_0402_10V6K~D

1

2

RN 38 56_4P2R_0404_5%~D1 42 3

RN 43 56_4P2R_0404_5%~D1423

R N107 56_4P2R_0404_5%~D1 42 3

RN 23 56_4P2R_0404_5%~D1423

RN 42 56_4P2R_0404_5%~D1423

R431 56_0402_5%~D

1 2

C666

0.1U_0402_10V6K~D@

1

2

RN 99 56_4P2R_0404_5%~D1423

C503

0.1U_0402_10V6K~D

1

2

RN 52 56_4P2R_0404_5%~D1423

C484

0.1U_0402_10V6K~D

1

2

C661

0.1U_0402_10V6K~D@

1

2

C518

0.1U_0402_10V6K~D

1

2

RN 15 56_4P2R_0404_5%~D1423

RN 60 56_4P2R_0404_5%~D1423

RN 45 56_4P2R_0404_5%~D1 42 3

R N109 56_4P2R_0404_5%~D1 42 3

RN 29 56_4P2R_0404_5%~D1 42 3

RN 86 56_4P2R_0404_5%~D1423

R N102 56_4P2R_0404_5%~D1423

RN 12 56_4P2R_0404_5%~D1423

C665

0.1U_0402_10V6K~D@

1

2

RN 85 56_4P2R_0404_5%~D1 42 3

C501

0.1U_0402_10V6K~D

1

2

R N61 56_4P2R_0404_5%~D1423

RN 34 56_4P2R_0404_5%~D1423

C440

0.1U_0402_10V6K~D

1

2

R N100 56_4P2R_0404_5%~D1423

R N108 56_4P2R_0404_5%~D1 42 3

RN 11 56_4P2R_0404_5%~D1423

C 668

0.1U_0402_10V6K~D@

1

2

R N101 56_4P2R_0404_5%~D1423

R405 56_0402_5%~D

1 2

RN 22 56_4P2R_0404_5%~D1423

RN 48 56_4P2R_0404_5%~D1423

RN 94 56_4P2R_0404_5%~D1 42 3

C488

0.1U_0402_10V6K~D

1

2

C498

0.1U_0402_10V6K~D

1

2

RN 18 56_4P2R_0404_5%~D1423

C 492

0.1U_0402_10V6K~D

1

2

RN 87 56_4P2R_0404_5%~D1423

C513

0.1U_0402_10V6K~D

1

2

C477

0.1U_0402_10V6K~D

1

2

C664

0.1U_0402_10V6K~D@

1

2

C442

0.1U_0402_10V6K~D

1

2

RN 16 56_4P2R_0404_5%~D1423

RN 70 56_4P2R_0404_5%~D1423

RN 93 56_4P2R_0404_5%~D1 42 3

RN 91 56_4P2R_0404_5%~D1423

RN 71

56_4P2R_0404_5%~D

1 42 3

R N74 56_4P2R_0404_5%~D1423

RN 24 56_4P2R_0404_5%~D1423

R N104 56_4P2R_0404_5%~D1423

R N73 56_4P2R_0404_5%~D1423

RN 53 56_4P2R_0404_5%~D1423

C516

0.1U_0402_10V6K~D

1

2

RN 10 56_4P2R_0404_5%~D1423

C496

0.1U_0402_10V6K~D

1

2

RN 75

56_4P2R_0404_5%~D

1 42 3

C476

0.1U_0402_10V6K~D

1

2

RN 56 56_4P2R_0404_5%~D1423

C480

0.1U_0402_10V6K~D

1

2

RN 55 56_4P2R_0404_5%~D1423

RN 51 56_4P2R_0404_5%~D1423

RN 64 56_4P2R_0404_5%~D1423

RN 77 56_4P2R_0404_5%~D1423

RN 49 56_4P2R_0404_5%~D1423

RN 81 56_4P2R_0404_5%~D1 42 3

RN 62 56_4P2R_0404_5%~D1423

RN 19 56_4P2R_0404_5%~D1423

R N66 56_4P2R_0404_5%~D1423

RN 39 56_4P2R_0404_5%~D1 42 3

C515

0.1U_0402_10V6K~D

1

2

RN 26 56_4P2R_0404_5%~D1 42 3

RN 21 56_4P2R_0404_5%~D1423

C443

0.1U_0402_10V6K~D

1

2

RN 54 56_4P2R_0404_5%~D1423

RN 83 56_4P2R_0404_5%~D1 42 3

RN 20

56_4P2R_0404_5%~D

1 42 3

RN 63 56_4P2R_0404_5%~D1423

C439

0.1U_0402_10V6K~D

1

2

C514

0.1U_0402_10V6K~D

1

2

C517

0.1U_0402_10V6K~D

1

2

RN 90 56_4P2R_0404_5%~D1423

RN 14 56_4P2R_0404_5%~D1423

C 511

0.1U_0402_10V6K~D

1

2

C 504

0.1U_0402_10V6K~D

1

2

C438

0.1U_0402_10V6K~D

1

2

C481

0.1U_0402_10V6K~D

1

2

C478

0.1U_0402_10V6K~D

1

2

RN 68 56_4P2R_0404_5%~D1423

C482

0.1U_0402_10V6K~D

1

2

RN 32 56_4P2R_0404_5%~D1 42 3

C479

0.1U_0402_10V6K~D

1

2

C505

4.7U_1206_16V6K~D

1

2

RN 67 56_4P2R_0404_5%~D1423

RN 92 56_4P2R_0404_5%~D1423

RN 58 56_4P2R_0404_5%~D1423

R443 56_0402_5%~D1 2

RN 40 56_4P2R_0404_5%~D1423

RN 59 56_4P2R_0404_5%~D1423

RN 44 56_4P2R_0404_5%~D1 42 3

C494

0.1U_0402_10V6K~D

1

2

RN 46 56_4P2R_0404_5%~D1 42 3

C436

0.1U_0402_10V6K~D

1

2

C 485

0.1U_0402_10V6K~D

1

2

RN 97 56_4P2R_0404_5%~D1 42 3

R N76 56_4P2R_0404_5%~D1423

C 499

0.1U_0402_10V6K~D

1

2

C 519

0.1U_0402_10V6K~D

1

2

C437

0.1U_0402_10V6K~D

1

2

R N103 56_4P2R_0404_5%~D1423

RN 95 56_4P2R_0404_5%~D1 42 3

R N106 56_4P2R_0404_5%~D1423

R N72 56_4P2R_0404_5%~D1423

R N110 56_4P2R_0404_5%~D1423

RN 78 56_4P2R_0404_5%~D1 42 3

C662

0.1U_0402_10V6K~D@

1

2

RN 17 56_4P2R_0404_5%~D1423

C486

0.1U_0402_10V6K~D

1

2

C500

0.1U_0402_10V6K~D

1

2

RN 25 56_4P2R_0404_5%~D1423

C434

0.1U_0402_10V6K~D

1

2

C 441

0.1U_0402_10V6K~D

1

2

C495

0.1U_0402_10V6K~D

1

2

RN 47 56_4P2R_0404_5%~D1 42 3

RN 57

56_4P2R_0404_5%~D

1 42 3

RN 31 56_4P2R_0404_5%~D1 42 3

RN 13 56_4P2R_0404_5%~D1423

RN 82 56_4P2R_0404_5%~D1 42 3

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

G_ST0

CK_66M_AGP

G_ST2

G_REQ#

G_DBI_LO

G_ST1

G_AD_STBF1

G_DEVSEL#

G_PIPE#_DBI_HI

G_STOP#

G_FRAME#

G_AD_STBS0#G_AD_STBF0

G_AD_STBS1#

G_REQ#

G _TRDY#

G_SB_STBS#

G_IR DY#

G_PAR

G_SB_STBF

G_GNT#

G_SBA#[0..7]

AG

P_P

WR

ON

#G

PW

R_S

RC

_ON

PCIRST_AGP#

SYS _SUSPENDAGP_RST#

G_AD23

G_SBA#6

G_AD28

G_AD12

G_AD7

G_AD17

G_C/BE#0

G_PIPE#_DBI_HI

G_AD2

G_AD30

G_AD24

G_AD4

G_PAR

G_DBI_LO

G_AD20

PCI_PIRQA#

G_REQ#

G_SBA#7

G_AD18

G_AD22

G_SBA#0

G_DEVSEL#

G_SBA#5

G_AD14

G _WBF#

G_C/BE#1

G _RBF#

AGP8X_DET_GC

SBAT_SMBDAT

G_AD26

G_SBA#3

G_AD10

VR EFGC_R

G_AD6

G_ST1

G_AD8

G_AD16

G_GNT#

G_SBA#1

SBAT_SMBCLK

G_ST2

G_AD21

G_AD3

CK_66M_AGP

ICH_SUS_STAT#

G_AD27

G_FRAME#

G_C/BE#2

G_SBA#4

G_STOP#

G_AD5

G_C/BE#3

G_AD13

G_ST0

AGP8X_DET_CG

G_IR DY#

G_AD_STBF1

G_AD1

G_AD15

G_AD29

RUNP WROKG _TRDY#

G_AD_STBF0

G_AD9

G_AD0

G_SB_STBS#

VR EFCG

G_AD_STBS1#

G_AD11

G_SBA#2

GC_BL_SUSPEND

G_AD_STBS0#

AGP_RST#

G_SB_STBF

PCI_PIRQB#

G_AD31

G_AD19

G_AD25

STP_AGP_R#

FPV CC

FPV CC

+5VSUS

+5VRUN

+ 3VRUN

+12V

+1.5VRUN

PWR _SRC G_ PWR_SRC

G_ PWR_SRC

G_ PWR_SRC

+3VRUN

+1.5VRUN

+3VSUS

PWR_ SRC

+5VALW

+12V

+1.5VRUN

G_ PWR_SRC

+1.5VRUN

+1.5VRUN

+3VRUN

+5VALW

+ 3VRUN

+1.5VRUN

+5VSUS+ 5VRUN

+3VSUS

G_DBI_LO<12>

G_ST2<12>

G_REQ#<12>

G_FRAME#<12>

G_AD_STBF0<12>

G_AD[0..31]<12>

G_ST0<12>

G_GNT#<12>

G_SB_STBS#<12>

G_IR DY#<12>

G_ST1<12>

G_AD_STBS0#<12>

G_SB_STBF<12>

G_C/BE#[0..3]<12>

G_AD_STBF1<12>

G _TRDY#<12>

G_AD_STBS1#<12>

G_SBA#[0..7]<12>

G_DEVSEL#<12>

G_REQ#<12>

G_STOP#<12>

CK_66M_AGP<6>

G _PAR<12>

G_ST[0..2]<12>

G_PIPE#_DBI_HI<12>

RUN_ ON<33,37,39,44>

SYS _SUSPEND <33,41>

PCIRST_AGP# <20>

SBAT_SMBCLK <34>

PCI_PIRQA# <20>

VR EFGC <12>

SBAT_SMBDAT <34>

G _RBF# <12>G_ WBF# <12>

AGP8X_DET_GC <12>

VR EFCG<12>

RUNP WROK<34,37,43,44,46>

PCI_PIRQB#<20,32>

S P_DIF<24>

ICH_SUS_STAT#<21>

GC_BL_SUSPEND<33>

STP_AGP# <36>

FPV CC<34>

LID_CL# <33>

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

18 60Wednesday, July 23, 2003

Compal Electronics, Inc.

VGA Daughter Board Conn.

67,68

147,148121,122

Shielding Ground Pin

93,94

13,1439,40

Note:AGP8X_DET_GC :Pull low by an AGP3.0 graphics cardFloating by an AGP2.0 graphics card

AGP8X_DET_GC : low -->AGP3.0 ; High -->AGP2.0AGP8X_DET_CG : low -->MBsupport AGP3.0

CLOSETO PIN

Make R571100K ohmafter 6thAugust

G_AGPBUSY#

FOXCONN QT00160A-9120L

CPLD DisablePop R96, Depop R98

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

C23

0.1U

_060

3_25

V7M

~D

1

2

R322 0_0402_5%~D12

C33

60.

047U

_040

2_10

V4M

~D

1

2

R 28100K_0402_5%~D

12

C33

90.

047U

_040

2_10

V4M

~D

1

2

C21

0.1U

_060

3_25

V7M

~D

1

2

R 88

0_0402_5%~D @

1 2

C19

0.1U

_060

3_25

V7M

~D

1

2

C39

70.

047U

_040

2_10

V4M

~D

1

2

C24

0.1U

_060

3_25

V7M

~D

1

2

C3170.1U_0402_10V6K~D

1

2

C40

90.

047U

_040

2_10

V4M

~D

1

2

C3880.1U_0402_16V4Z~D

1

2

Q8

SI4435DY_SO8~D

3 65

78

2

4

1

G

D

S

Q72N7002_SOT23~D

2

13

C4150.1U_0402_16V4Z~D

1

2

C26

0.1U

_060

3_25

V7M

~D

1

2

C41

70.

047U

_040

2_10

V4M

~D

1

2

C35

20.

047U

_040

2_10

V4M

~D

1

2

R30

100K

_040

2_5%

~D

12

C35

70.

047U

_040

2_10

V4M

~D

1

2

C4160.1U_0402_16V4Z~D

1

2

U7TC7SH32FU_SSOP5~D@

INB 1

INA 2O4

P5

G3

JV ID

FOX_QT00160A-9120L~D

66 66GND 68

70 7072 7274 7476 7678 7880 8082 8284 8486 8688 8890 90

9191GND93959597979999101101103103105105107107109109111111113113115115117117119119GND121123123125125127127129129131131133133135135137137139139141141143143145145GND147149149151151153153155155157157159159

92 92GND 94

96 9698 98

100 100102 102104 104106 106108 108110 110112 112114 114116 116118 118120 120

GND 122124 124126 126128 128130 130132 132134 134136 136138 138140 140142 142144 144146 146

GND 148150 150152 152154 154156 156158 158160 160

2 24 46 68 8

10 1012 12

GND 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 38

GND 4042 4244 4446 4648 4850 5052 5254 5456 5658 5860 6062 6264 64

11335577991111GND13151517171919212123232525272729293131333335353737GND394141434345454747494951515353555557575959616163636565GND6769697171737375757777797981818383858587878989

C22

0.1U

_060

3_25

V7M

~D

1

2

C 4130.1U_0402_16V4Z~D

1

2

R 980_0402_5%~D@

1 2

C 12

0.1U_0603_25V7M~D

1

2

C41

80.

047U

_040

2_10

V4M

~D

1

2

C34

20.

047U

_040

2_10

V4M

~D

1

2C32

50.

047U

_040

2_10

V4M

~D

1

2

R1560_0402_5%~D

12

C33

40.

047U

_040

2_10

V4M

~D

1

2

R 9610K_0402_5%~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_THERMDC

FAN3_PWMFAN3_TACH

CLK_SMBDAT_SMB

MCH_THERMDAMCH_THERMDC

MCH_THERMDC

MCH_THERMDAH_THERMDA

FAN3TACH_ON

FAN3_TACH

FAN3_PWM

FAN3_ON

+3VRUN

+3VALW

+3VRUN

+12V

+3VRUN

+5VRUN

+12V

+3VRUN

+12V

CLK_SMB<26,34,35,47>DAT_SMB<26,34,35,47>

H_THERMDA <8>

H_THERMDC <8>

ATF_INT# <33,47>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

19 60Thursday, July 24, 2003

Compal Electronics, Inc.

CPU Thermal Sensor & FAN Control

CPU Temperature Sensor

Address 0101 110X (X=1-->Read; X=0-->Write)

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

Put 3904 between MCH and DDR

Put Cap near pin 10,11 of U37

FAN3 Control and Tachometer

FAN3

Item101: Reserved Op amp circuit (NP) to the High side FET

R617300K_0402_5%@ 1 2

R365 10K_0402_5%~D

1 2

C6572200P_0603_50V7K~D

1

2

C6722200P_0603_50V7K~D @

1 2

R11810K_0402_5%~D

12

R37

56.

8K_0

402_

5%~D

12

C4202200P_0603_50V7K~D

1

2

R366

0_0402_5%~D

1 2

G

D

SQ752N7002_SOT23~D

2

13

Q29

PMBT2222_SOT23~D2

31

R61610K_0402_5%~D@1 2

R618100K_0402_5%~D@

12

C67322U_1206_16V4Z_V1@

1

2

R1201K_0402_5%~D

1 2

R11710K_0402_5%~D

12

C6711U_0805_10V6K~D@

1

2

C890.47U_0603_16V7K~D

1

2

C8810U_1206_16V4Z~D

1

2

Q73

MMBT3904_SOT23~D

2

31

JFAN3

SUYIN_250019MR003G400ZL~D

112233

R12510K_0402_5%~D

12

Q28SI4435DY_SO8~D

3 65

78

2

4

1

R60910K_0402_5%~D

12

R610

2.7K_0402_5%

12

U37

ADT7460ARQ_QSOP16~D

SDA16SCL1

TACH16TACH27TACH34TACH49

2.5VIN 14

D1+ 13D1- 12

D2+ 11D2- 10

PWM1 15

PWM2/ALERT# 5

PWM3 8

VCC3

GND2

R37

86.

8K_0

402_

5%~D

12

U46A

LM358M_SO8~D@

P8

IN+3

IN-2 G4

O 1

D1

RB751V_SOD323~D21

C408

0.1U_0402_16V4Z~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCI_SERR#

PCI_DEVSEL#

PCI_REQB#

IDE_IRQ14

P CI_TRDY#

PCI_ IRDY#

PCI_PIRQA#

PCI_DEVSEL#

I RQ_SERIRQ

PCI_PERR#

PCI_PCIRST#

PCI_REQ1#

PCI_PIRQB#

PCI_SERR#

PCI_REQ4#

PCI_STOP#

PCI_PERR#PCI_FRAME#

PCIRSTB4#

PCIRST_SIO#

PCIRST_2#

PCI_REQA#

PCI_STOP#

PCI_REQ0#

PCI_PIRQD#PCI_PIRQC#

PCI_PLOCK#

PCI_FRAME#

PCI_PLOCK#

PCI_ IRDY#

PCI_REQ3#

PCI_GNTA#

P CI_PAR

PCI_REQ2#

P CI_TRDY#

IDE_IRQ15

PCIRSTB1#

PCI_AD31PCI_AD30PCI_AD29PCI_AD28PCI_AD27PCI_AD26PCI_AD25PCI_AD24PCI_AD23PCI_AD22PCI_AD21PCI_AD20PCI_AD19PCI_AD18PCI_AD17PCI_AD16PCI_AD15PCI_AD14PCI_AD13PCI_AD12PCI_AD11PCI_AD10PCI_AD9PCI_AD8PCI_AD7PCI_AD6PCI_AD5PCI_AD4PCI_AD3PCI_AD2PCI_AD1PCI_AD0

PCI_PCIRST#

PCI_PIRQA#PCI_PIRQB#PCI_PIRQC#PCI_PIRQD#

ICH_GPIO2_PIRQE#ICH_GPIO3_PIRQF#ICH_GPIO4_PIRQG#ICH_GPIO5_PIRQH#

PCI_REQ1#PCI_REQ2#PCI_REQ3#PCI_REQ4#

ICH_GPIO5_PIRQH#ICH_GPIO4_PIRQG#ICH_GPIO3_PIRQF#ICH_GPIO2_PIRQE#

PCI_GNT1#

PCI_GNT3#PCI_GNT4#

CK_33M_ICHPCI

CLK

_IC

H_T

ERM

CK_33M_ICHPCI

PCI_GNTA#PCI_GNTB#

PCI_REQA#PCI_REQB#

H UB_HL0H UB_HL1H UB_HL2H UB_HL3H UB_HL4H UB_HL5H UB_HL6H UB_HL7H UB_HL8H UB_HL9HUB_HL10

USB_OC2#USB_OC3#USB_OC4#

ICH

_AC

_BIT

CLK

_TER

MICH_A C_SYNC_R

ICH_AC_SDOUT_R

ICH_AC_RST_R#

I CH_AC_SDIN0ICH_AC_BITCLK

I CH_AC_SDIN1

HI_ SWING_ICH

HI _VREF_ICH

ICH_PME#

HI_ SWING_ICHHI _VREF_ICH

HI_RCOMP_ICH

HI_RCOMP_ICH

CK

_66M

_IC

H_T

ERM

CK_66M_ICH

CK_66M_ICH

ICH_A C_SYNC_RICH_AC_RST_R#ICH_AC_SDOUT_RI CH_AC_SDIN0I CH_AC_SDIN1

USBRBIAS

CK

_48M

_IC

H_T

ERM

CK_48M_ICH

LAN_RST#

NC_EE_DOUT

USB_OC7#

USB_OC5#USB_OC6#

PCI_REQ0#

ICH_AC_SDOUTPCIRSTB3# PCIRST_1#

PCIRST_AGP#

PCIRSTB2#

USB_OC1#USB_OC0#

+ 3VRUN

+ 3VRUN

+3VSUS

+ 3VRUN

+ 3VRUN

+ 3VRUN+ 3VRUN

+ 3VRUN

+ 3VRUN

+3VSUS

+5VSUS

+1.5VRUN

+1.5VRUN

+ 3VRUN

IDE_IRQ14 <21>

I RQ_SERIRQ <21,30,33>

P CI_PAR<28,30,32>

PCI_ IRDY#<28,30,32>

P CI_PERR#<28,30,32>

PCI_FRAME#<28,30,32>

PCI_DEVSEL#<28,30,32>PC I_TRDY#<28,30,32>

PCI_STOP#<28,30,32>

PCIRST_SIO# <33>

PCIRST_2# <32>

IDE_IRQ15 <21,23>

PCI_AD[0..31] <28,30,32>

PCI_C_BE3# <28,30,32>PCI_C_BE2# <28,30,32>PCI_C_BE1# <28,30,32>PCI_C_BE0# <28,30,32>

P CI_SERR#<28,30,32>

PCI_PIRQA#<18>PCI_PIRQB#<18,32>PCI_PIRQC#<28,30>PCI_PIRQD#<30,32>

PCI_REQ1#<30>

PCI_REQ3#<32>PCI_REQ4#<28>

PCI_GNT1#<30>

PCI_GNT3#<32>PCI_GNT4#<28>

CK_33M_ICHPCI<6>

PCI_GNTB#<30>

PCI_REQB#<30>

HUB_HL[0..10]<12>

HUB_HLSTRF<12>HUB_HLSTRS<12>

USBP4+ <26>USBP4- <26>

USBP3+ <26>USBP3- <26>

USBP2+ <26>USBP2- <26>

USBP1+ <26>USBP1- <26>

USB_OC5# <26>

USB_OC2# <26>USB_OC3# <26>USB_OC4# <23>

ICH_AC_SDOUT <24,27>

ICH_A C_SYNC <24,27>

ICH_AC_RST# <24,27>

ICH_PME#<33> PCI_PCIRST#<12,36>

CK_66M_ICH<6>

I CH_AC_SDIN0<24>I CH_AC_SDIN1<27>

ICH_AC_BITCLK<24>

CK_48M_ICH <6>

USBP6- <26>USBP6+ <26>

USB_OC6# <26>

PCIRST_1# <28>

PCIRST_AGP# <18>

PCIRST_CB# <30>

USBP5+ <26>USBP5- <26>

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

20 60Wednesday, July 23, 2003

Compal Electronics, Inc.

ICH5-PCI/HUB/USB/AC97

USB_OC IS 5VTOLERANT

Close to ICH ball <250mils

Close to ICH ball <250mils

Note:HI_SWING_MCH, HI_VREF_MCHtrace width of 12mils andspace 10mils

0.1"~6"

Note:USBRBIAS keep less than 500mils

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

R404

10_0402_5%~D@

12

C42710P_0402_50V8J~D@

1

2

U8A74VHC08MTC_TSSOP14~D

IN11

IN22 OUT 3

P14

G7

R38

710

K_0

402_

5%~D

12

R40

210

K_0

402_

5%~D

@1

2

R430 0_0402_5%~D12

C456

0.1U_0402_16V4Z~D 1

2

R390 33_0402_5%~D 12

R39

510

K_0

402_

5%~D

@1

2

R39610_0402_5%~D@

12

R406 61.9_0603_1%1 2

R39

710

K_0

402_

5%~D

@1

2

C4520.01U_0402_16V7K~D

1

2

R15333_0402_5%~D

1 2

R3831K_0402_5%~D@

1 2

U8B74VHC08MTC_TSSOP14~D

IN14

IN25 OUT 6

R16233_0402_5%~D

1 2

R 410

147_0603_1%~D

12

R16033_0402_5%~D

1 2

R42510K_0402_5%~D@

12

R N111

10K_1206_8P4R_5%~D

1 82 73 64 5

U 8C74VHC08MTC_TSSOP14~D

IN110

IN29 OUT 8

U 8D74VHC08MTC_TSSOP14~D

IN113

IN212 OUT 11

R40

110

K_0

402_

5%~D

12

R13

910

K_0

402_

5%~D

12

C4314.7P_0402_50V8C~D @

1

2

R389 33_0402_5%~D

12

R N38.2K_8P4R_1206_5%~D

18

27

36

45

R392 1K_0402_5%~D@1 2

R124

52.3_0603_1%~D

1 2

R414

10_0402_5%~D@

12

R39310K_0402_5%~D

12

R15733_0402_5%~D

1 2

R3988.2K_0402_5%~D@

12

C4658.2P_0402_50V8J~D@

1

2

R394 22.6_0603_1%~D 12

U5A

FW82801EB_mBGA460_ICH5~D

PIRQA#B3PIRQB#E1PIRQC#A2PIRQD#C2PIRQE#/GPI2D7PIRQF#/GPI3A6PIRQG#/GPI4E2PIRQH#/GPI5B1

REQ0#D5REQ1#C1REQ2#C5REQ3#B6REQ4#/GPI40C6REQA#/GPI0A5REQB#REQ5#/GPI1E7

GNT0#D4GNT1#A3GNT2#B7GNT3#C7GNT4#/GPO48A4GNTA#/GPO16E8GNTB#/GNT5#/GPO17B4

FRAME#D2IRDY#M3TRDY#E4DEVSEL#L3STOP#E5PARF1PERR#K2PLOCK#L2SERR#L4PME#V2PCIRST#V4PCICLKN1

AD31 P2AD30 F4AD29 P4AD28 F5AD27 N2AD26 D3AD25 P3AD24 E6AD23 N4AD22 C4AD21 N5AD20 H3AD19 P5AD18 B2AD17 L1AD16 G4AD15 G5AD14 K1AD13 G2AD12 L5AD11 H4AD10 M4AD9 F2AD8 K5AD7 J2AD6 J3AD5 H2AD4 H5AD3 K4AD2 G3AD1 J5AD0 J4

C/BE3# M2C/BE2# N3C/BE1# J1C/BE0# E3

R38

610

K_0

402_

5%~D

12

C46410P_0402_50V8J~D@

1

2

R 411

226_0603_1%~D

12

R N28.2K_8P4R_1206_5%~D

18

27

36

45

R 41310_0402_5%~D@

12

U 5B

FW82801EB_mBGA460_ICH5~D

HI0H20HI1H21HI2J20HI3H23HI4M23HI5M21HI6N21HI7M20HI8L22HI9J22HI10K21HI11G22

HI_STBFK23HI_STBSJ24HIRCOMPN24HI_VSWINGL20HIREFL24CLK66N22

LAN_RXD0C10LAN_RXD1C9LAN_RXD2C11LAN_TXD0D9LAN_TXD1E9LAN_TXD2B12LAN_RSTSYNCD10LAN_CLKE10LAN_RST#AA1

EE_DINB11EE_CSB10EE_SHCLKA12EE_DOUTB9

AC_SYNCB8AC_RST#C12AC_SDOUTA9AC_SDIN0E12AC_SDIN1D12AC_SDIN2A13AC_BIT_CLKD8

USBP0P C23USBP0N D23USBP1P A22

USBP2P C21USBP2N D21USBP3P A20USBP3N B20USBP4P C19USBP4N D19USBP5P A18USBP5N B18USBP6P C17USBP6N D17USBP7P A16USBP7N B16

USBP1N B22

OC0# C15OC1# D15OC2# D14OC3# C14

OC4#/GPI9 B14OC5#/GPI10 A14OC6#/GPI14 D13OC7#/GPI15 C13

USBRBIAS A24USBRBIAS# B24

CLK48 F24

R11

310

K_0

402_

5%~D

12

R385 33_0402_5%~D 12

R N18.2K_8P4R_1206_5%~D

18

27

36

45

C460

0.1U_0402_16V4Z~D 1

2

R N112

10K_1206_8P4R_5%~D

1 82 73 64 5

C1180.1U_0402_16V4Z~D

12

R 409

113_0603_1%

12

R N48.2K_8P4R_1206_5%~D

18

27

36

45

R1198.2K_0402_5%~D

12

C4550.01U_0402_16V7K~D

1

2

R42

610

K_0

402_

5%~D

12

RN 358.2K_8P4R_1206_5%~D

18

27

36

45

R15933_0402_5%~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

I DE_PDD3

IDE_PDD14

LPC_LAD2

I DE_PDD0

LPC_LDRQ0#

IDE_PDD10

LPC_LAD1

I DE_PDD9

I DE_PDDACK#

I DE_PDIOW#

ATA_66_PRI/PDIAG

LPC_LFRAME#

I DE_PDD2

IDE_PDCS1#

I DE_PDD4I DE_PDD5

IDE_RST_HDD_5V

IDE_P DIORDY

IDE_IRQ14

IDE_PDD13

IDE_PDD15

IDE_PDD11

IDE_PDCS3#IDE_PDA2

LPC_LAD3

I DE_PDD1

LPC_LAD0

IDE_P DIORDY

IDE_PDA0

IDE_PDIOR#

IDE_PDA1

IDE_PDD12

RPD DREQ

LPC_LDRQ0#

I DE_PDD6

IDE_S DIORDY

IDE_CSEL_PRI

LPC_LDRQ1#

PIDEACT#

I DE_PDD7 I DE_PDD8

LPC_LDRQ1#

I DE_SDD7I DE_PDD6

IDE_PDD15

I DE_PDD7

I DE_PDD2

I DE_SDD6

ID E_PDDREQ

I DE_PDD3

IDE_PDD11

IDE_SDA0

IDE_SDD12

I DE_SDD1

I DE_PDD5

I DE_SDD9

IDE_SDD11

I DE_PDIOW#

I DE_SDD2

I DE_PDD9

IDE_IRQ15

IDE_PDD10

I DE_SDD3

IDE_PDA2

IDE_PDIOR#

IDE_SDD10

IDE_PDD14

I DE_SDD4

I DE_SDD8

IDE_SDD14

IDE_PDD12

IDE_S DIORDY

I DE_PDD0

IDE_PDA1

I DE_PDD8

I DE_SDD0

I DE_SDDACK#

IDE_SDD13

I DE_PDDACK#

IDE_SDA2

I DE_PDD4

IDE_P DIORDY

I DE_PDD1

IDE_PDD13

I DE_SDIOW#

IDE_PDA0IDE_SDA1

ID E_SDDREQ

IDE_SDD15

I DE_SDD5

RSD DREQ

ID E_PDDREQ

ID E_SDDREQ

IDE_SDIOR#

RPD DREQ

SMI#

H_THERMTRIP_R#

SATABIAS

ICH_SMBCLK

ICH_SMLINK1

ICH_SMBDATAICH_SMLINK0

LINK_ALERT#

S PKR

ICH_RTCX1ICH_RTCX2

ICH_RTCX1

ICH_RTCX2

ICH_RTCRST#

PW RGD_OK

IC H_RI#

ICH_BATLOW#

SIO_SLP_S3#

V RM_PWRGD

SIO_THRM#

ICH_THERM_PWRDN#

ICH_THERM_PWRDN#

B ID1

B ID3

B ID0

B ID1

B ID2

B ID3

LAN_PME#

IDE_RST_MOD_SFTON

IDE_RST_HDD_5V

IDE_RST_MOD_SFTON

SIO_THRM#

V RM_PWRGD

SIO_EXT_SMI#SIO_EXT_SMI#

SIO_EXT_RTE#SIO_EXT_RTE#

SIO_EXT_SCI#

SIO_EXT_SCI#

B ID0

S PKR

CK

_14M

_IC

H_T

ERM

ICH_INTVRMEN

SIO_SLP_S3#

S USCLK

S USCLK

SIO_SLP_S5#SIO_SLP_S4#

B ID2

V CC_RTC

H_THERMTRIP_R#

ICH_RTCRST#

SATA_LED#

IDE_PDCS1#IDE_PDCS3#

IDE_SDCS1#IDE_SDCS3#

CBS_RI#IC H_RI#

+ 3VRUN

+ 5VHDD

+ 3VRUN

+ 5VHDD

+ 5VHDD

+3VSUS

+3VSUS

+3.3VRTC

+3VSUS

+3VSUS

+3.3VRTC

+3VSUS

+3VSUS

+ 3VRUN

+3VSUS

+ 3VRUN

+5VHDD

+ 3VRUN

+5VMOD

+3VRUN

+3VRUN

V CC_RTC

V CC_RTC

+ 3VRUN

+VCC_CORE

+ 3VRUN

+ 3VRUN

+3VSUS

PIDEACT#<38>

LPC_LAD[0..3]<33>

IDE_SDA[0..2] <23>

IDE_SDD[0..15] <23>

I DE_SDDACK# <23>

IDE_SDCS3# <23>

I DE_SDIOW# <23>

IDE_S DIORDY <23>

RSDD REQ <23>

IDE_IRQ14<20> IDE_IRQ15 <20,23>

I DE_SDIOR# <23>

LPC_LFRAME#<33>LPC_LDRQ0#<34>LPC_LDRQ1#<33>

H_P WRGOOD <8>

CPUSLP#<36>H_A20M#<8>

H _IGNNE#<8>

H_INTR<8>H_NMI<8>

SIO_A20GATE<34>

H_F ERR#<8>

H_INIT#<8>

S IO_RCIN#<33>

H_SMI#<8>STPCLK#<36>

ICH_SMBCLK <6,15,16,32>ICH_SMBDATA <6,15,16,32>

S PKR <24>

SU SPWROK<36,37>

ICH_SUS_STAT# <18>SIO_SLP_S3# <33>

ICH_SLP_S1# <6>

SIO_SLP_S4_S5# <33>

V RM_PWRGD <36>

SIO_THRM# <33>

CK_14M_ICH <6>

ICH_THERM_PWRDN# <37>

IDE_RST_HDD<33>IDE_RST_MOD<33> IDE_RST_MOD_5V <23>

I RQ_SERIRQ<20,30,33>

SIO_EXT_SMI# <33>

SIO_EXT_RTE# <33>

SIO_EXT_SCI# <33>

CK_100M_ICH#<6>CK_100M_ICH<6>

SATA_MODTX+<23>SATA_MODTX-<23>

SATA_MODRX+<23>SATA_MODRX-<23>

S USCLK <36>

ICH_S YNC#<12>

P WRGD_3V<10,37>

SIO_PWRBTN# <33>

H_THERMTRIP# <8,37>

IDE_SDCS1# <23>

C BS_RI# <30>

CPLD_WAKE# <36>

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

21 60Wednesday, July 23, 2003

Compal Electronics, Inc.

ICH5-IDE/LPC/PM/GPIO/LAN

12/17/02 Changed byDell's Require

Note:SATABIAS keepless than500mils

3

BAT54C

K2 K1

2A1A2

1

BID0BID1BID2BID3 REV

0 0 0 0

0 0 0

0 0 0

0 0

0 0 0

1

1

1 1

1

X00

X01

X02

X03

X04

LK2-->USB2P0_SMI

Disable timer timeout

ICH_SYNC# PWRGD_3V PWRGD_OK

0

1

0

0

0

0

0 01

1 1 1

CPLD DisableDepop R141

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

Connector onbottom sideHH99227-S9

2

1

4344

Top View

R 2650_0402_5%~D

1 2

R428

10K_0402_5%~D

1 2

C50915P_0603_50V8J~D

12

C120

1U_0805_10V6K~D 1

2

R40310K_0402_5%~D

12

CMOS_CLRSHORT PADS@

1 122

C23

84.

7U_1

206_

16V6

K~D

1

2

R43

210

K_0

402_

5%~D 1

2

R11

610

K_0

402_

5%~D

@

12

R2691K_0603_5%~D@

12

C24

00.

1U_0

402_

16V4

Z~D

1

2

R 435 330K_0402_5%~D1 2

R141 0_0402_5%~D

1 2

Q33

MMBT3904_SOT23~D@

2

31

R416

10K_0402_5%~D1 2

R27110K_0402_5%~D@

1 2

R 2744.7K_0402_5%~D

12

R439 0_0402_5%~D

1 2

R570470_0402_5%~D

12

R2630_0402_5%~D

1 2

R429 0_0402_5%~D1 2

R11510K_0402_5%~D

12

R423 24.9_0603_1%~D1 2

C1190.1U_0402_10V6K~D

1

2

R40010_0402_5%~D@

12

R 26610K_0402_5%~D@1 2

R 5580_0402_5%~D

1 2

U 5D

FW82801EB_mBGA460_ICH5~D

A20GATET22A20M#V23CPUSLP#P22FERR#U24IGNNE#R21INIT#R23INTRU23NMIR22RCIN#P23SERIRQF23SMI#V24STPCLK#T24

DPRSLPVR(Mobile)P20DPSLP#(Mobile)R24

SATA0TXPAA8SATA0TXNAB8SATA0RXNAD7SATA0RXPAC7

SATA1TXPAA10SATA1TXNAB10SATA1RXNAD9

SATARBIASPY11SATARBIASNY9

CLK100PAC5CLK100NAD5

LAD0T5LAD1R4LAD2R3LAD3U4LFRAME#T4LDRQ0#U5LDRQ1#/GPI41R2

RTCX1AC11RTCX2AB12RTCRST#AA12RSMRST#AB13PWROKAC12

GPIO6 R5GPIO7 U3GPIO8 Y2

SMBALERT#/GPI11 AC3GPIO12 W4GPIO13 W5GPO18 U21GPO19 T20GPIO20 U22GPIO21 R1GPIO22 U20GPIO23 F22GPIO24 AC1GPIO25 W3GPIO27 V3GPIO28 W2GPIO32 T1GPIO33 G23GPIO34 F21

SMBCLK AD2SMBDATA AD1

SMLINK0 AD3SMLINK1 AA2

LINKALERT# V5

SPKR E24RI# AB3

PWRBTN# Y4SUSCLK Y1

TP0 AB2SUS_STAT# AB1

SLP_S3# W1SLP_S4# U2SLP_S5# AA3

SYS_RESET# U1VRMPWRGD R20

CPUPWRGD/GPO49 P24THRMTRIP# T21

THRM# T2INTVRMEN AD10

CLK14 F20INTRUDER# Y12

NC A11

SATA1RXPAC9

Q32

MMBT3904_SOT23~D@

2

31

R39

910

K_0

402_

5%~D

@

12

R1581K_0402_5%~D

1 2

R12

810

K_0

402_

5%~D

@

12

C4690.1U_0402_16V4Z~D@

1

2

R43

610

K_0

402_

5%~D 1

2

R132 10K_0402_5%~D1 2

U 5C

FW82801EB_mBGA460_ICH5~D

PDD15AB17PDD14AA16PDD13Y16PDD12AC16PDD11AA15PDD10AD16PDD9Y15PDD8AD15PDD7AB14PDD6AD14PDD5AC15PDD4AA14PDD3AC14PDD2Y14PDD1Y13PDD0AB16

PDIOW#AA17PDDACK#AC18PDDREQAC17PDIOR#AD18PIORDYAA18

PDA2AC19PDA1AD19PDA0AA19

PDCS3#Y18PDCS1#AB19

IRQ14Y17

SDD0 AA22SDD1 AB23SDD2 AD23SDD3 AD24SDD4 AB21SDD5 AC21SDD6 AB20SDD7 AC20SDD8 Y19SDD9 AD22SDD10 AC22SDD11 AA20SDD12 AB22SDD13 AC24SDD14 AB24SDD15 AA23

SDIOW# Y22SDDACK# W20SDDREQ Y20

SDIOR# Y23SIORDY Y21

SDA2 W21SDA1 W23SDA0 W22

SDCS3# V20SDCS1# V22

IRQ15 Y24

R 134 0_0402_5%~D 12

D3

BAT54C_SOT23~D

3 2

1

R441100K_0402_5%~D

1 2

R424 0_0402_5%~D@ 1 2

R 41910K_0402_5%~D@

1 2

R1270_0402_5%~D

12

C23

70.

1U_0

402_

16V4

Z~D

1

2

C25

133

P_0

603_

50V8

J~D

@

1

2

R38

8

10K

_040

2_5%

~D

12

Q46MMBT3904_SOT23~D@2

3 1

R417 10K_0402_5%~D1 2

R422

0_0402_5%~D@

1 2

R122 10K_0402_5%~D1 2

R420 10K_0402_5%~D1 2

J HDD

FOX_HH99227-S9~D

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 44

SGND 45SGND 46SGND 47SGND 48

B149B250

R 1400_0402_5%~D@

12

R16

91K

_040

2_5%

~D@

12

C42

8

4.7P

_040

2_50

V8C

~D@

1

2

R 5624.7K_0402_5%~D

12

T13PAD@

C60

833

P_0

603_

50V8

J~D

@

1

2

Q51MMBT3904_SOT23~D @2

3 1

R12610K_0402_5%~D@ 12

R43710M_0402_5%~D

12C50815P_0603_50V8J~D

12R 12110K_0402_5%~D@

1 2

R13

810

K_0

402_

5%~D

12

R16

722

0_04

02_5

%@

12

R114

1K_0402_5%~D@

1 2

R135 10K_0402_5%~D1 2

R12

310

K_0

402_

5%~D

12

R 5681K_0402_5%~D

12

R13010K_0402_5%~D 12

R421 10K_0402_5%~D1 2

R427 10K_0402_5%~D1 2

R2621K_0603_5%~D @

12

R14

32.

7K_0

402_

5% 12

R142 10K_0402_5%~D1 2

R154

180K_0402_5%~D

1 2

X4

32.768KHZ_12.5P_MC-306~D

12

R471

1K_0402_5%~D

1 2

R149 10K_0402_5%~D1 2

R 2790_0402_5%~D 1 2

R14

82.

7K_0

402_

5% 12

R16

122

0_04

02_5

%@

12

R434 10K_0402_5%~D@1 2

R438

0_0402_5%~D1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ICH _V5REF_RUN

ICH_V5REF_SUS

VCCSUS15_A

VCCSUS15_B

V CCSUS15_C

+ 3VRUN

+ 3VRUN +1.5VRUN

+ 5VRUN

+3VSUS

+3VSUS

+5VSUS

+ VCC_CORE

+ VCC_CORE

+1.5VRUN+ 3VRUN

+1.5VRUN +1.5VRUN

V CC_RTC

+3VSUS

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

22 60Wednesday, July 23, 2003

Compal Electronics, Inc.

ICH5 Power & Decoupling

Place near ball(VSS)D1,A7,H1,P1W24 and A21

Place0.1u near ball(VSS)A17,A23,V1.Addition cap nearA15,A19

Place nearball T22

Place0.1u near ball(VSS)G24,H24,K24,M24,AD4and AD18; 0.01u near toball AD8.

Place nearball (VSS)A19

Place nearball (VSS)AD4

Place nearball (VSS)A7

Place near ball A8

Place near ball(VSS) A17

Place near ball AD11

Place near ball D24 Place near ball AD6

Decoupling Reference Document:Springdale Chipset Platform Design guide Rev1.11(12474)page278

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

C475 0.01U_0402_16V7K~D

1 2

C4910.1U_0402_16V4Z~D

12

C4351U_0603_6.3V6M~D

1 2

C 506

0.1U_0402_10V6K~D

1

2

C4681U_0805_10V6K~D

1

2

C433 0.01U_0402_16V7K~D

1 2

C4730.1U_0402_16V4Z~D

12

C4710.1U_0402_16V4Z~D

1

2

C4250.01U_0402_16V7K~D

1 2

C4970.1U_0402_16V4Z~D

12

C4320.1U_0402_16V4Z~D

12

U5E

FW82801EB_mBGA460_ICH5~D

VCC3_3F6VCC3_3G1VCC3_3H6VCC3_3K6VCC3_3L6VCC3_3M10VCC3_3N10VCC3_3P6VCC3_3R13VCC3_3V19VCC3_3W15VCC3_3W17VCC3_3W24VCC3_3AD13VCC3_3AD20VCC3_3G19VCC3_3G21

VCCSUS3_3E18VCCSUS3_3B15VCCSUS3_3E11VCCSUS3_3F10VCCSUS3_3F11VCCSUS3_3E13VCCSUS3_3E14VCCSUS3_3U6VCCSUS3_3V6VCCSUS3_3F16VCCSUS3_3F17VCCSUS3_3F18VCCSUS3_3K15

V5REFA8V5REFW14

V5REF_SUSE16

VCCRTCAD11

VCC1_5 K10VCC1_5 K12VCC1_5 K13VCC1_5 L19VCC1_5 P19VCC1_5 R10VCC1_5 R6VCC1_5 H24VCC1_5 J19VCC1_5 K19VCC1_5 M15VCC1_5 N15VCC1_5 N23VCC1_5 E15VCC1_5 F15VCC1_5 F14VCC1_5 W19VCC1_5 R12VCC1_5 W9VCC1_5 W10VCC1_5 W11VCC1_5 W6VCC1_5 W7VCC1_5 W8

VCCSATAPLL AA6VCCSATAPLL AB6

VCCUSBPLL C24

VCCSUS1_5_A F19VCCSUS1_5_B Y5VCCSUS1_5_B AA4VCCSUS1_5_B AB4VCCSUS1_5_C F7VCCSUS1_5_C F8

VCC1_5 E22

V_CPU_IO R15V_CPU_IO R19V_CPU_IO T19

VCC3_3B5

C4471U_0805_10V6K~D

1

2

R 3841K_0402_5%~D

12

C4450.1U_0402_16V4Z~D

1

2

C4630.1U_0402_16V4Z~D

12

C4890.01U_0402_16V7K~D

1 2

C4480.1U_0402_16V4Z~D

12

U5F

FW82801EB_mBGA460_ICH5~D

VSSA1

VSSA10VSSA15VSSA17VSSA19VSSA21VSSA23

VSSA7

VSSAA11VSSAA13VSSAA21VSSAA24

VSSAA5VSSAA7VSSAA9

VSSAB11VSSAB15VSSAB18

VSSAB5VSSAB7VSSAB9

VSSAC10VSSAC13

VSSAC2

VSSAC23

VSSAC4VSSAC6VSSAC8

VSSAD17VSSAD21VSSAD12

VSSAD4VSSAD6VSSAD8

VSSB13VSSB17VSSB19VSSB21VSSB23

VSSC16VSSC18VSSC20VSSC22

VSSC3VSSC8

VSSD1

VSSD11VSSD16VSSD18VSSD20VSSD22VSSD24

VSSD6

VSSE17VSSE19VSSE20VSSE21VSSE23VSSF3VSSF9

VSS G20VSS G24VSS G6

VSS H1VSS H19VSS H22

VSS J21VSS J23

VSS J6

VSS K11VSS K14VSS K20VSS K22VSS K24

VSS K3

VSS L10VSS L11VSS L12VSS L13VSS L14VSS L15VSS L21VSS L23VSS M1

VSS M11VSS M12VSS M13VSS M14VSS M22VSS M24

VSS M5

VSS N11VSS N12VSS N13VSS N14VSS N20VSS P1VSS P10VSS P11VSS P12VSS P13VSS P14VSS P15VSS P21VSS R11VSS R14VSS T23VSS T3VSS T6VSS U19VSS V1VSS V21VSS W16VSS W18

VSS Y10

VSS Y3VSS Y6VSS Y7VSS Y8

C 4440.1U_0402_16V4Z~D

1

2

C4720.1U_0402_16V4Z~D

1

2

C4460.1U_0402_16V4Z~D

12

C4500.01U_0402_16V7K~D

1 2

C4490.1U_0402_16V4Z~D

12

C4290.1U_0402_16V4Z~D

12

D 13

RB751V_SOD323~D

21

C4240.1U_0402_16V4Z~D

12

C4700.1U_0402_16V4Z~D

1

2

C4260.01U_0402_16V7K~D

1 2

C4570.1U_0402_16V4Z~D

12

C4740.1U_0402_16V4Z~D

12D 14

RB751V_SOD323~D

21

C4670.1U_0402_16V4Z~D

12

R391

1K_0402_5%~D

12

C4660.1U_0402_16V4Z~D

12

C430 0.01U_0402_16V7K~D

1 2

C4510.1U_0402_16V4Z~D

12

C4530.1U_0402_16V4Z~D

12

C4540.1U_0402_16V4Z~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

INT_CD_R

IDE_SDDACK#

BAY_MODPRES#

RSDDREQ

IDE_SDIORDY

IDE_IRQ15

IDE_SDCS1#

IDE_SDIOW#

INT_CD_L

IDE_SDCS3#

IDE_SDIOR#

IDE_RST_MOD_5V

IDE_SDD12

IDE_SDD1

IDE_SDD8

USBP4_D+

IDE_IRQ15

IDE_SDD11

BAY_MODPRES#

IDE_SDD13

IDE_SDD14

RSDDREQ

IDE_SDCS1#

IDE_SDD10

IDE_SDD3

IDE_SDD0

IDE_SDIOR#

IDE_SDDACK#

IDE_SDA1

IDE_SDA2

IDE_SDD7

IDE_SDD6

IDE_SDIORDY

IDE_SDD4

IDE_SDA0

IDE_SDD9

IDE_SDD2

IDE_SDIOW#

IDE_SDD15

IDE_SDCS3#

CD_AUDIORET

MOD_RST

IDE_SDD5

USBP4_D-

INT_CD_L

INT_CD_R

SATA_MOD_DETECT#

IDE_SDD8IDE_SDD7

IDE_SDD12

IDE_SDA1

IDE_SDD2IDE_SDD1

IDE_SDD3

IDE_SDA0

IDE_SDD11

IDE_SDD4

IDE_SDD10

IDE_SDD13

CSEL2

IDE_SDD9

IDE_SDD14IDE_SDD15

IDE_SDA2

IDE_SDD0

IDE_SDD6

USB_IDE#

IDE_SDD5

MOD_PIN15

PDIAG#

SATA_MOD_DETECT#USB_OC4#

SIDEACT#

+5VMOD +3VMOD

+3VMOD

+3VMOD

+3VRUN

+3VRUN +3VRUN

INT_CD_R<24>

IDE_SDIOR#<21>

IDE_SDCS1#<21>

IDE_SDA[0..2]<21>

INT_CD_L<24>

IDE_SDIORDY<21>

IDE_SDCS3#<21>

IDE_SDD[0..15]<21>

IDE_SDIOW#<21>

RSDDREQ<21>

IDE_IRQ15<20,21>

BAY_MODPRES#<33>

IDE_SDDACK#<21>USBP4_D+ <26>

USBP4_D- <26>

INT_CD_R <24>

INT_CD_L <24>

USB_IDE#<33>

IDE_RST_MOD_5V<21>

CD_AUDIORET<24>

SATA_MOD_DETECT# <33>

USB_OC4# <20>SATA_MODTX+<21>

SATA_MODTX-<21>

SATA_MODRX-<21>

SATA_MODRX+<21>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

23 60Wednesday, July 23, 2003

Compal Electronics, Inc.

D- MODULE

WF1F068N

1A

1

3

46

2

TOP VIEW

5

Reserved USB+

Reserved USB-

swap by Dell requirePlease see sketch

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

Parallel IDE

USB Device

S-ATA IDE

None

BAY_MODPRES#

Pin68

USB_IDE#

Pin64

SATA_MOD_DETECT#

Pin13JMOD1

Device

LOW

LOW

LOW

LOW

LOW

HIGH

HIGH HIGH

HIGH

HIGH X X

D-MODULE DetectMB side Module side

Direct connect

Connector

Host ChipICH5

Device ChipTX+

TX-

TX+

TX-

RX+

RX+

RX-

RX-

T12PAD@

C61

60.

1U_0

402_

16V4

Z~D

1

2

C60

247

P_04

02_5

0V8J

~D

1

2

R564 1K_0402_5%~D

1 2

R553100K_0402_5%~D

1 2

C60

147

P_04

02_5

0V8J

~D

1

2

C61

50.

1U_0

402_

16V4

Z~D

1

2

JMOD1

FOX_QL11343-A6B3-HT~D

1 122

3 344

5 566

7 788

9 91010

11 111212

13 131414

15 151616

17 171818

19 192020

21 212222

23 232424

25 252626

27 272828

29 293030

31 313232

33 333434

35 353636

37 373838

39 394040

41 414242

43 434444

45 454646

47 474848

49 495050

51 515252

53 535454

55 555656

57 575858

59 596060

61 616262

63 636464

65 656666

67 676868

M1

73M

274

G69

G71

G70

G72

C613

0.1U_0402_16V4Z~D

1

2

R5550_0402_5%~D

1 2

C612

0.1U_0402_16V4Z~D

1

2

C61

40.

1U_0

402_

16V4

Z~D

1

2

R554100K_0402_5%~D

1 2

R569

100K_0402_5%~D

1 2R567

0_0402_5%~D@ 1 2

R56

347

0_04

02_5

%~D

12

C61

74.

7U_1

206_

16V6

K~D

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ICH_AC_SDOUT

ICH_AC_RST#

R_ICH_AC_BITCLK

CD_AUDIORET

C AP2

SPK_SHUTDOWN#

ICH

_AC

_SD

OU

T_TE

RM

XTL_24M+

R _ICH_AC_SDIN0

E APD

CD_COMM

HP_COMM

SP DIF_SHDN

CD _L

CD_R

VREFOUT

ICH_AC_SDOUT

AC97VREFICNB_MICIN

AFLT2

ICH_A C_SYNC

A UDIO_AVDD_ON TPS793475_BYPASS

AFLT1

XTL_24M-

AU DIO_AVCC

Z2402

Z2401

Z2403 PC_BEEPINZ2404

PC_BEEPIN

SP DIF

SP DIF_SHDN

SP DIF

+ 3VRUN

VDDA

VD DA+5VSUS

VD DA

+ 5VRUN

I NT_CD_R <23>

ICH_AC_RST#<20,27>

AUD_LINE_OUT_L <25>

SPK_SHUTDOWN#<25,50>

E APD<25>

ICH_AC_SDOUT<20,27>

CD_AUDIORET <23>

MDC_AC_BITCLK<27>

NB_MICIN <25>

ICH_A C_SYNC<20,27>

INT_CD_L <23>

AUD_LINE_OUT_R <25>

A UDIO_AVDD_ON<34>

HP_OUT_R <25>

ICH_AC_BITCLK<20>

IC H_AC_SDIN0<20>

CBS_SPK<30>

BEEP<33>

S PKR<21>

S P_DIF <18>

HP_OUT_L <25>

AUD_MONO_OUT <50>

CK_14M_CODEC<6>

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

24 60Wednesday, July 23, 2003

Compal Electronics, Inc.

AC97 Codec

PACKAGE : 8X4.5X1.5mm

W=30 mil

VDDA=4.75V4

1

5

single gate TTL

2 3

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

7/22/2003 Dell request (Mr. Richard)

C16

12.

2U_0

805_

16VF

Z~D

1

2

STAC9750

U 16

STAC9750_TQFP48~D

PC_BEEP 12

PHONE 13

AUX_L 14

AUX_R 15

VIDEO_L 16

VIDEO_R 17

CD_L 18

CD_C 19

CD_R 20

MIC1 21

MIC2 22

LINE_IN_L 23

LINE_IN_R 24SDATA_OUT5

BIT_CLK6

SDATA_IN8

SYNC10 RESET#11

XTL_IN2

XTL_OUT3

LOUT_L 35

LOUT_R 36

MONO_OUT 37

CID045 CID146

GPIO0/NC43

GPIO1/NC44

HP_OUT_L 39

HP_COMM 40

HP_OUT_R 41

EAPD47

NC/FLTOUT34

NC/FLTIN33

CAP232

NC/BPCFG31

AFLT230

AFLT129

VREFOUT28

VREF27D

VD

D1

1D

VD

D2

9

AV

DD

125

AV

DD

238

DV

SS

14

DV

SS

27

AV

SS

126

AV

SS

242

SPDIF48

R22320K_0402_5% 1 2

C 6694.7P_0402_50V8C~D@

1

2

C17

00.

1U_0

402_

16V4

Z~D

1

2

C2120.1U_0402_16V4Z~D

1

2

C1621U_0805_10V6K~D

1 2

C575 1000P_0402_50V7K~D 1 2

R53133_0402_5%~D

1 2

C57

60.

1U_0

402_

16V4

Z~D

1

2

C5651000P_0402_50V7K~D

1

2

C22

40.

1U_0

402_

16V4

Z~D

1

2

C57

927

P_0

603_

50V8

J~D

@

1

2

R614

0_0402_5%~D@ 1 2

C 57022P_0402_50V8J~D@

1

2

R2218.2K_0402_5%~D

12

R23743K_0402_5%~D

12

C58

00.

1U_0

402_

16V4

Z~D

1

2

C57

127

P_0

603_

50V8

J~D

@

1

2

C2000.1U_0402_16V4Z~D

1 2

R 6190_0402_5%~D

12

C195 1U_0805_10V6K~D 1 2

C196 1U_0805_10V6K~D 1 2

C171 1000P_0402_50V7K~D 1 2

R53433_0402_5%~D

1 2

C18322P_0402_50V8J~D

1 2

U 20

SN74AHCT1G86DCKR_SC70-5~D

A1

B2 Y 4

P5

G3 C190

1000P_0402_50V7K~D@ 1

2

X2

24.576 MHz_20P_1BX24576CC1A~D

12

R52647_0402_5%~D

12

C1760.1U_0603_16V7K~D@

1 2

C197 1U_0805_10V6K~D 1 2

R 613

0_0402_5%~D@

1 2

R51210K_0402_5%~D

12

R61210_0402_5%~D@

12

C1920.1U_0402_16V4Z~D

1 2

C186

2.2U_0805_16VFZ~D

1

2

C2010.22U_0603_10V7M~D 1 2

L23BLM11A121S_0603~D

12C

215

0.1U

_040

2_16

V4Z~

D

1

2

C20

80.

1U_0

402_

16V4

Z~D

1

2

L16BLM31A260SPT_1206~D

1 2

C21

62.

2U_0

805_

16VF

Z~D

1

2

C19

81U

_080

5_10

V6K~

D

1

2

U 22

TPS793475DBVR_SOT23-5~D

OUT 5

BYPASS 4

GND2

EN3

IN1

C55

90.

1U_0

402_

16V4

Z~D

1

2

C20

90.

01U

_040

2_16

V7K~

D

1

2

U 21SN74AHCT1G86DCKR_SC70-5~D

A1

B2 Y 4

P5

G3

C16822P_0402_50V8J~D

1 2

R52533_0402_5%~D

1 2

U 12

SN74AHCT1G125DCKR_SC70-5~D

A2 Y 4

P5

G3

OE

#1

C1580.1U_0402_16V4Z~D

1

2

C5730.1U_0402_16V4Z~D

1

2

C1990.1U_0402_16V4Z~D

1 2

C5691000P_0402_50V7K~D

1

2

C578

0.1U_0402_16V4Z~D

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

INT_SPK_R1

INT_SPK_L1

INT_SPK_R1

HP_NB_SENSE

INT_SPK_L2

INT_SPK_R2

INT_SPK_R2

SPK_SHUTDOWN#

C_INT_MIC+

R_INT_MIC-

R_INT_MIC+

C_INT_MIC-

EXT_MIC_PLUG

EXT_MIC_BIAS

C_EXT_MIC+

INT_MIC+

AMPVCC

INT_MIC-

EMICIN

EXT_MIC_PLUG

EXT_MIC_BIASEMICIN

A UD_LINE_IN_R

AUD_LINE_IN_L

HP_OUT_RMAX

HP_OUT_LMAX

INT_SPK_L2INT_SPK_L1

A UD_GAIN0

A UD_GAIN1

INT_SPK_R1

INT_SPK_R2

INT_SPK_L1

INT_SPK_L2

A UD_GAIN0

A UD_GAIN1

+5VAMPVCC

BY PASS

INT_SPK_L2INT_TWT_L1INT_SPK_R2INT_TWT_R1

HP_OUT_LMAX

HP_NB_SENSE

HP_OUT_RMAX

HP_NB_SENSE

INT_SPK_R1

INT_SPK_L1

+ 3VRUN

VD DA

VDDA + 3VRUN

+ 5VRUN

+ 5VRUN

+ 5VRUN

+5VRUN

+ 3VRUN

NB_MUTE<33>

SPK_SHUTDOWN#<24,50>

E APD<24>

NB_MICIN <24>

INT_MIC-<38>

INT_MIC+<38>

FAN1_VOUT<14> FAN1_TACH_FB <14>

HP_OUT_L<24>

SPK_SHUTDOWN#<24,50>

HP_OUT_R<24>

AUD_LINE_OUT_R<24>

AUD_LINE_OUT_L<24>

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

25 60Wednesday, July 23, 2003

Compal Electronics, Inc.

AMP and Phone Jack Interface

TRACE>15 mil

60mil single end connection near JACK

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

GAIN0 GAIN1 AV(inv) INPUT

0

1

6dB

15.6dB

21.6dB

IMPEDANCE

90K ohm

70K ohm

45K ohm

25K ohm

10dB0

0

0

1 1

1

*

Gain Setting

W=40mils

W=15mils

G

D

S

Q39

2N7002_SOT23~D

2

13

C63922U_1206_16V4Z_V1

1 2

C16

91U

_080

5_10

V6K~

D

1

2

D6D DA204U@1

32

C1790.1U_0402_16V4Z~D

1 2

C 630

0.47U_0603_16V4Z1 2

C6340.47U_0603_16V4Z

1

2

C6270.1U_0402_16V4Z~D

1

2

D9D DA204U@1

32

R 5111K_0402_5%~D

12

C16

51U

_080

5_10

V6K~

D

1

2

R197100K_0402_5%~D

12

C5391U_0603_6.3V6M~D

1 2

C1780.1U_0402_16V4Z~D

1 2

R 45910K_0402_5%~D

12

C1572.2U_0805_16VFZ~D

1

2

L46

BLM11A121S_0603~D

12

R58410K_0402_5%~D @

12

R5051K_0402_5%~D

12

R4971K_0402_5%~D

12

C633

0.47U_0603_16V4Z1 2

C6290.1U_0402_16V4Z~D

1

2

D7D DA204U@1

32

C5351U_0603_6.3V6M~D

1 2

R58210K_0402_5%~D

12

U 18

TPA6017A2PWPR_TSSOP20~D

GN

D4

1G

ND

311

GN

D2

13G

ND

120

VD

D16

PV

DD

115

RIN-17

BYPASS 10

NC 12

LOUT- 8

LOUT+ 4

ROUT- 14

ROUT+ 18

RIN+7

LIN-5

LIN+9

GAIN0 2

GAIN1 3

PV

DD

26

SHUTDOWN19

L48

BLM21A05_0805

1 2

G

D

S

Q40

2N7002_SOT23~D

2

13

C6260.1U_0402_16V4Z~D

1

2

C5291U_0603_6.3V6M~D

1

2

U 13

CMAMP110M_MSOP8~DEXT_MIC_IN8GND7

EXT_MIC_BIAS 3

MIC_SELECT 1

INT_MIC+6

INT_MIC-5

OUT 2

VSUP 4

R 503100K_0402_5%~D

12

R51

71K

_040

2_5%

~D

12

R 58310K_0402_5%~D@

12

G

D

S

Q382N7002_SOT23~D

2

13

J SPKMOLEX_53398-0890~D

112233445566

99

1010

7788

C5450.1U_0402_16V4Z~D 1

2

C5371U_0603_6.3V6M~D

1

2

C 632

0.47U_0603_16V4Z1 2

C6350.1U_0402_16V4Z~D@

1

2

R 58510K_0402_5%~D

12

D8D DA204U@1

32

C631

0.47U_0603_16V4Z1 2

C63822U_1206_16V4Z_V1

1 2

JAU DO

NAIS_AXN320C038P~D

1133557799

2 24 46 68 8

10 1011111313151517171919

12 1214 1416 1618 1820 20

C5471U_0603_6.3V6M~D

1

2

C62810U_0805_10V4M~D

1

2

U 38

MAX4411ETP-T_TQFN20~D

C1P1

PG

ND

2

C1N3

NC-4 4

PV

ss5

NC-6 6

SV

ss7

NC-8 8

OUTL 9

SV

DD

10

INR15

SHDNR#14

INL13

NC-12 12

OUTR 11

NC-20 20

PV

DD

19

SHDNL#18

SG

ND

17

NC-16 16

C5610.1U_0402_16V4Z~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

USBP3_D-

USBP5_D+

USBP4_D+

USBP1_D-

USBP1_D+ USBP2_D+

USBP5_D-

USBP5_D+

USBP5_VCC

USBP2_D+

USBP3_D+

USBP2_VCC

DH_SMBCLKCLK_SMB

USBP5_D-

DH_SMBDAT

D H_PORT_PWRSRC

Z250

2

DAT_SMB

USBP4_D-

USBP2_D-

USBP2_GND

DH_P WRSRC_OC

USBP2_D-

USBP5_GND

DH_ PWR_OC#

DH_F USE_PWRSRC

USBP6_D+

Z2501

DH_PW RSRC

USBP6_VCCUSBP6_D-USBP6_D+

D H_POWER_EN#

DH _POWER_EN

USBP6_GND

USBP6_D-

D H_PORT_PWRSRC

DH_SMBCLK

USBP3_D-USBP3_VCC

USBP3_D+USBP3_GND

DH_SMBDAT

U SBP5_PWR

U SBP2_PWR

U SBP5_PWR

U SBP2_PWR

+ 3VRUN

PWR_ SRC

USBP3_PWR

U SBP6_PWR

U SBP6_PWR

U SBP3_PWR+5VSUS

+5VSUS

+5VSUS

+5VSUS

USBP2-<20>

USB_OC5# <20>

DAT_SMB<19,34,35,47>

USB_OC2# <20>

USBP3+<20>

USBP3-<20>

DH_PW RSRC_OC <33>

USBP1-<20>

DH_ POWER_EN <33>

USBP1+<20> USBP1_D+ <27>

CLK_SMB<19,34,35,47>

USBP1_D- <27>

USBP5+<20>

USBP2+<20>

USBP5-<20>

USBP6+<20>

USBP6-<20>

USB_OC6# <20>

USB_OC3# <20>

USB_EN#<33>

DH_MOD_PRES#<34>

USBP4-<20>

USBP4+<20>

USBP4_D- <23>

USBP4_D+ <23>

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

26 60Wednesday, July 23, 2003

Compal Electronics, Inc.

USB(2.0) Connector

2

BT

3 DOG

BACK

1

5

PLACE CHOKE(Resistors)NEAR CONNECTOR

BACK

MOD

USB PORT#

0

DESTINATION

6BACK

Follow LK2 and need confirm final SPEC

4

7Reserved

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

Reserved

J USB3

SUYIN_2569A-04G3T

1234

C268

0.1U_0402_16V4Z~D

1

2

F2

RAY _RUE250@

L44DLW21SN900SQ2_0805~D@

11

44 3 3

2 2

L47DLW21SN900SQ2_0805~D@

11

44 3 3

2 2

L26BLM21PG600SN1D_0805~D

1 2

R 12 0_0402_5%~D1 2

L30BLM21PG600SN1D_0805~D

1 2

C147P_0402_50V8J@

C25

80.

1U_0

402_

16V4

Z~D

1

2

R 10 0_0402_5%~D1 2

C61147P_0402_50V8J@

C347P_0402_50V8J@

R7 0_0402_5%~D1 2

R 31610K_0402_5%~D

12

R307100K_0402_5%~D

12

J USB1

SUYIN_2569A-04G3T

1234

R408 0_0402_5%~D1 2

F11.8A_33VDC_SMD185~D

1 2

G

D

S

Q92N7002_SOT23~D

2

13

L25BLM21PG600SN1D_0805~D

1 2

L5BLM21PG600SN1D_0805~D

1 2

R 2710K_0402_5%~D

12

+

C26

115

0U _

D2_

6.3V

M~D

1

2

U 31

TPS2042ADR_SO8~D

GND1IN2

OC2# 5OUT2 6

OC1# 8

EN1#3EN2#4

OUT1 7

C2600.1U_0402_16V4Z~D

1

2

+

C26

215

0U _

D2_

6.3V

M~D

1

2

R5 0_0402_5%~D1 2

C447P_0402_50V8J@

C61047P_0402_50V8J@

G

D S

Q62N7002_SOT23~D2

1 3

Q66SI4435DY_SO8~D

365 7 8

2

4

1

C269

0.1U_0402_16V4Z~D

1

2

R565 0_0402_5%~D1 2

L3DLW21SN900SQ2_0805~D@

11

44 3 3

2 2

R30

610

0K_0

402_

5%~D

12

L2DLW21SN900SQ2_0805~D@

11

44 3 3

2 2

J USB2

SUYIN_2569A-04G3T

1234

C747P_0402_50V8J@

R9 0_0402_5%~D1 2

C46147P_0402_50V8J@

JD OG

FOX_UB11193-P01-TR~D

T11T22T33T44

PWR_SRC5SMB_DATA6SMB_ALERT7SMB_CLK8GND9

SHILD110SHILD211SHILD312SHILD413

C25

90.

1U_0

402_

16V4

Z~D

1

2

R 11 0_0402_5%~D1 2

C247P_0402_50V8J@

R31

710

0K_0

402_

5%~D 1

2

C90.1U_0603_25V7M~D

1

2

+

C26

315

0U _

D2_

6.3V

M~D

1

2

C46247P_0402_50V8J@

L31BLM21PG600SN1D_0805~D

1 2

L24BLM21PG600SN1D_0805~D

1 2

L27BLM21PG600SN1D_0805~D

1 2

R 1710K_0402_5%~D

12

R8 0_0402_5%~D1 2

C25

70.

1U_0

402_

16V4

Z~D

1

2

L29BLM21PG600SN1D_0805~D

1 2

G

D S

Q22N7002_SOT23~D

2

1 3

R318100K_0402_5%~D

12

R566 0_0402_5%~D1 2

L28BLM21PG600SN1D_0805~D

1 2L4

DLW21SN900SQ2_0805~D @

11

44 3 3

2 2

C29

2

0.02

2U_0

603_

50V4

Z~D

1

2

+C 265150U _D2_6.3VM~D

1

2

G

D

S

Q642N7002_SOT23~D

2

13

G

D

S

Q42N7002_SOT23~D

2

13

C547P_0402_50V8J@

U 32

TPS2042ADR_SO8~D

GND1IN2

OC2# 5OUT2 6

OC1# 8

EN1#3EN2#4

OUT1 7

L1DLW21SN900SQ2_0805~D@

11

44 3 3

2 2

C847P_0402_50V8J@

R407 0_0402_5%~D1 2

C647P_0402_50V8J@

G

D

S

Q12N7002_SOT23~D

2

13

R6 0_0402_5%~D1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Z2604

MDC_SDIN

MD

C_A

C_B

ITC

LK_T

ERM

Z2602

ICH

_AC

_SD

OU

T_M

DC

TER

M

BT_P

WR

COEX2_WLAN_ACTIVE

COEX3COEX1_BT_ACTIVE

USBP1_D-

HW_RADIO_DIS#

USBP1_D+

+3VSUS

+3VSUS

+3VSUS

ICH_AC_SDOUT <20,24>

MDC_AC_BITCLK<24>

ICH_AC_SYNC<20,24>

ICH_AC_RST# <20,24>

BT_ACTIVE<38>

USBP1_D+<26>USBP1_D-<26>

HW_RADIO_DIS#<32,34>COEX1_BT_ACTIVE<32>

COEX2_WLAN_ACTIVE<32>

ICH_AC_SDIN1<20>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

27 60Wednesday, July 30, 2003

Compal Electronics, Inc.

BT PORT and MDC

W=20 mil

1

10

FOX_HS6210_10P

TOP view

7/28 Changed to NPby Dell's require

MDM_MONO_PHONE

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

MDC cable wire clip

JBT

JST_BM10B-SRSS-TB~D11 22 33 44 55 66 77 88 99 1010

11 1112 12

C52722P_0402_50V8J~D@

1

2

R45410K_0402_5%~D@

12

C52

50.

1U_0

402_

16V4

Z~D

1

2

C15

94.

7U_1

206_

16V6

K~D

1

2

PAD3

MDC_CLIP

1

T2PAD@

R41

210

K_04

02_5

%~D

@1

2

R44910K_0402_5%~D@1 2

R45810_0402_5%~D@

12

C52610P_0402_50V8J~D@

1

2

R46210_0402_5%~D@

12

JMDC

AMP_3-1612118-0~D

MONO_OUT/PC_BEEP 1AGND 3

AUXA_RIGHT 5AUXA_LEFT 7

CD_GND 9CD_RIGHT 11

CD_LEFT 13GND 15

AC97_SDATA_OUT 233.3Vmain 21

3.3Vaux 17GND 19

AC97_RESET# 25GND 27

AC97_MSTRCLK 29

AUDIO_PWDN2MONO_PHONE4RESERVED6GND8+5V10RESERVED12RESERVED14PRIMARY_DN16RESERVED18RESERVED20AC97_SYNC22AC97_SDATA_IN124AC97_SDATA_IN026GND28AC97_BITCLK30

C53010P_0402_50V8J~D@

1

2

R45733_0402_5%~D 1 2

R46

30_

0402

_5%

~D @

12

L43

BLM11A601S_0603~D

12

C4590.1U_0402_16V4Z~D

1

2

PAD2

MDC_CLIP

1

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCI_C_BE1#

PCI_REQ4#

LAN_GPIO0

PCI_AD17

PCI_STOP#

PCI_AD29

PCI_C_BE0#

LAN_GPIO2

PCI_AD26

PCI_TRDY#LAN_TRST#

V_1P2_PLLVDD_PHY

XTALI

PCI_AD7

LAN_CTRL_1P2V

LAN_SMBCLK

SYS_PME#

PCI_AD27

LAN_CTRL_1P2V

PCI_AD21

PCIRST_1#

LAN_CTRL_2P5V

PCI_AD25

PCI_AD13

LAN_EEDATA_SPROM_CS

LAN_ACT#

PCI_AD10

LAN_EEPROM_W

PCI_PAR

V_1P2_PLLVDD_PHY

PCI_SERR#

LAN_CTRL_2P5V

PCI_AD1

PCI_AD3

PCI_C_BE2#

CK_33M_LANPCI

PCI_C_BE3#

PCI_FRAME#

PCI_AD20

PCI_IRDY#

PCI_AD12

PCI_AD0

LAN_AUXPWR

LAN_SMBDATA

PCI_PERR#

LAN_TX3+

PCI_AD16

LINK_LED_10#

PCI_AD18

PCI_GNT4#

LAN_EEDATA_SPROM_CS

PCI_PIRQC#

LAN_BIAS

PCI_AD30

PCI_AD4

LAN_TX3-

LAN_EECLK_SPROM_CLK

LAN_TX2-

CLK_82540_TERM

PCI_AD9

PCI_AD31

PCI_AD14

PCI_AD22

PCI_AD15

PCI_AD11

CK_33M_LANPCI

PCI_AD28

PCI_AD19

PCI_AD16

PCI_AD5

LAN_EECLK_SPROM_CLK

LAN_TX2+

PCI_AD8

PCI_DEVSEL#

LINK_LED_100#

LAN_RDAC

PCI_AD24PCI_AD23

VAUX_LAN

PCI_AD6

PCI_AD2

LAN_EEPROM_W

LAN_TX0-LAN_TX0+

LAN_RX1+LAN_RX1-

AVDD1P2

LAN_IDSEL

XTALO

5705M_LOWPWR

AVDD2P5

5705M_CLKRUN#

LAN_EEDATA_SPROM_CSLAN_EECLK_SPROM_CLKLAN_SPROM_DOUTLAN_SPROM_DIN

LAN_SPROM_DOUTLAN_SPROM_DIN

LINK_LED_1000#

LAN_SMBDATALAN_SMBCLK

V_2P5_LAN

V_2P5_LAN

V_3P3_LAN

V_2P5_LAN

V_1P2_LAN

V_3P3_LAN

V_3P3_LAN

V_3P3_LAN

V_2P5_LAN

V_1P2_LAN

+3VRUN

V_1P2_LAN

V_1P2_LAN

V_3P3_LAN

V_2P5_LAN

V_2P5_LAN

V_2P5_LAN

V_2P5_LAN

V_1P2_LAN

+3VSRC

V_3P3_LAN

+3V_LOM_PCI

V_3P3_LAN +3VRUN

+3V_LOM_PCIV_3P3_LAN

PCI_IRDY#<20,30,32>

LAN_TX2+ <29>

PCI_C_BE1#<20,30,32>

PCI_SERR#<20,30,32>

PCI_TRDY#<20,30,32>

CK_33M_LANPCI<6>

PCI_AD[0..31]<20,30,32>

SYS_PME#<30,32,33>

LAN_ACT# <29>

PCI_GNT4#<20>

LINK_LED_10# <29>

PCI_REQ4#<20>

PCI_DEVSEL#<20,30,32>

PCI_FRAME#<20,30,32>

PCI_C_BE3#<20,30,32>PCI_C_BE2#<20,30,32>

ENAB_3VLAN<39>

PCI_PERR#<20,30,32>

LINK_LED_100# <29>

PCI_C_BE0#<20,30,32>

LAN_TX3- <29>

LAN_TX2- <29>

LAN_TX3+ <29>

PCI_PAR<20,30,32>

PCIRST_1#<20>PCI_PIRQC#<20,30>

PCI_STOP#<20,30,32>

LAN_TX0- <29>LAN_TX0+ <29>LAN_RX1- <29>LAN_RX1+ <29>

LAN_LOW_PWR <34>

LINK_LED_1000# <29>

LAN_SMBDATA <32>LAN_SMBCLK <32>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

28 60Wednesday, July 23, 2003

Compal Electronics, Inc.

ETHERNET

2

BCP69

4C

1E3

C

B

R299 is poped for 4401 with AT93C86 (16KB)R299 is poped for 5705M EEPROM 376KHz modeR299 is depop for 4401 with AT93C46 (1KB)

2@ BCM4401

2@ BCM4401

Place within 100 mils to pins N10 and N11

Place within 100 mils to pins H14

20mils trace width

Place within 50 mils ofASIC pin D10

8-10mils trace width

Place within 100 mils of ASICpin A14, 10mils trace width

Place within 100 mils of ASICpins, 10-20mils trace width

ORBCM4401

ORBCM4401

POP5705

Should be pulled down for both 4401 and 5705M

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D2

@1.27K_0402_1%~D

5705M :1.24K_0402_1%4401: 1.27K_0402_1%

No pullup

Pullup for 376KHz mode

Pullup for 16KB

No pullup for 16KB

LAN_EEDATA_SPROM_CS

LAN_EECLK_SPROM_CLK

5705M4401Signal

Beijing 5705MNimitz 4401

1@

2@

@ Depop Depop

Depop

DepopPop

Pop

R311(1.24K_1%)R311(1.27K_1%)

L32(H5015T)L32(H1238)

POP4401

C30

70.

1U_0

402_

16V4

Z~D

1

2

C1822P_0402_50V8J~D

1

2

C34910U_1206_6.3V7K~D

1

2

R29

61K

_040

2_5%

~D 1

@1

2

C28

10.

1U_0

402_

16V4

Z~D

1

2

C34

410

U_1

206_

6.3V

7K~D

1

2

C33

210

U_1

206_

6.3V

7K~D

1

2

U33

AT24C256N-10SC_SO81@

A0 1A1 2NC 3

GND 4

VCC8WP7SCL6SDA5

R31

11.

24K_

0402

_1%

~D 1

@1

2

C30

90.

1U_0

402_

16V4

Z~D

1

2

C31

30.

1U_0

402_

16V4

Z~D

1

2

R308 0_0402_5%~D2@ 1 2

C311

0.01U_0402_16V7K~D

2@

1

2

C11

2.2U

_080

5_16

VFZ~

D

1

2

C20

0.1U

_040

2_16

V4Z~

D1@

1

2

C35

010

U_1

206_

6.3V

7K~D

1

2

C31

20.

1U_0

402_

16V4

Z~D

1

2

C32

30.

1U_0

402_

16V4

Z~D

1

2

C27

40.

1U_0

402_

16V4

Z~D

1

2

C33

310

U_1

206_

6.3V

7K~D

1

2

C3218.2P_0402_50V8J~D@

1 2

S

GD

Q18SI3456DV-T1_TSOP6~D

3

6

245

1

C31

50.

1U_0

402_

16V4

Z~D

1

2

C31

40.

1U_0

402_

16V4

Z~D

1

2

C28

60.

1U_0

402_

16V4

Z~D

1

2

C27

70.

1U_0

402_

16V4

Z~D

1@

1

2

C31

00.

1U_0

402_

16V4

Z~D

1

2

C26

610

U_1

206_

6.3V

7K~D

1

2

C28

20.

1U_0

402_

16V4

Z~D

1

2

R29

94.

7K_0

402_

5%~D

1@

12

C34

310

U_1

206_

6.3V

7K~D

1

2Q5

BCP69_SOT-2231@ 3

1

2 4

R3104.7K_0402_1%~D

12

R300 0_0603_5%~D1@ 1 2

X125MHz_20P_1BX25000CK1A~D

12

L35BLM11A601S_0603~D

1 2

C27

20.

1U_0

402_

16V4

Z~D

1

2

C33

50.

1U_0

402_

16V4

Z~D

1

2

C31

60.

1U_0

402_

16V4

Z~D

1

2

C28

50.

1U_0

402_

16V4

Z~D

1

2

L6BLM11A601S_0603~D1@

1 2

C17

0.1U

_040

2_16

V4Z~

D

1

2

C27

80.

1U_0

402_

16V4

Z~D

1

2

C32

00.

1U_0

402_

16V4

Z~D

1

2

C26

710

U_1

206_

6.3V

7K~D

1

2 C29

30.

1U_0

402_

16V4

Z~D

1

2

C34

00.

1U_0

402_

16V4

Z~D

1

2

BCM5705M

U2A

BCM5705M_FBGA196~D1@

AD31B8AD30A8AD29C7AD28C6AD27B6AD26B5AD25A5AD24B4AD23B2AD22B1AD21C1AD20D3AD19D2AD18D1AD17E3AD16K1AD15L2AD14L1AD13M3AD12M2AD11M1AD10N2AD9N3AD8P3AD7N4AD6P4AD5M5AD4N5AD3P5AD2P6AD1M7AD0N7

CBE3C4CBE2F3CBE1L3CBE0M4

IDSELA4FRAMEF2IRDYF1TRDYG3DEVSELH3STOPH1PERRJ2SERRA2PARJ1PCI_CLKA3

INTAH2PCI_RSTC2GNTJ3REQC3

VAUXPRSNTJ12M66ENF4PMEA6

TRD3+ E13TRD3- E14TRD2+ D13TRD2- D14TRD1+ C13TRD1- C14TRD0+ B13TRD0- B14

REGSUP12 B9REGCTL12 B10REGSEN12 A9

REGSUP25 B11REGCTL25 C11REGSEN25 C10

VESD1 P1VESD2 G2VESD3 A1

EEDATA P10EECLK M10

GPIO1 K13GPIO2 J13

LINKLEDB G13SPD100LEDB H13

SPD1000LEDB G12TRAFFICLEDB G14

PLLVDD2 H14NC P7

TCK C12TDI D12

TDO B12TMS A12

TRST D11

XTALVDD J14XTALO N10XTALI N11

SO G11SI E10

SCLK E11CS H11

BIASVDD A14RDAC D10

SMB_CLK A10SMB_DATA C9

GPIO0 H12

C3422P_0402_50V8J~D

1

2

C2711000P_0402_50V7K~D 1

2

R49100_0402_5%~D

1 2

R31910_0402_5%~D@

12

C34

10.

1U_0

402_

16V4

Z~D

1

2

C28

30.

1U_0

402_

16V4

Z~D

1

2

R32

1

10K_

0402

_5%

~D

12

C32

60.

1U_0

402_

16V4

Z~D

1

2

C27

90.

1U_0

402_

16V4

Z~D

1

2

BCM5705M

U2B

BCM5705M_FBGA196~D1@

VDDC_E12E12

VDDC_H8H8VDDC_J5J5VDDC_J6J6VDDC_J7J7VDDC_J8J8VDDC_J9J9VDDC_J10J10VDDC_K5K5VDDC_K6K6VDDC_K7K7VDDC_K8K8

VDDC_N14N14VDDC_P8P8VDDC_P12P12VDDC_P13P13VDDC_P14P14

VDDIO-PCI_A7A7VDDIO-PCI_B3B3VDDIO-PCI_C5C5VDDIO-PCI_E1E1VDDIO-PCI_E4E4VDDIO-PCI_G1G1VDDIO-PCI_K3K3VDDIO-PCI_L4L4VDDIO-PCI_N6N6VDDIO-PCI_P2P2

VDDP_K14K14VDDP_L13L13VDDP_P11P11

NC_J11J11NC_K11K11NC_L7L7NC_L8L8

VSS_D7 D7VSS_D8 D8VSS_D9 D9VSS_E2 E2VSS_E5 E5VSS_E6 E6VSS_E7 E7VSS_E8 E8VSS_E9 E9VSS_F5 F5VSS_F6 F6VSS_F7 F7VSS_F8 F8VSS_F9 F9

VSS_F10 F10VSS_G4 G4VSS_G5 G5VSS_G6 G6VSS_G7 G7VSS_G8 G8VSS_G9 G9

VSS_G10 G10VSS_H9 H9VSS_K2 K2VSS_L6 L6VSS_L9 L9

VSS_M6 M6VSS_M12 M12VSS_M13 M13

VSS_N1 N1VSS_N12 N12VSS_N13 N13

AVDDL_F12 F12AVDDL_F13 F13

AVDD_F14 F14

NC_L11 L11NC_L14 L14NC_M8 M8

VDDC_H7H7 VDDC_H6H6 VDDC_H5H5

VDDC_K9K9VDDC_K10K10VDDC_L5L5VDDC_L10L10VDDC_M14M14

VSS_D6 D6VSS_D5 D5VSS_D4 D4VSS_B7 B7

AVDD_A13 A13

NC_M9 M9LOW_POWER M11

NC_N8 N8NC_N9 N9NC_P9 P9

NC_H10H10NC_J4J4NC_K4K4

VDDIO_A11A11VDDIO_F11F11VDDIO_K12K12VDDIO_L12L12

CLKRUNH4 CSTSCHGC8

L38

BLM

11A6

01S_

0603

~D 1

@

12

C29

10.

1U_0

402_

16V4

Z~D

1

2

C27

31U

_080

5_10

V6K~

D

1

2

C25

10U

_120

6_6.

3V7K

~D

1

2

R30

210

K_04

02_5

%~D

1@1

2

T8 PAD@

C31

80.

1U_0

402_

16V4

Z~D

1

2

C30

60.

1U_0

402_

16V4

Z~D

1

2

L37BLM31A260SPT_1206~D 1 2

C33

00.

1U_0

402_

16V4

Z~D

1

2

R3031K_0402_5%~D

12

C27

00.

1U_0

402_

16V4

Z~D

1

2

L36BLM11A601S_0603~D

1 2

T7 PAD@

Q65BCP69_SOT-2231@ 3

1

2 4

R313 0_0402_5%~D 2@1 2

L39

BLM

11A6

01S_

0603

~D2@

12

L33BLM11A601S_0603~D

1 2

R312

10K_0402_5%~D

2@

12

U34

AT93C46-10SI-2.7_SO8~D2@

CS1SK2DI3DO4

VCC 8NC 7

ORG 6GND 5

C27

50.

1U_0

402_

16V4

Z~D

1

2

C32

80.

1U_0

402_

16V4

Z~D

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LAN_TX2-

LAN_TX2+

NB_LAN_TX3+

NB_LAN_RX+

LAN_TX0+

Z2807

Z2805

NB_LAN_TX-

Z2806

NB_LAN_TX2-

Z2808

LAN_TX3-

NB_LAN_RX-

NB_LAN_TX3-

NB_LAN_TX2+

NB_LAN_TX+

LED_100_ORG#

LAN_RX1+

LAN_RX1-

LED_10_GRN#

RJ_TIP

LAN_ACTLED_YEL#

RJ_RING

NB_LAN_RX+

NB_LAN_RX-

NB_LAN_TX-

NB_LAN_TX2+

NB_LAN_TX3+NB_LAN_TX3-

NB_LAN_TX+

LAN_TX3-LAN_TX3+

LAN_TX2-LAN_RX1+

LAN_TX0+LAN_TX0-

LAN_RX1-

NB_LAN_TX2-

LED_100_ORG#

LAN_TX3+

LED_10_GRN#

LAN_TX0-

RJ_RINGRJ_TIP

LAN_TX2+

LAN_ACTLED_YEL#

V_2P5_LAN

V_3P3_LAN

V_3P3_LAN

V_3P3_LAN

V_3P3_LAN

V_3P3_LAN

V_3P3_LAN

V_2P5_LAN

V_3P3_LAN

LINK_LED_10#<28>

LAN_ACT#<28>

WLAN_LED_ACTIVITY<32>

LINK_LED_100#<28>

LED_WLAN24_RADIOSTATE<32>

LED_WLAN5_RADIOSTATE<32>

LAN_TX3+<28>

LAN_TX2+<28>

LAN_TX0+<28>

LAN_RX1-<28>

LAN_RX1+<28>

LAN_TX3-<28>

LAN_TX2-<28>

LINK_LED_1000# <28>

LAN_TX0-<28>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

29 60Wednesday, July 23, 2003

Compal Electronics, Inc.

LAN TRANSFOMER

DTC144EKA

C

GNDCHASIS

EB

1

2 3

Magnetics pop options4401: H12385705M: H5015D

2@ H1238

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

Bejing 5705MNimitz 4401

1@

2@

@ Depop Depop

Depop

DepopPop

Pop

LINK CS 21.5

R19 49.9_0402_1%~D1 2

C130.01U_0402_16V7K~D

1

2

R30910K_0402_5%~D

12

R32150_0402_5%~D

1 2

C150.01U_0402_16V7K~D

1

2

1:1

T1

1:1

T5

T2 T6

T3 T7

1:1

T4 T8

1:1

L32

H5015D~D1@

1

2

3

4

5

6

7

8

9

10

11

12 13

14

15

16

17

18

19

20

21

22

23

24

G

D

SQ32N7002_SOT23~D

2

13

RJ45/LED

RJ11

JLOM

FOX_JM34F23-P3552-TR~D

B1B1

P1_11P1_22P1_33P1_44P1_55P1_66P1_77P1_88

SGND2 18

P2_210P2_19

YEL B3

B2B2

GRN A3A2A2

SGND1 17

AMBER A1

R60010K_0402_5%~D

12

R22 49.9_0402_1%~D1 2

D11RB495D_SOT23~D

2 31

R292200_0402_5%~D 1 2

R29510K_0402_5%~D

1 2

R305

10K_0402_5%~D1@

1 2

R29410K_0402_5%~D

12

JPH_RJ

JST_SM05B-SRSS-TB~D

1122

55

6 67 7

47K

47K

Q62

DTC144EKA_SOT23~D2

13

R26 49.9_0402_1%~D1@ 1 2

R60110K_0402_5%~D

12

R60210K_0402_5%~D

12

R20 49.9_0402_1%~D1 2

C2641000P_1808_3KV7K~D

1 2

R30410K_0402_5%~D

1 2

R25 49.9_0402_1%~D1@ 1 2

C140.01U_0402_16V7K~D1@

1

2

R29710K_0402_5%~D

12

D12

RB495D_SOT23~D1@

2

31

C160.01U_0402_16V7K~D1@

1

2

R298200_0402_5%~D 1 2

R23 49.9_0402_1%~D1@1 2

R3310K_0402_5%~D

12

R29310K_0402_5%~D

12

RN675_1206_8P4R_5%~D

18

27

36

45

D10RB495D_SOT23~D

2 31

D22

BAT54A_SOT23~D

1

2

3

R21 49.9_0402_1%~D1 2

47K

47K

Q63

DTC144EKA_SOT23~D2

13

R24 49.9_0402_1%~D1@1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

IEEE1394_TPBIAS0

CBS_CAD30

PCI_AD23

PCI_AD2

PCI_AD15

CBS_CAD9

CBS_GRST# IRQ_SERIRQ

CBS_CC/BE0#

SCR_IF_PWR

CBS_PC2

PCI_AD14

PCI_AD5

CBS_CCD2#_INTERNAL

PCI_AD17

CBS_CSERR#

CBS_CAD19

IEEE1394_TPB0P

PCI4510_R0

CBS_CRST#

IEEE1394_TPA0N

CBS_CAD10

CK3

3M_C

BS_T

ERM

CBS_SDA

CBS_CAD21

CBS_CAUDIO

CBS_CAD1

SCR_IF_DATA

CBS_CAD13

CBS_CCLK_INTERNAL

PCI_AD17

SYS_PME#

CBS_CFRAME#

PCI_GNT1#

PCI_AD18

PHY_CNA

CBS_TEST1

PCI_AD21

CBS_SCL

PCI_C_BE3#

CBS_CAD25

PCI_REQ1#

CBS_CAD15

CBS_CSTOP#

SCR_IF_RSTPCI4510XI

PCI_AD24

SCR_IF_GPIO2

CBS_CIRDY#

PCI_AD9

CBS_CGNT#

PCI_AD16

1V8_VR_EN#

CBS_SPK

PCI_AD12

CBS_CAD18

CBS_SCL

PCI4510_R1

CBS_SDA

CBS_CAD24

CBS_CAD28

PCI_AD13

PCI_AD28

PCI_PERR#

CBS_CAD20

CBS_CVS1

CBS_CAD6

CBS_CPERR#

PCI_SERR#

SCR_IF_GPIO0

SCR_IF_CLK

PCI_AD11

SCR_IF_GPIO5

CBS_CTRDY#

IEEE1394_TPA0P

CBS_CC/BE2#

PCI_TRDY#

PCI_C_BE1#

CBS_CAD12

SCR_IF_GPIO1

PCI_PIRQD#

PCI_C_BE2#

TI_SUSPEND#_INTERNAL

CBS_CC/BE3#

PCI_AD10

CBS_CVS2

CK_48M_SCR

PCI_PIRQC#

CBS_CSTSCHNG

PCI_AD31PCI_AD30

CBS_CAD7

PCI_AD25

CBS_CINT#

IEEE1394_TPB1N

PCI_AD4

PCI_FRAME#PCI_DEVSEL#

PCI_PAR

PCI_STOP#

PCI_AD29

FILTER1

CBS_CAD17

PCI_GNTB#

CBS_CBLOCK#

PCI_AD22

SCR_IF_GPIO3

CBS_CAD5

PCI4510XO

CBS_CAD26

CBS_RSVD/D14

CBS_CCD1#_INTERNAL

PCI_AD0

IEEE1394_TPA1P

PHY_TEST_MA

CBS_CREQ#

CBS_CCLK

CBS_RSVD/A18

PCI_AD7

CBS_CAD29

CBS_CAD2

PCI_IRDY#

PCI_AD27

CBS_CAD23

PCI_REQB#

CBS_RI#

PCI_AD19

PCI_AD1

IEEE1394_TPB1P

CBS_CAD3

CBS_CAD14

PCI_AD26

CBS_CAD0

SCR_DETECT

FILTER0

PCI_AD20

CBS_CAD16

PCI_AD8

CBS_CAD31

SCR_IF_GPIO4

CK4

8M_C

BS_T

ERM

CBS_IDSEL

CBS_CDEVSEL#

CBS_CC/BE1#

CBS_RSVD/D2

CBS_PC0

CBS_CAD8

PCIRST_CB#

CBS_CAD22

PCI_AD3

CBS_CAD11

IEEE1394_TPBIAS1

CBS_CAD27

PCI_C_BE0#

CBS_CPAR

CBS_CCLKRUN#

IEEE1394_TPB0N

CBS_TEST0

PCI_AD6

CBS_CAD4

CBS_MFUNC6

PHY_CPS

CBS_PC1

IEEE1394_TPA1N

+3V_CBSD

CBS_VCC

+3V_CBSD

+1.8V_CBSD

+3V_CBSD

+3V_CBSD

+3V_CBSA

+3VSUS

+3V_CBSD

+3V_CBSD

+3V_CBSD

+3V_CBSA

+3V_CBSA

+3V_CBSA

+3VSUS

+3V_CBSD

+3V_CBSD

+1.8V_CBSD

SCR_IF_GPIO4<31>

CBS_CFRAME# <31>

CBS_CPAR <31>

CBS_RSVD/D2 <31>

CBS_CCD2# <31>CBS_CCLKRUN# <31>

SCR_DETECT<31>

CBS_CAD[0..31] <31>

PCI_C_BE2#<20,28,32>

CBS_CVS1 <31>

PCI_FRAME#<20,28,32>

PCI_GNTB# <20>

PCI_PAR<20,28,32>

CBS_RSVD/A18 <31>

IEEE1394_TPA0P<31>

SCR_IF_DATA<31>

CBS_CSTSCHNG <31>

CBS_CPERR# <31>

CBS_CC/BE3# <31>

PCI_GNT1#<20>

CBS_CSERR# <31>

SYS_PME# <28,32,33>

PCI_C_BE3#<20,28,32>

SCR_IF_GPIO3<31>

PCI_REQB# <20>

PCI_AD[0..31]<20,28,32>

SCR_IF_RST<31>

CBS_CGNT# <31>

CBS_CSTOP# <31>

CBS_CAUDIO <31>

CBS_CC/BE2# <31>

PCI_SERR#<20,28,32> CBS_SPK <24>

PCIRST_CB#<20>

CBS_CIRDY# <31>

SCR_IF_GPIO2<31>

CBS_RSVD/D14 <31>

CBS_VPPD0 <31>

PCI_C_BE1#<20,28,32>

CK_48M_SCR <6>

IRQ_SERIRQ <20,21,33>

IEEE1394_TPA0N<31>

CBS_CBLOCK# <31>

CBS_CCD1# <31>

PCI_PIRQD# <20,32>

IEEE1394_TPB0P<31>

CBS_GRST#<33>

PCI_STOP#<20,28,32>

SCR_IF_GPIO0<31>

CBS_CTRDY# <31>

CBS_CREQ# <31>

CBS_CC/BE1# <31>

PCI_PERR#<20,28,32>PCI_REQ1#<20>

SCR_IF_CLK<31>

CBS_RI# <21>

PCI_IRDY#<20,28,32>

IEEE1394_TPB0N<31>

CBS_VCCD0# <31>

SCR_IF_GPIO1<31>

CBS_CDEVSEL# <31>

CBS_CINT# <31>

CBS_CC/BE0# <31>

IEEE1394_TPBIAS0<31>

CBS_CCLK <31>

CBS_CRST# <31>

SCR_IF_PWR<31>

TI_SUSPEND# <34>

PCI_C_BE0#<20,28,32>

CBS_CVS2 <31>

PCI_TRDY#<20,28,32>

CBS_VPPD1 <31>

PCI_DEVSEL#<20,28,32>

CBS_VCCD1# <31>

CK_33M_CBPCI<6>

SCR_IF_GPIO5<31>

PCI_PIRQC# <20,28>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

30 60Wednesday, July 23, 2003

Compal Electronics, Inc.

PCMCIA Controller

This shall be output

8/12 Changed byDell's Require

8/12 Changed byDell's Require

Remove R756

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

2@ PCI4510

2@ PCI4510

C538

0.1U_0402_16V4Z~D

1

2

C18

522

P_04

02_5

0V8J

~D

1

2

C1671U_0805_10V6K~D

12

C52

10.

047U

_040

2_10

V4M

~D

1

2

C54

20.

047U

_040

2_10

V4M

~D

1

2

R165220_0402_5%~D

12

R16310_0402_5%~D@

12

C53

60.

047U

_040

2_10

V4M

~D

1

2

C52

40.

047U

_040

2_10

V4M

~D

1

2

R494

47_0402_5%~D 12

C17

210

U_0

805_

10V4

M~D

1

2

R17

10_

0402

_5%

~D

12

C56

00.

1U_0

402_

16V4

Z~D

1

2

R4510_0402_5%~D

12

R48

20_

0402

_5%

~D

12

L13BLM21A601SPT_0805~D

1 2

R450 200_0402_5%~D 12

C55

60.

047U

_040

2_10

V4M

~D

1

2

R5151K_0402_5%~D@

12

C54

027

0P_0

603_

50V7

K~D

@

1

2

R4876.34K_0603_1%~D

1 2

C1394.7P_0402_50V8C~D @

1

2

C53

30.

047U

_040

2_10

V4M

~D

1

2

R444220_0402_5%~D

12

R5021K_0402_5%~D

12

R504 4.7K_0402_5%~D 12

C54

30.

047U

_040

2_10

V4M

~D

1

2

R481 10K_0402_5%~D @1 2

R45310_0402_5%~D@

12

R17

40_

0402

_5%

~D

@

12

C56

627

0P_0

603_

50V7

K~D

@ 1

2

X324.576MHz_16P_1BG24576CKIA~D

1 2

C531

0.1U_0402_16V4Z~D

1

2

C54

40.

047U

_040

2_10

V4M

~D

1

2

R1642.7K_0603_5%~D@

12

C52

20.

047U

_040

2_10

V4M

~D

1

2

R4951M_0603_5%~D@ 1 2

R17

70_

0402

_5%

~D

@

12

R19

10_

0402

_5%

~D

@

12

R4961K_0402_5%~D@

12

PCI7510

U9B

PCI7510GHK_PBGA209~D 1@

CNAP17

CPSP10 VCC G1VCC M1VCC R1VCC W8VCC L19VCC H19VCC E19VCC A13VCC A8VCC A5

VCCCB G14VCCCB A11

VCCP L1VCCP W5

VR_PORT G2VR_PORT L18

VD1/VCCD0 E6VD0/VCCD1 B5

VD3/VPPD0 A4VD2/VPPD1 C5

GND E1GND K1GND N1GND W6GND P19GND K19GND G19GND A15GND A10GND A7

MFUNC0 F5MFUNC1 G6MFUNC2 F3MFUNC3 F2MFUNC4 G5MFUNC5 F1MFUNC6 H6

RI_OUT/PME J3

SPKROUT E2

SUSPEND G3

SKT_SEL1 R10

VR_EN H5

SCL E3SDA D1

SKT_SEL0 U10

PHY_TEST_MA P18

CLK_48 F6

RSVDN15

RSVDM14RSVDN17RSVDN18SC_GPIO5N19RSVDM15SC_GPIO6M17SC_GPIO1M18SC_GPIO0M19

SC_CDB7SC_RSTC7SC_CLKF7SC_DATAA6SC_GPIO3B6SC_GPIO2E7SC_GPIO4C6

ANALOGGNDU11ANALOGGNDR12ANALOGGNDR13

ANALOGVCCR11ANALOGVCCU13ANALOGVCCU14

VDPLLP15

VSPLL/RSVDN14

XI R18

XO R19

FILTER0T19FILTER1R17

PC0V10PC1W10PC2P9

R0W13

R1V13

TPA0PV12

TPA0NW12

TPA1PV15

TPA1NW15

TPB0PV11

TPB0NW11

TPB1PV14

TPB1NW14

TPBIAS0U12

TPBIAS1U15

D15RB751V_SOD323~D

2 1

C16

00.

047U

_040

2_10

V4M

~D

1

2

R45210K_0402_5%~D@

12

R18

60_

0402

_5%

~D

12

C555

0.1U_0402_16V4Z~D

1

2

R51010K_0402_5%~D

1 2

R4452.7K_0603_5%~D@

12

C18

422

P_04

02_5

0V8J

~D

1

2

R51

60_

0402

_5%

~D

12

R455 10K_0402_5%~D 1 2

C56

20.

1U_0

402_

16V4

Z~D

1

2

C16

410

U_0

805_

10V4

M~D

1

2

R18

80_

0402

_5%

~D

12

C17

310

U_0

805_

10V4

M~D

1

2

PCI7510

U9A

PCI7510GHK_PBGA209~D1@

AD31J5AD30J6AD29K2AD28K3AD27K5AD26K6AD25L2AD24L3AD23M2AD22M3AD21M6AD20M5AD19N2AD18N3AD17N6AD16P1AD15R6AD14P7AD13V5AD12U6AD11V6AD10R7AD9P8AD8U7AD7W7AD6R8AD5U8AD4V8AD3W9AD2V9AD1U9AD0R9

C/BE3L6C/BE2P2C/BE1U5C/BE0V7

PARW4

DEVSELR2FRAMEN5GNTJ1

IDSELL5

IRDYP3PERRR3REQJ2SERRT1STOPP5TRDYP6

CCLK/A16 C15

CCLKRUN/WP B9

CRST/RESET B13

CRSVD/D2 F8

CRSVD/D14 J18CRSVD/A18 F17

CAD31/D10 E8CAD30/D9 C8CAD29/D1 B8CAD28/D8 E9CAD27/D0 F9CAD26/A0 F11CAD25/A1 E11CAD24/A2 C11CAD23/A3 A12CAD22/A4 C12CAD21/A5 E12CAD20/A6 C13

CAD19/A25 A14CAD18/A7 E13

CAD17/A24 B14CAD16/A17 F18

CAD15/IOWR# G17CAD14/A9 F19

CAD13/IORD# G18CAD12/A11 H15CAD11/OE# H14

CAD10/CE2# H17CAD9/A10 H18CAD8/D15 J14

CAD7/D7 J17CAD6/D13 K14

CAD5/D6 J19CAD4/D12 K17

CAD3/D5 K15CAD2/D11 L14

CAD1/D4 K18CAD0/D3 L15

CC/BE3/REG# B11CC/BE2/A12 C14

CC/BE1/A8 G15CC/BE0/CE1# J15

CPAR/A13 F14

CAUDIO/BVD2 F10

CBLOCK/A19 E18

CCD1/CD1# L17CCD2/CD2# C9

CDEVSEL/A21 A16

CFRAME/A23 B15

CGNT/WE# D19

CINT/READY C10

CIRDY/A15 F13

CPERR/A14 F15

CREQ/INPACK# B12

CSERR/WAIT# E10

CSTOP/A20 E17

CSTSCHG/BVD1 A9

CTRDY/A22 E14

CVS1/VS1# B10CVS2/VS2# F12

PCICLKH1

PCIRSTH3

GRSTH2

C541

0.1U_0402_16V4Z~D

1

2

R470 100_0402_5%~D 1 2

C5234.7P_0402_50V8C~D @

1

2

C53

20.

1U_0

402_

16V4

Z~D

1

2

R44610K_0402_5%~D

12

R447 200_0402_5%~D 12

R4861K_0402_5%~D

12

C5570.1U_0402_10V6K~D

1 2

R5071K_0402_5%~D @

12

C52

00.

1U_0

402_

16V4

Z~D

1

2

R4831K_0402_5%~D

12

L15BLM21A601SPT_0805~D

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CBS_CFRAME#

CBS_CC/BE1#

CBS_CDEVSEL#

CBS_CCD1#

CBS_RSVD/D14

CBS_CC/BE3#

CBS_CPERR#

CBS_CC/BE0#

CBS_CPAR

CBS_CSTSCHNG

CBS_CRST#

CBS_RSVD/D2

CBS_CVS2

CBS_CCLKRUN#

CBS_CREQ#

CBS_CIRDY#

CBS_CAUDIO

CBS_CBLOCK#

CBS_CSERR#

CBS_CVS1

CBS_RSVD/A18

CBS_CSTOP#

CBS_CINT#

CBS_CTRDY#

CBS_CC/BE2#

CBS_CCLK

CBS_CGNT#

CBS_CCD2#

CBS_CCD2# CBS_CCLKRUN#

SCR_IF_GPIO0

CBS_VCCD0#

SCR_C4_C

SCR_IF_GPIO3

TPB0-

Z3008

TPA0+

CBS_VPPD0CBS_VPPD1

SCR_IF_PWR

SCR_IF_GPIO2

IEEE1394_TPB0N

NC_SCR_C8

IEEE1394_TPA0P

SCR_DETECT_C

CBS_VCCD1#

SCR_IF_GPIO4

SCR_C8_C

SCR_IF_GPIO5

SCR_IF_GPIO1

IEEE1394_TPB0P

SCR_DETECT

TPA0-TPB0+

IEEE1394_TPA0N

TPS2211VCC

SCR_CLK_CSCR_DATA_C

SCR_RST_C

SCR_IF_GPIO5

SCR_DETECT_C

SCR_IF_PWR

LOUT_H

SCR_IF_DATA

SCR_VCC_CSCR_IF_GPIO1

SCR_IF_GPIO4

SCR_IF_GPIO0

SCR_IF_CLK

SCR_IF_GPIO3LOUT_L

SCR_IF_RST

SCR_VCC_C

NC_SCR_C4

SCR_IF_GPIO2

CBS_CAD4

CBS_CAD28

CBS_CAD8

CBS_CAUDIO

CBS_CREQ#

CBS_CAD17

CBS_CFRAME#CBS_CTRDY#

CBS_CAD16

CBS_CIRDY#

CAGE10_GND

CBS_CAD5

CBS_CAD22

CBS_CAD25

CBS_CAD7

CBS_CAD16

CBS_CPAR

SCR_VPP_PIN66

CBS_CAD15

CBS_CAD26

CBS_CAD17

CBS_CAD5

CBS_CAD3

CBS_CAD31

CBS_CAD19

CBS_CBLOCK#

CAGE50_GND

CBS_CAD7

CBS_CAD3

CBS_CAD15

CBS_CAD23

CBS_CAD12

CBS_CAD1

CBS_CAD18

CBS_CAD14

CBS_CAD30

SCR_C8_C

CBS_CAD10

CBS_CAD20

CBS_CC/BE1#

CBS_CSERR# CBS_CAD22

CBS_CAD21

CBS_CAD11

CBS_CAD11CBS_CAD10

CBS_CAD1

SCR_VCC_C

CBS_CC/BE3#

CBS_CAD29CBS_CAD27

CBS_CAD21

CBS_CAD19

CBS_CDEVSEL#

CBS_CAD13

CBS_CAD6

CBS_CAD24

SCR_VCC_C

CBS_CC/BE2#

CBS_CAD2

CBS_CAD26

CBS_CAD6

SCR_RST_C SCR_CLK_C

SCR_DATA_C

CBS_CSTOP#

CBS_CAD2

CBS_RSVD/D2

CBS_CAD18

SCR_C4_C

CBS_CAD8CBS_RSVD/D14

CBS_CCLK

CBS_CAD12

CBS_CRST#

CBS_CAD4

CBS_CAD13

CBS_CAD31CBS_CAD30

SCR_CLK_C

CBS_CGNT#CBS_CPERR#

CBS_CC/BE0#

CBS_CAD24CBS_CAD23

CBS_RSVD/A18

CBS_CINT#

CBS_CAD9

CBS_CAD0

CBS_CAD20

CBS_CVS2

CBS_CVS1

CBS_CAD27

CBS_CSTSCHNG

SCR_DETECT_C

CBS_CAD9

CBS_CAD29

CBS_CAD28

CBS_CCD1#

CBS_CAD25

SCR_RST_C

CBS_CAD14

CBS_CAD0

+3VSUS

+3VSUS

CBS_VPP+12V

+5VSUS

CBS_VCC

+3VSUS

+5VSUS

CBS_VPPCBS_VCC

+3VSUS

CBS_VCCCBS_VPP

CBS_CPAR <30>

CBS_CVS2 <30>

CBS_CGNT# <30>

CBS_CIRDY# <30>

CBS_CVS1 <30>

CBS_CC/BE2# <30>

CBS_CSTSCHNG <30>

CBS_CBLOCK# <30>

CBS_CSERR# <30>

CBS_CAUDIO <30>

CBS_CCD1# <30>

CBS_CTRDY# <30>

CBS_RSVD/D14 <30>

CBS_CDEVSEL# <30>

CBS_CREQ# <30>

CBS_RSVD/D2 <30>

CBS_CFRAME# <30>

CBS_CINT# <30>

CBS_RSVD/A18 <30>

CBS_CC/BE3# <30>CBS_CCLK <30>

CBS_CC/BE0# <30>

CBS_CSTOP# <30>

CBS_CAD[0..31] <30>

CBS_CC/BE1# <30>

CBS_CRST# <30>

CBS_CCLKRUN# <30>

CBS_CPERR# <30>

CBS_CCD2# <30>

CBS_VPPD1 <30>

CBS_VCCD0# <30>

CBS_VPPD0 <30>

SUSPWROK_5V <39,43,45>

CBS_VCCD1# <30>

IEEE1394_TPB0P<30>

IEEE1394_TPBIAS0<30>

IEEE1394_TPA0N<30>

SCR_DETECT<30>

IEEE1394_TPB0N<30>

IEEE1394_TPA0P<30>

SCR_IF_GPIO0<30>

SCR_IF_GPIO1<30>

SCR_IF_RST<30>SCR_IF_GPIO5<30>

SCR_IF_GPIO4<30>

SCR_IF_GPIO3<30>

SCR_IF_CLK<30>

SCR_IF_GPIO2<30>

SCR_IF_DATA<30>

SCR_IF_PWR<30>

SCR_DETECT_C <34>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

31 60Monday, August 11, 2003

Compal Electronics, Inc.

CardBus Socket

Place near connectorPlace near NCN6000

1

SHDN#

0

0

X

1

SHDN#

AVPP:150mA

1

1

VCCD0#

1

VPPD1

1

1

X

0

VPPD0

0

1

10

1

0

0

1

X

1

1

1

1

1

AVCC:1A

0

X0

VCCD1#

0

CBS_VPP

CBS_VCC

Place near ncn6000

Depop if support Smart Card

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

Beijing PCI7510Nimitz PCI4510

1@

2@

@ Depop Depop

Depop

DepopPop

Pop

C15

456

P_04

02_5

0V8J

~D 1

@

1

2

R18

922

K_04

02_5

%1@

1

2

R20110K_0402_5%~D

12

R44

85.

1K_0

603_

1%~D

12

C13

610

00P_

0402

_50V

7K~D

1

2

L7

857CM-0009~D@1 1

2 23 3

4 455

6677

88

R2040_0603_5%~D 1 2

R1850_0402_5%~D@ 1 2

R20010K_0402_5%~D

12

R20210K_0402_5%~D

12

C14

54.

7U_1

206_

16V6

K~D

1

2

R46410K_0402_5%~D

12

C1560.1U_0402_16V4Z~D

1

2

R46110K_0402_5%~D

12

R1460_0402_5%~D1 2

R1450_0402_5%~D1 2

R17310K_0402_5%~D

12

C15

04.

7U_1

206_

16V6

K~D

1@

1

2

U10

TPS2211ADBR_SSOP16~D

VCCD0# 1VCCD1# 2

3.3V_133.3V_24

5V_155V_26

GN

D7

OC# 8

12V9

AVPP 10

AVCC3 11AVCC2 12AVCC1 13

VPPD1 14VPPD0 15

SHD

N#

16

C16

31U

_080

5_10

V6K~

D

1

2

T3PAD@

R1470_0402_5%~D1 2C

174

10U

_120

6_6.

3V7K

~D 1

@

1

2

C52

827

0P_0

603_

50V7

K~D

1

2

C1434.7U_1206_16V6K~D

1

2

C14

90.

1U_0

402_

16V4

Z~D

1@

1

2

C13

50.

1U_0

402_

16V4

Z~D

1

2

R17

010

K_04

02_5

%~D

1@1

2

C13

710

U_1

206_

6.3V

7K~D

1

2

R1440_0402_5%~D1 2

R1930_0402_5%~D @

12R203

10K_0402_5%~D 12

R46810K_0402_5%~D

12

C656

100P_0402_50V8J~D1@

1 2

R46

056

.2_0

603_

1%~D

12

JCBUS

FOX_QT8R080A-1910_LB~D

1 12 23 34 45 56 67 78 89 910 1011 1112 1213 1314 1415 1516 1617 1718 1819 1920 2021 2122 2223 2324 2425 2526 2627 2728 2829 2930 3031 3132 3233 3334 3435 3536 3637 3738 3839 3940 40

4141 4242 4343 4444 4545 4646 4747 4848 4949 5050 5151 5252 5353 5454 5555 5656 5757 5858 5959 6060 6161 6262 6363 6464 6565 6666 6767 6868 6969 7070 7171 7272 7373 7474 7575 7676 7777 7878 7979 8080

G81 G 82G83 G 848585 86 86

T4PAD@

C1440.1U_0402_16V4Z~D

1

2

C1550.1U_0402_16V4Z~D

1

2

C18

20.

1U_0

402_

16V4

Z~D

1@

1

2

R2050_0603_5%~D@

12

R48

0

56.2

_060

3_1%

~D

12

C17

50.

1U_0

402_

16V4

Z~D

1@

1

2

U17

NCN6000_TSSOP20~D1@

A01A12PGM#3PWR_ON4STATUS5CS#6RESET#7I/O8

CLOCK_IN10 CRD_DET 11INT#9 CRD_RST 12CRD_CLK 13CRD_IO 14CRD_VCC 15GROUND 16PWR_GND 17LOUT_L 18LOUT_H 19VBAT 20

R1940_0402_5%~D @

12

R45

656

.2_0

603_

1%~D

12

R46

956

.2_0

603_

1%~D

12

J1394

MOLEX_54515-0411~D11 22 33 44

SGND15 SGND26 SGND37 SGND48

C15

147

0P_0

402_

50V7

K~D

1@

1

2

L1422U_LQH43MN220J01K_2OHM_1812~D1@

1 2

R172

0_0402_5%~D2@

12

C14

20.

1U_0

402_

16V4

Z~D

1

2

L10BLM31A260SPT_1206~D

1 2

R18

722

K_04

02_5

%1@

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCI_AD27

PCI_AD10

PCI_AD21

PCI_AD17

PCI_TRDY#

PCI_AD8

PCI_PIRQD#

PCI_AD28

PCI_AD18

PCI_AD0

PCI_AD15

MPCIACT#

PCI_AD31

PCI_AD2

PCI_PIRQB#

PCI_AD13

PCI_FRAME#

PCI_AD29

HW_RADIO_DIS#

PCI_AD29PCI_AD26

PCI_AD8

PCI_C_BE2#

PCI_AD20

PCI_AD24

PCI_AD14

PCI_AD6

PCI_REQ3#

PCI_AD30

PCI_AD9

PCI_AD28

PCI_SERR# PCI_STOP#

LAN_SMBCLK

PCI_AD6

WLAN_LED_ACTIVITY

PCI_AD27

PCI_AD18

PCI_AD16

PCI_AD16

PCI_AD23

PCI_AD13

PCI_PERR#

ICH_SMBDATA

PCI_C_BE3#

PCI_AD12

LAN_SMBDATA

PCI_AD7

PCI_GNT3#

PCI_AD31

PCI_AD5PCI_AD4

PCI_AD2

LED_WLAN24_RADIOSTATE

PCI_AD5

PCI_AD23

PCI_AD3

PCI_AD7

PCI_AD30

PCI_AD3

PCI_AD1

PCI_AD19

PCI_AD1

ICH_SMBCLK

PCI_AD20PCI_AD21

PCI_C_BE1#

PCI_AD24

PCI_AD12

PCI_AD22

PCI_AD9

PCI_AD10

PCI_DEVSEL#

PCI_AD14

LED_WLAN5_RADIOSTATE

PCI_AD19

PCI_AD26

MINIDSEL

PCI_AD25

PCI_AD17

PCI_AD19

PCI_AD25

PCI_AD11

PCI_PAR

PCI_AD0

PCI_AD15

PCI_C_BE0#

PCI_AD22

PCI_AD4

PCI_IRDY#

PCI_AD11

PCI_CLKRUN#

PCIRST_2#

NIC_MINI_SMBDAT

NIC_MINI_SMBCLK LAN_SMBCLK

MPCI_M66EN

CK_33M_MINIPCI

SYS_PME#

PCI_CLKRUN#

CK_

33M

_MIN

PCI_

TER

M

CK_33M_MINIPCI

LAN_SMBDATA

+5VRUN

+3VRUN

V_3P3_LAN

+5VRUN

V_3P3_LAN+3VSUS+5VRUN

+3VRUN+3VRUN

V_3P3_LAN

+3VSUS

LED_WLAN24_RADIOSTATE <29>

PCI_PIRQB# <18,20>

PCI_STOP# <20,28,30>

PCI_PAR <20,28,30>

PCI_IRDY#<20,28,30>

PCI_GNT3# <20>

PCI_DEVSEL# <20,28,30>

PCI_PIRQD#<20,30>

HW_RADIO_DIS#<27,34>

PCI_SERR#<20,28,30>

ICH_SMBCLK<6,15,16,21>

PCI_C_BE0# <20,28,30>

LED_WLAN5_RADIOSTATE <29>

ICH_SMBDATA<6,15,16,21>

PCI_REQ3#<20>

PCI_TRDY# <20,28,30>

WLAN_LED_ACTIVITY<29>

PCI_C_BE3#<20,28,30>

PCIRST_2# <20>

PCI_PERR#<20,28,30>

PCI_C_BE2#<20,28,30>

PCI_FRAME# <20,28,30>

PCI_C_BE1#<20,28,30>

PCI_AD[0..31]<20,28,30>

LAN_SMBCLK <28>

COEX1_BT_ACTIVE <27>

CK_33M_MINIPCI<6>

COEX2_WLAN_ACTIVE<27>

SYS_PME# <28,30,33>

LAN_SMBDATA <28>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

32 60Wednesday, July 23, 2003

Compal Electronics, Inc.

MINIPCI

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

R28410K_0402_5%~D

1 2

C232

0.047U_0402_10V4M~D

1

2

R26810K_0402_5%~D

12

C2530.1U_0402_16V4Z~D

1

2

C234

0.047U_0402_10V4M~D

1

2

R24910K_0402_5%~D@

12

R261100_0402_5%~D

1 2

G

D S

Q532N7002_SOT23~D

21 3

R24810_0402_5%~D @

12

C2290.1U_0402_16V4Z~D 1

2

C227

0.047U_0402_10V4M~D

1

2

G

DS

Q522N7002_SOT23~D2

13

C2304.7P_0402_50V8C~D@

1

2

C2520.1U_0402_16V4Z~D

1

2

C244

0.047U_0402_10V4M~D

1

2

R2500_0402_5%~D@

1 2

C231

0.047U_0402_10V4M~D

1

2

R2550_0402_5%~D@1 2

R2781K_0402_5%~D

12

R26410K_0402_5%~D

12

C241

0.047U_0402_10V4M~D

1

2

R27010K_0402_5%~D

12

C247

0.047U_0402_10V4M~D

1

2

JPCI

AMP_1318644-1~D

RING 2TIP1

8PMJ-1 48PMJ-338PMJ-2 68PMJ-658PMJ-4 88PMJ-778PMJ-5 108PMJ-89

LED2_YELP 12LED1_GRNP11LED2_YELN 14LED1_GRNN13RESERVED 16CHSGND15

5V 18INTB#17INTA# 203.3V19

RESERVED 22RESERVED213.3VAUX 24GROUND23

RST# 26CLK253.3V 28GROUND27

GNT# 30REQ#29GROUND 323.3V31

PME# 34AD3133RESERVED 36AD2935

AD30 38GROUND373.3V 40AD2739

AD28 42AD2541AD26 44RESERVED43AD24 46C/BE3#45

IDSEL 48AD2347GROUND 50GROUND49

AD22 52AD2151AD20 54AD1953PAR 56GROUND55

AD18 58AD1757AD16 60C/BE2#59

GROUND 62IRDY#61FRAME# 643.3V63

TRDY# 66CLKRUN#65STOP# 68SERR#67

3.3V 70GROUND69DEVSEL# 72PERR#71GROUND 74C/BE1#73

AD15 76AD1475AD13 78GROUND77AD11 80AD1279

GROUND 82AD1081AD9 84GROUND83

C/BE0# 86AD8853.3V 88AD787AD6 903.3V89AD4 92AD591AD2 94RESERVED93AD0 96AD395

RESERVED 985V97RESERVED 100AD199

GROUND 102GROUND101M66EN 104AC_SYNC103

AC_SDATA_OUT 106AC_SDATA_IN105AC_CODEC_ID0# 108AC_BIT_CLK107

AC_RESET# 110AC_CODEC_ID1#109RESERVED 112MOD_AUDIO_MON111

GROUND 114AUDIO_GND113SYS_AUDIO_IN 116SYS_AUDIO_OUT115

SYS_AUDIO_IN GND 118SYS_AUDIO_OUT GND117AUDIO_GND 120AUDIO_GND119

MCPIACT# 122RESERVED1213.3VAUX 124VCC5A123

G

DS

Q482N7002_SOT23~D

2

13

G

D S

Q492N7002_SOT23~D

2

1 3

C246

0.047U_0402_10V4M~D

1

2C242

0.047U_0402_10V4M~D

1

2

C2490.1U_0402_16V4Z~D

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

NB_MUTE

KAGND

SIO_SLP_S4_S5#

SIO_THRM#

MODC_EN#

LPC_LDRQ1#

BAY_MODPRES#

DISKCHG#

KSO_17

WRPRT#

+3.3VRTC

RDATA#

LID_CL_SIO#

PWRSW_SIO#

BUSY

D_CLKRUN#

SYS_PME#

USB_IDE#

PE

DH_PWRSRC_OC

KPLLVCC

INDEX#

DEBUG_ENABLE LPCPD#

IRQ_SERIRQ

SIO_RCIN#

VAUX_EN

ACK#

SUS_ON

SIO_EXT_SMI#

EC_CLKRUN#

ATF_INT#

BEEP

TRK0#

HDDC_EN#

LID_CL#

LPC_LAD1

DEBUG_OUT

PCIRST_SIO#

RI0#

SYS_SUSPEND

KSO17

LPC_LAD2

IDE_RST_HDD

SIO_EXT_SCI#

DH_POWER_EN

254VCC0

SIO_SLP_S3#

LPC_LFRAME#

IDE_RST_MOD

CBS_GRST#D_DLRQ1#

RUN_ON

GC_BL_SUSPEND

DEBUG_ENABLE

D_SERIRQSIO_EXT_RTE#

RXD0

ICH_PME#

LPC_LAD3

USB_EN#

SLCT

ATF_INT#

LPC_LAD0

SYS_PME#

AC_LOW_PRES2#

LID_CL_SIO#

CTS0#

DSR0#DCD0#

ERROR#

D_IRMODEIRRXIRTX

PWRSW_SIO#

D_SERIRQD_CLKRUN#

TXD0

TXD0

+3VRUN

+3VALW

+3VRUN

+3VALW

+3VRUN

+3VRUN

+3.3VRTC

+3VRUN

+3VALW

+3VALW

+3VRUN

+3VALW

+3VRUN

+3VRUN

+3VRUN

+5VSUS

SUS_ON<43>

MODC_EN#<39>

ATF_INT#<19,47>

PCIRST_SIO# <20>

KSO_17<35,38>

SIO_EXT_RTE#<21>

LPC_LDRQ1# <21>

DH_POWER_EN<26>

ICH_PME#<20>

GC_BL_SUSPEND<18>

BAY_MODPRES#<23>

SIO_SLP_S3#<21>

USB_IDE#<23>

VAUX_EN<39,43>

SIO_SLP_S4_S5#<21>

SIO_THRM#<21>

IDE_RST_HDD<21>

SATA_MOD_DETECT#<23>SYS_SUSPEND<18,41>

LPC_LFRAME# <21>

SYS_PME#<28,30,32>

IDE_RST_MOD<21>

RUN_ON<18,37,39,44>

SIO_EXT_SMI#<21>LPC_LAD[0..3] <21>

USB_EN#<26>

NB_MUTE<25>SIO_RCIN#<21>

LID_CL# <18>

IRQ_SERIRQ <20,21,30>

SIO_EXT_SCI#<21>

CBS_GRST#<30>SUB_DETECT#<42,50>

DH_PWRSRC_OC<26>

HDDC_EN#<39>

BEEP<24>

PWRSW_SIO#<39>

NOCREG<36>

GV_HI_LO#<36>

D_IRMODE <38>IRRX <38>IRTX <38>

SIO_PWRBTN#<21>

DT/MT_SELECT<49>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

33 60Wednesday, July 23, 2003

Compal Electronics, Inc.

SIO (1/2)

SATA_HDD_DETECT#D-Bay USB powerDell GPIO rev0.7

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

C56

80.

1U_0

402_

16V4

Z~D

1

2

R23

310

K_04

02_5

%~D

12

T5PAD@

C58

10.

1U_0

402_

16V4

Z~D

1

2

R183100K_0402_5%~D

12

T11

PAD

@

C54

90.

1U_0

402_

16V4

Z~D

1

2

C2110.1U_0402_10V6K~D

1

2

R184100K_0402_5%~D

12

R2320_0402_5%~D

12

RN510K_8P4R_1206_5%~D

1 82 73 64 5

C57

70.

1U_0

402_

16V4

Z~D

1

2

R527 10K_0402_5%~D1 2

C54

80.

1U_0

402_

16V4

Z~D

1

2

C58

90.

1U_0

402_

16V4

Z~D

1

2

D4

RB751V_SOD323~D

2 1

R535 10K_0402_5%~D1 2

C57

20.

1U_0

402_

16V4

Z~D

1

2

R231 10K_0402_5%~D1 2

T6PAD@

R46

510

K_04

02_5

%~D

12

R211 10K_0402_5%~D1 2R22

610

K_04

02_5

%~D

12

C54

60.

1U_0

402_

16V4

Z~D

1

2

C56

30.

1U_0

402_

16V4

Z~D

1

2

R537 10K_0402_5%~D1 2

R18

210

K_04

02_5

%~D

12

R466100K_0402_5%~D

12

R196 10K_0402_5%~D

1 2

R18

110

K_04

02_5

%~D

12

C56

70.

1U_0

402_

16V4

Z~D

1

2

LPC47N254

256 - LBGA

GPIO

FDD

COM1

LPT

GND

MACALLEN

LPC

8051GPIO

VCC

IR

LPC

DOCK LPC

U15A

LPC47N254V12FBGA_LBGA256~D

SGPIO30F13SGPIO31F14SGPIO32E16SGPIO33E15SGPIO34E12SGPIO35E13SGPIO36D16SGPIO37D15

VSS4 N1

SGPIO41C16SGPIO42C15SGPIO43A16SGPIO44D14SGPIO45C14SGPIO46C13SGPIO47B14

LGPIO54T6LGPIO55L7LGPIO56P7LGPIO57N7

LGPIO60A15LGPIO61D13LGPIO62A14LGPIO63C12

LGPIO50T5LGPIO51N6LGPIO52L6

LGPIO64B13

LGPIO53R6

WPROT# L3RDATA# M1HDSEL# L2INDEX# L5

DSKCHG# M2TRK0# L4MTR0# K1

DIR# K2STEP# K4

WDATA# K3WGATE# L1

DS0# K5

DRVDEN0 J7DRVDEN1 K7

FPD M5

RXD1 G5TXD1 G2

RTS1# H7CTS# H8DTR# H6DSR# G1DCD# H5

RI1# B10

GPIO10/WK_SE14/IRMODE/IRRX3B H15

ACK# C1SLCTIN# F2

INIT# F1ALF# G3

STROBE# G4BUSY D4

PE B1SLCT B2

ERROR# G6PD0 F4PD1 F3PD2 E2PD3 F5PD4 E4PD5 D1PD6 D2PD7 E3

VSS1 C2VSS2 F6VSS3 J5

VSS5 N5VSS6 T10VSS7 R15VSS8 J11

SGPIO40E14

LGPIO65A13LGPIO66D12LGPIO67F11

LGPIO70B12LGPIO71A12LGPIO72C11LGPIO73D11LGPIO74E11LGPIO75B11LGPIO76A11LGPIO77C10

VSS9 G11

VCC0/BATA4

VCC1_1M7VCC1_2R13VCC1_3L11

VCC2_1D3VCC2_2H2VCC2_3K6VCC2_4P4

IRRX K14IRTX M4

VCC1_4H10VCC1_5B16VCC1_6F10VCC1_7A6

LDRQ1# R3

LPCPD# H4

LFRAME# N4

LAD0 M3LAD1 R1LAD2 T1LAD3 P3

SER_IRQ T4CLKRUN# P5

DLDRQ1# R2DLFRAME# T2

DLAD0 N2DLAD1 P1DLAD2 P2DLAD3 N3

DSER_IRQ R4DCLKRUN# T3

LRESET# H3

VCC2_6/PLLR5

VCC2_5E1

VSS12 D6VSS11 H9VSS10 B15

AGND A2VSS13/PLLP6

R220 10K_0402_5%~D1 2

R52010K_0402_5%~D

1 2

R615 0_0402_5%~D1 2

R5234.7K_0402_5%~D 1 2

R227 10K_0402_5%~D1 2

L12BLM11A121S_0603~D

1 2

L22BLM11A121S_0603~D

1 2

R222 10K_0402_5%~D1 2

U42C

TC7W14FU_SSOP8~D

P8

A3 Y 5

G4

R46710_0402_5%~D

12

R195100K_0402_5%~D

12

J13971.5mm SMT@

1 12 23 3

R532 10K_0402_5%~D1 2

C1520.1U_0402_16V4Z~D 1

2

C55

80.

1U_0

402_

16V4

Z~D

1

2

C5340.047U_0402_10V4M~D

1

2

C57

40.

1U_0

402_

16V4

Z~D

1

2

R217 10K_0402_5%~D1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DAT_SMB

FWR#

SBAT_SMBDAT

PBAT_ALARM#

KSO16

FCS#

PBAT_ALARM#

SIO_FA16

KSO4

CK_

14M

_SIO

_TER

M

KSO14

KSI0

NUM_LED#

SIO_KAH_PGM

KSO10

FAN1_TACH

CHG_PBATT

FDD_PP#

FAN2_TACH

CLK_SM2

CK

_33M

_SIO

PCI_

TER

M

SIO_FA3

PBAT_SMBDAT

CK_33M_SIOPCI

SIO_FA9

BAT2_LED#

SIO_FA2

MODE

FAN2_PWM

SIO_FD0

DAT_SM1

LPC_LDRQ0#

KSI3

PBAT_SMBDAT

SIO_FA10

BREATH_LED

SIO_FA6

HW_RADIO_DIS#

CLK_32KX2

RUNPWROK

PBAT_SMBCLK

DAT_KBD

PBAT_PRES#

SIO_FA18

SIO_FA5

SIO_FD4

SIO_FA15

SIO_FA0

SIO_THERM_PWRDN

KSI7

FRD#

CK_14M_SIO

KSO6

CAP_LED#

KSO7

EEPROM_WC

SIO_A20GATE

KSO2KSO1

SIO_FA11

RESET_OUT#

BAT1_LED#

KSO5

SRL_LED#

SIO_FD1

SIO_FA19

SIO_FA8

SBAT_SMBCLK

KSO12

SIO_FD6

SBAT_SMBCLK

KSO0

KSO8

LIVE_ON_BATT

KSO13

KSO15

SIO_FD2

SIO_FA14

SIO_FA12

KSI1 SIO_FA17

KSI5

FPVCC

SIO_FA13

SBAT_SMBDAT

TI_SUSPEND#

KSO11

SCR_DETECT_C

DAT_SM2

SIO_FD5

SIO_FD3

KSI2

PBAT_SMBCLK

KSO9

VCC1_PWROK

CLK_SM1

SIO_FA1

SIO_FD7

CLK_KBD

KSI4

SIO_FA7

KSO3

KSI6

SIO_FA4

XOSEL

H_PROCHOT_SIO#

FAN1_PWM

LAN_LOW_PWR

AUDIO_AVDD_ON

SIO_MSCLKSIO_MSDAT

HW_RADIO_DIS#

LAN_LOW_PWR

CHG_PBATT

CLK_KBD

DAT_SM1

CLK_SM1

CLK_32KX1

CLK_SMB

DOCK_SMBDAT

DOCK_SMBCLK

DOCK_SMBDATDOCK_SMBCLK

DAT_KBD

+3VALW

+5VALW

+3VALW

+3VALW

+3VALW

+5VRUN

+3VALW

+3VALW +3VALW

KSO16<35>

H_PROCHOT_SIO#<10>

SBAT_SMBCLK <18>

SCR_DETECT_C<31>EEPROM_WC <35>

FAN1_PWM <14>

FAN1_TACH <14>

SIO_FA[0..19] <35>

CK_14M_SIO <6>

BAT1_LED# <38>

PBAT_SMBCLK <42,48>

DAT_SM2<35>

NB_PSID<41>

CLK_SM2<35>

PBAT_SMBDAT <42,48>

LPC_LDRQ0# <21>

CK_33M_SIOPCI <6>

PBAT_PRES#<42>

KSI[0..7]<35,38>

KSO[0..15]<35>

FAN2_PWM <14>

SIO_FD[0..7] <35>

CHG_PBATT <48>

SIO_THERM_PWRDN<37>

BREATH_LED <38>

SRL_LED#<38>

SIO_A20GATE <21>

PBAT_ALARM#<42>

BAT2_LED# <38>

FCS# <35>

NUM_LED#<38>

TI_SUSPEND# <30>

FRD# <35>

VCC1_PWROK <35>

RUNPWROK <18,37,43,44,46>

HW_RADIO_DIS# <27,32>

FAN2_TACH <14>

FPVCC<18>

FWR# <35>

DAT_SMB <19,26,35,47>

RESET_OUT# <37>

SBAT_SMBDAT <18>

LIVE_ON_BATT <39>

CAP_LED#<38>LAN_LOW_PWR <28>

AUDIO_AVDD_ON <24>

CLK_SMB <19,26,35,47>

DH_MOD_PRES#<26>

SATA_3V_ENABLE# <39>

ACAV<39,48>

VCORE_PHOT#<10,46>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

34 60Wednesday, July 23, 2003

Compal Electronics, Inc.

SIO (2/2)

3.8X12.1mm

1

3MAX6326

2

SBAT_ALARM#

QBUFEN#

DOCKED

DOCK_SMB_INT#

SBAT_PRES#

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

R52810K_0402_5%~D

1 2

R20922K_0402_5%~D

1 2

LPC47N254

256 - LBGA

GPIO

K/B

MISC

MACALLEN

CLOCK

FLASH

U15B

LPC47N254V12FBGA_LBGA256~D

XTAL1A3

XTAL2C5

FPGM L10

AB1B_DATA E9AB1B_CLK D9

TEST_PIN K12

PCI_CLK J3

PWRGD K13

IN0/WK_EE4B9IN1/WK_EE2B8IN2/WK_EE3A8IN3/GPWKUPC8IN4/WK_SE00D8IN5/WK_SE01E8IN6/WK_SE05F8IN7/WK_EE1G8

GPIO0/WK_SE02H13GPIO1/WK_SE03H12GPIO2/WK_SE04H11GPIO3/TRIGGERG10

GPIO4/WK_SE07/KSO14G16 GPIO5/WK_SE10/KSO15G12 GPIO6/WK_SE11/IRMODE/IRRX3AG15

GPIO7/WK_SE06G13

GPIO17/WK_SE23/A20MG14

GPIO19/WK_SE24 F16

GPIO20/WK_SE25/PS2CLK/8051RXF15GPIO21/WK_SE26/PS2DAT/8051TXF12

IMCLKB3IMDATA1

KBCLKJ4KBDATJ6

EMCLKC4EMDATC3

FDD_LED# J12BAT_LED# J9

LDRQ0# M6

XOSEL B4

OUT7/SMI D7

24MHZ_OUT J2

EC_SCI# K16

OUT11/PWM1 G7OUT10/PWM0 A7OUT9/PWM2 E7OUT8/KBRST B7

RESET_OUT# H1

32KHZ_OUT D5

VCC1_PWRGD K15

CLOCKI J1

AB1A_DATA C9AB1A_CLK A9

MODE E5

KSI7M9KSI6L9KSI5K9KSI4K10KSI3M10KSI2R10KSI1N10KSI0P10

KSO13/GPIO18R7KSO12/OUT8/KBRSTT7KSO11K8KSO10J8KSO9L8KSO8M8KSO7N8KSO6P8KSO5T8KSO4R8KSO3R9KSO2T9KSO1P9KSO0N9

GPIO11/WK_SE15/AB2A_DATA H16GPIO12/WK_SE16/AB2A_CLK H14

GPIO13/WK_SE17/AB2B_DATA J15GPIO14/WK_SE20/AB2B_CLK J13

GPIO15/WK_SE21/FAN_TACH1 G9

OUT1 F7OUT2 B6OUT3 E6OUT4 C6

OUT0 C7

PWR_LED# J10

GPIO16/WK_SE22/FAN_TACH2 F9

OUT5/DS1/KBRST A5OUT6/MTR1 B5

GPIO9/WK_SE13/IRTX2J16 GPIO8/WK_SE12/IRRX2J14

FD0 T11FD1 R11FD2 M11FD3 N11FD4 P11FD5 T12FD6 R12FD7 M12

FA0 N12FA1 T13FA2 P12FA3 T14FA4 T15FA5 R16FA6 N13FA7 P16FA8 M14FA9 N15

FA10 N16FA11 M13FA12 L12FA13 M15FA14 M16FA15 L14FA16 L13FA17 L15FA18 L16FA19 K11FA20 R14FA21 T16FA22 P13

FRD# P14FWR# N14FCS# P15

FDC_PP# A10

MSCLKD10MSDATE10 C153

0.1U_0402_16V4Z~D 1

2

R21

34.

7K_0

402_

5%~D

12

R18010K_0402_5%~D

12

R53310K_0402_5%~D

1 2

R55010K_0402_5%~D

12

T10PAD@

C17

7

4.7P

_040

2_50

V8C

~D@

1

2

R19822K_0402_5%~D

1 2

R2281K_0402_5%~D

12

R51

44.

7K_0

402_

5%~D

12

R52

110

_040

2_5%

~D@

1

2

R1791K_0402_5%~D@

12

T9PAD@

R23410K_0402_5%~D @

12

R606100K_0402_5%~D

12

R23010K_0402_5%~D 1 2

R23610K_0402_5%~D

12

X532.768KHZ_12.5P_MC-306~D

12

R50

64.

7K_0

402_

5%~D

12

R51322K_0402_5%~D

1 2

R55

110

K_04

02_5

%~D

12

U11

MAX6326_SOT23~D

RESET#3

GND 2

VCC 1

D23 RB751V_SOD323~D

21

R229

10K_0402_5%~D

12

R54

910

K_04

02_5

%~D

12

R22

54.

7K_0

402_

5%~D

12

R22

44.

7K_0

402_

5%~D

12

R20

710

_040

2_5%

~D@

12

C59222P_0402_50V8J~D

1 2

R23

510

K_04

02_5

%~D

12

C59322P_0402_50V8J~D

1 2

R52222K_0402_5%~D

1 2

C56

44.

7P_0

402_

50V8

C~D

@

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DAT_SMB

SIO_FA3

SIO_FA1

KSI3

KSO9

SIO_FA7

SIO_FA15

KSO10

CLK_SM2

SIO_FA2

VCC1_PWROK

SIO_FA4

KSI1

SIO_FA18

KSI5

FRD#

KSI6

SIO_FA8

MOUSECLK

SIO_FA16

KSI4

SIO_FA11

KSI7

SIO_FA5

KSO16

CLK_SMB

DAT_SM2

SIO_FA12

MOUSEDAT

SIO_FA9

KSI6

FWR#

FCS#

SIO_FA17

SIO_FA0

KSI5

SIO_FA13

SIO_FA6

KSI1

KSI7

SIO_FA14

KSI2

SIO_FA19

KSI4

KSI0

KSI0

KSI2

KSI3

SIO_FA10

FWH_RST

EEPROM_WC

TP_V+TP_Y

KSI0

KSI3

KSI1KSI2

KSO_17

TP_GNDTP_X

MOUSEVDD

TP_Z

TP_GNDTP_Y

TP_XTP_V+

TP_Z

FCS#FRD#FWR#

SIO_FD6SIO_FD5SIO_FD4SIO_FD3SIO_FD2SIO_FD1SIO_FD0SIO_FA19SIO_FA18SIO_FA17SIO_FA16SIO_FA15SIO_FA14SIO_FA13SIO_FA12SIO_FA11SIO_FA10SIO_FA9SIO_FA8SIO_FA7SIO_FA6SIO_FA5SIO_FA4SIO_FA3SIO_FA2SIO_FA1SIO_FA0FWH_RST

SIO_FD2

SIO_FD6

SIO_FD4

SIO_FD0

SIO_FD7

SIO_FD7

SIO_FD3

SIO_FD5

SIO_FD1

KSO8

KSO11

KSO4

KSO6KSO7

KSO2

KSO10

KSO4

KSO9

KSO0KSO1

KSO5

KSO2

KSO14

KSO13KSO12

KSO15

KSO5

KSO3

KSO13

KSO14

KSO12

KSO15

KSO6

KSO1

KSO7

KSO3

KSO11

KSO0

KSO8

+3VALW

+5VRUN

+3VALW

+5VRUN

+3VALW

+3VALW

FCS#<34>

DAT_SMB <19,26,34,47>

FWR#<34>

KSI[0..7]<34,38>

VCC1_PWROK <34>

DAT_SM2<34>

SIO_FA[0..19]<34>

FRD#<34>

CLK_SM2<34>

SIO_FD[0..7] <34>

CLK_SMB <19,26,34,47>EEPROM_WC <34>

KSO[0..15]<34>

KSO_17<33,38>

KSO16<34>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

35 60Wednesday, July 23, 2003

Compal Electronics, Inc.

INT KB & ROM

2N7002

B2

Keep no nosie coupled,Especially the TP_GND

S

C1

GE3

SUB_6782USMbus address A2

D

DTC114

Address 1010 00XX

For Compal Flash Tools

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

C14

610

P_04

02_5

0V8J

~D

1

2

U40

FM24C05U_SO8~D

NC1A12

SDA 5SCL 6

VCC 8

A23VSS4

WP 7

R5520_0402_5%~D@

12

CN

310

0P_1

206_

8P4C

_50V

8~D

@

18

27

36

45

U14

MX29LV008T/B_TSOP40~D

A021A120A219A318A417A516A615A714A88A97A1036A116A125A134A143A152A161

A1813

CE#22OE#24

D0 25D1 26D2 27D3 28D4 32D5 33D6 34D7 35

GND 39

A1740

WE#9

VCC 30VCC 31

GND 23

A1937

NC 29NC 38

VPP 11

RP#/RESET# 10WP#/RY/BY# 12

CN

510

0P_1

206_

8P4C

_50V

8~D

@

18

27

36

45

JPALM

HRS_FX6A-20P-0.8SV~D

135791113151719

2468

101214161820

CN

610

0P_1

206_

8P4C

_50V

8~D

@

18

27

36

45

JKYBRD

JAE_FK2S030W11~D1

3

5

7

11

9

13

15

17

19

21

23

25

27

29

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

3132

3334

C14

70.

1U_0

402_

16V4

Z~D

1

2

CN

210

0P_1

206_

8P4C

_50V

8~D

@

18

27

36

45

L8BLM11A601S_0603~D

1 2

C13

810

P_04

02_5

0V8J

~D

1

2

C14

110

P_04

02_5

0V8J

~D

1

2

CN

110

0P_1

206_

8P4C

_50V

8~D

@

18

27

36

45

R2190_0603_5%~D

12

L11BLM31A260SPT_1206~D

12

C20

30.

1U_0

402_

16V4

Z~D

1

2

CN

410

0P_1

206_

8P4C

_50V

8~D

@

18

27

36

45

C148100P_0603_50V8J~D@

1

2

C20

20.

1U_0

402_

16V4

Z~D

1

2

L9BLM11A601S_0603~D

1 2

C5990.1U_0402_16V4Z~D

1

2

R16

84.

7K_0

402_

5%~D

12

JP2

ACES_6278-34P-DEBUG@

12345678910111213141516171819202122232425262728293031323334

C14

010

P_04

02_5

0V8J

~D

1

2

R16

64.

7K_0

402_

5%~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

GV_HI_LO#

H_STPCLK#

I_STPCLK#

DPSLP#

GV_HI_LO#

L_CPUSLP#

H_STPCLK#

VRM_PWRGD

H_CPUSLP#CLK_CPLD

PLD_DISABLE#

PLD_DISABLE#

VRM_PWRGD

H_STPCLK#H_CPUSLP#

CLK_STP_CPU#

CLK_CPLD I_STPCLK#L_CPUSLP#

+3VSUS

+3VSUS

+VCC_CORE

+3VSUS

+VCC_CORE +VCC_CORE

+3VSUS +3VSUS

+3VSUS

+3VRUN

CPUSLP#<21> STPCLK#<21>

H_VID0<8> VID0 <8,46>VID1 <8,46>VID2 <8,46>VID3 <8,46>VID4 <8,46>VID5 <8,46>

H_VID1<8>H_VID2<8>H_VID3<8>H_VID4<8>H_VID5<8>

CPUPREF# <8>CK_33M_CPLD <6>

PCI_PCIRST# <12,20>

SUSCLK <21>CPLD_WAKE# <21>

GV_HI_LO#<33>NOCREG<33>

CLK_STP_CPU#<6>

STP_AGP#<18>

H_STPCLK#<8>

H_CPUSLP#<8>

I_VRMPWRGD <37>

VRM_PWRGD<21>

VCORE_DRSEN<46>

SUSPWROK<21,37>

VCORE_DSEN# <46>

DPSLP# <8>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

36 60Wednesday, July 23, 2003

Compal Electronics, Inc.

PLD

Pull low disables PLD assertionof SSTEP or sleep and deepersleep on CPU

Dell Speedstep Support PLD

Pop when use CPLD

Pop when use CPLDPop when use CPLD

Depop when use CPLD

Depop when use CPLD

Pop when use CPLD

Depop PR93, Pop PR92 (P.46)Pop PR93, Depop PR92 (P.46)

STPCPU_VR (From PLD to CPU Power)

No.

1

2

3

4

5

6

7

8

9

Speedstep enable Speedstep disable

Pop U27, C233, C606, R557, Depop U27, JPLD, C233, C606, R557,

Function

CPLD (U27)

STPCLK# (From ICH to CPU) Pop Q42, R254, Depop R259

CPUSLP# (From ICH to CPU)

Depop Q42, R254, Pop R259

Pop Q43, R561, Depop R251 Depop Q43, R561, Pop R251

VRMPWRGD (From Reset to ICH) Depop R243 Pop R243

STP_AGP# (PLD to AGP) Pop R96, Depop R98 (P.18)Depop R96, Pop R98 (P.18)

DPRSLPVR (From PLD to CPU power)

PLD_WAKE# (From PLD to ICH) Depop R141 (P.21)Pop R141 (P.21)

Depop PR94, Pop PR95 (P.46)Pop PR94, Depop PR95 (P.46)

CPUPREF# (From PLD to CPU) Depop R380 (P.8)Pop R380(P.8)

10

E

DTC114TKA

13B

C

2

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

PLD_DISABLE# Pop R256, Depop R252 Depop R256, Pop R252

11 DPSLP# Pop R76, R78(P.8) Depop R76, R78(P.8)

12 PCI_PCIRST#(From ICH to PLD) Pop R245 Depop R245

GV_HI_LO#13 Pop R253 Depop R253

CPLD Function options Table

O_GMUXSEL

C3/C4#

LONG/SHRT#

R15 0_0402_5%~D1 2

R31 0_0402_5%~D1 2

Q43

MMBT3904_SOT23~D@

2

31

R588

0_0402_5%~D@ 1 2

C6060.1U_0402_16V4Z~D@

1

2

R259

0_0402_5%~D

1 2

R2521K_0402_5%~D@

12

U27

EPM3032ATC44-10_TQFP44~D@

TDI1TMS7TCK26TDO32

I/O_543I/O_644I/O_82I/O_148I/O_1812I/O_1913I/O_2620I/O_2014

I/O_442I/O_115I/O_126I/O_1610I/O_2418

GND 39GND 40GND 4GND 11GND 16GND 24

GND 36

I/O_9 3

I/O_33 27

GND 30

I/O_21 15I/O_25 19I/O_27 21I/O_28 22I/O_31 25I/O_39 33

VCCINT41

I/O_41 35I/O_43 37

I/O_34 28I/O_37 31

I/O_40 34

GND 38

VCCINT17VCCIO9VCCIO29

I/O_2923

R36 0_0402_5%~D1 2

R245 0_0402_5%~D@1 2

R254470_0402_5%~D@

12R557 1K_0402_5%~D@1 2

R25310K_0402_5%~D@

12

C2330.1U_0402_16V4Z~D@

1

2

R25610K_0402_5%~D@

12

R561470_0402_5%~D@

12

C22510P_0402_50V8J~D @

1

2

R55910K_0402_5%~D@

12

R251

0_0402_5%~D

1 2R24422_0402_5%~D @

12

R603680_0402_5%~D@

12

R246100_0402_5%~D@

12

R243

0_0402_5%~D

1 2

Q42

MMBT3904_SOT23~D@

2

31

JPLD

MOLEX_53261-0690~D@

123456

R34 0_0402_5%~D1 2

R604680_0402_5%~D@

12

R16 0_0402_5%~D1 2R29 0_0402_5%~D1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

THERMTRIP_3P3#

Z3808

Z3813

Z3812

THERM_CPU#

Z3805Z3804

THERM_TRUEZ3809

THERM_CLEAR

Z3806

SIO_THERM_PWRDN

Z3811

THERM_TRUE

5VRUNRC

THERM_CPU#

IMVP_PWRGD

RUNPWROK

IMVP_PWRGD

IMVP_PWRGD

THERM_FF_GATE

RUN_ON

THERM_FF_GATE

MAX6509SET

MAX6509HYST

RUNOK

THERM_PWRDWN+3VSUS

+3VSUS

+3VSUS

+3.3VRTC

+3.3VRTC

+3VSUS

+5VSUS

+3VSUS

+5VRUN

+3VALW

+3VSUS

+3VSUS

+VCC_CORE

+3VSUS

+3VRUN

+3VSUS

+3VRUN

+3VSUS

+3VRUN

SUSPWROK <21,36>

RUN_ON<18,33,39,44>

RUNPWROK <18,34,43,44,46>

THERM_STP#<43>

H_THERMTRIP#<8,21>

POWER_SW_DB#<39>

V_2P5V_PWRGD<45>

SIO_THERM_PWRDN <34>

SUSPWROK_3V<39>

ITP_DBRESET#<8>

RESET_OUT#<34>

PWRGD_3V <10,21>

I_VRMPWRGD <36>

VCORE_PWRGD<44,46>CK_VTT_PG# <6>

ICH_THERM_PWRDN# <21>

VTT_PWRGD<44>

RUNPWROK_1P5V<44>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

37 60Wednesday, July 23, 2003

Compal Electronics, Inc.

Thermtrip & PowerGOOD

+3VSUS

Semitech P/N 103KT2125-1P

VCC for 10 degreeMAX6509 goes in CPU cavity.

SET-HOT Vrsion

Discretes go outside.

Dell P/N 8K573

HYST:

POWERSEQUENCING

Thermistor goes in CPU cavity.

GND for 2 degree

C

B E 3

1

2

3904 SYMBOL(SOT23-NEW)

+3VSUS

shall be VHC14

shall be VHC14

+3VSUS

+3VSUS

SD 1.11(12474 page292) is request 8.2K ohm

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

Dell request populate for SST phase. 2003/0326

+3VSUS

U26B74VHC08MTC_TSSOP14~DIN14

IN25 OUT 6

C603 0.1U_0402_16V4Z~D1 2

U25A

74VHC08MTC_TSSOP14~D

IN11

IN22 OUT 3

P14

G7

R35

32.

21K_

0402

_1%

~D1

2

G

D

S

Q572N7002_SOT23~D

2

13

R556100K_0402_5%~D

1 2

U4

MAX6509CHU-K_SOT23-5~D@

SET1

GND2

OUT#3

VCC 5

HYST 4

C619 0.1U_0402_16V4Z~D1 2

U28ASN74LVC74APWR_TSSOP14~D

D2

CLK3

Q 5

Q 6

VCC

14

PRE

4G

ND

7

CLR

1

R9510K_0402_5%~D@

12

U25D74VHC08MTC_TSSOP14~D

IN113

IN212OUT 11

R36248.7K_0402_1%~D

12

C607 0.47U_0603_16V7K~D1 2

U42A

TC7W14FU_SSOP8~D

P8

A1 Y 7G

4

U36

LMV331__DCK

IN+1

GND2

IN-3

VCC+ 5

OUT 4

C51

1000

P_04

02_5

0V7K

~D

1

2

R9310K_0402_5%~D@

12

R35948.7K_0402_1%~D

12

R2728.2K_0402_5%~D

12

C605

1U_0603_6.3V6M~D

1

2

C3990.047U_0402_10V4M~D

1

2

U42BTC7W14FU_SSOP8~D

P8

A6 Y 2

G4

R2820_0402_5%~D @

12

R36

010

0K_0

402_

1%~D

12

R89

18.2

K_06

03_1

%~D

@

12

U41BTC7W14FU_SSOP8~DP

8

A6 Y 2

G4

R560100K_0402_5%~D

12

C2260.1U_0402_16V4Z~D

1

2

G

D S

Q562N7002_SOT23~D2

1 3

D16

RB7

51V_

SOD

323~

D2

1

R2810_0402_5%~D

12

U29

TC7SH08FU_SSOP5~D

B1

A2 G3

O 4

P5

U25B74VHC08MTC_TSSOP14~D

IN14

IN25OUT 6

C39

210

00P_

0402

_50V

7K~D

1

2

G

D

S

Q702N7002_SOT23~D

2

13

R581

10K_0402_5%~D

1 2

C6090.22U_0603_10V7M~D

1

2

C6200.1U_0402_16V4Z~D

1

2

C228 0.1U_0402_16V4Z~D1 2

R35

510

0K_0

402_

1%~D

12

U41CTC7W14FU_SSOP8~DP

8

A3 Y 5

G4

U25C74VHC08MTC_TSSOP14~D

IN110

IN29OUT 8

R57

220

K_04

02_5

%~D

12

U41A

TC7W14FU_SSOP8~D

P8

A1 Y 7

G4

U26D74VHC08MTC_TSSOP14~D

IN113

IN212OUT 11

G

D

S

Q712N7002_SOT23~D@

2

13

R247

150_0402_5%~D

12

R94

ther

mis

tor

12

R35216.2K_0402_1%~D

12

R2801K_0402_5%~D

12

G

D

S

Q552N7002_SOT23~D

2

13

R57110K_0402_5%~D@

12

C6590.22U_0603_10V7M~D

1

2

Q60MMBT3904_SOT23~D

2

31

R607

56_0402_5%~D

1 2

R2858.2K_0402_5%~D

12

U26C74VHC08MTC_TSSOP14~D

IN110

IN29 OUT 8

R275100K_0402_5%~D

12

C604

0.1U_0402_10V6K~D

1

2

C6180.1U_0402_16V4Z~D

1 2

U26A74VHC08MTC_TSSOP14~D

IN11

IN22 OUT 3

P14

G7

R28

31K

_040

2_5%

~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CAP_LED

Z390

1

SRL_LED

R_BT_MPCI_ACT

BT_MPCI_ACTIVE

R_SRL

ACTLED

NUM_LEDR_NUM

BREATH_LED_B BT_ACTIVE

R_BAT1_LED

Z390

2

BAT1_LED

R_BAT2_LED BAT2_LED

R_CAP

R_BREATH_LED

R_BT_MPCI_ACT

R_BREATH_LED

KSO_17

INT_MIC-

KSI5

INT_MIC+

KSI6

KSI4

POWER_SW#

BAT1_LEDBAT2_LED

CAP_LEDNUM_LEDSRL_LED

POWER_SW_EMI

R_PIDEACT

SD_MODE

IR_ANODE

Z3903IRVCC

+5VALW

+3VALW

+3VRUN+3VRUN

+3VALW

+3.3VRTC

+3VRUN +3VRUN

+5VHDD

SRL_LED#<34>

CAP_LED#<34>

BT_ACTIVE<27>

BAT2_LED#<34>

BAT1_LED#<34>

BREATH_LED<34>

NUM_LED#<34>

INT_MIC- <25>INT_MIC+ <25>

POWER_SW# <39>

KSO_17 <33,35>KSI4 <34,35>KSI5 <34,35>KSI6 <34,35>

IRRX <33>D_IRMODE<33>

IRTX<33>

PIDEACT#<21>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

38 60Wednesday, July 23, 2003

Compal Electronics, Inc.

LED Interface & IrDA

12 3

DTA114YKA

OUT

IN GND

TFDU6102

LID_CL#

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

Q23MMBT3904_SOT23~D

2

31

R85150_0402_5%~D

12

R56470_0402_5%~D

12

R470_0402_5%~D

12

10K

47K

Q12DTA114YKA_SOT23~D

2

13

R80470_0402_5%~D

12

JLED1

FOX_QTS1030A-2021~D

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 34

R72150_0402_5%~D

12

10K

47K

Q11DTA114YKA_SOT23~D

2

13

R57

91K

_040

2_5%

~D

12

C62

44.

7U_1

206_

16V6

K~D

1

2

10K

47K

Q44DTA114YKA_SOT23~D

2

13

Q19MMBT3904_SOT23~D2

31

U43

TFDU6101E_TR4~D

VCC6

SD_MODE5

IRED_CATHODE2

TXD3

IRED_ANODE 1

RXD 4

MODE 7

GND 810K

47K

Q22DTA114YKA_SOT23~D

2

13

C62

10.

1U_0

402_

16V4

Z~D

1

2

R5760_0402_5%~D 1 2

R8610K_0402_5%~D

1 2

R5770_0402_5%~D @

12

R52470_0402_5%~D

12

R57

81K

_040

2_5%

~D

12

R60470_0402_5%~D

12

R57447_0805_5%~D

12

R5751.8_1206_5%~D

12

R5731.8_1206_5%~D

12

10K

47K

Q16DTA114YKA_SOT23~D

2

13

R73470_0402_5%~D

12

C62

34.

7U_1

206_

16V6

K~D

1

2

R9210K_0402_5%~D

1 2

10K

47K

Q21DTA114YKA_SOT23~D

2

13

R46470_0402_5%~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

MOD_EN

HDD_EN

RUN_ENABLE

Z400

2

Z400

3

Z4001

Z400

5

Z400

6

SUSPWROK_5V

ALW_ENABLE#

+3.3VRTC

+5VSUS

+5VHDD

+3.3VRTC

+3VSRC

+3.3VRTC

+5VSUS

+VCC_CORE

+3VRUN

+3.3VRTC+3.3VRTC

+3.3VRTCPWR_SRC

+12V

+12V

+5VSUS

+5VRUN

+3.3VRTC

+5VMOD

V_1P25V_DDR_VTT +3VRUN

+3VSRC +3VSUS

PWR_SRC

+3VSRC

PWR_SRC

+3VSUS

+12V

+3VMOD

+3VSUS

+3.3VRTC +3.3VRTC

MODC_EN#<33>

RUN_ON<18,33,37,44>

ALW_ENABLE# <43>

LIVE_ON_BATT<34>

POWER_SW#<38>

POWER_SW_DB# <37>

ACAV<34,48>

HDDC_EN#<33>

PWRSW_SIO# <33>

SUSPWROK_5V <31,43,45>

VAUX_EN<33,43>

ENAB_3VLAN <28>

RUN_ON<18,33,37,44>

ALWON <43>

SUSPWROK_3V <37>

SATA_3V_ENABLE#<34>

RBAT<41>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

39 60Wednesday, July 23, 2003

Compal Electronics, Inc.

POWER CONTROL

+5HDD Source

2

+5VMOD Source

2

+3VRUN Source

2

Run Planes Enable

+5VRUN Source

1 1

2

1

2

1

1

11

+3VMOD Source

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

Bridge Battery Conn.

C23

94.

7U_1

206_

16V6

K~D

1

2

S

GD

Q27SI3456DV-T1_TSOP6~D

3

6

245

1

R17522_0805_5%~D@

12

C67

4.7U

_120

6_16

V6K~

D

1

2

47K

47K

Q37DTC144EKA_SOT23~D@

2

13

R238100K_0402_5%~D

12 U24C

SN74LVC14APWR_TSSOP14~D

IN5

P14

G7

O 6

S

GD

Q47SI3456DV-T1_TSOP6~D

3

6

245

1

C404.7U_1206_16V6K~D

1

2

G

D

S

Q152N7002_SOT23~D

2

13

R257100K_0402_5%~D@

12

C23

60.

01U

_060

3_50

V7K~

D@

1

2

Q26

TP0610T_SOT23~D

13

2

R62100K_0402_5%~D

12

R258100K_0402_5%~D@

12

G

D

S

Q672N7002_SOT23~D

2

13

C25

00.

01U

_040

2_16

V7K~

D

1

2

G

D

S

Q362N7002_SOT23~D@

2

13

R67470K_0402_5%~D

12

G

D

S

Q252N7002_SOT23~D

2

13

R24210K_0402_5%~D

12

Q20SI3443DV_TSOP6~D

3

56

21

4

C2140.1U_0402_16V4Z~D

1

2

47K

47K

Q59DTC144EKA_SOT23~D

2

13

R178150_0805_5% @

12

S

GD Q54

SI3456DV-T1_TSOP6~D3

624

51

S

GD Q41

SI3456DV-T1_TSOP6~D@3

624

51

U23A

SN74LVC32APWR_TSSOP14~D

IN01

IN12 O 3

P14

G7

U24A

SN74LVC14APWR_TSSOP14~D

IN1

P14

G7

O 2

C60

0.22

U_1

206_

25V7

M~D

1

2

G

D

S

Q172N7002_SOT23~D

2

13

R26010K_0402_5%~D

12

C600

0.1U_0402_16V4Z~D

1 2

U24B

SN74LVC14APWR_TSSOP14~D

IN3

P14

G7

O 4

R10

733

0K_0

402_

5%~D

12

R11210K_0402_5%~D

12

C22

30.

1U_0

402_

16V4

Z~D

1

2

R273100K_0402_5%~D

12

U23D

SN74LVC32APWR_TSSOP14~D

IN012

IN113 O 11

P14

G7

R276100K_0402_5%~D

12

C24

80.

01U

_040

2_16

V7K~

D

1

2

R190100K_0402_5%~D@

12

C23

54.

7U_1

206_

16V6

K~D

@

1

2

R277100K_0402_5%~D

12

U24D

SN74LVC14APWR_TSSOP14~D

IN9

P14

G7

O 8

R10330K_0402_5%~D

12

U24F

SN74LVC14APWR_TSSOP14~D

IN13

P14

G7

O 12

C24

54.

7U_1

206_

16V6

K~D

1

2

47K

47K

Q58DTC144EKA_SOT23~D

2

13

C24

34.

7U_1

206_

16V6

K~D

1

2

S

GD Q50

SI3456DV-T1_TSOP6~D3

624

51

G

D

S

Q352N7002_SOT23~D@

2

13

R17647_0805_5%~D@

12

R65100K_0402_5%~D

12

R51100K_0402_5%~D

12

R267100K_0402_5%~D

12

G

D

S

Q342N7002_SOT23~D@

2

13

JRBATT

MOLEX_53398-0290~D

1122

D5RB751V_SOD323~D

2 1

C220

0.1U_0402_16V4Z~D

1 2

R63

200K

_040

2_5%

~D

12

C330.1U_0402_10V6K~D

1

2

R99330K_0402_5%~D

12

47K

47K

Q45

DTC144EKA_SOT23~D@

2

13

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+3.3VRTC +3.3VRTC

+3.3VRTC

+3.3VRTC

+3.3VRTC +12V

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

40 60Wednesday, July 30, 2003

Compal Electronics, Inc.

PAD,Screw Hole and Spare Parts

Fiducial Mark

MDC

CPU screw hole

MCH screw hole

VGA Conn. screw hole

PCB

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

FAN Conn. screw hole

PCMCIA Slot screw hole

Others screw hole

EMI Cilps

H34C315D165

@

1

PAD10

EMI_CLIP

@

1

PAD14

EMI_CLIP

@

1

PCBLA1711

1

U28BSN74LVC74APWR_TSSOP14~D

D12

CLK11

Q 9

Q 8

VCC

14

PRE

10G

ND

7

CLR

13

FD16

FIDUCIAL MARK

@1

PAD6

EMI_CLIP

@

1

PAD11

EMI_CLIP

@

1

H36H_C71D71N@

1

FD8

FIDUCIAL MARK

@1

FD13

FIDUCIAL MARK

@1

U23BSN74LVC32APWR_TSSOP14~D

IN04

IN15 O 6

P14

G7

H11C315D110@

1

H15C217D157

1

H5C315D165

1

FD6

FIDUCIAL MARK

@1

H6C315D165

1

H2H_C150D110@

1

FD10

FIDUCIAL MARK

@1

H28C197D91@

1

H20C150D110@

1

FD11

FIDUCIAL MARK

@1

FD17

FIDUCIAL MARK

@1

U24E

SN74LVC14APWR_TSSOP14~D

IN11

P14

G7

O 10

FD18

FIDUCIAL MARK

@1

H1H_C99D79@

1

FD1

FIDUCIAL MARK

@1

FD15

FIDUCIAL MARK

@1

PAD13

EMI_CLIP

@

1

FD9

FIDUCIAL MARK

@1

FD4

FIDUCIAL MARK

@1

H21H_C315D110@

1

H10C315D165

1

FD20

FIDUCIAL MARK

@1

H26C197D91@

1

H25C315D165

1

H8H_C315D177@

1

H27C197D91@

1

H35H_O181X40D181X40N@

1

U46B

LM358M_SO8~D@

P8

IN+5

IN-6 G4

O 7

H30C315D110@

1

U23CSN74LVC32APWR_TSSOP14~D

IN09

IN110 O 8

P14

G7

FD14

FIDUCIAL MARK

@1

H16C315D110@

1

FD2

FIDUCIAL MARK

@1

H12H_C315D177@

1

PAD5

EMI_CLIP

@

1

H24C315D165

1

H17C315D110@

1

FD19

FIDUCIAL MARK

@1

H7C315D110@

1

FD12

FIDUCIAL MARK

@1

H3H_O115X177D95X157@

1

FD5

FIDUCIAL MARK

@1

H33H_C315D110@

1

H4H_C150D110@

1

H29C197D91@

1

H19H_O115X177D95X157@

1

FD3

FIDUCIAL MARK

@1

H9C315D165

1

H23C315D165

1

H32C315D110@

1

H31C315D110@

1

PAD4

EMI_CLIP

@

1

PAD12

EMI_CLIP

@

1

FD7

FIDUCIAL MARK

@1

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR _ID

SBATT_VCC

Z4203

Z4202

Z4206

SYS _SUSPEND

Z4201

DC IN-

DC IN+

N C_LDO_EN

RTC_SHDN#

+ DC_IN

RBAT

PS_ID N B_PSID

PWR_ SRC

D C_IN+

+RTCSRC

D C_IN+

PWR _SRC

+12V

+RTCSRC

+3.3VRTC

+3VALW

+RTC_PWR

SYS _SUSPEND<18,33>

RBAT<39>

PS_ID N B_PSID <34>PS_ID

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

41 60Wednesday, July 23, 2003

Compal Electronics, Inc.

DC-IN

S2 1

NOTE: "THE POINT LOCATEDAT PS MODULE

THESE CAPS MUBT BENEXT TO JCHG

THE POINT

3

IRLML5103

G

D

+RTCSRC Source

FET on when in suspend, current flow is from Rbat toPWR_SRC to sustain system during battery swap mode

DC_IN+ Source

Z-series AC AdaptorConnctor

3.3VRTC Source

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

RTC_PWR Source

2@ 16.9K_0402_1%~D

2@ 8.06K_0402_1%~D

PR1:19.1K;PR3:13.3K Trickle charger current is 0.45mA for Nimitz.PR1:16.9K;PR3:8.06K Trickle charger current is 0.5mA for Beijing.

P R12

100K_0402_5%~D

12

PC5

2200P_0402_50V7K

12

P C12

0.1U_0805_50V7M~D

12

PR5

0_0402_5%~D@

1 2

PR6

0_0402_5%~D

1 2

P C7

0.01U_0402_50V7K~D

12

PQ3SI7447DP_SO8

32

4

1

5PL2CHT_C8BBPH853025

1 2

P R8

150K_0402_5%

12

P C10

0.01U_0402_50V7K~D

12

PC4

2200P_0402_50V7K

12

P C1

1000P_0402_50V7K~D

12

+

P C815U_D2_25M_R90~D@

1

2

P R10100K_0402_5%~D@

12

PC130.1U_0805_50V7M~D

12

PR313.3K_0402_1%1@

12

PD2

RB751V-40_SOD323~D

21

PR2

0_0402_5%~D

1 2

P C14

0.1U_0805_50V7M~D

12

PC60.01U_0402_50V7K~D

12

P R1

19.1K_0402_1%1@1 2

P D4

EC10QS04_SOD106~D

2 1

47K

47K

PQ2

DTC144EKA_SOT23~D

2

13

P D28

VZ0603M220APT_0603@

1

2

P C9

1000P_0402_50V7K~D

12

P D3

EC10QS04_SOD106~D

21

P C15

0.47U_1812_50V7M~D

12

PC3

10U_1206_6.3V7K~D

12

HRS_HR33-DL-7~D

P JPDC1

Low_PWR 1

DC+_1 2

DC+_2 3

DC-_1 4

DC-_2 5GND_16

GND_27

GND_38

GND_49

MH

1M

H2

P C11

0.1U_0805_50V7M~D

12

MAX1615EUK_SOT23-5~D

P U1

@

IN1

GN

D2

OUT 3

5/3+ 4#SHDN5

P R74.7K_0402_5%~D

12

G

D S

P Q42N7002_SOT23~D

2

1 3

PL4CHT_C8BBPH853025

1 2

PFS1

0.75A_24V_MINISMDM075/24~D

21

PR224

0_0402_5%~D@1 2

MAX1615EUK_SOT23-5~D

PU2

IN1

GN

D2

OUT 3

5/3+ 4#SHDN5

PQ1

IRLML5103_SOT23~D

2

13

P R4

100K_0402_5%~D

12

PL1

BLM11A121S_0603~D

12

PD1

RB751V-40_SOD323~D

21

P R13

0_0402_5%~D

1 2

PC2

10U_1206_6.3V7K~D@

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SUBOUT1SUBOUT2

SUBOUT2

SUBOUT1

SUB_OUT1

SUB_OUT2

SUBOUT1

SUBOUT2

+5VALW

+5VALW

PBATT+

+12V

PBAT_SMBDAT <34,48>PBAT_PRES# <34>

PBAT_SMBCLK <34,48>

PBAT_ALARM# <34>

SUB_DETECT# <33,50>

SUB_OUT1 <50>

SUB_OUT2 <50>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

42 60Wednesday, July 23, 2003

Compal Electronics, Inc.

Battery CONN.

TRACE

Primary Battery Connector

THE POINT

ESD Diodes

SUYIN_200275MRQ12G536ZL_12PTOP view

1

2

3

4

5

6

7

8

9

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

10

11

12 Please closely PJPB1

PD31DA204U_SOT323~D @

1

32

PR1410K_0402_5%~D

12

PD32DA204U_SOT323~D @

1

32

PC160.1U_0805_50V7M~D

12

PD6

DA204U_SOT323~D @ 1

3 2

PR238

0_0402_5%~D

1 2

PJPB1

SUYIN_200275MR012G536ZL~D

SUB_OUT1 1

SUB_DETECT 3BATT2-(GND) 4BATT1-(GND) 5

BAT_ALERT 6

SMB_DAT 9

G14G13

SUB_OUT2 2

SYS_PRES# 7BATT_PRES# 8

SMB_CLK 10BATT2+ 11BATT1+ 12

PR15

100_0402_5%~D

1 2PR16

100_0402_5%~D

1 2

PC2261000P_0402_50V7K~D@

12

PC2271000P_0402_50V7K~D@

12

PL21

CHT_C8BBPH853025

12

PC17

2200P_0402_50V7K

12

PR237

0_0402_5%~D

1 2

PD5

DA204U_SOT323~D @ 1

3 2 PD8

DA204U_SOT323~D @ 1

3 2

PR17100_0402_5%~D

1 2

PD7

DA204U_SOT323~D @ 1

3 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

TON

BST3

BST5

ILIM5

BST_3 LX5

BST_5

ILIM3

ILIM5

SKIP#

P RO#

ILIM3

TON

RE

F

R EF

LX3

D H5

P RO#SKIP#

D L3

D L5

Z4704ALW_ENABLE#

PWR _SRC

+5VSUSP

+5VALW

+3.3VRTC

+3VALW

+3VSRCP

VCC_MAX1999

+3VSRCP

+3VALW

+3.3VRTC

VCC_MAX1999

VCC_MAX1999

+5VSUS

+12V

+3VSRCP

+12VP

+5VSUSP

+3VSRC

+12VP

PWR _SRC

+RTC_PWR

+5VALW

S US_ON<33>

VAUX_EN<33,39>

THERM_STP#<37>

S US_ON<33>

SUSPWROK_5V <31,39,45>

AL WON<39>RUNP WROK<18,34,37,44,46>

ALW_ENABLE#<39>

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

43 60Wednesday, July 23, 2003

Compal Electronics, Inc.

3.3V/5V

Place these CAPsclose to FETs

Place these CAPsclose to FETsCurrent limit at 4A for +3.3V

Add the current limit

Adding RC filter

Current limit at 6A for +5VSUSP

+3VALW Source

(+12V+-5%,2A)

Adding SKIP control

(2A,80mils ,Via NO.= 4)

(4A,160mils ,Via NO.= 8)

(6A,240mils ,Via NO.= 12)

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

+5VALW Source

P R26

0_0402_5%~D

12

PJP3

PAD-OPEN 4x4m

1 2

P C22

0.1U_0805_50V7M~D

12

P C45

0.1U_0805_50V7M~D

12 PR223

0.028_2512_1%~D

1 2

P R34

100K_0402_5%~D

1 2

PR27

0_0402_5%~D

12

PR282.2_0402_5%

1 2

P R45100K_0402_5%~D@1 2

P D14

RB751V-40_SOD323~D@

2 1

P R21

0_0402_5%~D@

12

P C23

2200P_0402_50V7K

12

PD13

EC31QS04~D 21

P R40

1K_0402_5%~D

1 2

P C24

4.7U_0805_6.3V6K~D

12

P R2443K_0402_1%~D

12

PQ7

SI4835DY_SO8~D

365 7 8

2

4

1

PC31

0.1U_0805_50V7M~D

12

+

P C4947U_D2_6.3VM~D@

1

2

P D10

EP10QY03 2

1

+PC225

47U_16V@

1

2

PC25

1U_0603_6.3V6M~D

12

+

P C4847U_D2_6.3VM~D@

1

2

PC29

2200P_0402_50V7K

12

PQ13@SI2301DS 1P_SOT23~D

G2

D 3S1

PC35

0.1U_0805_50V7M~D

12

PQ59

SI4810DY_SO8~D

36 578

2

4

1

P C50

0.1U_0402_10V6K~D@

12

PR41

21K_0402_1%~D

12

P C30

0.1U_0805_50V7M~D

1 2

PU19

MAX1745_10uMAX

SHDN7

VH

8

FB 4

IN10

CS 6

VL2

REF3

GN

D1

OUT 5

EXT 9

PR184.7_1206_5%

12

+P C40

47U_16V

1

2

PC224

270P_0402_50V7K~D

12

P R29

2.2_0402_5%

1 2

PQ12SI2301DS 1P_SOT23~D@

G2

D 3S1

PC19

10U_1210_25V7M~D

12

PC39

4.7U_0805_6.3V6K~D

12

PC43

1U_0805_25V4Z~D

12

PJP1

PAD-OPEN 4x4m

1 2

PR32

0_0402_5%~D@

12

P C361U_0805_25V4Z~D

12

PJP2

PAD-OPEN 4x4m

1 2

P U4

TC7SH32FU_SSOP5~D

I02

I11O 4

P5

G3

PU3

MAX1999EEI_QSOP28~D

SHDN6

BST328

DH326

LX327

DL324

OUT322

LX5 15

DL5 19

FB5 9PRO 10

ILIM5 11ILIM3 5REF 8

V+20

VCC17

LDO5 18

BST5 14

DH5 16

OUT5 21N.C. 1

TON 13GND 23

SKIP12

LDO325

FB37

ON33ON54

PGOOD 2

P R23

47_0402_5%~D

12

PD11

EP10QY03 21

PR36

182K_0402_1%

12

PR46100K_0402_5%~D@1 2

P C38

10U_1206_10V4Z~D

12

PR37

0_0402_5%~D

12

P R33

240K_0402_5%

12

P R25

20K_0402_1%

12

PD15

RB751V-40_SOD323~D@

2 1

+PC34

330U_E_6.3VM~D

1

2

PC44

4.7U_1210_25V6K~D

12

PL8

22U_SIL104-220_2.9A_30%

1 2

PL6

4.7U_SPC-1205P-4R7B_+40-20%~D

1 2

PL5

HCB4532K-800T90_1812~D

1 2

P C26

1U_0603_6.3V6M~D

12

PC33

0.1U_0805_50V7M~D

12

PQ56

SI4800DY_SO8~D

365 7 8

2

4

1

PQ58

SI4800DY_SO8~D

36 578

2

4

1

P R22

0_0402_5%~D@

12

PC280.1U_0805_50V7M~D

12

PR312K_0402_1%~D

1 2

PC2321U_0805_25V4Z~D@

12

PR30

0_1206_5%~D

1 2

PR228

0_0402_5%~D@

12

P R20

20K_0402_1%

12

PR2270_0402_5%~D@

12

PD9

RB717F_SOT323~D

3

1

2

PR230

0_0402_5%~D 1

2

PR218

0_0402_5%~D

12

P C51

0.1U_0402_10V6K~D@

12

P C41

4.7U_1210_25V6K~D

12

+

PC2015U_D2_25M_R90~D@

1

2

PL7

4.7U_SPC-1205P-4R7B_+40-20%~D

1 2

PR2290_0402_5%~D

12

PC201

4.7U_1210_25V6K~D

12

PC27

0.1U_0805_50V7M~D

12

P C37

1000P_0402_50V7K~D

12

PQ57SI4810DY_SO8~D

365 7 8

2

4

1

P R19

18.2K_0402_1%

12

+

P C21

15U_D2_25M_R90~D@

1

2

P C18

10U_1210_25V6K~D

12

P C42

0.1U_0402_10V6K~D

12

+PC32

150U _D2_6.3VM~D

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR _SRC

+5VSUS

+1.5VRUNP

+3VSUS

+VTT_GMCHP

+5VSUS

+1.5VRUNP

+VTT_GMCHP

+1.5VRUN

+VTT_GMCH

R UNPWROK_1P5V<37>

RUN _ON<18,33,37,39>

RUNPW ROK <18,34,37,43,46>

VTT_PWRGD <37>

VC ORE_PWRGD <37,46>CPU_PSC_LOW<46>

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

+1.5VRUNP & +VTT_GMCHP

Compal Electronics, Inc.

44 60Wednesday, July 23, 2003

+1.5VRUNP/+VTT_GMCHP

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

B

Dell-Compal Confidential

PL10

2 .2U

1 2

P R66

0_0402_5%~D@

12

P C61

2200P_0402_50V7K

12

PR232

0_0402_5%~D

12

P C544.7U_1210_25V6K~D

12

SC1485

P U7SC1485

PGND11

DL12

VDDP13

ILIM14

LX15

DH16

BST17

EN/PSV2 8

TON2 9

VOUT2 10

VCCA2 11

FBK2 12

PGOOD2 13

AGND2 14

PGND2 15

DL2 16

VDDP2 17

ILIM2 18

LX2 19

DH2 20

BST2 21

EN/PSV122

TON123

VOUT124

VCCA125

FBK126

PGOOD127

AGND128

+ PC56@15U_D2_25M_R90~D

1

2

+ P C60@15U_D2_25M_R90~D

1

2

P C59

1U_0603_6.3V6M~D

12

+

PC220

220U_D2_4VM~D

1

2

P R65

0_0402_5%~D

12

PJP5

PAD-OPEN 4x4m

1 2

PR49

0_0402_5%~D

1 2

P R54

6.04K_0402_1%~D

1 2

PR247100K_0402_5%~D

12 P C57

1000P_0402_50V7K~D

12

PR21610K_0402_5%~D

12

P C634.7U_1206_25V

12

PR215

0_0402_5%~D

12

PC530.1U_0603_25V7M~D

12

P R58

30K_0402_1%

12

PR52

0_0402_5%~D

1 2

PR23110_0402_5%~D

12

P R6015.8K_0402_1%

12

PR471M_0402_5%~D

12

P C72

47P_0402_50V8J~D@

12

PC670.1U_0805_25V7K~D

12

P R6118.2K_0402_1%

12

P R57715K_0402_1%

12

SI4814DY_SO8~D

PQ16

D12 G1 8

G23S1/D2 5

D11S1/D2 7

S24 S1/D2 6

P C680.1U_0805_25V7K~D

12

PC70

4.7U_0805_6.3V6K~D

12

+

PC221220U_D2_4VM~D@

1

2

PR2140_0402_5%~D

12

PC58

1U_0603_6.3V6M~D

1 2

PR236

0_0402_5%~D

12

P C522200P_0402_50V7K

1

2

P R53

8.87K_0402_1%~D

1 2

P C65

1U_0805_10V7K~D

12

PR51

0_0402_5%~D

1 2

+

PC71220U_D2_4VM~D

1

2

PD17

EC31QS04~D 21

P C73

0.01U_0402_50V7K~D@

12

PR4810_0402_5%~D

12

PR6810K_0402_5%~D

12

P C66

1U_0805_10V7K~D

12

PR50

0_0402_5%~D

1 2

PQ14IRF7811A_SO8~D

36 578

2

4

1

PC76

1000P_0402_50V7K~D

12

PJP4

PAD-OPEN 4x4m

1 2

P C644.7U_1206_25V

12

P R5536.5K_0402_1%~D

12

PL11

3U

1 2

PR2404.87K_0402_1%~D

12

G

D

SPQ64

2N7002_SOT23~D

2

13

PL9

HCB4532K-800T90_1812~D

1 2

P D16

DAP202U_SOT323~D

3 2

1

P C554.7U_1210_25V6K~D

12

+P C69

470U_D2_2.5VM

1

2

PQ15

FDS6672A_SO8~D

36 578

2

4

1

PR248100K_0402_5%~D

12

P C74

4.7U_0805_6.3V6K~D

12

P C620.1U_0603_25V7K~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

V_2P5V_PWRGD

+2.5V_MEMP

PWR_ SRC

+5VSUS

+2.5V_MEMP

+5VSUS

V_1P25V_DDR_VTTP

+2.5V_MEMP +2.5V_MEM

V_1P25V_DDR_VTTV_1P25V_DDR_VTTP

+ 5VRUN

V_2P5V_PWRGD<37>

SUSPWROK_5V<31,39,43>

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

45 60Wednesday, July 23, 2003

Compal Electronics, Inc.

1.25V/2.5V

+2.5V/+1.25V

DDR Termination Voltage

(3A,200mils ,Via NO.=6)

(12A,360mils ,Via NO.=24)

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

P C964.7U_0805_6.3V6K~D

12

P C780.1U_0805_25V7K~D

12

PC851000P_0402_50V7K~D

12

P C79

4.7U_1210_25V6K~D

12

PR2170_0402_5%~D

12

+

PC222

@15U_D2_25M_R90~D

1

2

PQ18FDS6672A_SO8~D

36 578

2

4

1PR2340_0402_5%~D

1 2

P R77

10_0402_5%~D

12

P R79

10.7K_0402_1%

1 2

PC831U_0603_6.3V6M~D

1 2

P C971000P_0402_50V7K~D@

12

P C77

2200P_0402_50V7K

12

P R76

42.2K_0402_1%~D

12

PJP8

PAD-OPEN 4x4m

1 2

P C86

1000P_0402_50V7K~D

12

PQ47FDS6672A_SO8~D

36 578

2

4

1

PR249100K_0402_5%~D

12

PR72

0_0402_5%~D

1 2PL14

3 uH

1 2P R75

0_0402_5%~D

1 2

PJP6PAD-OPEN 4x4m1 2

+

P C91

220U_D2_4VM~D

1

2P R74

0_0402_5%~D

1 2

PC92

47P_0402_50V8J~D

12

PC101

0.1U_0402_10V6K~D

12

P R85

750K_0402_5%~D

12

P R8610K_0402_5%~D@

12

P R691M_0402_5%~D

12

PR250100K_0402_5%~D

12

P D30

RB751V-40_SOD323~D

21

PL13

2. 2UH

1 2

PC218

1U_0805_10V7K~D

12

SC1486

PU8SC1486

PGND11

DL12

VDDP13

ILIM14

LX15

DH16

BST17

REFIN 8

TON2 9

REFOUT 10

VCCA2 11

FBK2 12

PGOOD2 13

AGND2 14

PGND2 15

DL2 16

VDDP2 17

ILIM2 18

LX2 19

DH2 20

BST2 21

EN/PSV122

TON123

VOUT124

VCCA125

FBK126

PGOOD127

AGND128

PC223

2200P_0402_50V7K

12

P C804.7U_1210_25V6K~D

12

P R8110_0402_5%~D

12

SI4814DY_SO8~D

PQ19

D12 G1 8

G23S1/D2 5

D11S1/D2 7

S24 S1/D2 6

P C93

1000P_0402_50V7K~D@

12

+PC95150U _D2_6.3VM~D

1

2

+P C90

220U_D2_4VM~D

1

2

+P C94

150U _D2_6.3VM~D

1

2

PR71

0_0402_5%~D

1 2

PR8910K_0402_5%~D

12

PC841U_0603_6.3V6M~D

12

P R73100_0603_5%~D@

12

PL12

HCB4532K-800T90_1812~D

1 2

PR80100_0603_5%~D@

12

PR8810K_0402_1%~D

12

PR78

7.5K_0402_1%

1 2

PQ17IRF7811A_SO8~D

36 578

2

4

1

P C81

4.7U_1210_25V6K~D

12

PR70

10_0402_5%~D

12

PC216

4.7U_1210_25V6K~D

12

P R8210K_0402_1%~D

12

P C89

0.1U_0805_50V7M~D

12

PC217

0.1U_0805_25V7K~D

12

PC219

1U_0805_10V7K~D

12

PR8710K_0402_1%~D

12

+ P C82@15U_D2_25M_R90~D

1

2

PC1001U_0603_6.3V6M~D

12

PC88

0.1U_0805_50V7M~D

12

PJP7PAD-OPEN 4x4m1 2

P D19

EC31QS04~D 2

1

PD29RB751V-40_SOD323~D

21

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

1.2VDD+VCCVID

+3VSUS

+3VRUN

+5VRUNPWR_SRC

+5VRUN

+VCC_CORE

+5VRUN

+5VRUN

+5VRUN

+5VRUN

ISEN1- <47>

ISEN2- <47>

PWM2 <47>

PWM4 <47>

ISEN3- <47>

ISEN2+ <47>

PWM3 <47>

ISEN3+ <47>

VCORE_PWRGD <37,44>

PWM1 <47>

ISEN1+ <47>

ISEN4+ <47>ISEN4- <47>

VID1<8,36>VID0<8,36>VID5<8,36>

VCORE_ENLL<8>

VID2<8,36>VID3<8,36>VID4<8,36>

VCORE_DRSEN<36>

VCORE_DSEN#<36>

RUNPWROK<18,34,37,43,44>

VSSSENSE <8>

VCCSENSE <8>

VID_PWRGD<8>

CPU_PSC_HI<49>

VCORE_PHOT#<10,34>

DT/MT# <49>

CPU_PSC_LOW<44>

Title

Size Document Number Rev

Date: Sheet o fLA-1711

X02-D

46 60Wednesday, July 23, 2003

Compal Electronics, Inc.CPU_CORE_Controller

Panasonic ERTJ0EV334J (0402)Locate this NTC resistor onPCB between phase 2 and 3for thermal compensation.

RemoteSensing

Battery FeedForward

Frequency Select

Place close to IC

Place near +VCC_COREoutput capacitor

1. When mode control signal islow/ high, the VR will operate toNorthwood/ Prescott load line.2. VID5(12.5) should be pulledhigh, when the VR operates toNothwood load line.

PR204

9.31K_0402_1%~D

12

PR9866.5K_0402_1%

12

PU10

MIC5258

PG4

VOUT 5

EN3

VIN1

GND 2

G

DS

PQ452N7002_SOT23~D 2

13

PR97

0_0402_5%~D@

12

PR103

10K_0402_1%~D

12

PC1054700P_0402_25V7K~D

12

PC214

0.1U_0402_10V6K~D

12

PR1160_0402_5%~D

1 2

PR10121K_0402_1%~D

12

PR11410K_0402_5%~D 1

2

PR2055.1K_0402_1%~D

12

PU9

ISL6247CR_QFN40~D

VCC32

PGOOD 39VID41VID32VID23VID14VID05VID12.56

PWM1 25

PWM4 31

PWM2 26

PWM3 20

ISEN1+ 24

ISEN4+ 30

ISEN2+ 27

ISEN3- 22

FS36

VDIFF 16

DRSV37

COMP 15

OCSET10

FB 13

SOFT11

VSEN 17VRTN 18

OFS 8

ENLL34

VR-TT#38 NC 14

DSV9

ISEN1- 23

ISEN4- 29

ISEN2- 28

ISEN3+ 21

DSEN#35

NTC40

GND19

GND12

RAMPS 7

DRSEN33

PR24139K_0402_1%

12

PR1111.87K_0402_1%~D 1 2

PR109

100K_0402_5%~D

12

PR10210K_0402_1%~D

1 2

PU20B

LM358M_SO8~D

P8

IN+ 5

IN- 6G4

O7

PR2260_0402_5%~D@

12

PC1124.7U_1206_16V6K~D

12

PU20A

LM358M_SO8~D

P8

IN+ 3

IN- 2G4

O1

PR93

0_0402_5%~D@

1 2 PR95

0_0402_5%~D

12

PR2250_0402_5%~D@

12

PC1091000P_0402_50V7K~D@

12

PR124100K_0402_5%~D

12

PR10490.9K_0603_1%~D

12

PR1170_0402_5%~D

12

PR961K_0402_1%~D@

12

PC1021U_1210_50V7M

12

PR118

27K_0402_5%

12

PR9080.6K_0402_1%~D

12

PR1060_0402_5%~D 1 2

PC1111U_0603_6.3V6M~D

12

PC1061000P_0402_50V7K~D@

12

PR220

604K_0402_1%

12

PC103

0.033U_0603_25V7M~D

12

PR1150_0402_5%~D@

12

PR99

0_0402_5%~D@

12

PR120

0_0402_5%~D

12

PR123

22K_0402_5%

12

PQ60

TP0610T_SOT23~D2

13

PR122

0_0402_5%~D

12

G

D

S

PQ652N7002_SOT23~D2

13

PR112

330K_0603_5%~D

12

PR94

0_0402_5%~D@

12

PR920_0402_5%~D 1 2

G

D

S

PQ46

2N7002_SOT23~D

2

13

PC108

220P_0402_50V8J~D

12

G

D

S

PQ61

2N7002_SOT23~D

2

13

PC110

4.7U_1206_16V6K~D

12

PQ62

MMBT3904_SOT23~D

2

31

PR91

10K_0402_5%~D

12

PC104

100P_0402_50V8K~D

12

PR108

45.3K_0402_1%

12

PR121

0_0402_5%~D@

12

PR1101M_0402_5%~D

12

PR100365_0402_1%~D

12

PR119

0_0402_5%~D@12

PR107

0_0402_5%~D

12

PR11332.4K_0402_1%

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LG1

UG

1U

G2

Phase2

LG2

UG

3

Phase3

LG3

UG

4

Phase4

LG4

Phase1

PWR_SRC CPU_PWR_SRC

CPU_PWR_SRC

CPU_PWR_SRC

CPU_PWR_SRC

CPU_PWR_SRC

CPU_PWR_SRC

+5VRUN

CPU_PWR_SRC

+VCC_CORE

+3VALW

+3VALW

PWM1<46>

ISEN1-<46>ISEN1+<46>

PWM2<46>

ISEN2-<46>ISEN2+<46>

PWM3<46>

ISEN3-<46>ISEN3+<46>

PWM4<46>

ISEN4-<46>ISEN4+<46>

DAT_SMB <19,26,34,35>

CLK_SMB <19,26,34,35>

ATF_INT# <19,33>

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

47 60Wednesday, July 23, 2003

Compal Electronics, Inc.CPU_CORE_Power-Stage

Input Bulk and HF Capacitors

Snubber

Local TransistorSwtich Decoupling

Notes:

The ISL6561(ISL6427) supports lossless current sensing includingInductor DCR and MOSFET rDSon sensing. Schematic components arecolor coded accordingly. In addition an external sense resistorcan be used for higher load-line accuracy but this will impactsystem cost and efficiency.

Sync. Rectifiers use thermally enhanced "PowerPak" technology inan SO-8 form-factor. Optimal MOSFETS will be chosen based onthermal performance.

Depending on the processor final requirments and empiricalthermal result testing a 3 phase solution may be possible. Inthe 4 phase configuration a single upper mosfet may also besufficient.

Add thermal venting vias to board. Vias under parts must have aminimum pitch of 1mm and hole size of 0.3mm to avoid solderwicking.

DCRInductorSensing

Panasonic ETQ-P4LR56WFC

Panasonic ETQ-P4LR56WFC

Local TransistorSwtich Decoupling

Snubber

Panasonic ETQ-P4LR56WFC

Local TransistorSwtich Decoupling

Snubber

Panasonic ETQ-P4LR56WFC

Local TransistorSwtich Decoupling

Snubber

Address 1001 001X (X=1-->Read; X=0-->Write)

Address select(7414ART-0)Float: 1001 000GND: 1001 001VDD: 1001 010

Low-side two population options

SI4362DY_SO8:PQ22,PQ23,PQ26,PQ27,PQ30,PQ31,PQ34,PQ35

FDS7064N_SO8:PQ48,PQ49,PQ50,PQ51,PQ52,PQ53,PQ54,PQ55

DUAL FOOTPRINT

DUAL FOOTPRINT

DUAL FOOTPRINT

DUAL FOOTPRINT

PTC resistor

PTC resistor

PTC resistor

PTC resistor

PQ52

FDS7064N_SO8@

365 7 8

2

4

19

PC2092200P_0402_50V7K

12

PQ30SI4362DY_SO8~D

365 7 8

2

4

1

PC15410U_1210_25V6K~D

12

PQ54

FDS7064N_SO8@

365 7 8

2

4

19

PR157

25.5K_0402_1%

12

PC164

1U_0805_25V4Z~D

12

PR160820_0603_1%~D

1 2

+

PC138

15U_D2_25M_R90~D@

1

2

PC153

1U_0603_6.3V6M~D

12

+

PC144

15U_D2_25M_R90~D@

1

2

PR1250_0402_5%~D

12

PC152

0.15U_0805_16V7K~D

1 2

PR211

0_0402_5%~D

12

PQ48FDS7064N_SO8@

365 7 8

2

4

19

PQ29

IRF7811W_SO8~D

365 7 8

2

4

1

PQ27

SI4362DY_SO8~D

365 7 8

2

4

1

PR130

25.5K_0402_1%

12

PR142

820_0603_1%~D

12

PR222 0_0402_5%~D

1 2

PC205

0.1U_0603_25V7M~D

12

PU18

AD7414ART-0_SOP23-6

SDA 6

ALERT 5

SCL 4

AS1

GND2

VDD3

PQ35SI4362DY_SO8~D

365 7 8

2

4

1

PC123

10U_1210_25V6K~D

12

PR138@ 2.2_0805

12

PC121

10U_1210_25V6K~D

12

PC1141U_0603_6.3V6M~D

12

PC2082200P_0402_50V7K

12

PR153

0_0402_5%~D

12

PR151

820_0603_1%~D

12

PQ26

SI4362DY_SO8~D

365 7 8

2

4

1

PC1320.1U_0402_10V6K~D

12

PQ20

IRF7811W_SO8~D

365 7 8

2

4

1

PC16110U_1210_25V6K~D

12

PL15

CHT_C8BBPH853025

1 2

PQ23SI4362DY_SO8~D

365 7 8

2

4

1

PQ25

IRF7811W_SO8~D

365 7 8

2

4

1

PR147

@2.2_0805

12

PL17

0.56U_ETQP4LR56WFC_21A_20%~D

1 2

PR1340_0402_5%~D

12

PC204

0.1U_0603_25V7M~D

12

+

PC14115U_D2_25M_R90~D@

1

2

PQ55

FDS7064N_SO8@

365 7 8

2

4

19

PC151

0.01U_0402_50V7K~D

12

PU13

ISL6207CB-T_SO8~D

BOOT 2

PWM3VCC6

EN7

LGTE 5GND4

PHSE 8

UGTE 1

PR129@ 2.2_0805

12

PQ22SI4362DY_SO8~D

365 7 8

2

4

1

PC1621000P_0402_50V7K~D@

12

PC149

1U_0805_25V4Z~D

12

PC158

0.01U_0402_50V7K~D

12

PR154499K_0603_1%@

12

PQ31SI4362DY_SO8~D

365 7 8

2

4

1

PC116

10U_1210_25V6K~D

12

PC1311000P_0402_50V7K~D@

12

+

PC136

15U_D2_25M_R90~D@

1

2

PR21910K_0402_5%~D

12

PL18

0.56U_ETQP4LR56WFC_21A_20%~D

1 2

PC134

0.01U_0402_50V7K~D

12

PQ51

FDS7064N_SO8@

365 7 8

2

4

19

PR212

0_0402_5%~D

12

PR139

25.5K_0402_1%

12

PQ24

IRF7811W_SO8~D

365 7 8

2

4

1

PR213

0_0402_5%~D

12

PL16

0.56U_ETQP4LR56WFC_21A_20%~D

1 2

PR1520_0402_5%~D

12

PU14

ISL6207CB-T_SO8~D

BOOT 2

PWM3

VCC6

EN7

LGTE 5GND4

PHSE 8

UGTE 1

PC113

0.15U_0805_16V7K~D

12

PR127499K_0603_1%@

12

PC157

1U_0805_25V4Z~D

12

PQ28

IRF7811W_SO8~D

365 7 8

2

4

1

PR148

25.5K_0402_1%

12

PC206

2200P_0402_50V7K

12

PU12

ISL6207CB-T_SO8~D

BOOT 2

PWM3

VCC6

EN7

LGTE 5GND4

PHSE 8UGTE 1

PC165

0.01U_0402_50V7K~D

12

PC1461U_0603_6.3V6M~D

12

PC117

10U_1210_25V6K~D

12

PC133

1U_0805_25V4Z~D

12

PC14710U_1210_25V6K~D

12

PQ21

IRF7811W_SO8~D

365 7 8

2

4

1

PC11510U_1210_25V6K~D

12

PL19

0.56U_ETQP4LR56WFC_21A_20%~D

1 2

PR136499K_0603_1%@

12

PC119

10U_1210_25V6K~D

12

PC2100.1U_0402_10V6K~D

12

PR210

0_0402_5%~D

12

PC2072200P_0402_50V7K

12

PC2030.1U_0603_25V7M~D

12

PQ34

SI4362DY_SO8~D

365 7 8

2

4

1

PQ53

FDS7064N_SO8@

365 7 8

2

4

19

PR133

820_0603_1%~D

12

PU11

ISL6207CB-T_SO8~D

BOOT 2

PWM3

VCC6

EN7

LGTE 5GND4PHSE 8

UGTE 1

PC1551000P_0402_50V7K~D@

12

PQ49

FDS7064N_SO8@

365 7 8

2

4

19

PC145

0.15U_0805_16V7K~D

1 2

PQ50

FDS7064N_SO8@

365 7 8

2

4

19

+

PC13715U_D2_25M_R90~D@

1

2

+

PC13515U_D2_25M_R90~D

@

1

2

+

PC139

15U_D2_25M_R90~D@1

2

PC122

10U_1210_25V6K~D

12

+

PC140

15U_D2_25M_R90~D@

1

2

+

PC143

15U_D2_25M_R90~D@1

2

PR156@ 2.2_0805

12

PQ32

IRF7811W_SO8~D

365 7 8

2

4

1

PC159

0.15U_0805_16V7K~D

1 2

PC120

10U_1210_25V6K~D

12

PC2020.1U_0603_25V7M~D

12

+

PC142

15U_D2_25M_R90~D@

1

2

PC160

1U_0603_6.3V6M~D

12

PR145499K_0603_1%@

12

PC118

10U_1210_25V6K~D

12

PR1430_0402_5%~D

12

PC215

0.1U_0603_25V7M~D

12

PC1481000P_0402_50V7K~D@

12

PQ33

IRF7811W_SO8~D

365 7 8

2

4

1

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DLO

CSSP

CHG_CS

CSSN

CCV

1645_DAC

CH

VR

EF

TM

TH

CSIN

CSIP

ACOK#

ACOK#

CHVREF

CHVREF

ACAV

DLOV

ACOK#ACAV

ACAV

+SDC_IN

PWR_SRC

+5VALW

DC_IN+

PBATT+

PBATT+

+5VALW+3.3VRTC

DC_IN+

+3.3VRTC

PWR_SRC

CHAGER_SRC

DC_IN+

CHG_PBATT <34>

PBAT_SMBCLK<34,42>

PBAT_SMBDAT<34,42>

ACAV<34,39>

ACAV<34,39>

PDL <49>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

48 60Wednesday, July 23, 2003

Compal Electronics, Inc.

CHARGER CONTROL

VMAX=3.49VMaximum charger voltage=17.45V

IMAX=1.6VMaximum charger current=8A

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DC_IN+ discharge path

PD23

RB751V-40_SOD323~D

21

PR167

0_0402_5%~D 1

2

+ PC18415U_D2_25M_R90~D@

1

2

PR172100K_0402_5%~D@

12

PC1904.7U_1210_25V6K~D

12

PR173

75K_0402_1%~D@

12

PR1621K_0402_5%~D

12 PQ36

2SA1036K_SOT23~D

2

31

PR189182K_0603_0.1%~D

12

PC1921500P_0402_50V7K~D

12

PR19010K_0402_1%~D

12

PR1660_0402_5%~D

12

G

D

S

PQ42BSS138_SOT23~D

2

13

PC171

1U_0603_6.3V6M~D

1 2

PC1700.1U_0805_25V7K~D@

12

PC193

1U_0805_25V4Z~D

12

PC213

10U_1210_25V6K~D

12

PQ41SI7447DP_SO8

32

4

1

5

T16PAD @

PC1752200P_0402_50V7K

12

PU6

MAX1535X_QFN32~D

DHI 26

CSIN 20

DLO 23

SDA14

CCS6

CCV8

CSS

P29

PDS31

THM13

VDD12

SRC27

ACIN3

ACOK32

DCIN1

CCI7

LDO 2

VMAX 9

BATT 19

DLOV 24

PDL 30

DHIV 25

CSS

N28

SCL15

/INT16

CSIP 21

PGND 22

DAC11

REF

4

GN

D18

IMAX

10

GN

D5

I.C.

17

PR182

31.6K_0603_0.1%~D

12

PR168

1M_0402_5%~D

1 2

PR184

182K_0402_1% 12

PC1884.7U_1210_25V6K~D

12

PR200

2K_0402_1%~D

12

PC1950.1U_0603_25V7K~D@

12

PR188

10K_0402_1%~D

12

PC168

1U_0805_25V4Z~D

12

PC1740.1U_0402_10V6K~D

12

PC183

0.01U_0402_50V7K~D

12

PR19710K_0402_5%~D

12

PR176

20K_0402_1%

1 2

G

D

S

PQ63BSS138_SOT23~D@

2

13

PR177

0.01_2512_1%~D

1 2

PR191

100K_0402_5%~D

12

PD22EC31QS04~D

21

PR165

0.01_2512_1%~D1 2

PC1940.1U_0603_25V7K~D@

12

PR201

100K_0402_5%~D

12

PR239100K_0402_5%~D@

12

PR199

100K_0402_5%~D

12

PC182

1U_0805_25V4Z~D

12

PC21110U_1210_25V6K~D

12PR174

49.9K_0402_1%~D

1 2

PQ37

FDS6679Z

365 7 8

2

4

1

PC1770.1U_0805_50V7M~D

12

PC189

0.1U_0805_50V7M~D

12

PR17533_0402_5%~D

12

PR179

0_0402_5%~D

12

+

PC173

15U_D2_25M_R90~D@

1

2

PC1850.1U_0603_25V7K~D

12

PR169365K_0402_1%~D

12

PC21210U_1210_25V6K~D

12

PR2510_0402_5%~D@

12

PU15

AS2431_SOT23~D 1

3

2

PC1690.1U_0805_25V7K~D@

12

PU21

TC7SH14@

NC1

A2

GND3 Y 4

VCC 5

PR181

1.2K_1206_5%~D@

12

PC1720.01U_0402_50V7K~D@

1 2

PR1780_0402_5%~D

12

PL22

MCK4532800YAT_1812

1 2

PC1800.01U_0402_50V7K~D

1 2

PC187

4.7U_1210_25V6K~D

12

PL20

3.2UH_12.8A

1 2

PR161

75K_0402_1%~D

12

PR164

10K_0402_1%~D

1 2

PR186

0_0402_5%~D

1 2

PQ69

FDS6679Z

365 7 8

2

4

1

PR185

280K_0402_1%~D

12

PC228

0.1U_0402_10V6K~D@

12

G

D

S

PQ43BSS138_SOT23~D

2

13

G

D

S

PQ40BSS138_SOT23~D

2

13

PQ38FDS6672A_SO8~D

365 7 8

2

4

1PC186

1U_0603_6.3V6M~D

12

PR170

12.7K_0402_1%

12

PD25B540C~D@

2 1

PC166

10U_1210_25V6K~D

12

PR183

0_0402_5%~D

1 2

PC1760.1U_0805_50V7M~D

12

PR187

59K_0402_1%~D

12

PR171100K_0402_5%~D

12

PC1810.01U_0402_50V7K~D

1 2

PR198

10K_0402_5%~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DC_IN+

PWR_SRCPBATT+

+5VSUS

+5VSUS

DT/MT_SELECT<33>

DT/MT# <46>VCORE_BOOTSELECT<7>

CPU_PSC_HI <46>

PDL<48>

Title

Size Document Number Rev

Date: Sheet o fLA-1711 X02-D

49 60Wednesday, July 23, 2003

Compal Electronics, Inc.

Battery Discharge

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

PC1992200P_0402_50V7K

12

PR24610K_0402_5%~D

12

PR242

2.7K_0402_5%~D

12

PQ44SI7447DP_SO8

32

4

1

5

PR24410K_0402_5%~D

12

PD26

B540C~D

2 1

PR253

0_0402_5%~D @

1 2

G

D

S

PQ682N7002_SOT23~D

2

13

PR202470K_0402_5%~D

12

PR24310K_0402_5%~D

12

PQ67

MMBT3904_SOT23~D

2

31

PC2310.1U_0402_10V6K~D

12

PC2000.1U_0805_50V7M~D

12

PR252

0_0402_5%~D

1 2

PC2300.1U_0402_10V6K~D

12

PR245

12K_0402_5%~D

1 2

C

BE

PQ66MMBT3906_SOT23~D

1

2

3PC2290.1U_0402_10V6K~D

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SUB_GAIN0

SUB_GAIN1

S UB_VREF

SUB_SHUTDOWN#

S UB_VREF

SUB_OUT1AUD_MONO_OUT

SUB_SHUTDOWN#

SUB_GAIN0

SUB_GAIN1

SUB_OUT2

+ 3VRUN

+ 3VRUN

+12V

+12V

+12V

SUB_DETECT#<33,42>

SPK_SHUTDOWN#<24,25>

AUD_MONO_OUT<24> SUB_OUT1 <42>

SUB_OUT2 <42>

Title

Size Document Number R e v

Date: Sheet o fLA-1711 X02-D

Subwoofer

50 60Wednesday, July 23, 2003

Gain Setting

Need to FILTER!!!

Compal Electronics, Inc.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

C 6491000P_0402_50V7K~D

1

2

C644

0.22U_0603_10V7M~D

1 2

R 597100K_0402_5%~D

12

U 44

TC7SH08FU_SSOP5~D

B1

A2 G3

O 4

P5

C645

0.22U_0603_10V7M~D

1 2

R594

51_0603_1%

1 2

G

D

S

Q742N7002_SOT23~D

2

13

R592100K_0402_5%~D

12

C65

31U

_080

5_25

V4Z~

D

1

2

D 20

B130-13_SMA~D

2 1

C 6511U_0805_25V4Z~D

1

2

C640 0.1U_0402_16V4Z~D1 2

C641

1U_0805_16V7K1

2

C 6471000P_0402_50V7K~D

1

2

C652

0.22U_0603_16V7K

1 2

C 6551000P_0402_50V7K~D

1 2

C65

422

0P_0

402_

50V7

K

1

2

R 593100K_0402_5%~D @

12

R596100K_0402_5%~D@

12

L50

BLM21PG600SN1D_0805~D

1 2

R59

512

0K_0

402_

5%~D1

2

C 64210U_1206_16V4Z~D

1

2

C643

0.22U_0603_16V7K

1 2

C 6581000P_0402_50V7K~D

1 2

C 650

1U_0805_16V7K

12

C648

1U_0805_25V4Z~D

1 2

U 45

TPA3001D1PWP_TSSOP24~D

INN1

INP2

GAIN03

GAIN14

SHDN5

PG

ND

6

VCLAMP7

BSN 8

PVCC 9

OUTN 10

OUTN 11

PG

ND

12

PG

ND

13

OUTP 14

OUTP 15

PVCC 16

BSP 17

AG

ND

18

AG

ND

19

ROSC20COSC21

BYPASS22

VREF23

VCC24

L49

BLM21PG600SN1D_0805~D

1 2

R591

51_0603_1%

1 2

R58910K_0402_5%~D

12

R59010K_0402_5%~D

12

C 646

1U_0805_16V7K

12

D 21

B130-13_SMA~D

2 1