23
1 Status of Front-end Unification DAQ Meeting at Belle-II Meeting 7-JUL-09 Gary Varner

Status of Front-end Unification

  • Upload
    samara

  • View
    25

  • Download
    0

Embed Size (px)

DESCRIPTION

Status of Front-end Unification. DAQ Meeting at Belle-II Meeting 7-JUL-09. Gary Varner. Today’s Update. Since March meeting: Discussion in Beijing (RT09 at IHEP) Action/inaction on part b Continued (TARGET, BLAB2 eval) Specifying KLM needs (Si-PM gain) - PowerPoint PPT Presentation

Citation preview

Page 1: Status of Front-end Unification

1

Status of Front-end Unification

DAQ Meeting at Belle-II Meeting 7-JUL-09Gary Varner

Page 2: Status of Front-end Unification

2

Today’s Update

• Since March meeting:– Discussion in Beijing (RT09 at IHEP)– Action/inaction on part b

• Continued (TARGET, BLAB2 eval)– Specifying KLM needs (Si-PM gain)– System timing limitations for PID BLAB3

• Giga-bit link test results, plans

Page 3: Status of Front-end Unification

3

Proposed Common Approach for Belle++Refining Proposal

Page 4: Status of Front-end Unification

4

Common protocols

User code?

Page 5: Status of Front-end Unification

5

What about the Front end? Waveform sampling

“everywhere”?

Page 6: Status of Front-end Unification

6

Possible ASIC Options(presented previously)

Subdetector ASIC ref. ASIC Location FPGA linkSVD3 APV25 E-hut nonew SVD BSR/KUPID APV25 hybrid/dock yesCDC BCA TARGET in detector yesPID SiPMT BCA TARGET in detector yesPID MCP HPBA BLAB2 in detector yesECL N/A on detector yesScint. KLM BCA TARGET in detector yesVFV BCA TARGET in detector yes

TARGET2TARGET2a (?)

BLAB3

BLAB3

Future?

Page 7: Status of Front-end Unification

7

User FeedbackTARGET

KLM – Si-PMs

Dmitri Liventsev (ITEP) Jerry Va’vra (SLAC)

Page 8: Status of Front-end Unification

8

Baseline System Components

• BLAB3 is 8 channels, each 64k samples deep

• <~1us to read out 32-samples hit/BLAB3

Photo- Sensor

BLAB3

BLAB3

BLAB3

BLAB3

MCP

MAINFINESSE

CARD

x4COPPER

FIFO

Giga-bit

Fiber

Photo- Sensor

x4

Focusing on these prototypes –

results next time

Page 9: Status of Front-end Unification

9

Links are a crucial element

Page 10: Status of Front-end Unification

10

Concerns about rad hardness:proposal

Proposed to run test linkIn KEKB tunnel (installed Mar.) Reprogram rate Fiber link degradation

Significant cost and performance benefit if can use commercially available components. One option is to qualify them.

In tunnel(rad area simulating expected CDC/PID dose)

~25 m Fiber link

Monitor continuously BER remotely (loopback of pseudo-random pattern)

Page 11: Status of Front-end Unification

11

xTOP Readout Baseline System Components

• BLAB3 is 8 channels, each 64k samples deep

• <~1us to read out 32-samples hit/BLAB3

Photo- Sensor

BLAB3

BLAB3

BLAB3

BLAB3

MCP

MAINFINESSE

CARD

x4COPPER

FIFO

Giga-bit

Fibers

Photo- Sensor

x4

Testing this part

Page 12: Status of Front-end Unification

12

Test LocationNear Oho-side of Belle endcap,Ring outside direction, on Shielding wall

Fiber link runs Through existingCable tray infrastructure and to loss monitor rack in room below

Page 13: Status of Front-end Unification

13

Concurrent Monitoring

2x Aminogray (integral radiation dose)

Virtex-2 Pro FPGA w/

Rocket I/O

Giga-bit

Fiber

Transceiver

Existing coaxial loss monitor (instantaneous

dose)

Page 14: Status of Front-end Unification

14

“COPPER” end

USB2 connection to Monitor PC

Same transceiver

board as test side

Giga-bit

Fiber

Page 15: Status of Front-end Unification

15

Monitoring Station

DAQ machine

Thanks, John!

Local error logging, accessible remotely via

KEKB network

• Write alternating pattern of 1’s and 0’s

(~130k RAM bits, 8k Reg bits total)

• Wait 1 second, then read back

• Check pattern for corruption

• Log number of bit errors seen

Page 16: Status of Front-end Unification

16

Monitoring Details

Stop/restart program

about every 3-7 days

(~2MB/day)

Local error logging, accessible remotely via

KEKB network

• Since start of beam, ~1M write/read cycles

• No bit errors seen (bug fixed, tested)

• BER <~10-11

Page 17: Status of Front-end Unification

17

First induced errors

Number of bits error

~0.4% of eventsNo RAM bit errors

Page 18: Status of Front-end Unification

18

Constant pattern

~0.4% of eventsNo RAM bit errors

~May 10 (00:18)

Page 19: Status of Front-end Unification

19

Rad-test Summary

• Ran fine through end of Experiment 69 (1x RAM bit errors) since successful re-program [4.37M events]

• Errors probably isolated to a subset of FPGA firmware -- cleared by power cycle

• Concern about voltage regulators (replace for autumn run?)

•Goal: need to address radiation hardness concerns soon perhaps OK; ~11.6kRad (10.8kRad/12.5kRad)

Did power cycle (and subsequent firmware reload) on May 17

Page 20: Status of Front-end Unification

20

Plans

• Front-end prototypes fabricated and gaining experience with operation; trying to address questions

• Prototypes of a version of “unified readout” COPPER: (FIN_DSP, UFO, USO) in development

• Instrument xTOP prototype; upgrade fDIRC, HI-TIDE readout set-ups (system timing, online processing)

1. BLAB3 (PID) ASIC fabrication in August2. TARGET2 almost same (with amp), KLM3. Manpower limit for CDC ASIC version

Page 21: Status of Front-end Unification

21

Back-up slides

Page 22: Status of Front-end Unification

22

Hit Processing latency Assume: 100kHz charged track hits on each bar

~32 p.e./track (1% of 100ns windows)30kHz trigger rate

Each PMT pair sees <8> hits240k hits/s

Each BLAB3 has an average occupancy <1 hit (assume 1)

400ns to convert 256 samples16ns/sample to transfer

At least 16 deep buffering(Markov overflow probability

est. < 10-38)

Each hit = 64samples * 8bits = 512bits~125Mbits/s

(link is 1.2Gb/s ~ x10 margin)

BLAB3 ASIC

8

Trans-Imp Amps 64 x 1k samples

Per channel

Fast conversionMatrix (x256)

BLAB3 sampling

Improvements based uponLessons learned from BLAB2

Plan to model in standard queuing simulator, but looks like no problem

(CF have done same exercise with Jerry Va’vra for 150kHz L1 of SuperB and can handle rate)

Page 23: Status of Front-end Unification

23

PID (iTOP) DAQ Summary

16k channels2k BLAB3128 SRM

128 DAQ fiber transceivers

32 FINESSE8 COPPER