Students: Alexander KinkoRoni Lavi

Instructor: Inna RivkinDuration: 2 Semesters

Midterm Presentation Part 1 - Spring 2008

Midterm Presentation Part 1 - Spring 2008

A little motivation…

Digital

Experiments

Analog

Experiments

A/D – D/A

M.S.S

Main Goal Project Overview Project Implementation Inputs Outputs Summary Project Schedule

Table of Contents

Giving the students in EE lab 1 a tool for a deeper understanding, designing and implementing of modern signal processing systems.

Main Goal

Designing and manufacture a new platform for real time M.S.S. experiment (Mixed Signal System), for audio signals.

The platform will be incorporated in the future set of experiments in E.E. Lab 1, Technion.

Project Overview (Semester a)

Project Overview (Semester b)

Designing an algorithm that conducts signal processing in real time.

Designing an analog application (audio circuit) that combines M.S.S. processing.

Sample&

ReconstructionSystem

AnalogInput

AnalogOutput

Project Implementation (Top Level)(Top Level)

Project Implementation (Block Level)(Block Level)

DE2DE2

ADDA

Real Time System for Sampling &

Reconstruction

Matrix

Analog Input

Circuit (Anti-

aliasing Filter,

Preamp)

Analog Output Circuit

(Smoothing Filter,

Power amp)

Analog

Input

Project Implementation (Block Level)(Block Level)

Analog

Signal

Digital

Signal

Digital

Signal

Analog

Signals

Analog

Outputs

Sampling System (ADC)

Digital Processing

Unit

Reconstruction System

(Multiplying DAC)

Ext. Clock Input (optional)

Inputs

Analog input signalBipolar voltage range: ±1 VoltInput bandwidth: 20Hz – 20,000HzProtection from input over voltage

External clock input (optional)Voltage range: Standard LVTTL signalingUp to 100KHz

DC voltage supply inputsMain DC power source (DE2):+5V, +3.3VExternal DC power (optional):+9V

Control Inputs

The platform can function in several modes, that are controlled by mechanical switches located on the digital processing unit, featuring:Mixed signal processing modeSelf BIT modeClock source (internal or external)

Outputs

4 Analog output signals:

2 outputs from parallel DACs: Voltage range: ±1.4V biased around 2.5V Maximum update rate: 2.304 MHz

2 outputs from serial DACs: Voltage range: 0.2 – 4.753V Maximum update rate: 25.6 KHz

Weekly Schedule

Week 0-1: Complete design schematic Pin to pin schematic in OrCAD

Preparation for PCB design Ordering special parts

Week 2: Finish PCB design Checking of the Wire-Wrap prototype

Week 3: Testing of the Wire-Wrap prototype

Weekly Schedule (cont.)

Week 4: Final testing of the Wire-Wrap prototype

Writing the midterm presentation

Week 5: Finish PCB design

Checking the Wire-Wrap prototype

Week 6: Midterm presentation Midterms .

Down the road…

Week 7: Sending PCB for manufacturing Week 8: Receiving PCB from Manufacturer

Staggered assembly of PCB prototype Week 9: Checking PCB board

Staggered assembly of PCB prototype Week 10: Final testing of the PCB prototype

Preliminary checks DE2 with ADDA

Down the road…(cont.)

Week 11: Integration ADDA with audio circuit Week 12: Writing VHDL for mixed signal processing Week 13: Integration for the M.S.S.

In The End…

Manufacture file (including BOM) 2 assembled circuits A basic set of processing functions Basic integration with audio in/out circuits

One picture is worth a thousand words

DE2DE2

20KHz Sin Signal

A/D

Wire-Wrap Prototype

ParallelD/A_1

ParallelD/A_2

Buffer+

L.P

MatrixScope

L.P