Submiitted byJay H. Kapasi (200911048)Vidyut A. Patel(200911014)

The AVR XMEGA™ family from Atmel delivers an unprecedented level of system performance in 8/16-bit microcontrollers.

This focus on performance is important because more and more 8/16-bit microcontroller families do not meet today’s needs for higher embedded performance combined with reduced cost, smaller size and lower power.

The new AVR XMEGA combines all these requirements in the best possible way, making it the reference for 8/16-bit microcontroller

2nd generation of picoPower technology Innovative Event System for fast, CPU-independent

inter-peripheral communication 4-channel DMA Controller boosts MCU performance 100% predictable timing Fast 12-bit ADC and DAC Fast Cryptography support for AES and DES

Cryptography is the art or science of keeping information secret and is based on either hiding the cryptographic method or securing the cryptographic key.

Algorithms based on cryptographic keys are divided in two classes; symmetric and asymmetric.

Symmetric algorithms(e.g. AES and DES) use the same key for encryption and decryption while asymmetric algorithms(e.g. RSA) use different keys.

The Advanced Encryption Standard (AES) and Data Encryption Standard (DES) are two commonly used encryption standards.

These are supported through an AES peripheral module and a DES CPU instruction.

All communication interfaces and the CPU can optionally use AES and DES encrypted communication and data storage.

Data Encryption Standard (DES) core instruction Encryption and Decryption DES supported Single-cycle DES instruction Encryption/Decryption in 16 clock cycles per 8-byte block

Advanced Encryption Standard (AES) crypto module Encryption and Decryption Support 128-bit keys Support XOR data load mode to the State memory Encryption/Decryption in 375 clock cycles per 16-byte block

Many wireless applications need secure high bandwidth transmissions.

With addition allow-power constraints, software based encryption implementations fail both the bandwidth and the power requirements.

AVR XMEGA effectively solves these problems. The XMEGA crypto engine supports both

Advanced Encryption Standard (AES) and Data Encryption Standard (DES).

The Data Encryption Standard (DES) was originally developed in the 1970’s and was later turned into a standard by the US National Institute of Standards (NIST).

DES is a symmetric cryptographic algorithm using a 64-bit key, including 8 parity bits.

DES is a block cipher, operating on blocks of 64 bits of data. The DES algorithm is no longer considered to be secure, and

is therefore not recommended to use. DES itself can be adapted and reused in a more secure scheme.

The DES instruction is a single cycle instruction, that needs to be executed 16 times subsequently in order to decrypt or encrypt a 64-bit (8 bytes) data block.

The data and key blocks must be loaded into the Register File before encryption/decryption is started.

The 64-bit data block (plaintext or ciphertext) is placed in registers R0-R7, where LSB of data is placed in LSB of R0 and MSB of data is placed in MSB of R7.

The full 64-bit key (including parity bits) is placed in registers R8-R15, with LSB of key in LSB of R8 and MSB of key in MSB of R15.

Executing one DES instruction performs one round in the DES algorithm.

Sixteen rounds must be executed in increasing order to form the correct DES ciphertext or plaintext. Intermediate results are stored in the register file (R0-R15) after each DES instruction.After sixteen rounds the key is located in R8-R16 and the encrypted/decrypted ciphertext/plaintext is located in R0-R7.

The instruction's operand (K) determines which round is executed, and the half carry flag (H) in the CPU Status Register determines whether encryption or decryption is performed.

If the half carry flag is set, decryption is performed and if the flag is cleared, encryption is performed.

The AES algorithm has a fixed block size of 128 bits, while the length of the key can be 128, 192 or 256 bits depending on the desired security.

The overview of the process in AES is described in the figure.

Full compliance with AES (FIPS Publication 197, 2002) Both encryption and decryption procedures 128-bit Key and State memory XOR load option to State memory useful for cipher block coding Sequential access to State and Key memories Optional Interrupt- and DMA request on AES complete

The AES Crypto Module performs encryption and decryption according to the AES (FIPS-197).

The 128-bit key block and 128-bit data block (plaintext or ciphertext) must be loaded into the Key and State memory in the AES Crypto Module.

This is done by writing the AES Key Register and State register sequentially with 16 bytes.It is selectable from software whether the module should perform encryption or decryption.

It is also possible to enable XOR mode where all new data loaded to the State key is XOR’ed with the current data in the State memory.

The AES module uses 375 clock cycles before the encrypted/decrypted ciphertext/plaintext is available for readout in the State memory.

1) Enable AES interrupts (optional)2) Select the AES direction, encryption or decryption.3) Load the Key data block into the AES Key memory4) Load the data block into the AES State memory5) Start the encryption/decryption operation If more than one block is to be encrypted or decrypted repeat

the procedure from step 3. When the encryption/decryption procedure is complete the AES

Interrupt Flag is set and the optional interrupt is generated.

The Flash memory in XMEGA is organized in two main sections, the Application Section and the Boot Loader section.

These two sections have separate lock bits and can have different level of protection. The Store Program Memory (SPM) instruction used to write to the Flash from the application software, will only operate when executed from the Boot Loader Section.

The Application Section contains an Application Table Section with separate lock settings. This can be used for safe storage of Non-volatile data in the Program Memory.

Application Section The Application section is the section of the Flash that is used for storing the

executable application code. The Application section can not store any Boot Loader code since the SPM instruction cannot be executed from the Application section.

Application Table section The Application Table section is a part of the Application Section of the Flash

that can be used for storing data.If this section is not used for data, application code can be reside here.

Boot Loader Section While the Application Section is used for storing the application code, the Boot

Loader software must be located in the Boot Loader Section since the SPM instruction only can initiate programming when executing from the this section. The SPM instruction can access the entire Flash,including the Boot Loader Section itself.