SWIE Report

8/6/2019 SWIE Report

1/23

Forward Converter Project

Department of ElectricalEngineering and Information

Technology

Copenhagen University Collegeof Engineering

Lautrupvang 15, 2750 Ballerup


ESWIE-EC51-E10

This report forms the documentation of the designing and testing of a

20 W Switch Mode Power Supply.

The process has been highly iterative, and thus it is not possible to

describe the entire process in a chronological manner within the

constraint of these 15 pages.

This document serves as a presentation of the finished product, with

emphasis on key design considerations and the most prominent

features.

Student name Student number Signature

Lasse Kastholm Martinussen 80817

Havan Mohamed Mhedeen 80719

Mohammed Errifi 70303

Kasper Krogh Hansen 70286

Marek Piwonski 81089

Supervisor:Lars Maack


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List of content

1. INTRODUCTION .................................................... .......................................................................3

1.1 PREFACE ............................................................................................................................ 3

1.2 REQUIREMENTSSPECIFICATION........................................................................................................... 3

2. PROBLEM SOLUTION .......................................................... ........................................................4

2.1 BLOCKDIAGRAM ............................................................................................................................ 4

2.2 SCHEMATIC ............................................................................................................................ 4

2.2.1 Coil ......................................................... ................................. ...5

2.2.2 Transformer ......................................................... ................................. ...6

2.3 MAINWAVEFORMS ...........................................................................................................................8

2.3.1 Output voltage and coil current ................................................... .....................................8

2.3.2 Primary current and MOSFET DS voltage ................................................... ................ ..9

2.4 SYSTEMTESTRESULTS...................................................................................................................... 102.4.1 Loop Gain ......................................................... ................................ ..10

2.4.2 Step load ......................................................... ................................ ..11

2.4.3 Efficiency ......................................................... ................................ ..12

3. CONCLUSION .................................................... ........................................................... ...............14

4. APPENDICE ..................................................... ........................................................... ...................15

4.1 TRANSFORMERLOSSES..................................................................................................................... 15

4.2 LITTERATURE .......................................................................................................................... 16

4.2.1 Notes ......................................................... ................................ ..16

4.2.2 Books ......................................................... ................................ ..17

4.3 MATLABCODE .......................................................................................................................... 17

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1. Introduction

1.1 Preface

This project has been developed by a 5 persons group under time constraints

equal to an eighth of a semester. The process has been problem oriented, and

the report is a result of a highly iterative process. Along the way we have

gotten a lot of problems solved thanks to our supervisor Lars Maack.

1.2 Requirements specification

Functional requirements:

1. Nominal input DC voltage: 24 V

2. Input DC voltage range: 20 - 30 V

3. Output DC voltage: 4 V

4. Output load current: 0 - 5 A

5. Output ripple: 300 mVpp (Measured with a +50 MHz BW scope)6. Max. transient output voltage during 4 to 2 A step load: 150 mVpp

(Neglecting ripple at switch frequency and above)

7. Switch frequency: 100 kHz

Non-functional requirements:

1. The efficiency as a function of input voltage must be both simulated

and measured at different loads and presented in a graph.

2. If the efficiency is iteratively optimized, this should be done atmaximum load and nominal input voltage.

3. Inductors and transformers must be home made.

4. Potentiometers and variable resistors are unwanted.

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2. Problem solution

2.1 Block diagram

2.2 Schematic

Above, the schematics of the finished product is depicted.

It is a forward converter topology, which produces a controlled DC output

voltage from an unregulated DC input. The forward converter is a simple

converter which provides a low voltage ripple at the output and a good

conversion efficiency.

The maximum duty-cycle must be less than 50% to prevent core saturation.

The SG3524 PWM controller is rated for a maximum duty ratio of 0.45. Some

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headroom is needed to compensate for losses and therefore we have chosen to

design for a Dmax of 0.35.

The SG3524 is connected to a totem pole configuration of BJTs, that drive theMOSFET gate. The resistor mounted at the gate slows the switching speed a

bit and helps reduce spikes on the drain of the MOSFET.

The maximum allowed ripple at the output is 300 mV.

Having designed the filter coil to allow 2 A of ripple current, a maximum

allowed ESR of the output filter capacitor is 150 m.

By impedance measurement we have selected a capacitor with a proven ESR

of only 56 m, which reduces output voltage ripple beyond the requirement.

The IRF630 MOSFET is chosen not only because of its low on resistance of 0.4

ohm and its Drain current of 9 A.

For development purposes it is suitable to have a high Drain Source voltage

tolerance, which in the IRF630's case is 200 V.

Changing to a MOSFET with a lower rating will make it possible to go lower

than 0.4 in on resistance, thereby lowering on state losses in the MOSFET, but

such optimizations are left to future development.

2.2.1 Coil

The chosen core for the coil is an RM8. This core fullfills the demanded

AcoreAwindow factor calculated by the formula:

AwindowAcoreLIpeakIRMS

FBpeakG(Coil design procedure note)

From this we got 1098,5 mm4 (Se appendice 4.3 for Matlab calculations). The

RM8 have a value of 1900 mm4. (see appendice 4.2.1 for datasheet)

To calculate the number of turns we use the formula:

N=LIpeak

BpeakAcore6 (Coil design procedure note)

(Se appendice 4.3 for Matlab calculations)

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By the formula for the area of the wire, Awire=IRMS

G(Coil design procedure

note), we got an diameter of 0.44mm, but because of the excess of space in thecoil, we fitted a 1 mm thickness.

Designing for a ripple current of 2 A calls for a coil inductance of 16 uH,

which has been achieved by adjusting core airgap while performing

impedance measurements.

2.2.2 Transformer

The purpose of the transformer is to scale the input voltage to a lower output

voltage in an efficient and instantaneous way. This transformation leads to

power losses in practice, which we have been taken in to account.

Once again the RM8 core is chosen due to the formula:

AwindowAcoreUpriton2I pri rms

FB peakG(Trafo design note)

From this we got a value of 617.9mm4, which only calls for an RM7 core.

However, the only available core is an RM8 which was chosen for obvious

reasons. (See appendice 4.2.1 for details.)

The turns ratio of 1.489, is calculated by:

n=Npri

Nsec=

Vpri

Vsec=

Isec

Ipri(The essence of power electronics note)

(Se appendice 4.3 for Matlab calculations)

From our calculated figure of total powerloss,

the number of primary turns is chosen to be 13 since this number i placed in

the region of lowest possible combined losses. (Core + Copper)Furthermore, a ratio of 13 to 9 offers the best integer representation of the

turns ratio. Hereby the practical turns ratio is 1.44.

The curve of total copperloss can be seen below.

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The diameter of the wires is found by:

dpri=2AwindowF

NpriGiving 1.1 mm.

dsec=2AwindowF

NsecGiving 0.7 mm.

(For calculations see appendice 4.1)

2.3 Main waveforms

2.3.1 Output voltage and coil current

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As it can be visually asserted above, the coil current is 2App in the output coil

as intended. (30 V supply, 5 A load)

The output ripple is as low as 70 mV, while specification stated no more than

300mVpp ripple voltage.

This is achieved due to the very low ESR of the chosen output capacitor.

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2.3.2 Primary current and MOSFET DS voltage

The figure above depicts the MOSFET's drain-source voltage and current.

By multiplying the current and voltage, and integrating over one full period,

the average MOSFET power dissipation was found to be 70 mW.

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2.4 System test results

2.4.1 Loop Gain

By meams of simulation, the feedback control was copensated and depicted

above. The system is compensated to give a proper phase margin of 36

degrees at the unity gain point. The following figure shows the practically

measured loop gain:

The graphs are very similar, and the difference in gain is quite expected. The

gain measurement is to high extent misshaped by noise present during

measurement.

Analysing the measured results, we can read that our phase margin is 36

degree as intended.

10

Frequency

300Hz 1. 0KHz 3. 0KHz 10KHz 30KHz 100KHzP(V(R4:1)) DB(V(R4:1))

0

50

100

150


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2.4.2 Step load

The figure above depicts the practically measured step load response.

As specified the system does not exceed 150 mVpp while stepping down from

4 to 2 A load, - in fact the ripple is as small as 127 mV due to the high loop

gain of the system.

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2.4.3 Efficiency

The efficiency has both been simulated and measured.

For the simulation, the measured parameters of both coil and transformer was

put in to provide relistic losses.

As seen, theres quite a good correlation between the two figures.

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Thermal view:

The thermal view displays what elements dissipate most energy through heat

radiation. From the picture it is seen that the diodes contribute most

significantly to the total loss since they are the hottest.

Taking the diode drop of 0.75 for the model used, and current output we can

calculate power dissipation:

P=UI=0.75V5 A=3.75W

As each of the output diodes is active only half the period it is the total powerdissipation in both diodes.

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3. Conclusion

We have managed to construct a power supply that matches, and even

exceeds some of the specified requirements. The converter has a very high

loop gain in a wide frequency range. The supply can even operate at only 18 V

supply at full load. Efficiency varies on current drawn from the supply, but it

maintains a good percentage, as high as 84 % under optimal conditions.

The switches generate very little noise, due to proper board layout and

optimal snubbing, and the output voltage ripple is only 70 mV, which by far

exceeds the reqirement.

This leads to the conclusion that we have constructed a very good switch

mode converter, which we are very proud of and look forward to present in

detail at the exam.

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4. Appendice

4.1 Transformer losses

There can occur some power losses in the transformer. We will look at the

losses in the core and the wires, which can be described by the following

formula:

(Taken from trafo design note)

Here the only unknown is z and K, which can be found in the data book

Magnetic Components Catalogue form the graph showing power loss as

function of frequency under the RM8 core(F44, page 12).

If we take two point on the graph at 100 kHz frequency and put it in the

formula, we will have 2 equations with 2 unknown which can be solved.

(Taken from trafo design note)

z = 1.737

K = 3930000

Now we have all the parameters and we can describe the Pcore

, Pcopper

and

Ptotal

as function of Npri

.

Her we see the graphs showing the relationship and we see that there is

minimum total loss around 13-14 turns. We have chose 13 as Npri.


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4.2 Litterature

4.2.1 Notes

Coil Design procedure.pdf

https://www.campusnet.ihk.dk/cnnet/filesharing/SADownload.aspx?

ElementId=22197&FolderId=151619&FileId=598120(Demands a login)

Trafo Design.pdf



MC Catalogue.pdf



Key solid RM Core Parameters.pdf



4.2.2 Books

The essence of power electronics (J. N. Ross)

4.3 Matlab code

close all;clear all;

clc;

format shorteng;

set(0,'DefaultFigureWindowStyle','docked');

% SEE SCHEMATIC DRAWING FOR DETAILS

% DEFINITIONS

f_switch=100e3;

Vin=20; %range: 20-30 V, worst case scenario = 20 V

Vmax=30;

Vout=4; % 4 V nominally

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Dmax=0.35; % SG3524 is rated for a max D of .45. We subtr. 5 %

for headroom

Dnom=Dmax*(20/24);

Dmin=Dmax*(20/30);

% FINDING TRANSFORMER TURNS RATIO n = N1/N2

% Vout=Vin*Dmax/(N1/N2) (N1/N2) = n = (Vin*Dmax)/Vout hence:

n=(Vin*(Dmax))/(Vout+0.7); % 0.7 V added to compensate for Diode

voltage drop

% No. OF PRIMARY TURNS

% Before calculating the number of primary turns that will give

the lowest

% possible loss, we need to know i_pri_RMS which is dependant on

i_L_RMS

% i_L is specified to max 5 A.

i_L=5; % Assuming that the ripple is 0

i_pri=(i_L/n);i_pri_RMS=i_pri*sqrt(Dmax);

% CHOISE OF TRANSFORMER CORE

% The core must satisfy: A_window*A_core >=

(U_pri*t_on*2*i_pri_RMS)/(F*B_peak*G)

% Constants:

U_pri=20; % the nominal supply voltage

t_on=Dmax*(1/f_switch); % on time pr. period, Dmax=0.4

F=0.5; % fill factor

B_peak=0.3; % Max allowable peak B-field

G=3; % Current density [A/(mm)^2]

A_windowA_core=((U_pri*t_on*2*i_pri_RMS)/

(F*B_peak*G*10^6))*10^12;

% RM8 transformer core is suitable

Awindow=30e-6; % m^2

Acore=64e-6; % m^2

% MIN N0. OF TRANSFORMER PRIMARY TURNS (that will prevent

saturation)

N_pri=(U_pri*t_on)/(B_peak*Acore);

N_sec=N_pri/n;

%N_pri*3

%N_sec*3

% practical turns ratio: 13/9. 13/9

% TRANSFORMER WIRE DIAMETERSd_pri=sqrt((2*Awindow*F)/(pi*N_pri))*1000;

d_sec=sqrt((2*Awindow*F)/(pi*N_sec))*1000;

% FINDING RM8 F44 FERRITE CORE LOSS CONSTANTS K & z

%syms K z;

%A=solve('K*(0.200)^z*2430e-3=250','K*(0.200)^z*2430e-3=160')

%S = [S.x S.y]

%Pcore1=(K*((U_pri*t_on)/(N_pri*A_core))^z)*V_core;

%solution=solve(Pcore,K);

%solution

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K=3.93e6; %[W/m^3

z=1.737;

V_core=2430e-9; %[m^3]

rho_copper=1.68e-8; %[OHM*m]

l_winding=pi*1.e-2; %[m]

% Now using the total power loss formula in the "Transformer

design note"

% to plot total loss (P_Copper + P_Core), as function of N_pri.

% This will show the lowest loss point. RM8 core chosen!

xN_pri=linspace(3,25,1000);

Pcore=K*(((U_pri*t_on)./(xN_pri.*Acore)).^z)*V_core;

Pcopper=(4*(i_pri_RMS)^2)*rho_copper*((l_winding.*xN_pri.^2)./

(Awindow*F));

Ptotal=Pcore+Pcopper;

plot(xN_pri,Pcore);

hold on

plot(xN_pri,Pcopper,'r');

hold on

plot(xN_pri,Ptotal,'m');

%(1/n)*17

% Transformer n=13/9 Measurements

% Lpri: 3.33 Ohm, 31.84 pF, 338.24 uH (Sec open)

% Lpri: 266 mOhm, 37.74 pF, 372.00 nH (Sec closed)

% Demag: 3.34 Ohm, 30.6 pF, 339.85 uH (Sec open)

% Demag: 224 mOhm, 22.3 pF, 775.00 nH (Sec closed) % Lsec: 1.87 Ohm, 54.92 pF, 161.36 uH (Pri open)

% Lsec: 1.4 Ohm, 97.71 pF, 162.233 uH (Pri closed)

% SELECTION OF POWER MOSFET -SEE AND8039/D app note

% MOSFET: IRF630 CHOSEN:

R_DS_on=0.4;

V_DS_on=i_pri_RMS*R_DS_on;

V_D=0.7;

% COIL DESIGN % COILS L VALUE SEE AN-776 (p.113 says otherwise)

i_L_ripple=0.4*i_L;

L=((Vmax-V_DS_on)*(N_sec/N_pri)-V_D-Vout)*(Dmin/

(i_L_ripple*f_switch));

% COILS RMS CURRENT

i_L_RMS=i_L-i_L_ripple+i_L_ripple/sqrt(3);

i_peak=i_L+i_L_ripple/2;

A_windowA_core_L=(L*i_peak*i_L_RMS)/(F*B_peak*G)*10^6;

% RM8 is once again chosen

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% Number of turns

N=(L*i_peak)/(B_peak*Acore); % round up = 6

A_wire_L=i_L_RMS/(G); % result in mm2 = 1.3849

D_wire=A_wire_L/pi;

% SELECTION OF POWER DIODES -SEE AND8039/D app note

% DIODES

V_rev_min=Vmax*(N_sec/N_pri); % > 18 V

i_D_RMS=i_L_RMS*(1-Dmin); % > 3 A

% MBRB1560CT chosen.

% Diode for Demagnetization: BYW29

% OUTPUT FILTER CAP SEE AN-776

C=(i_L_ripple*1/f_switch)/(8*0.3); % however such small cap has significant ESR

% Maximum allowed ESR: deltaVo/i_L_ripple

ESR_max=0.300/i_L_ripple; % 0.150 ohm

% By impedance measurent a good cap was found to be:

% 220 uF/100 V electrolytic w. ESR: 56 mOhm (ESC=221 uF,

ESL=55* nH)

% *is probably lower when properly mounted on PCB

% Calculation of transfer function, ie. poles and zeros of

% uncompensated circuit.

% Compensation of circuit % PCB

% transformer

% coil

% open loop test

% A totem pole conf. of BCX54 and BCX51 in SOT89 housings chosen

for gate drive

% SG3524 timing cap and res to give 200 kHz

R_t=1.3/(200e3*3.48e-9) % 1 nF < cap value < 100nF, 1.8k < R


20/23


%InpCurrVect30=[ 0.0 0.045 0.085 0.12 0.16 0.20

0.24 0.28 0.32 0.365 0.41 0.455 0.5 0.55 0.59 0.64

0.69 0.74 0.79 0.84 0.89]

%InpVoltVect30=[30.000 30.000 30.000 30.000 30.000 30.000

30.000 30.000 30.000 30.000 30.000 30.000 30.000 30.000 30.000

30.000 30.000 30.000 30.000 30.000 30.000]

%LoadCurrVect30=[0 0.25 0.5 0.75 1 1.25

1.5 1.75 2 2.25 2.5 2.75 3 3.25 3.5 3.75

4 4.25 4.5 4.75 5]

%LoadVoltVect30=[4.05 4.05 4.05 4.05 4.05 4.05

4.05 4.05 4.05 4.05 4.05 4.05 4.05 4.05 4.05 4.05

4.05 4.05 4.05 4.05 4.05]

%InPowerVect=InpCurrVect30.*InpVoltVect30;

%OutPowerVect=LoadCurrVect30.*LoadVoltVect30;

% 30 V supply, new 13/9 transformer

InpCurrVect30=[ 0.045 0.085 0.127 0.16 0.20 0.24

0.29 0.33 0.38 0.42 0.47 0.52 0.57 0.62 0.67 0.720.77 0.83 0.88 0.94]

InpVoltVect30=[30.000 30.000 30.000 30.000 30.000 30.000

30.000 30.000 30.000 30.000 30.000 30.000 30.000 30.000 30.000

30.000 30.000 30.000 30.000 30.000]

LoadCurrVect=[0.25 0.5 0.75 1 1.25 1.5 1.75

2 2.25 2.5 2.75 3 3.25 3.5 3.75 4 4.25

4.5 4.75 5]

LoadVoltVect30=[4.12 4.12 4.12 4.12 4.12 4.12

4.12 4.12 4.12 4.12 4.12 4.12 4.12 4.12 4.12 4.12

4.12 4.12 4.12 4.12]

InPowerVect30=InpCurrVect30.*InpVoltVect30;

OutPowerVect30=LoadCurrVect.*LoadVoltVect30;


InpCurrVect24=[ 0.054 0.1 0.15 0.2 0.25 0.3

0.36 0.42 0.47 0.53 0.59 0.65 0.71 0.78 0.84 0.91

0.98 1.04 1.11 1.19]

InpVoltVect24=[24.000 24.000 24.000 24.000 24.000 24.000

24.000 24.000 24.000 24.000 24.000 24.000 24.000 24.000 24.000

24.000 24.000 24.000 24.000 24.000 ]

LoadVoltVect24=[4.12 4.12 4.12 4.12 4.12 4.12

4.12 4.12 4.12 4.12 4.12 4.12 4.12 4.12 4.12 4.12

4.12 4.12 4.12 4.12]




InpCurrVect20=[ 0.07 0.12 0.18 0.24 0.3 0.37

0.44 0.5 0.58 0.64 0.72 0.79 0.87 0.95 1.02 1.11

1.19 1.28 1.36 1.45]

InpVoltVect20=[20.000 20.000 20.000 20.000 20.000 20.000

20.000 20.000 20.000 20.000 20.000 20.000 20.000 20.000 20.000

20.000 20.000 20.000 20.000 20.000 ]

LoadCurrVect=[ 0.25 0.5 0.75 1 1.25 1.5

1.75 2 2.25 2.5 2.75 3 3.25 3.5 3.75 4

4.25 4.5 4.75 5]

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LoadVoltVect20=[4.12 4.12 4.12 4.12 4.12 4.12

4.12 4.12 4.12 4.12 4.12 4.12 4.12 4.12 4.12 4.12

4.12 4.12 4.12 4.12]



figure(2);

plot(LoadCurrVect,OutPowerVect30*100./InPowerVect30);

legend '30 V supply';

hold on;

plot(LoadCurrVect,OutPowerVect24*100./InPowerVect24, 'r');


hold on;

plot(LoadCurrVect,OutPowerVect20*100./InPowerVect20, 'g');


hold on;

legend('30 V supply','24 V supply','20 V supply');

title('Forward Converter Efficiency','Fontsize',15)

axis([0, 5, 0, 100]);

grid;

xlabel('Load [A]','Fontsize',15);

ylabel('% Efficiency','Fontsize',15);

% 2 A load, new 13/9 transformer

InpCurrVect2A=[0.56 0.53 0.50 0.47 0.45 0.43 0.41

0.40 0.38 0.37 0.35 0.34 0.33]

InpCurrVect4A=[1.16 1.14 1.08 1.03 0.98 0.94 0.90

0.86 0.83 0.79 0.76 0.74 0.71]

InpCurrVect5A=[1.44 1.45 1.41 1.34 1.27 1.22 1.161.12 1.07 1.03 0.99 0.95 0.92]

InpVoltVect= [18 19 20 21 22 23 24

25 26 27 28 29 30 ]

LoadCurrVect2A=[2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0

2.0 2.0 2.0 2.0]

LoadCurrVect4A=[4.0 4.0 4.0 4.0 4.0 4.0 4.0 4.0 4.0

4.0 4.0 4.0 4.0]

LoadCurrVect5A=[5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0

5.0 5.0 5.0 5.0]

LoadVoltVect=[4.08 4.08 4.08 4.08 4.08 4.08 4.084.08 4.08 4.08 4.08 4.08 4.08 ]

InPowerVect2A=InpCurrVect2A.*InpVoltVect;



OutPowerVect2A=LoadCurrVect2A.*LoadVoltVect;



Vs_sim_eff=[18 20 22 24 26 28 30];

Pin_2A=[3.64 4.6 5.6 6.8 8.1 9.5 11];

Pout_2A=[2.84 3.6 4.5 5.57 6.68 7.9 9.2];

Eff_2A=Pout_2A./Pin_2A;

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Pin_4A=[6.93 8.75 10.771 13 15.45 18 20.95];

Pout_4A=[5.15 6.63 8.29 10.15 12.18 14.39 16.81];


Pin_5A=[8.45 10.65 13.11 15.83 18.8 22 25.5];

Pout_5A=[6.16 7.92 9.92 12.13 14.58 17.24 20.11];


figure(3);

subplot(2,1,1);

plot(InpVoltVect,OutPowerVect2A*100./InPowerVect2A, 'g'); hold

on

plot(InpVoltVect,OutPowerVect4A*100./InPowerVect4A, 'b');

plot(InpVoltVect,OutPowerVect5A*100./InPowerVect5A, 'm')

legend ('2 A loading current', '4 A loading current','5 A

loading current');

hold on;title('Forward Converter Efficiency, Measured','Fontsize',15)

axis([18, 30, 50, 90]);

grid;


subplot(2,1,2);

plot(Vs_sim_eff,Eff_2A*100,'-*g'); hold on;

plot(Vs_sim_eff,Eff_4A*100,'-*b');

plot(Vs_sim_eff,Eff_5A*100,'-*m');

legend ('2 A loading current','4 A loading current','5 A

loading current');

hold on;

title('Forward Converter Efficiency,Simulated','Fontsize',15)

axis([18, 30, 50, 90]);

grid;

xlabel('Supply voltage [V]','Fontsize',15);


LoopGain = importdata('LoopGainMeas_24V_2R2_300to100k_long.txt' );

%


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%--- Phase vs Frequency ---%

subplot(2,1,2);

semilogx(frequency, Phase, 'b', 'LineWidth',2);

grid;

ylabel('Phase [degrees]');

xlabel('Frequency_{log} [Hz]');

axis([300, 100e3,-80,160]);

% [EOF]

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