22
8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 E E D D C C B B A A PLL DAC ADC Title Size Document Number Rev Date: Sheet of 150-0310202-B1 B Cyclone II DSP Board B 1 22 Thursday, March 24, 2005 Title Size Document Number Rev Date: Sheet of 150-0310202-B1 B Cyclone II DSP Board B 1 22 Thursday, March 24, 2005 Title Size Document Number Rev Date: Sheet of 150-0310202-B1 B Cyclone II DSP Board B 1 22 Thursday, March 24, 2005 Copyright (c) 2005, Altera Corporation. All Rights Reserved. DESCRIPTION REV DATE PAGES PAGE DESCRIPTION 2 NOTES: Title, Notes, Block Diagram, Revision History 1 3 4 7 8 Cyclone II Banks 5 & 6 9 Cyclone II Banks 7 & 8 10 11 12 13 14 15 Digital Power Supplies 16 DDR2 Termination 17 Cyclone II Configuration Circuitry 18 ADC Channel A 19 DAC Channel A 20 DAC Channel B 21 Video DAC 22 ----- 23 ADC Channel B 24 25 ----- Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121 SRAM, TI EVM Connectors Analog Power Supplies 5 6 AIC23 Audio Codec Buttons, Switches, LEDs Digital Ground 894 Parts, 63 Library Parts, 874 Nets, 4299 Pins FPGA Package I/O Diagram & Design Notes System Block Diagram 1. Project Drawing Numbers: Raw PCB Gerber Files PCB Design Files Assembly Drawing Fab Drawing Schematic Drawing PCB Film Bill of Materials Schematic Design Files Functional Specification PCB Layout Guidelines Assembly Rework Clock Circuitry Cyclone II Banks 3 & 4 Cyclone II Banks 1 & 2 DDR2 DIMM 2. 100-0310202-B1 110-0310202-B1 120-0310202-B1 130-0310202-B1 140-0310202-B1 150-0310202-B1 160-0310202-B1 170-0310202-B1 180-0310202-B1 210-0310202-B1 220-0310202-B1 320-0310202-B1 Cyclone II Power and Decoupling Altera Daughter Card & Mictor Connector PLL Ground ----- DAC Ground ADC Ground A 01/26/2005 ----- Released for Protoype Production B ----- 02/17/2005 Fixed clock buffer U27 pinout. Fixed SSRAM U22 pinout to remove rework. Fixed EVM_CE2/CE3 short on TI EVM Interface. Fixed VTT Regulator U8 decoupling by adding ceramic output caps.

System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

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Page 1: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A APLL

DAC

ADC

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

1 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

1 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

1 22Thursday, March 24, 2005Copyright (c) 2005, Altera Corporation. All Rights Reserved.

DESCRIPTIONREV DATE PAGES

PAGE DESCRIPTION

2

NOTES:

Title, Notes, Block Diagram, Revision History1

34

78

Cyclone II Banks 5 & 6

9

Cyclone II Banks 7 & 8

1011

12131415

Digital Power Supplies

16

DDR2 Termination

17

Cyclone II Configuration Circuitry

18

ADC Channel A

19

DAC Channel A

20

DAC Channel B

21

Video DAC

22-----23

ADC Channel B

2425 -----

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

SRAM, TI EVM Connectors

Analog Power Supplies

56

AIC23 Audio Codec

Buttons, Switches, LEDs

Digital Ground

894 Parts, 63 Library Parts, 874 Nets, 4299 Pins

FPGA Package I/O Diagram & Design Notes

System Block Diagram

1. Project Drawing Numbers: Raw PCB Gerber Files PCB Design Files Assembly Drawing Fab Drawing Schematic Drawing PCB Film Bill of Materials Schematic Design Files Functional Specification PCB Layout Guidelines Assembly Rework

Clock Circuitry

Cyclone II Banks 3 & 4Cyclone II Banks 1 & 2

DDR2 DIMM

2.

100-0310202-B1110-0310202-B1120-0310202-B1130-0310202-B1140-0310202-B1150-0310202-B1160-0310202-B1170-0310202-B1180-0310202-B1210-0310202-B1220-0310202-B1320-0310202-B1

Cyclone II Power and DecouplingAltera Daughter Card & Mictor Connector

PLL Ground

-----

DAC Ground

ADC Ground

A 01/26/2005 ----- Released for Protoype ProductionB -----02/17/2005 Fixed clock buffer U27 pinout. Fixed SSRAM U22 pinout to remove rework. Fixed

EVM_CE2/CE3 short on TI EVM Interface. Fixed VTT Regulator U8 decoupling byadding ceramic output caps.

Page 2: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

2 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

2 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

2 22Thursday, March 24, 2005

BANK 8

(a)

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

(l)

1.

BANK 3

BANK 5

(k)

Bank5 - I/O

Notes:

BANK 2

DAC Channel 2

Bank3 - I/O

Bank8 - I/O

Bank4 - I/O

(b) Bank2 - I/O

Bank7 - I/O

VCCIO = 1.8V

VCCIO = 3.3V

FPGA Schematic Symbol Breakdown:

2.

VCCio, GND

BANK 6

(i)

(f)

PCB Supports 2C35 - 2C50 - 2C70 Migration

VCCIO = 1.8V VCCIO = 1.8V

FPGA Package Top View

Bank6 - I/O

(h)

VCCint, GND

BANK 1

BANK 7

(j)BANK 4

VCCIO = 3.3V

Bank1 - I/O

Clocks

VCCIO = 1.8V

VCCIO = 3.3V

(d)(c)

Copyright (c) 2005, Altera Corporation. All Rights Reserved.

VCCIO = 3.3V

(e)

(g)

Configuration

Shared Bus

DAC Channel 1Shared Bus

DAC Channel 2

DDR2 DIMM DATA LANES

ADC Channel 2

DDR2 DIMM DATA LANESADC Channel 2

Proto BusVideo DACDAC Channel 1

DAC Channel 1DAC Channel 2Video DAC

DDR2 DIMM DATA LANES, CNTL, CLOCKPushbuttons

DDR2 DIMM DATA LANES, ADDRESSPushbuttons

Dipswitch

(2C70 Device Shown)

No additional I/O of 2C35 or 2C50 used asADC Channel 1

Video DAC

the 2C70 has the fewest I/O of the groupdue to additional VCCINT,GND, and VREFpins on the larger 2C50 and 2C70 devices.

3. Some I/O pins are connected to 1.2V and GND.These are the additional VCC and GND pins ofthe larger 2C50 and 2C70.

DO NOT DRIVE UNUSED I/O TO GND IN QUARTUS--- WARNING ---

Leaving 1.2V-connected I/O pins as outputsdriving GND causes high I/O current and increasedtemperature which can lead to device damageif left over a long period of time.

Page 3: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

3.3V_OSCB

CLK_SEL

CLK_SMACLK_OSC

CLK_EN 3.3V_CLK

CLKIN_BOTCLKIN_TOP

CLKIN_BOT_RCLKIN_TOP_R

3.3V_CLK

ADCA_ENC

ADCB_ENC

CLK_OSC_ADCB

CLK_OSC_ADCA

CLK_OSC_DACB_R

CLK_OSC_ADCB_RCLK_OSC_ADCA_R

FPGA_TO_ADC_CLK

FPGA_TO_ADC_CLK

CLK_OSC_DACA

CLK_OSC_DACB

FPGA_TO_DAC_CLK

FPGA_TO_DAC_CLK

SMA_TO_ADC_CLK

SMA_TO_DAC_CLK

SMA_TO_DAC_CLK

SMA_TO_ADC_CLK

CLK_OSC_DACA_R

PROTO_CLK_OSC_R

CLKIN_TOP

CLKIN_BOT

SMA_TO_ADC_CLK

SMA_TO_DAC_CLK

DACA_ENC

DACB_ENC

DACA_CLK_R

DACB_CLK_R

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V3.3V

3.3V 3.3V

3.3V

3.3V

3.3V

3.3V

3.3V

ADC_A_CLK_P11ADC_A_CLK_N11

ADC_B_CLK_P12ADC_B_CLK_N12

DACA_CLK13

DACB_CLK14

FPGA_TO_ADC_CLK 4

FPGA_TO_DAC_CLK 4

USER_LED717

DAC_B_D314

PROTO_IO319

USER_LED217

DAC_B_D414

USER_LED017

USER_LED617

PROTO_CLK_OSC 19

EVM_CLKOUT2 18VGA_VSYNC15EVM_INUM0 18

EVM_RESET 18EVM_AREn 18

EVM_IACK 18

USER_DIPSW0 17

DIMM_SYNC_CLK 7USER_PB3 17

AUDIO_DOUT 16ADC_A_DCLK 11ADC_B_DCLK 12ADC_A_D7 11

PROTO_CLKOUT 19

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

3 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

3 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

3 22Thursday, March 24, 2005Copyright (c) 2005, Altera Corporation. All Rights Reserved.

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

Cyclone II Clocking

PIN2-PIN3 SMA InputOscillator

(Dual footprint withSMT and socketedhalf-can oscillator)

Socket CLK100MHz CLK

PIN2-PIN3PIN1-PIN2

SMA Input

PIN1-PIN2

High-Speed Clock Source

On-Board OSC

Custom OSC

(1) On-Board OSC(2) Custom OSC(3) SMA Input

Channel A

ADC Clock SMA

ADC Sample Clock

ADC Sample ClockChannel B

DAC Clock SMA

DAC Clock (from FPGA)

ADC Clock (from FPGA)ADC Clock Select

Channel A

ADC Clock SelectChannel B

DAC Clock SelectChannel A

DAC Clock SelectChannel B

DAC Sample Clock

DAC Sample ClockChannel B

Channel A

1

2345

J26LTI-SASF54GT

J26LTI-SASF54GT

C398

0.01uF

C398

0.01uF

R25982R25982

R12549.9R12549.9

R24582R24582

R25195.3R25195.3

EN1

GND4 OUT 5

VCC 8J20

1108800

J20

1108800

R248143R248143

R12110.0KR12110.0K

C399

0.01uF

C399

0.01uF

R124 33.2R124 33.2

R126 33.2R126 33.2

C79

1uF

C79

1uF

1 23 45 6

J34

TSW-103-07-L-D

J34

TSW-103-07-L-D

R127 33.2R127 33.2

R42 33.2R42 33.2

VCC 4

GND2 OUT 3

EN1U20

100Mhz

U20

100Mhz

R237130R237130

C306

0.1uF

C306

0.1uF

R13010.0KR13010.0K

R239143R239143

C84

0.1uF

C84

0.1uF

C390

0.1uF

C390

0.1uFR25349.9R25349.9

R23582R23582

R129 33.2R129 33.2

C74

1uF

C74

1uF

R13410.0KR13410.0K

C305

0.01uF

C305

0.01uF

L91.5A/330L91.5A/330

R25049.9R25049.9

1 23 45 6

J35

TSW-103-07-L-D

J35

TSW-103-07-L-D

R122 33.2R122 33.2

L11 1.5A/330L11 1.5A/330

R39 33.2R39 33.2

R26182R26182

C397

0.1uF

C397

0.1uF

CLK0_B2N2

CLK1_B2N1

CLK2_B1P2

CLK3_B1P1

CLK4_B5N25

CLK5_B5N26

CLK6_B6P25

CLK7_B6P26

CLK8_B4B13

CLK9_B4A13

CLK10_B3C13

CLK11_B3D13

CLK14_B8AD13

CLK15_B8AC13

CLK13_B7AF14CLK12_B7AE14

PLL1_OUTp_B1 AA7

PLL1_OUTn_B1 AA6

PLL2_OUTp_B5 F21

PLL2_OUTn_B5 F20

PLL3_OUTp_B2 E5

PLL3_OUTn_B2 F6

PLL4_OUTp_B6 V21

PLL4_OUTn_B6 V20

CYCLONE II, CLOCKS

PLL 3

PLL 4

PLL 2

PLL 1

U12J

EP2C35_672FBGA

CYCLONE II, CLOCKS

PLL 3

PLL 4

PLL 2

PLL 1

U12J

EP2C35_672FBGA

1 23 45 6

J37

TSW-103-07-L-D

J37

TSW-103-07-L-D

1

2345

J17LTI-SASF54GT

J17LTI-SASF54GT

C387

0.01uF

C387

0.01uF

R24949.9R24949.9

C400

0.1uF

C400

0.1uF

R252143R252143

VDD 2

VDD 15

SELA16

GND10 Q7 14Q6 13Q5 12Q4 11

Q2 5Q1 4

Q3 6

Q0 3

GND7

INB8

OE1

INA9

U16

ICS552-02

U16

ICS552-02

123

J18

TSW-103-07-L-S

J18

TSW-103-07-L-S

IN_LVPECL 1

IN_LVPECL_n 2

OUT_LVPECL 3

OUT_LVPECL_n 4GND5IN_LVTTL6OUT_LVTTL7VCC8

U28

SY10EPT28L

U28

SY10EPT28L

R236130R236130

R260130R2601301 2

3 45 6

J36

TSW-103-07-L-D

J36

TSW-103-07-L-D

R23895.3R23895.3

1A1

GND2

2A3 2Y 4VCC 5

1Y 6U27

SN74LVC2G34DBV

U27

SN74LVC2G34DBV

R24795.3R24795.3

R128 33.2R128 33.2

R123 33.2R123 33.2

123

J19

TSW-103-07-L-S

J19

TSW-103-07-L-S

R24095.3R24095.3

C85

0.01uF

C85

0.01uF

R241143R241143

R24649.9R24649.9

IN_LVPECL 1

IN_LVPECL_n 2

OUT_LVPECL 3

OUT_LVPECL_n 4GND5IN_LVTTL6OUT_LVTTL7VCC8

U29

SY10EPT28L

U29

SY10EPT28L

R262130R262130

1

2345

J27LTI-SASF54GT

J27LTI-SASF54GT

Page 4: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

DAC_B_D1

PROTO_IO32

PROTO_IO2PROTO_IO1

PROTO_IO38PROTO_IO6PROTO_IO39

PROTO_IO20PROTO_IO17

PROTO_IO18

PROTO_IO34PROTO_IO19

VGA_B4PROTO_IO26

PROTO_IO33PROTO_IO21DIG_LSB_A

PROTO_IO5

PROTO_IO25

PROTO_IO30PROTO_IO36

PROTO_IO35PROTO_IO22

PROTO_IO24PROTO_IO23DAC_B_D0

PROTO_IO29DIG_MSB_E

VGA_B2

PROTO_IO40PROTO_IO14

PROTO_IO12

PROTO_IO28

PROTO_IO15

PROTO_IO0

PROTO_IO7

PROTO_IO37PROTO_IO31

PROTO_IO16PROTO_IO27

PROTO_IO13

PROTO_IO9

PROTO_IO11PROTO_IO10

USER_LED4

DAC_A_D0 VGA_G3VGA_BLANKn

DAC_A_D11

DIG_LSB_DPROTO_CARDSELn

AUDIO_SDINDAC_A_D3VGA_SYNCn

AUDIO_CLK

AUDIO_MODE

DIG_MSB_DPVGA_G7DAC_A_D8DAC_A_D9DIG_LSB_E

VGA_B5VGA_B3ADC_B_OE

DAC_A_D13DIG_LSB_DP

USER_LED5

DIG_LSB_C

DAC_A_D5

DAC_A_D1

VGA_B1AUDIO_LRCINVGA_G1

FPGA_TO_DAC_CLKDAC_A_D6DIG_MSB_D

VGA_G2

AUDIO_SCLKDAC_A_D12VGA_G4

VGA_B0

VGA_G5

VGA_CLKFPGA_TO_ADC_CLK

DAC_A_D10VGA_R6VGA_G0

DIG_LSB_G

DAC_A_D7

VGA_G6

DIG_MSB_FVGA_B7DAC_A_D4VGA_B6

DIG_MSB_B

ADC_A_OE

AUDIO_BCLK

PROTO_IO4

PROTO_IO8DAC_A_D2

ADC_SDATA

AUDIO_LRCOUT

1.2V

1.2V

1.2V

PROTO_IO[40..0] 3,19

USER_LED[7..0] 3,6,10,17

VGA_G[7..0] 15

VGA_R[7..0] 6,15

VGA_B[7..0] 15

DIG_MSB_B 17DIG_MSB_D 17DIG_MSB_E 17DIG_MSB_F 17DIG_MSB_DP 17

DIG_LSB_A 17DIG_LSB_C 17DIG_LSB_D 17DIG_LSB_E 17DIG_LSB_G 17DIG_LSB_DP 17

FPGA_TO_ADC_CLK 3

FPGA_TO_DAC_CLK 3

AUDIO_SCLK 16AUDIO_MODE 16

VGA_CLK 15

DAC_B_D[13..0] 3,6,14

DAC_A_D[13..0] 13

PROTO_CARDSELn 19

ADC_A_OE 11

ADC_B_OE 12

AUDIO_CLK 16

VGA_SYNCn 15

AUDIO_SDIN 16

AUDIO_LRCIN 16

AUDIO_BCLK 16

ADC_SDATA 11,12

VGA_BLANKn 15

AUDIO_LRCOUT 16

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

4 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

4 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

4 22Thursday, March 24, 2005Copyright (c) 2005, Altera Corporation. All Rights Reserved.

CYCLONE II BANKS 1 & 2

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

These pins are GNDpins on 2C70.

These pins are GNDpins on 2C70.

These pins are GNDpins on 2C70.

These pins are connectedto VCCINT on 2C70.

These pins are connectedto VCCINT on 2C70.

VCCIO = 3.3VVCCIO = 3.3V

These pins are connectedto VCCINT on 2C70.

0 VREF2 GND4 VCCINT

0 VREF3 GND1 VCCINT

IO_63C2

IO_64C3

IO_65D1

IO_66D2

IO_67E1

IO_68E2

IO_70F1

IO_71F2

IO_72F3

IO_73F4

IO_75F7

IO_76G1

IO_77G2

IO_78G3

IO_79G4

IO_80G5

IO_81 G6

IO_82 H6

IO_87 K5

IO_88 K6

IO_89 K7

IO_90 K8

IO_91 H1

IO_92 H2

IO_93 H3

IO_94 H4

IO_95 J1

IO_96 J2

IO_97 J3

IO_98 J4

IO_99 K1

IO_100 K2

IO_101 K3

IO_102 K4

IO_103 L2

IO_104 L3

IO_105 L4

IO_106 L7

IO_107 L9

IO_108 M2

IO_109 M3

IO_110 M4

IO_111 M5

IO_458 P9

IO_450J5

IO_451J6

IO_452J7

IO_453J8

IO_454L10

IO_470L6

IO_474N9

IO_57B2CYCLONE II, BANK 2

U12B

EP2C35_672FBGA

CYCLONE II, BANK 2U12B

EP2C35_672FBGA

IO_1AA1

IO_2AA2

IO_3AA3

IO_4AA4

IO_5AA5

IO_8AB1

IO_9AB2

IO_10AB3

IO_11AB4

IO_12AC1

IO_13AC2

IO_14AC3

IO_15AD2

IO_16AD3

IO_17AE2

IO_18AE3

IO_19P6

IO_20P7

IO_21R2

IO_22R4

IO_23R5

IO_24R6

IO_25R7

IO_26R8

IO_27T2

IO_28T3

IO_29T4

IO_30T6

IO_31 T7

IO_32 T8

IO_33 T9

IO_34 T10

IO_35 U1

IO_36 U2

IO_37 U3

IO_38 U4

IO_39 U5

IO_40 U6

IO_41 U7

IO_42 U9

IO_43 U10

IO_44 V1

IO_45 V2

IO_46 V3

IO_47 V4

IO_48 V5

IO_49 V6

IO_50 V7

IO_51 W1

IO_52 W2

IO_53 W3

IO_54 W4

IO_55 W6

IO_56 Y1

IO_58 Y3

IO_59 Y4

IO_60 Y5

IO_456 P3

IO_457 P4

IO_459 R3

CYCLONE II, BANK 1U12A

EP2C35_672FBGA

CYCLONE II, BANK 1U12A

EP2C35_672FBGA

Page 5: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

DIMM_DQS4DIMM_DQ34

DIMM_DQ39

DIMM_DQ35DIMM_DQ47

DIMM_DQ46DIMM_DQ33

DIMM_DQ38ADC_A_D2DIMM_DQ71

DIMM_DM4

DIMM_DQ68DIMM_DQ36

DIMM_DQ67DIMM_DQ37

ADC_B_D0ADC_B_D8

ADC_B_D11

DIMM_DQ62DIMM_DQ63

DIMM_DQ48

DIMM_DQ53DIMM_DQ51DIMM_DQ59

DIMM_DQ58

ADC_B_D9

DIMM_DQ32DIMM_DQ42

DIMM_DQ44

DIMM_DQ64DIMM_DQ43

ADC_A_D4DIMM_DQ69

DIMM_DQ41

ADC_B_OVRADC_A_D3

DIMM_DM8DIMM_DQ70

DIMM_DQ66DIMM_DQS8

DIMM_DM5

ADC_A_D6DIMM_DQ65

DIMM_DQ40

DIMM_DQ45ADC_A_D5DIMM_DQS5

ADC_A_D9

ADC_B_D6

DIMM_DQ61DIMM_DQ56

ADC_A_D13ADC_A_D10DIMM_DQS6

ADC_B_D5

DIMM_DQ54

ADC_B_D4

DIMM_DQ50DIMM_DQ57

ADC_B_D7ADC_A_D8ADC_A_D11

ADC_A_D12USER_DIPSW3

DIMM_DQ55

ADC_B_D3USER_DIPSW2

DIMM_DM7DIMM_DQS7

DIMM_DQ49ADC_A_OVR

ADC_B_D12DIMM_DQ60

ADC_B_D13

ADC_B_D1ADC_B_D2

ADC_B_D10

DIMM_DQ52

ADC_A_D1

DIMM_DM6

USER_DIPSW1

USER_RESETn

ADC_A_SEN

ADC_B_SEN

VREFVREF VREF

1.2V

1.2V

3.3V3.3V

DIMM_DQ[71..0] 7,8,9

DIMM_DQS[8..0] 7,8,9

DIMM_A_R[15..0] 7,9

DIMM_BA_R[2..0] 7,9

DIMM_DM[8..0] 7,8,9

DIMM_RASn_R 7,9

DIMM_CASn_R 7,9

DIMM_WEn_R 7,9

DIMM_CSn_R0 7,9

DIMM_CSn_R1 7,9

DIMM_CKE_R0 7,9

DIMM_CKE_R1 7,9

DIMM_ODT_R0 7,9

DIMM_ODT_R1 7,9

USER_DIPSW[7:0] 3,7,17

ADC_A_D[13..0] 3,10,11

ADC_B_D[13..0] 12

USER_RESETn 17,19

ADC_A_OVR 11

ADC_B_OVR 12

ADC_A_SEN 11

ADC_B_SEN 12

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

5 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

5 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

5 22Thursday, March 24, 2005

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

CYCLONE II BANKS 3 & 4

Copyright (c) 2005, Altera Corporation. All Rights Reserved.

UNUSED I/O

VCCIO = 1.8VVCCIO = 1.8V

1.8V driving 3.3V logic must be driven as open-drain

2 VREF5 GND4 VCCINT

4 VREF6 GND4 VCCINT

IO_166A14

IO_167A17

IO_168A18

IO_169A19

IO_170A20

IO_171A21

IO_172A22

IO_173A23

IO_174B14

IO_175B15

IO_176B16

IO_177B17

IO_178B18

IO_179B19

IO_180B20

IO_181B21

IO_182B22

IO_183B23

IO_184C15

IO_185C16

IO_186C17

IO_187C19

IO_188C21

IO_189C22

IO_190C23

IO_191D14

IO_192D15

IO_193D16

IO_194D17

IO_195D18

IO_196D19

IO_197D20

IO_198D21

IO_199E15

IO_200E18

IO_201 E20

IO_202 F13

IO_203 F14

IO_204 F15

IO_205 F16

IO_206 F17

IO_207 F18

IO_208 G13

IO_209 G14

IO_210 G15

IO_211 G16

IO_212 G17

IO_213 G18

IO_214 H15

IO_215 H16

IO_216 H17

IO_217 J16

IO_218 J17

IO_219 J18

IO_220 K16

IO_221 K17

CYCLONE II, BANK 4U12D

EP2C35_672FBGA

CYCLONE II, BANK 4U12D

EP2C35_672FBGA

R2581KR2581K

IO_112A10

IO_113A4

IO_114A5

IO_115A6

IO_116A8

IO_117A9

IO_118B4

IO_119B5

IO_120B6

IO_121B9

IO_122B10

IO_123B11

IO_124B12

IO_125C4

IO_127C6

IO_128C10

IO_129C11

IO_130C12

IO_131D5

IO_132D10

IO_133D11

IO_134E8

IO_135E10

IO_136F11

IO_137F12

IO_138G9

IO_139G11

IO_140G12

IO_141 H8

IO_142 H10

IO_143 H11

IO_144 H12

IO_145 J9

IO_146 J10

IO_147 J13

IO_148 K9

IO_149 B8

IO_150 C8

IO_151 C9

IO_152 D12

IO_153 D8

IO_154 D9

IO_155 E12

IO_156 J11

IO_157 J14

IO_158 A7

IO_159 B7

IO_160 C7

IO_161 D6

IO_162 D7

IO_163 F10

IO_164 F9

IO_165 G10

CYCLONE II, BANK 3U12C

EP2C35_672FBGA

CYCLONE II, BANK 3U12C

EP2C35_672FBGA

R2331KR2331K

Page 6: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

EVM_A12USER_LED3

DAC_B_D5

EVM_A16EVM_A14

EVM_A20EVM_A18

EVM_A6EVM_A2

EVM_A4

EVM_D28EVM_D30

EVM_BEn0

EVM_A21EVM_DX0

EVM_CLKX0EVM_BEn2

EVM_CLKR0EVM_A17

EVM_DR0EVM_FSR0

EVM_D26EVM_A19

EVM_D24

AUDIO_DIN

EVM_D20

EVM_D10EVM_INT3

EVM_A13

EVM_D8EVM_STAT0

EVM_A9EVM_A7

EVM_A3EVM_A5EVM_D2

EVM_INT1

EVM_D6

EVM_BEn1EVM_BEn3

EVM_CNTL0EVM_INT0

EVM_D4EVM_D31EVM_DMAC0

EVM_A10EVM_A8EVM_FSX0

EVM_D12

EVM_D22

EVM_A11

EVM_CEn2EVM_A15

EVM_D16EVM_D18

EVM_D19DIG_LSB_B

DAC_B_D13

EVM_D15DIG_LSB_F

DAC_B_D2VGA_R5

EVM_D21

DIG_MSB_GEVM_ARDY

EVM_D0

DAC_B_D12EVM_D17

EVM_AWEnDAC_B_D9

EVM_D13DAC_B_D10DAC_B_D11

DIG_MSB_A

DAC_B_D8VGA_R7

VGA_R0

VGA_R3EVM_D23

EVM_D25SRAM_CLK

VGA_R1DAC_B_D6ADC_RESET

DAC_B_D7EVM_D27

EVM_INT2ADC_SCLKVGA_R2

PROTO_CLKIN

EVM_D29EVM_D1

EVM_OEn

EVM_D7DIG_MSB_C

EVM_D9EVM_D5

EVM_D3VGA_R4AUDIO_CSn

EVM_D11

EVM_D14

EPCS_USER_CSn

VGA_HSYNC

1.2V

1.2V

DAC_B_D[13..0] 3,4,14

EVM_D[31..0] 18

EVM_BEn[3..0] 18

EVM_INT[3..0] 18

EVM_DR0 18

EVM_DX0 18

EVM_CNTL0 18

EVM_DMAC0 18

EVM_STAT0 18

EVM_AWEn 18

EVM_FSR0 18

EVM_CLKX0 18

EVM_FSX0 18

EVM_CLKR0 18

EVM_ARDY 18

EVM_CEn[3..2] 10,18

EVM_OEn 18

USER_LED[7..0] 3,4,10,17

AUDIO_DIN 16

DAC_A_D[13..0] 4,13

EVM_A[21..2] 18

EVM_RESET 3,18

VGA_R[7..0] 4,15

VGA_B[7..0] 4,15

DIG_MSB_A 17

DIG_MSB_C 17

DIG_MSB_G 17

DIG_LSB_B 17

ADC_RESET 11,12

ADC_SCLK 11,12

ADC_B_SEN 5,12

AUDIO_CSn 16

EPCS_USER_CSn 10

DIG_LSB_F 17

SRAM_CLK 18

VGA_HSYNC 15

PROTO_CLKIN 19

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

6 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

6 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

6 22Thursday, March 24, 2005Copyright (c) 2005, Altera Corporation. All Rights Reserved.

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

CYCLONE II BANKS 5 & 6

VCCIO = 3.3VVCCIO = 3.3V

0 VREF2 GND2 VCCINT

0 VREF2 GND4 VCCINT

IO_222B24

IO_223B25

IO_225C25

IO_226D23

IO_227D25

IO_228E22

IO_229E24

IO_230E25

IO_231E26

IO_234F23

IO_235F24

IO_236F25

IO_237F26

IO_238G21

IO_239G23

IO_240G24

IO_241G25

IO_242G26

IO_243H19

IO_244H21

IO_245H23

IO_246H24

IO_247H25

IO_248H26

IO_249J20

IO_250J21

IO_251J22

IO_252J23

IO_253J24

IO_254J25

IO_255J26

IO_256K18

IO_257K19

IO_258K21

IO_259K22

IO_260K23

IO_261 K24

IO_262 K25

IO_263 K26

IO_264 L19

IO_265 L20

IO_266 L21

IO_267 L23

IO_268 L24

IO_269 L25

IO_270 M19

IO_271 M20

IO_272 M21

IO_273 M22

IO_274 M23

IO_275 M24

IO_276 M25

IO_277 N18

IO_278 N20

IO_279 N23

IO_280 N24

IO_281 P18

IO_224C24

IO_447 D26

IO_448 E23

IO_449 G22

CYCLONE II, BANK 5U12E

EP2C35_672FBGA

CYCLONE II, BANK 5U12E

EP2C35_672FBGA

IO_282AA24

IO_283AA25

IO_284AA26

IO_285AB23

IO_286AB24

IO_287AB25

IO_288AB26

IO_289AC23

IO_290AC25

IO_291AC26

IO_292AD24

IO_293AD25

IO_295P17

IO_296P23

IO_297P24

IO_298R17

IO_299R19

IO_300R20

IO_301R24

IO_302R25

IO_303T17

IO_304T18

IO_305T19

IO_306T20

IO_307T21

IO_308T22

IO_309T23

IO_310T24

IO_311 T25

IO_312 U20

IO_313 U21

IO_314 U22

IO_315 U23

IO_316 U24

IO_317 U25

IO_318 U26

IO_321 V22

IO_322 V23

IO_323 V24

IO_324 V25

IO_325 V26

IO_326 W21

IO_327 W23

IO_328 W24

IO_329 W25

IO_330 W26

IO_331 Y21

IO_332 Y22

IO_333 Y23

IO_334 Y24

IO_335 Y25

IO_336 Y26

IO_460AA23

CYCLONE II, BANK 6U12F

EP2C35_672FBGA

CYCLONE II, BANK 6U12F

EP2C35_672FBGA

Page 7: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

DIMM_DQ13DIMM_DQ12

DIMM_CSn_R0DIMM_BA_R1

DIMM_SDADIMM_ODT_R0

USER_PB2

DIMM_DQS0

DIMM_ODT_R1

DIMM_CK_N2

USER_DIPSW4DIMM_DQS2

DIMM_A_R9

DIMM_A_R13

DIMM_A_R11DIMM_DQS3

DIMM_SCL

DIMM_DM0

DIMM_BA_R2

DIMM_DQ10

DIMM_CASn_RDIMM_CK_P0

USER_PB0DIMM_CKE_R1

DIMM_CSn_R1DIMM_CK_P1

DIMM_CK_P2DIMM_RESETn

DIMM_CK_N1

DIMM_CK_N0

DIMM_RASn_RDIMM_CKE_R0

DIMM_DQS1USER_PB1DIMM_DQ2

DIMM_DM2DIMM_A_R1

DIMM_A_R8

DIMM_A_R2

DIMM_DM3

DIMM_A_R7

DIMM_DQ29

DIMM_A_R5DIMM_BA_R0

DIMM_WEn_R

DIMM_A_R4

DIMM_A_R15

DIMM_A_R3

DIMM_A_R12DIMM_A_R10DIMM_A_R0

DIMM_A_R14DIMM_A_R6

DIMM_DM1

USER_DIPSW5

USER_DIPSW6USER_DIPSW7

DIMM_SYNC_CLK

DIMM_DQ4

DIMM_DQ5

DIMM_DQ0

DIMM_DQ7

DIMM_DQ6

DIMM_DQ1

DIMM_DQ3

DIMM_DQ11

DIMM_DQ15

DIMM_DQ9

DIMM_DQ14

DIMM_DQ8

DIMM_DQ18

DIMM_DQ17

DIMM_DQ23

DIMM_DQ21

DIMM_DQ19

DIMM_DQ16

DIMM_DQ22

DIMM_DQ20

DIMM_DQ26

DIMM_DQ31

DIMM_DQ24

DIMM_DQ27

DIMM_DQ25

DIMM_DQ30

DIMM_DQ28

DIMM_SYNC_CLK

VREFVREF

1.2V1.2V

VTT

DIMM_A_R[15..0] 9

DIMM_BA_R[2..0] 9

DIMM_DM[8..0] 5,8,9

DIMM_RASn_R 9

DIMM_CASn_R 9

DIMM_WEn_R 9

DIMM_CSn_R0 9

DIMM_CSn_R1 9

DIMM_CKE_R0 9

DIMM_CKE_R1 9

DIMM_ODT_R0 9

DIMM_ODT_R1 9

DIMM_DQ[71..0] 5,8,9

DIMM_DQS[8..0] 5,8,9

DIMM_CK_P[2..0] 8

DIMM_CK_N[2..0] 8

DIMM_SDA 8

DIMM_SCL 8

DIMM_RESETn 8

USER_PB[3..0] 3,17

USER_DIPSW[7:0] 3,5,17

PROTO_CLKIN 6,19

DIMM_SYNC_CLK 3

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

7 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

7 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

7 22Thursday, March 24, 2005

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

Copyright (c) 2005, Altera Corporation. All Rights Reserved.

CYCLONE II BANKS 7 & 8

Resynchronization Feedback Clock

VCCIO = 1.8VVCCIO = 1.8V

SMA for External Clock Input / Eye Diagram Output(secondary use)

UNUSED I/O

2 VREF4 GND5 VCCINT

3 VREF7 GND4 VCCINT

UNUSED I/O

1

2345

J11LTI-SASF54GT

J11LTI-SASF54GT

IO_393AA9

IO_394AA10

IO_395AA11

IO_396AA12

IO_397AB8

IO_398AB10

IO_399AB12

IO_401AC5

IO_402AC6

IO_403AC7

IO_404AC8

IO_405AC9

IO_406AC10

IO_407AC11

IO_408AC12

IO_410AD5

IO_411AD6

IO_412AD7

IO_413AD8

IO_414AD10

IO_415AD11

IO_416AD12

IO_417AE4

IO_418AE5

IO_419AE6

IO_420AE7

IO_421 AE9

IO_422 AE10

IO_423 AE11

IO_424 AE12

IO_425 AE13

IO_426 AF4

IO_427 AF5

IO_428 AF6

IO_429 AF7

IO_430 AF8

IO_431 AF9

IO_432 AF10

IO_433 AF13

IO_434 U12

IO_435 V9

IO_436 V10

IO_437 V11

IO_438 V13

IO_439 V14

IO_440 W8

IO_441 W10

IO_442 W11

IO_443 W12

IO_444 Y10

IO_445 Y11

IO_446 Y12

IO_461 AD4

IO_462 AE8

CYCLONE II, BANK 8U12H

EP2C35_672FBGA

CYCLONE II, BANK 8U12H

EP2C35_672FBGA

IO_337AA13

IO_338AA14

IO_339AA15

IO_340AA16

IO_341AA17

IO_342AA18

IO_344AB15

IO_345AB18

IO_346AB20

IO_347AB21

IO_348AC14

IO_349AC15

IO_350AC16

IO_351AC17

IO_352AC18

IO_353AC19

IO_354AC20

IO_355AC21

IO_356AC22

IO_357AD15

IO_358AD16

IO_359AD17

IO_360AD19

IO_361AD21

IO_362AD22

IO_363AD23

IO_364AE15

IO_365AE16

IO_366AE17

IO_367AE18

IO_368AE19

IO_369AE20

IO_370AE21

IO_371 AE22

IO_372 AE23

IO_373 AF17

IO_374 AF18

IO_375 AF19

IO_376 AF20

IO_377 AF21

IO_378 AF22

IO_379 AF23

IO_380 U17

IO_381 U18

IO_382 V17

IO_383 V18

IO_384 W15

IO_385 W16

IO_386 W17

IO_387 W19

IO_388 Y13

IO_389 Y14

IO_390 Y15

IO_391 Y16

IO_392 Y18

IO_455 AA20

CYCLONE II, BANK 7U12G

EP2C35_672FBGA

CYCLONE II, BANK 7U12G

EP2C35_672FBGA

C201

0.1uF

C201

0.1uF

R10256R10256

Page 8: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

DIMM_RESETn

DIMM_RESETn

DIMM_A3DIMM_A1

DIMM_A13

DIMM_A4

DIMM_A2

DIMM_BA1DIMM_BA0

DIMM_DQ36DIMM_DQ37

DIMM_DQ38DIMM_DQ39

DIMM_DM0

DIMM_DQ44DIMM_DQ45

DIMM_DQ68

DIMM_DQ46

DIMM_DQ69

DIMM_DQ47

DIMM_DQ64

DIMM_DQ52

DIMM_DQ65

DIMM_DQ53

DIMM_DQ67DIMM_DQ54DIMM_DQ66DIMM_DQ55

DIMM_DQ60

DIMM_A6

DIMM_DQ61

DIMM_A8

DIMM_A9 DIMM_DQ62

DIMM_DQ70

DIMM_A12

DIMM_DQ63

DIMM_DQ71

DIMM_A5

DIMM_DQ32

DIMM_A7

DIMM_DQ33

DIMM_A11

DIMM_DQ34DIMM_DQ35

DIMM_BA2

DIMM_DQ40

DIMM_DQ31

DIMM_DQ41

DIMM_DQ30

DIMM_DM8

DIMM_DQS[8..0]

DIMM_DQS5

DIMM_DQ29

DIMM_DQ42

DIMM_DQ28

DIMM_DQ43

DIMM_CK_P0

DIMM_DQ23

DIMM_DQ48

DIMM_CK_N0

DIMM_DQ22

DIMM_DQ49

DIMM_RASn

DIMM_DQ50

DIMM_DM2

DIMM_CSn0

DIMM_DQ51

DIMM_ODT0

DIMM_DQ56

DIMM_DQ21

DIMM_A0

DIMM_DQ20

DIMM_DQ57

DIMM_DQ15

DIMM_DQ58

DIMM_DQ14

DIMM_DQ59

DIMM_DM1

DIMM_DM7

DIMM_DQ13

DIMM_CK_P2

DIMM_DQ12

DIMM_CK_N2

DIMM_DM6

DIMM_DQ7DIMM_DQ6

DIMM_DM5

DIMM_DQ4DIMM_DQ5

DIMM_DM4

DIMM_DQ0DIMM_DQ1

DIMM_A10

DIMM_SCL

DIMM_DQS0

DIMM_SDA

DIMM_DQS4

DIMM_DQ2DIMM_DQ3

DIMM_DQ8

DIMM_DQS6

DIMM_DQ9

DIMM_DQS7

DIMM_DQS1

DIMM_DQ10

DIMM_ODT1

DIMM_DQ11

DIMM_CSn1

DIMM_DQ16

DIMM_CASn

DIMM_DQ17

DIMM_WEn

DIMM_DQS2

DIMM_CK_P1

DIMM_DQ18

DIMM_CK_N1

DIMM_DQ19

DIMM_CKE0

DIMM_DQ24

DIMM_CKE1

DIMM_DQ25

DIMM_DQS3

DIMM_RASn

DIMM_CASn

DIMM_CSn0

DIMM_WEn

DIMM_CSn1

DIMM_CKE0

DIMM_CKE1

DIMM_ODT0

DIMM_ODT1

DIMM_DQ26

DIMM_SDA

DIMM_SCL

DIMM_DQ27

DIMM_DQS8

DIMM_A15DIMM_A14

DIMM_DM3

DIMM_A[15..0]

DIMM_DQ[71..0]

DIMM_BA[2..0]

DIMM_DM[8..0]

1.8V

1.8V 1.8V1.8V1.8VVREF

VTT

DIMM_A[15..0]9

DIMM_BA[2..0]9

DIMM_DQ[71..0]5,7,9

DIMM_RASn9

DIMM_CASn9

DIMM_WEn9

DIMM_CKE09

DIMM_CKE19

DIMM_CSn09

DIMM_CSn19

DIMM_ODT09

DIMM_ODT19

DIMM_SDA7

DIMM_SCL7

DIMM_DM[8..0]5,7,9

DIMM_DQS[8..0]5,7,9

DIMM_RESETn7

DIMM_CK_P[2..0]7

DIMM_CK_N[2..0]7

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

8 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

8 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

8 22Thursday, March 24, 2005Copyright (c) 2005, Altera Corporation. All Rights Reserved.

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

DDR2 SDRAM DIMM

Place near DIMM back-side oncomponent side of PCB

VREF1

VSS12

DQ03

DQ14

VSS25

DQS_N06

DQS_P07

VSS38

DQ29

DQ310

VSS411

DQ812

DQ913

VSS514

DQS_N115

DQS_P116

VSS617

RESETn18

NC119

VSS720

DQ1021

DQ1122

VSS823

DQ1624

DQ1725

VSS926

DQS_N227

DQS_P228

VSS1029

DQ1830

DQ1931

VSS1132

DQ2433

DQ2534

VSS1235

DQS_N336

DQS_P337

VSS1338

DQ2639

DQ2740

VSS1441

CB042

CB143

VSS1544

DQS_N845

DQS_P846

VSS1647

CB248

CB349

VSS1750

VDDQ151

CKE052

VDD153

BA2/A1654

RC055

VDDQ256

A1157

A758

VDD259

A560

VSS34 121

DQ4 122

DQ5 123

VSS35 124

DM0/DQS_P9 125

NC/DQS_N9 126

VSS36 127

DQ6 128

DQ7 129

VSS37 130

DQ12 131

DQ13 132

VSS38 133

DM1/DQS_P10 134

NC/DQS_N10 135

VSS39 136

CK_P1/RFU 137

CK_N1/RFU 138

VSS40 139

DQ14 140

DQ15 141

VSS41 142

DQ20 143

DQ21 144

VSS42 145

DM2/DQS_P11 146

NC/DQS_N11 147

VSS43 148

DQ22 149

DQ23 150

VSS44 151

DQ28 152

DQ29 153

VSS45 154

DM3/DQS_P12 155

NC/DQS_N12 156

VSS46 157

DQ30 158

DQ31 159

VSS47 160

CB4 161

CB5 162

VSS48 163

DM8/DQS_P17 164

NC/DQS_N17 165

VSS49 166

CB6 167

CB7 168

VSS50 169

VDDQ7 170

CKE1 171

VDD5 172

A15 173

A14 174

VDDQ8 175

A12 176

A9 177

VDD6 178

A8 179

A6 180

J8A

DDRII_DIMM

J8A

DDRII_DIMM

C55

0.1uF

C55

0.1uF

A461

VDDQ362

A263

VDD364

VSS1865

VSS1966

VDD467

NC268

VDD569

A10/AP70

BA071

VDDQ472

WEn73

CASn74

VDDQ575

Sn176

ODT177

VDDQ678

VSS2079

DQ3280

DQ3381

VSS2182

DQS_N483

DQS_P484

VSS2285

DQ3486

DQ3587

VSS2388

DQ4089

DQ4190

VSS2491

DQS_N592

DQS_P593

VSS2594

DQ4295

DQ4396

VSS2697

DQ4898

DQ4999

VSS27100

SA2101

NC/TEST102

VSS28103

DQS_N6104

DQS_P6105

VSS29106

DQ50107

DQ51108

VSS30109

DQ56110

DQ57111

VSS31112

DQS_N7113

DQS_P7114

VSS32115

DQ58116

DQ59117

VSS33118

SDA119

SCL120

VDDQ9 181

A3 182

A1 183

VDD7 184

CK_P0 185

CK_N0 186

VDD8 187

A0 188

VDD9 189

BA1 190

VDDQ10 191

RASn 192

Sn0 193

VDDQ11 194

ODT0 195

A13 196

VDD10 197

VSS51 198

DQ36 199

DQ37 200

VSS52 201

DM4/DQS_P13 202

NC/DQS_N13 203

VSS53 204

DQ38 205

DQ39 206

VSS54 207

DQ44 208

DQ45 209

VSS55 210

DM5/DQS_P14 211

NC/DQS_N14 212

VSS56 213

DQ46 214

DQ47 215

VSS57 216

DQ52 217

DQ53 218

VSS58 219

CK_P2/RFU 220

CK_N2/RFU 221

VSS59 222

DM6/DQS_P15 223

NC/DQS_N15 224

VSS60 225

DQ54 226

DQ55 227

VSS61 228

DQ60 229

DQ61 230

VSS62 231

DM7/DQS_P16 232

NC/DQS_N16 233

VSS63 234

DQ62 235

DQ63 236

VSS64 237

VDDSPD 238

SA0 239

SA1 240

KEY

J8B

DDRII_DIMM

KEY

J8B

DDRII_DIMM

R9110.0KR9110.0K

TP1TP1 R8910.0KR8910.0K

TP2TP2

Page 9: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

DIMM_CASn

DIMM_BA[2..0]

DIMM_WEn

DIMM_A[15..0]

DIMM_CSn0

DIMM_CKE1DIMM_CKE0

DIMM_RASn

DIMM_ODT0

DIMM_CSn1

DIMM_ODT1

DIMM_DQ32DIMM_DQ33DIMM_DQ34

DIMM_DQ35DIMM_DQ39

DIMM_DQS4

DIMM_DQ36DIMM_DQ37

DIMM_DQ38DIMM_DM4

DIMM_DQ40DIMM_DQ41

DIMM_DQ42DIMM_DQ44

DIMM_DQ45DIMM_DQS5

DIMM_BA_R0DIMM_BA_R1DIMM_BA_R2DIMM_CKE_R0

DIMM_CKE_R1DIMM_RASn_R

DIMM_BA0DIMM_BA1DIMM_BA2DIMM_CKE0

DIMM_CKE1DIMM_RASn

DIMM_A12DIMM_A13

DIMM_A_R12DIMM_A_R13

DIMM_A0

DIMM_A2DIMM_A1

DIMM_A10

DIMM_A14DIMM_A15

DIMM_A_R0DIMM_A_R1DIMM_A_R2DIMM_A_R10

DIMM_A_R14DIMM_A_R15

DIMM_A3DIMM_A4

DIMM_A_R3DIMM_A_R4

DIMM_A5DIMM_A6

DIMM_A8

DIMM_A7

DIMM_A9DIMM_A11

DIMM_A_R5DIMM_A_R6DIMM_A_R7

DIMM_A_R8

DIMM_A_R9DIMM_A_R11

DIMM_A_R[15..0]

DIMM_CSn_R1

DIMM_ODT_R1

DIMM_RASn_RDIMM_CASn_RDIMM_WEn_R

DIMM_ODT_R0

DIMM_CSn_R0

DIMM_CKE_R0

DIMM_DQ[71..0]

DIMM_CKE_R1

DIMM_BA_R[2..0]

DIMM_DQS[8..0]

DIMM_DM[8..0]

DIMM_WEn

DIMM_CSn1

DIMM_CASnDIMM_CSn0

DIMM_ODT0

DIMM_CSn_R0DIMM_CSn_R1DIMM_ODT_R0DIMM_ODT_R1 DIMM_ODT1

DIMM_CASn_RDIMM_WEn_R

DIMM_DQ22DIMM_DQ23

DIMM_DQS2

DIMM_DQ24DIMM_DQ25

DIMM_DQ26DIMM_DQ27

DIMM_DQ28

DIMM_DM2

DIMM_DM3

DIMM_DQ30DIMM_DQ31

DIMM_DQS3

DIMM_DM0

DIMM_DM1

DIMM_DQ70DIMM_DQ71

DIMM_DQ68DIMM_DQ69DIMM_DQ64DIMM_DQ65DIMM_DM8

DIMM_DQS8

DIMM_DQ0DIMM_DQ1

DIMM_DQ2DIMM_DQ3

DIMM_DQ4DIMM_DQ5

DIMM_DQ6DIMM_DQ7

DIMM_DQS0

DIMM_DQ8DIMM_DQ9

DIMM_DQ10DIMM_DQ11

DIMM_DQ12DIMM_DQ13

DIMM_DQ14DIMM_DQ15

DIMM_DQS1

DIMM_DQ16DIMM_DQ17

DIMM_DQ18DIMM_DQ19

DIMM_DQ20DIMM_DQ21

DIMM_DQ29

DIMM_A11DIMM_A7DIMM_A8DIMM_A6DIMM_A5DIMM_A4DIMM_A3

DIMM_CKE0

DIMM_DQ66DIMM_DQ67

DIMM_A15DIMM_A14DIMM_BA2DIMM_A12

DIMM_A9

DIMM_DQ55

DIMM_DM6

DIMM_DQ54DIMM_DQS6

DIMM_DQ58DIMM_DQS7

DIMM_DQ52DIMM_DQ53

DIMM_DQ71DIMM_DQ64

DIMM_DQ0

DIMM_DQ5DIMM_DQ6

DIMM_DQ1DIMM_DQ3

DIMM_DQ4

DIMM_DQ7

DIMM_DQS0

DIMM_DM1

DIMM_DQ10DIMM_DQ15

DIMM_DQ8DIMM_DQ9

DIMM_DQ11DIMM_DQ13DIMM_DQS1

DIMM_DQ12

DIMM_DQ17DIMM_DQ22

DIMM_DM2DIMM_DQ19

DIMM_DQ21DIMM_DQ23

DIMM_DQ14

DIMM_DQ16

DIMM_DQ30DIMM_DQS3

DIMM_DM3DIMM_DQ20

DIMM_DQ18DIMM_DQS2

DIMM_DQ24

DIMM_DQ29

DIMM_DQ66DIMM_DQS8

DIMM_DQ25

DIMM_DQ27

DIMM_DQ28

DIMM_DQ26

DIMM_DQ31

DIMM_DQ65

DIMM_DM8DIMM_DQ70

DIMM_DQ2

DIMM_DQ67DIMM_DQ68

DIMM_DM0

DIMM_DQ69

DIMM_DQ56

DIMM_DQ57

DIMM_DM7

DIMM_DQ59DIMM_DQ63

DIMM_DQ60

DIMM_DQ61

DIMM_DQ62

DIMM_DQ46

DIMM_DM5

DIMM_DQ43DIMM_DQ47

DIMM_DQ48

DIMM_DQ49

DIMM_DQ50DIMM_DQ51

DIMM_DM5DIMM_DQS5

DIMM_DQ47DIMM_DQ46

DIMM_DQ57

DIMM_DQS7

DIMM_DQS6

DIMM_DQ56

DIMM_DM4

DIMM_DM6

DIMM_DM7

DIMM_DQ52DIMM_DQ53DIMM_DQ48DIMM_DQ49

DIMM_DQ32DIMM_DQ33

DIMM_DQ34DIMM_DQ35

DIMM_CASnDIMM_ODT0

DIMM_A13DIMM_CSn1DIMM_ODT1

DIMM_DQ54DIMM_DQ55

DIMM_WEn

DIMM_DQ50DIMM_DQ51

DIMM_DQ36DIMM_DQ37

DIMM_DQ38DIMM_DQ39

DIMM_DQS4

DIMM_DQ40DIMM_DQ41

DIMM_DQ42

DIMM_DQ60DIMM_DQ61

DIMM_DQ62DIMM_DQ63DIMM_DQ58DIMM_DQ59

DIMM_DQ43

DIMM_DQ45DIMM_DQ44

DIMM_A1DIMM_A2DIMM_A0DIMM_BA1DIMM_A10DIMM_BA0

DIMM_RASnDIMM_CSn0

VTT

VTT

VTT

VTT

VTT

DIMM_CKE1

VTT

VTTVTT VTT

VTT VTT VTT

VTT

VTT

VTT

DIMM_ODT08

DIMM_CKE08

DIMM_CASn8

DIMM_BA[2..0]8

DIMM_CSn08

DIMM_WEn8

DIMM_RASn8

DIMM_CKE18

DIMM_A[15..0]8

DIMM_CSn18

DIMM_ODT18

DIMM_A_R[15..0]7

DIMM_DM[8..0]5,7,8

DIMM_CASn_R7

DIMM_ODT_R07

DIMM_DQ[71..0]5,7,8

DIMM_CSn_R07

DIMM_DQS[8..0]5,7,8

DIMM_BA_R[2..0]7

DIMM_CKE_R17DIMM_CKE_R07

DIMM_WEn_R7

DIMM_RASn_R7

DIMM_CSn_R17

DIMM_ODT_R17

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

9 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

9 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

9 22Thursday, March 24, 2005Copyright (c) 2005, Altera Corporation. All Rights Reserved.

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

Cyclone II-Side Termination Resistors

Cyclone II-Side Termination Resistors

DDR2 SDRAM DIMM TerminationsDIMM-Side Termination Resistors

DIMM Memory Decoupling

The following resistors can beinstalled for Class II Termination:

RN24, RN25, RN26, RN27, RN28,RN29, RN30, RN31, RN32, RN33,RN34, R15, R18

5 12RN13E 56RN13E 56

1234 5

678

CN20 0.1uFCN20 0.1uF

4 13RN21D 10RN21D 10 4 13RN5D 56RN5D 56

8 9RN20H 10RN20H 10

2 15RN34B DNIRN34B DNI

C203

0.01uF

C203

0.01uF

3 14RN33C DNIRN33C DNI

6 11RN25F DNIRN25F DNI

2 15RN14B 56RN14B 56

6 11RN30F DNIRN30F DNI

2 15RN7B 56RN7B 56

1 16RN30A DNIRN30A DNI

4 13RN24D DNIRN24D DNI

7 10RN28G DNIRN28G DNI

5 12RN29E DNIRN29E DNI

3 14RN15C 56RN15C 56

8 9RN17H 56RN17H 56

6 11RN8F 56RN8F 56

8 9RN6H 56RN6H 56

2 15RN8B 56RN8B 56

6 11RN6F 56RN6F 56

7 10RN32G DNIRN32G DNI

8 9RN13H 56RN13H 56

1234 5

678

CN5 0.1uFCN5 0.1uF

8 9RN32H DNIRN32H DNI

4 13RN23D 10RN23D 10

1 16RN5A 56RN5A 56

1 16RN20A 10RN20A 10

C207

0.01uF

C207

0.01uF

C202

0.01uF

C202

0.01uF

5 12RN33E DNIRN33E DNI

3 14RN29C DNIRN29C DNI

1234 5

678

CN17 0.1uFCN17 0.1uF4 13RN14D 56RN14D 56

C224

0.01uF

C224

0.01uF

C192

2.2uF

C192

2.2uF

6 11RN28F DNIRN28F DNI

8 9RN7H 56RN7H 56

1 16RN24A DNIRN24A DNI

C199

0.01uF

C199

0.01uF

5 12RN31E DNIRN31E DNI

1 16RN15A 56RN15A 56

6 11RN17F 56RN17F 56

4 13RN15D 56RN15D 56

C65 0.1uFC65 0.1uF

7 10RN8G 56RN8G 56

2 15RN6B 56RN6B 56

7 10RN13G 56RN13G 56

3 14RN20C 10RN20C 10

6 11RN5F 56RN5F 56

C205

0.01uF

C205

0.01uF

C200

0.01uF

C200

0.01uF

6 11RN33F DNIRN33F DNI

5 12RN27E DNIRN27E DNI

2 15RN22B 10RN22B 10

3 14RN14C 56RN14C 56

1 16RN28A DNIRN28A DNI

7 10RN7G 56RN7G 56

4 13RN33D DNIRN33D DNI

5 12RN28E DNIRN28E DNI

6 11RN9F 56RN9F 56

8 9RN30H DNIRN30H DNI

C209

2.2uF

C209

2.2uF

2 15RN15B 56RN15B 56

1234 5

678

CN2 0.1uFCN2 0.1uF

6 11RN26F DNIRN26F DNI

5 12RN8E 56RN8E 56

1234 5

678

CN21 0.1uFCN21 0.1uF

5 12RN16E 56RN16E 56

3 14RN5C 56RN5C 56

8 9RN31H DNIRN31H DNI

8 9RN27H DNIRN27H DNI

4 13RN22D 10RN22D 10

2 15RN19B 56RN19B 56

2 15RN25B DNIRN25B DNI

1 16RN29A DNIRN29A DNI

6 11RN22F 10RN22F 106 11RN12F 56RN12F 56

1 16RN19A 56RN19A 56

2 15RN9B 56RN9B 56

8 9RN28H DNIRN28H DNI

5 12RN18E 56RN18E 56

1234 5

678

CN10 0.1uFCN10 0.1uF

1 16RN34A DNIRN34A DNI

6 11RN10F 56RN10F 56

1234 5

678

CN24 0.1uFCN24 0.1uF

4 13RN16D 56RN16D 56

6 11RN11F 56RN11F 56

2 15RN11B 56RN11B 56

5 12RN24E DNIRN24E DNI

6 11RN31F DNIRN31F DNI

5 12RN22E 10RN22E 105 12RN12E 56RN12E 56

5 12RN19E 56RN19E 56

8 9RN9H 56RN9H 56

C307

0.01uF

C307

0.01uF

7 10RN23G 10RN23G 10

8 9RN18H 56RN18H 56

4 13RN10D 56RN10D 56

8 9RN16H 56RN16H 56

C193

0.01uF

C193

0.01uF

7 10RN16G 56RN16G 56

8 9RN11H 56RN11H 56

2 15RN28B DNIRN28B DNI

1 16RN27A DNIRN27A DNI

8 9RN29H DNIRN29H DNI

8 9RN12H 56RN12H 56

1234 5

678

CN9 0.1uFCN9 0.1uF

3 14RN19C 56RN19C 56

7 10RN9G 56RN9G 56

C304

0.01uF

C304

0.01uF2 15RN21B 10RN21B 10

C196

0.01uF

C196

0.01uF

7 10RN18G 56RN18G 568 9RN10H 56RN10H 56

7 10RN20G 10RN20G 10

4 13RN20D 10RN20D 10

4 13RN34D DNIRN34D DNI

6 11RN32F DNIRN32F DNI

4 13RN29D DNIRN29D DNI

6 11RN14F 56RN14F 56

7 10RN11G 56RN11G 56

7 10RN30G DNIRN30G DNI

R15 DNIR15 DNI

2 15RN27B DNIRN27B DNI

7 10RN29G DNIRN29G DNI

7 10RN12G 56RN12G 56

4 13RN17D 56RN17D 56

1234 5

678

CN12 0.1uFCN12 0.1uF7 10RN6G 56RN6G 56

C282

0.01uF

C282

0.01uF

4 13RN32D DNIRN32D DNI

1 16RN22A 10RN22A 10

C194

0.01uF

C194

0.01uF

3 14RN18C 56RN18C 56

1234 5

678

CN22 0.1uFCN22 0.1uF

8 9RN21H 10RN21H 10

7 10RN10G 56RN10G 56

4 13RN13D 56RN13D 56

1234 5

678

CN14 0.1uFCN14 0.1uF

3 14RN21C 10RN21C 10

5 12RN5E 56RN5E 56

5 12RN20E 10RN20E 10

1 16RN32A DNIRN32A DNI

7 10RN31G DNIRN31G DNI

4 13RN25D DNIRN25D DNI

5 12RN14E 56RN14E 56

5 12RN7E 56RN7E 56

5 12RN30E DNIRN30E DNI

6 11RN24F DNIRN24F DNI

2 15RN31B DNIRN31B DNI

7 10RN15G 56RN15G 56

1234 5

678

CN18 0.1uFCN18 0.1uF

3 14RN26C DNIRN26C DNI

1 16RN17A 56RN17A 56

5 12RN6E 56RN6E 56

2 15RN32B DNIRN32B DNI

1 16RN21A 10RN21A 10

1 16RN13A 56RN13A 56

5 12RN21E 10RN21E 10

2 15RN5B 56RN5B 56

6 11RN20F 10RN20F 10

C271

0.01uF

C271

0.01uF

6 11RN34F DNIRN34F DNI

C204

0.01uF

C204

0.01uF

2 15RN33B DNIRN33B DNI

5 12RN25E DNIRN25E DNI

8 9RN14H 56RN14H 56

1234 5

678

CN16 0.1uFCN16 0.1uF

4 13RN28D DNIRN28D DNI

1 16RN7A 56RN7A 56

8 9RN26H DNIRN26H DNI

3 14RN32C DNIRN32C DNI

2 15RN24B DNIRN24B DNI

1 16RN31A DNIRN31A DNI

5 12RN15E 56RN15E 56

3 14RN17C 56RN17C 56

4 13RN8D 56RN8D 56

1 16RN6A 56RN6A 56

8 9RN15H 56RN15H 56

1234 5

678

CN25 0.1uFCN25 0.1uF

2 15RN17B 56RN17B 56

1 16RN8A 56RN8A 56

3 14RN6C 56RN6C 56

1234 5

678

CN1 0.1uFCN1 0.1uF

6 11RN13F 56RN13F 56

1234 5

678

CN23 0.1uFCN23 0.1uF

3 14RN13C 56RN13C 56

1234 5

678

CN13 0.1uFCN13 0.1uF7 10RN21G 10RN21G 10

8 9RN5H 56RN5H 56

C206

0.01uF

C206

0.01uF

C198

0.01uF

C198

0.01uF

7 10RN33G DNIRN33G DNI

8 9RN25H DNIRN25H DNI

7 10RN14G 56RN14G 56

1234 5

678

CN6 0.1uFCN6 0.1uF

3 14RN28C DNIRN28C DNI

4 13RN7D 56RN7D 56

8 9RN24H DNIRN24H DNI

3 14RN31C DNIRN31C DNI

1 16RN33A DNIRN33A DNI

6 11RN15F 56RN15F 56

8 9RN8H 56RN8H 56

2 15RN13B 56RN13B 56

7 10RN5G 56RN5G 56

8 9RN33H DNIRN33H DNI

3 14RN27C DNIRN27C DNI

7 10RN22G 10RN22G 10

1234 5

678

CN15 0.1uFCN15 0.1uF

6 11RN19F 56RN19F 56

2 15RN26B DNIRN26B DNI

3 14RN7C 56RN7C 56

4 13RN19D 56RN19D 56

4 13RN26D DNIRN26D DNI

5 12RN9E 56RN9E 56

C260

0.01uF

C260

0.01uF

1 16RN26A DNIRN26A DNI

6 11RN18F 56RN18F 56

4 13RN30D DNIRN30D DNI

3 14RN8C 56RN8C 56

R18 DNIR18 DNI

2 15RN16B 56RN16B 56

4 13RN11D 56RN11D 56

1 16RN25A DNIRN25A DNI

6 11RN27F DNIRN27F DNI

3 14RN22C 10RN22C 10

3 14RN24C DNIRN24C DNI

4 13RN27D DNIRN27D DNI

1234 5

678

CN26 0.1uFCN26 0.1uF

1 16RN23A 10RN23A 10

2 15RN12B 56RN12B 56

7 10RN26G DNIRN26G DNI

1234 5

678

CN8 0.1uFCN8 0.1uF

8 9RN19H 56RN19H 56

1 16RN9A 56RN9A 56

C354

0.01uF

C354

0.01uF

C294

0.01uF

C294

0.01uF

6 11RN23F 10RN23F 10

2 15RN18B 56RN18B 56 1 16RN10A 56RN10A 56

1 16RN16A 56RN16A 56

1 16RN11A 56RN11A 56

6 11RN16F 56RN16F 56

1234 5

678

CN19 0.1uFCN19 0.1uF

5 12RN11E 56RN11E 56

7 10RN25G DNIRN25G DNI

2 15RN29B DNIRN29B DNI

5 12RN23E 10RN23E 10

1 16RN12A 56RN12A 56

7 10RN19G 56RN19G 56

4 13RN9D 56RN9D 56

C318

0.01uF

C318

0.01uF

C324

0.01uF

C324

0.01uF

8 9RN23H 10RN23H 10

C254

2.2uF

C254

2.2uF

C197

0.01uF

C197

0.01uF

1 16RN18A 56RN18A 56 2 15RN10B 56RN10B 56

3 14RN30C DNIRN30C DNI

3 14RN16C 56RN16C 56

1234 5

678

CN4 0.1uFCN4 0.1uF

3 14RN11C 56RN11C 56

5 12RN32E DNIRN32E DNI

3 14RN25C DNIRN25C DNI

4 13RN31D DNIRN31D DNI

4 13RN12D 56RN12D 56

1234 5

678

CN11 0.1uFCN11 0.1uF

7 10RN17G 56RN17G 56

3 14RN9C 56RN9C 56

5 12RN34E DNIRN34E DNI

2 15RN23B 10RN23B 10

C195

0.01uF

C195

0.01uF

4 13RN18D 56RN18D 56

1234 5

678

CN7 0.1uFCN7 0.1uF

5 12RN10E 56RN10E 56

2 15RN20B 10RN20B 10

8 9RN34H DNIRN34H DNI

6 11RN21F 10RN21F 10

3 14RN10C 56RN10C 56

3 14RN23C 10RN23C 10

C362

2.2uF

C362

2.2uF

7 10RN34G DNIRN34G DNI

7 10RN27G DNIRN27G DNI

1234 5

678

CN3 0.1uFCN3 0.1uF

1 16RN14A 56RN14A 56

6 11RN7F 56RN7F 56

2 15RN30B DNIRN30B DNI

7 10RN24G DNIRN24G DNI

6 11RN29F DNIRN29F DNI

3 14RN12C 56RN12C 56

5 12RN17E 56RN17E 56

4 13RN6D 56RN6D 56

3 14RN34C DNIRN34C DNI

5 12RN26E DNIRN26E DNI

8 9RN22H 10RN22H 10

C272

0.01uF

C272

0.01uF

Page 10: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

EP2C_DCLK

EPCS_SAFE_CSnEP2C_DATA0

EP2C_DCLKEP2C_DATA0EP2C_CSOnEP2C_ASDO

JTAG_TCKJTAG_TMSJTAG_CONN_TDOJTAG_CONN_TDI

EP2C_CSOnEPCS_SAFE_CSn

EPCS_USER_CSn

EPCS_USER_CSn

EPCS_USER_CSnEPCS_SAFE_CSn

JTAG_TCKJTAG_CONN_TDIJTAG_TMS

JTAG_CONN_TDO

EP2C_CEnEP2C_CSOn

EP2C_ASDOEP2C_DATA0EP2C_B_CONFIGnEP2C_CONFIG_DONEEP2C_DCLK

EP2C_CEN

EP2C_CONFIG_DONEEP2C_CONFIGn

EP2C_CONFIGnEP2C_CONFIG_DONEEP2C_STATUSn

EP2C_STATUSn

EP2C_B_CONFIGn

EP2C_B_CONFIGn

SYS_RESETn

EP2C_MSEL0EP2C_MSEL1

EP2C_CEnEP2C_MSEL1EP2C_MSEL0

EP2C_ASDO

EP2C_DCLKEP2C_DATA0

EP2C_ASDO

EP2C_CONFIG_DONE

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V

3.3V

EPCS_USER_CSn6

EVM_CEn3 18

ADC_A_D011

USER_LED117

JTAG_TMS19JTAG_TCK19

JTAG_CONN_TDO19JTAG_CONN_TDI19

SYS_RESETn 17

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

10 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

10 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

10 22Thursday, March 24, 2005

CONFIGURATION CIRCUITRY

Copyright (c) 2005, Altera Corporation. All Rights Reserved.

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

EPCS SELECT

SAFE EPCS

USER EPCS

SURFACE MOUNT ACTIVE SERIAL HEADER

RIGHT ANGLE JTAG HEADER

R33 IS NOT INSTALLED

R921KR921K

R107 10.0KR107 10.0KR157 10.0KR157 10.0K

R881KR881K

2468

10

13579

J9

39-26-7108

J9

39-26-7108

R165 10.0KR165 10.0K

3

2

1U35

BAW56TA

U35

BAW56TA

R133 10.0KR133 10.0K

123

J29

TSW-103-07-L-S

J29

TSW-103-07-L-S

R104 1KR104 1KR131 DNIR131 DNI

R110 10.0KR110 10.0K

R1321KR1321K

DCLK16

DATA8

ASDI15nCS7

VCC1 1

GND 10

VCC3 9VCC2 2

NC13

NC24

NC35

NC46 NC5 11NC6 12NC7 13NC8 14

U36

EPCS64

U36

EPCS64

nCONFIG N7CONF_DONE R23

nSTATUS R22

DATA0 N3

nCEN4

CLKUSR B3

TCKM6

TDIM8

TDOM7

TMSL8

MSEL0P20

MSEL1P21

ASDO E3

INIT_DONEAE25

nCSO D3

DCLK N6

nCEO AE24

DEV_CLRn C5

CYCLONE II, CONFIGU12I

EP2C35_672FBGA

CYCLONE II, CONFIGU12I

EP2C35_672FBGA

11

33

55

77

2 2

4 4

6 6

8 8

99 10 10

J13

HDR2X5

J13

HDR2X5

R57 332R57 332

C409

100pF

C409

100pFR821KR821K

DCLK16

DATA8

ASDI15nCS7

VCC1 1

GND 10

VCC3 9VCC2 2

NC13

NC24

NC35

NC46 NC5 11NC6 12NC7 13NC8 14

U17

EPCS64

U17

EPCS64

AC

D10GREEN LEDD10GREEN LED

R273 100R273 100

Page 11: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

ADC_SCLKADC_SDATAADC_A_SEN

ADC_A_R_D3ADC_A_R_D2ADC_A_R_D1ADC_A_R_D0ADC_A_DCLK

ADC_A_OEADC_A_DFS

ADC_RESET

AD

C_A

_R_D

4A

DC

_A_R

_D5

AD

C_A

_R_D

6A

DC

_A_R

_D7

AD

C_A

_R_D

8A

DC

_A_R

_D9

AD

C_A

_R_D

10A

DC

_A_R

_D11

AD

C_A

_R_D

12A

DC

_A_R

_D13

ADC_A_OVR

ADC_A_INPADC_A_INM ADC_A_IREF

ADC_A_REFMADC_A_REFP

ADC_A_REFP

ADC_A_IREFADC_A_REFM

ADC_A_DFS

ADC_A_D1ADC_A_D0

ADC_A_INM

ADC_A_INP

ADC_A_IN

ADC_A_CM

ADC_A_CLK_P

ADC_A_CLK_N

ADC_A_D12 ADC_A_R_D12

ADC_A_D8

ADC_A_D10ADC_A_D11

ADC_A_D9ADC_A_R_D8

ADC_A_R_D10ADC_A_R_D9

ADC_A_R_D11

ADC_A_D4

ADC_A_D6ADC_A_D7

ADC_A_D5ADC_A_R_D4

ADC_A_R_D6ADC_A_R_D5

ADC_A_R_D7

ADC_A_R_D13

ADC_A_D0

ADC_A_D2ADC_A_D3

ADC_A_D1

ADC_A_D13

ADC_A_R_D0

ADC_A_R_D2ADC_A_R_D1

ADC_A_R_D3

ADC_A_CM

ADC ADC

ADC

ADC ADC

ADC

3.3V

VCCA_ADC

VCCA_ADC

VCCA_ADC

3.3V

3.3VVCCA_ADC

ADC

3.3V

ADC_A_D[13..0] 3,5,10

ADC_SCLK 6,12ADC_SDATA 4,12ADC_A_SEN 5

ADC_A_CLK_N 3

ADC_A_OE 4

ADC_A_DCLK 3

ADC_RESET 6,12

ADC_A_CLK_P 3

ADC_A_OVR 5

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

11 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

11 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

11 22Thursday, March 24, 2005

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

Copyright (c) 2005, Altera Corporation. All Rights Reserved.

ADC Channel A

ADC A DECOUPLING CAPS

ADC CHANNEL A

ANALOG POWER CLKBUFDIGITAL POWER

Do Not Install

ADC CHANNEL A

J30 Position Data Output Format

Pin 1-2Pin 3-4Pin 5-6Pin 7-8

2's Complement data valid falling edge

2's Complement data valid rising edgeStraight Binary data valid falling edge

Straight Binary data valid rising edge

R1681.0KR1681.0K

4 13RN35D 33RN35D 33

C136

0.01uF

C136

0.01uF

C145

0.1uF

C145

0.1uF

C166

0.01uF

C166

0.01uF

1 16RN35A 33RN35A 33

R33 1R33 1

1

2345

J32LTI-SASF54GT

J32LTI-SASF54GT

C114

0.1uF

C114

0.1uF

R202 10.0KR202 10.0K

8 9RN36H 33RN36H 33

C124 0.1uFC124 0.1uF

C116

0.1uF

C116

0.1uF

C380

0.1uF

C380

0.1uF

5 12RN36E 33RN36E 33

C129

0.1uF

C129

0.1uF

11

33

55

77

2 2

4 4

6 6

8 8

J30

HDR2X4

J30

HDR2X4

C146

10uF (6.3V)

C146

10uF (6.3V)

C118

0.1uF

C118

0.1uF

6 11RN36F 33RN36F 33

2 15RN36B 33RN36B 33

C140

0.1uF

C140

0.1uF

R3824.9R3824.9

R4124.9R4124.9

R1661.0KR1661.0K

R201 10.0KR201 10.0K

8 9RN35H 33RN35H 33

C139 0.01uFC139 0.01uF

C109

0.001uF

C109

0.001uF

5 12RN35E 33RN35E 33

R200

DNI

R200

DNI

C142

0.1uF

C142

0.1uF

4 3

6 1

2

P ST2

TC4-1W

P ST2

TC4-1W

R30 56KR30 56K

6 11RN35F 33RN35F 33

R271 1R271 1

C113

0.1uF

C113

0.1uF

43

61

2

PS

T3

TC4-1W

PS

T3

TC4-1W

C144 0.01uFC144 0.01uF

2 15RN35B 33RN35B 33

7 10RN36G 33RN36G 33

C125 0.1uFC125 0.1uFR34 1R34 1

C115

0.1uF

C115

0.1uF

R37 1R37 1

DRGND1

SCLK2

SDATA3

SEN4

AVDD5

AGND6

AVDD7

AGND8

AVDD9

CLKP10

CLKM11

AGND12

AGND13

AGND14

AVDD15

AGND16

CM

17

AG

ND

18

INP

19

INM

20

AG

ND

21

AV

DD

22

AG

ND

23

AV

DD

24

AG

ND

25

AV

DD

26

AG

ND

27

AV

DD

28

RE

FP29

RE

FM30

IRE

F31

AG

ND

32

AVDD 33AVDD 34

RESET 35AGND 36AVDD 37AGND 38AVDD 39

DFS 40OE 41

DRGND 42CLKOUT 43

D0 44D1 45D2 46D3 47

DRGND 48

DR

VD

D49

DR

GN

D50

D4

51D

552

D6

53D

754

D8

55D

956

DR

GN

D57

DR

VD

D58

DR

GN

D59

D10

60D

1161

D12

62D

1363

OV

R64

PA

D_G

ND

65U26

ADS5520

U26

ADS5520

3 14RN36C 33RN36C 33

C117

10uF (6.3V)

C117

10uF (6.3V)

C377

0.1uF

C377

0.1uF

C381

0.1uF

C381

0.1uF

4 13RN36D 33RN36D 33

C378

0.1uF

C378

0.1uF

1 16RN36A 33RN36A 33

C384

0.1uF

C384

0.1uF

R40 1R40 1

C135

10pF

C135

10pF

C143 0.01uFC143 0.01uF

R1671.0KR1671.0K

7 10RN35G 33RN35G 33

3 14RN35C 33RN35C 33

C141

0.1uF

C141

0.1uF

Page 12: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

ADC_B_INM

ADC_B_INP

ADC_B_IN

ADC_B_CM

ADC_B_REFPADC_B_REFMADC_B_IREF

ADC_B_REFP

ADC_B_IREFADC_B_REFM

ADC_B_D1ADC_B_D0

ADC_B_DFS

AD

C_B

_R_D

13

AD

C_B

_R_D

6

ADC_RESET

ADC_B_R_D3

AD

C_B

_R_D

7

ADC_B_R_D2

ADC_B_OVR

AD

C_B

_R_D

8

ADC_SCLK

ADC_B_R_D1

AD

C_B

_R_D

9

ADC_B_R_D0

AD

C_B

_R_D

4

ADC_SDATA

AD

C_B

_R_D

10

ADC_B_DCLK

ADC_B_SEN

AD

C_B

_R_D

11

AD

C_B

_R_D

5

ADC_B_OE

AD

C_B

_R_D

12

ADC_B_INPADC_B_INM

ADC_B_DFS

ADC_B_CLK_P

ADC_B_CLK_N

ADC_B_D13ADC_B_D12 ADC_B_R_D12

ADC_B_R_D13

ADC_B_R_D8

ADC_B_R_D10ADC_B_R_D9

ADC_B_R_D11

ADC_B_R_D4

ADC_B_R_D6ADC_B_R_D5

ADC_B_R_D7

ADC_B_R_D0

ADC_B_R_D2ADC_B_R_D1

ADC_B_R_D3

ADC_B_D8

ADC_B_D10ADC_B_D11

ADC_B_D9

ADC_B_D4

ADC_B_D6ADC_B_D7

ADC_B_D5

ADC_B_D0

ADC_B_D2ADC_B_D3

ADC_B_D1

ADC_B_CM

ADC

ADC ADC

ADC

ADC

ADC

VCCA_ADC

VCCA_ADC3.3V

VCCA_ADC

VCCA_ADC

3.3V

3.3V 3.3V

ADC

ADC_RESET 6,11

ADC_B_OE 4

ADC_B_DCLK 3ADC_B_D[13..0] 5

ADC_B_CLK_N 3ADC_B_CLK_P 3

ADC_B_SEN 5

ADC_SCLK 6,11ADC_SDATA 4,11

ADC_B_OVR 5

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

12 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

12 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

12 22Thursday, March 24, 2005

ADC Channel B

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

Copyright (c) 2005, Altera Corporation. All Rights Reserved.

Do Not Install

ADC CHANNEL B

ANALOG POWER

ADC B DECOUPLING CAPS

CLKBUFDIGITAL POWER

ADC CHANNEL B

J38 Position Data Output Format

Pin 1-2Pin 3-4Pin 5-6Pin 7-8

2's Complement data valid falling edge

2's Complement data valid rising edgeStraight Binary data valid falling edge

Straight Binary data valid rising edge

R55DNIR55DNI

R53DNIR53DNI

C152

0.1uF

C152

0.1uF

C157 0.1uFC157 0.1uF

1 16RN40A 33RN40A 33

7 10RN37G 33RN37G 33

3 14RN40C 33RN40C 33

C153

0.1uF

C153

0.1uF

C151

0.1uF

C151

0.1uF

8 9RN37H 33RN37H 33

DRGND1

SCLK2

SDATA3

SEN4

AVDD5

AGND6

AVDD7

AGND8

AVDD9

CLKP10

CLKM11

AGND12

AGND13

AGND14

AVDD15

AGND16

CM

17

AG

ND

18

INP

19

INM

20

AG

ND

21

AV

DD

22

AG

ND

23

AV

DD

24

AG

ND

25

AV

DD

26

AG

ND

27

AV

DD

28

RE

FP29

RE

FM30

IRE

F31

AG

ND

32

AVDD 33AVDD 34

RESET 35AGND 36AVDD 37AGND 38AVDD 39

DFS 40OE 41

DRGND 42CLKOUT 43

D0 44D1 45D2 46D3 47

DRGND 48

DR

VD

D49

DR

GN

D50

D4

51D

552

D6

53D

754

D8

55D

956

DR

GN

D57

DR

VD

D58

DR

GN

D59

D10

60D

1161

D12

62D

1363

OV

R64

PA

D_G

ND

65U31

DNI

U31

DNI

C150

0.1uF

C150

0.1uF

R58 10.0KR58 10.0K

C406

0.1uF

C406

0.1uF

4 13RN37D 33RN37D 33

R2421.0KR2421.0K

C394

0.1uF

C394

0.1uF

R2431.0KR2431.0K

R2441.0KR2441.0K

R51 1R51 1

1 16RN37A 33RN37A 33

C170 DNIC170 DNI

R52 DNIR52 DNI

C173

10uF (6.3V)

C173

10uF (6.3V)

8 9RN40H 33RN40H 33

C161

0.001uF

C161

0.001uF

C171 DNIC171 DNI

C403

0.1uF

C403

0.1uF

43

61

2PS

T6

DNI

PS

T6

DNI

5 12RN40E 33RN40E 33

R56 10.0KR56 10.0K

C386

0.01uF

C386

0.01uF

C402

0.1uF

C402

0.1uF

C160 0.1uFC160 0.1uF

6 11RN40F 33RN40F 33

2 15RN40B 33RN40B 33

C396

0.1uF

C396

0.1uF

R49 56KR49 56K

R254

DNI

R254

DNI

3 14RN37C 33RN37C 33

C167

0.1uF

C167

0.1uF

5 12RN37E 33RN37E 33

11

33

55

77

2 2

4 4

6 6

8 8

J38

DNI

J38

DNI

C162

DNI

C162

DNI

C155

10uF (6.3V)

C155

10uF (6.3V)

C168

0.1uF

C168

0.1uF

C165 DNIC165 DNI

6 11RN37F 33RN37F 33

C159

0.1uF

C159

0.1uF

R50 1R50 1

2 15RN37B 33RN37B 33

4 3

6 1

2

P ST5

DNI

P ST5

DNI

C163

DNI

C163

DNI

C149

0.1uF

C149

0.1uF

7 10RN40G 33RN40G 33

C169

0.1uF

C169

0.1uF

1

2345

J44DNI

J44DNI

C172

0.1uF

C172

0.1uF

R54 DNIR54 DNI

4 13RN40D 33RN40D 33

R272 1R272 1

Page 13: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

R_DAC_A_D12R_DAC_A_D11R_DAC_A_D10R_DAC_A_D9R_DAC_A_D8R_DAC_A_D7R_DAC_A_D6R_DAC_A_D5R_DAC_A_D4R_DAC_A_D3R_DAC_A_D2R_DAC_A_D1R_DAC_A_D0

DACA_CLK

DAC_A_IOUTpDAC_A_IOUTn

DAC_A_IOUTn

R_DAC_A_D13DAC_A_D13DAC_A_D12DAC_A_D11DAC_A_D10

DAC_A_D8DAC_A_D7DAC_A_D6

DAC_A_D4DAC_A_D3DAC_A_D2

DAC_A_D5

DAC_A_D0DAC_A_D1

DAC_A_D[13..0]

DACA_CLK

DAC_A_OUT

VCCA_DAC

DAC_A_D9

DAC

DAC

DAC

DAC

3.3V

VCCA_DAC

DAC

DAC_A_D[13..0]4

DACA_CLK3

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

13 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

13 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

13 22Thursday, March 24, 2005

DAC CHANNEL A

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

Copyright (c) 2005, Altera Corporation. All Rights Reserved.

PLACE NEXT TO CYCLONE II

3 14RN2C 33RN2C 33

C137

0.001uF

C137

0.001uF

C376

10uF (6.3V)

C376

10uF (6.3V)

3 14RN1C 33RN1C 33

4 13RN2D 33RN2D 33

1 16RN2A 33RN2A 33

1 4

2

3 6

5NC

P S

T1

ADT1-1WT

NC

P S

T1

ADT1-1WT

4 13RN1D 33RN1D 33

C389

1uF

C389

1uF

2 15RN2B 33RN2B 33

C375

0.1uF

C375

0.1uF

1 16RN1A 33RN1A 33

C405

0.01uF

C405

0.01uF

2 15RN1B 33RN1B 33

C383

0.1uF

C383

0.1uF

TP4TP4

C130

0.1uF

C130

0.1uF

7 10RN2G 33RN2G 33

7 10RN1G 33RN1G 33

C382

10uF (6.3V)

C382

10uF (6.3V)

R252.0KR252.0K

8 9RN2H 33RN2H 33

1 2

L25Ferrite Bead 33ohm

L25Ferrite Bead 33ohm

5 12RN2E 33RN2E 33

8 9RN1H 33RN1H 33

1

2 3 4 5

J31LTI-SASF54GT

J31LTI-SASF54GT

6 11RN2F 33RN2F 33

C388

1uF

C388

1uF

5 12RN1E 33RN1E 33

R3549.9R3549.9

6 11RN1F 33RN1F 33

D131

D122

D113

D104

D95

D86

D77

D68

D59

D410

D311

D212

D113

D014

PD 15

INTn_EXT 16REF_IN 17

FSA 18

BW 19

AGND 20

IOUTn 21IOUT 22

BYP 23

+VA 24

NC25

DGND26

+VD 27

CLK 28

U25

DAC904

U25

DAC904

C119

0.1uF

C119

0.1uF C126

DNI

C126

DNI

C123

0.1uF

C123

0.1uF

C385

0.1uF

C385

0.1uF

R3149.9R3149.9

C379

0.01uF

C379

0.01uF

Page 14: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

DAC_B_D[13..0]

DACB_CLK

DAC_B_D12DAC_B_D11DAC_B_D10

DAC_B_D8DAC_B_D7DAC_B_D6

DAC_B_D9

DAC_B_D4DAC_B_D3DAC_B_D2

DAC_B_D5

R_DAC_B_D13R_DAC_B_D12R_DAC_B_D11R_DAC_B_D10R_DAC_B_D9R_DAC_B_D8R_DAC_B_D7R_DAC_B_D6R_DAC_B_D5R_DAC_B_D4R_DAC_B_D3R_DAC_B_D2R_DAC_B_D1R_DAC_B_D0

DAC_B_D0DAC_B_D1

DACB_CLK

DAC_B_OUTpDAC_B_OUTDAC_B_IOUTn

DAC_B_IOUTn

DAC_B_D13

VCCA_DAC

DAC

DAC

DAC

DAC

3.3V

VCCA_DAC

DAC

DACB_CLK3

DAC_B_D[13..0]3,4,6

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

14 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

14 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

14 22Thursday, March 24, 2005

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

DAC CHANNEL B

Copyright (c) 2005, Altera Corporation. All Rights Reserved.

PLACE NEXT TO CYCLONE II

R47DNIR47DNI

C102

0.01uF

C102

0.01uF

3 14RN4C 33RN4C 33

C158

DNI

C158

DNI

C404

DNI

C404

DNI

4 13RN4D 33RN4D 33

1 4

2

3 6

5NC

P S

T4

DNI

NC

P S

T4

DNI

1 16RN4A 33RN4A 332 15RN4B 33RN4B 33

C164

0.001uF

C164

0.001uF

TP3TP3

1

2 3 4 5

J43DNI

J43DNI

C393

DNI

C393

DNI

7 10RN3G 33RN3G 33

3 14RN3C 33RN3C 33

C401

DNI

C401

DNI

4 13RN3D 33RN3D 33

C407

DNI

C407

DNI

1 16RN3A 33RN3A 33

7 10RN4G 33RN4G 33

C395

DNI

C395

DNI

R48DNIR48DNI

D131

D122

D113

D104

D95

D86

D77

D68

D59

D410

D311

D212

D113

D014

PD 15

INTn_EXT 16REF_IN 17

FSA 18

BW 19

AGND 20

IOUTn 21IOUT 22

BYP 23

+VA 24

NC25

DGND26

+VD 27

CLK 28

U30

DNI

U30

DNI

8 9RN4H 33RN4H 33

C392

10uF (6.3V)

C392

10uF (6.3V)

R46DNIR46DNI

5 12RN4E 33RN4E 336 11RN4F 33RN4F 33

C408

1uF

C408

1uF

C154

DNI

C154

DNI

C147

DNI

C147

DNI

8 9RN3H 33RN3H 33

5 12RN3E 33RN3E 33

1 2

L26DNI

L26DNI

C156

DNI

C156

DNI

6 11RN3F 33RN3F 33

C391

0.1uF

C391

0.1uF

2 15RN3B 33RN3B 33

Page 15: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

VGA_SYNCn

VGA_HSYNC

VGA_VSYNC

VGA_RED

VGA_BLUE

VGA_GREEN

VGA_CLK

VGA_BLANKn

VGA_B[7..0]

VGA_R[7..0]

VGA_G[7..0]VGA_B0VGA_B1VGA_B2VGA_B3VGA_B4VGA_B5VGA_B6VGA_B7

VGA_R0VGA_R1VGA_R2VGA_R3VGA_R4VGA_R5VGA_R6VGA_R7

VGA_G2VGA_G1VGA_G0

VGA_G7VGA_G6VGA_G5VGA_G4VGA_G3

VGA_BLUEVGA_GREENVGA_RED

3.3V

3.3V

3.3V

3.3V

VGA_B[7..0]4

VGA_R[7..0]4,6

VGA_G[7..0]4VGA_CLK 4VGA_SYNCn 4VGA_BLANKn 4

VGA_HSYNC6

VGA_VSYNC3

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

15 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

15 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

15 22Thursday, March 24, 2005Copyright (c) 2005, Altera Corporation. All Rights Reserved.

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

VIDEO DAC

Transient Supression

R143 33.2R143 33.2

C372

0.1uF

C372

0.1uF

C364

0.1uF

C364

0.1uF

AC23

C1

2A

11

U39MMBD2004S

U39MMBD2004S

C363

0.1uF

C363

0.1uF

C371

0.1uF

C371

0.1uF

2

3

4

5

6

7

8

9

10

11

12

13

14

15

1

1716

GND

GND

J21

DB15FRA

GND

GND

J21

DB15FRA

C365

0.1uF

C365

0.1uF

AC23

C1

5

AC1 6

A2

2C

24

A1

1

U37MMBD3004BRM-7

U37MMBD3004BRM-7

C83

2.2uF

C83

2.2uF

R15675.0R15675.0

R135 33.2R135 33.2

R155 332R155 332

C368

0.1uF

C368

0.1uF

R15918R15918

R15175.0R15175.0

C367

0.01uF

C367

0.01uF

C86

10uF (6.3V)

C86

10uF (6.3V)

AC23

C1

5

AC1 6

A2

2C

24

A1

1

U38MMBD3004BRM-7

U38MMBD3004BRM-7

R14733.2R14733.2

R14475.0R14475.0

C374

0.1uF

C374

0.1uF

GND 1

G02

G13

G24

G35

G46

G57

G68

G79

BLANKn 10SYNCn 11

VDDD 12

NC_13 13

GND 14

GND 15

B016

B117

B218

B319

B420

B521

B622

B723

NC_24 24

NC_25 25

CLK 26

GND 27

GND 28

IOB29

VDDA 30

VDDA 31

IOG32

IOR33

COMP 34

VREF 35

RREF 36

NC_37 37

GND 38

GND 39

R040

R141

R242

R343

R444

R545

R646

R747

GND 48

U21

FMS3818

U21

FMS3818

Page 16: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

RALINEOUT

LLINEOUT

RLINEOUT

LALINEOUT

RLINEIN

LLINEIN

3.3V_AUDIO

AUDIO_SDINAUDIO_SCLKAUDIO_MODE

3.3V

3.3V

3.3V

AUDIO_CSn 6AUDIO_SDIN 4AUDIO_SCLK 4AUDIO_MODE 4

AUDIO_DIN 6

AUDIO_LRCOUT 4AUDIO_LRCIN 4

AUDIO_BCLK 4

AUDIO_CLK 4

AUDIO_DOUT 3

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

16 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

16 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

16 22Thursday, March 24, 2005Copyright (c) 2005, Altera Corporation. All Rights Reserved.

AIC23 AUDIO CODEC

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

Line Out

Amplified Line Out

Line In

R11647.5KR11647.5K

C66 220uFC66 220uF

C73 220uFC73 220uF

1 2L23BLM21P221SN

L23BLM21P221SN

1

32

45

J16

SJ_3515N

J16

SJ_3515N

1 2L24BLM21P221SN

L24BLM21P221SN

C59

0.001uF

C59

0.001uF

C58

0.1uF

C58

0.1uF

R12 4.7KR12 4.7K

R934.7KR934.7K

1 2L21BLM21P221SN

L21BLM21P221SN

C48

0.1uF

C48

0.1uF

C220

0.1uF

C220

0.1uF

1

32

45

J10

SJ_3515N

J10

SJ_3515N

C57

10uF (6.3V)

C57

10uF (6.3V)1 2L22BLM21P221SN

L22BLM21P221SN

R94 4.7KR94 4.7K1 2L19BLM21P221SN

L19BLM21P221SN

C218 0.47uFC218 0.47uF

R113 100R113 100

BVDD 1

CLKOUT 2

BCLK 3

DIN 4

LRCIN 5

DOUT 6

LRCOUT 7

HPVDD 8

LHPOUT9

RHPOUT10

HPGND 11

LOUT12

ROUT13

AVDD 14

AGND 15

VMID 16

MICBIAS17

MICIN18

RLINEIN19

LLINEIN20

CS_n 21

MODE 22

SDIN 23

SCLK 24

XTI.MCLK 25XTO 26

DVDD 27

DGND 28

U11

AIC23

U11

AIC23

R13 4.7KR13 4.7K

1 2L20BLM21P221SN

L20BLM21P221SN

R11747.5KR11747.5K

C52

0.001uF

C52

0.001uF

R99 4.7KR99 4.7K

R14 4.7KR14 4.7K

R108 100R108 100

C49

10uF (6.3V)

C49

10uF (6.3V)

R1034.7KR1034.7K

C227 0.47uFC227 0.47uF1

32

45

J14

SJ_3515N

J14

SJ_3515N

R11447.5KR11447.5K

C255 0.47uFC255 0.47uF

C46

10uF (6.3V)

C46

10uF (6.3V)

C219 0.47uFC219 0.47uF

R10947.5KR10947.5K

1 2

L7SMFerriteL7SMFerrite

Page 17: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

DIG_MSB_ADIG_MSB_BDIG_MSB_CDIG_MSB_DDIG_MSB_EDIG_MSB_FDIG_MSB_GDIG_MSB_DP

DIG_LSB_ADIG_LSB_BDIG_LSB_CDIG_LSB_DDIG_LSB_EDIG_LSB_FDIG_LSB_GDIG_LSB_DP

USER_LED_RES7

USER_LED6

USER_LED_RES3

USER_LED_RES6

USER_LED_RES1

USER_LED_RES5

USER_LED5

USER_LED_RES4

USER_LED4USER_LED3

USER_LED_RES2USER_LED7

USER_LED_RES0USER_LED0USER_LED1USER_LED2

USER_PB0

USER_PB2

SYS_RESETn

USER_DIPSW0USER_DIPSW1USER_DIPSW2USER_DIPSW3USER_DIPSW4USER_DIPSW5USER_DIPSW6USER_DIPSW7

USER_DIPSW[7:0]

USER_PB3

USER_PB[3..0]

SYS_RESETn

USER_RESETn

USER_LED[7..0]

USER_RESETn

USER_PB1

3.3V

3.3V

3.3V

3.3V

3.3V

DIG_LSB_DP4

DIG_MSB_E4

DIG_MSB_A6

DIG_LSB_C4

DIG_MSB_C6

DIG_LSB_G4DIG_LSB_F6

DIG_LSB_D4

DIG_MSB_B4

DIG_LSB_E4

DIG_LSB_B6

DIG_MSB_F4

DIG_LSB_A4

DIG_MSB_D4

DIG_MSB_DP4DIG_MSB_G6

USER_DIPSW[7:0]3,5,7

USER_PB[3..0] 3,7

SYS_RESETn 10

USER_RESETn 5,19

USER_LED[7..0] 3,4,6,10

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

17 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

17 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

17 22Thursday, March 24, 2005

USER IO

Copyright (c) 2005, Altera Corporation. All Rights Reserved.

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

7-Segment Displays

SEVEN SEGMENT DISPLAY A

SEVEN SEGMENT DISPLAY B

User LEDs

Pushbutton Switches

R263 56R263 56

116

RN

38A

10K

RN

38A

10K

12345678

161514131211109

S1

Grayhill76SB08S

S1

Grayhill76SB08S

8 9RN39H 220RN39H 220

215

RN

42B

10K

RN

42B

10K

413

RN

38D

10K

RN

38D

10K

8 9RN41H 220RN41H 220

2 15RN41B 220RN41B 220

2 15RN39B 220RN39B 220

4 13RN41D 220RN41D 220

116

RN

42A

10K

RN

42A

10K

314

RN

38C

10K

RN

38C

10K

6 11RN39F 220RN39F 220

5 12RN41E 220RN41E 220

AC

D3YELLOW LEDD3YELLOW LED

413

RN

42D

10K

RN

42D

10K

4 13RN39D 220RN39D 220

89

RN

42H

10K

RN

42H

10K

1 2SW4SW4

R265 56R265 56

R266 56R266 56

AC

D4YELLOW LEDD4YELLOW LED

AC

D9YELLOW LEDD9YELLOW LED

R267 56R267 56AC

D5YELLOW LEDD5YELLOW LED

AC

D2YELLOW LEDD2YELLOW LED

1 2SW6SW6

R264 56R264 56

611

RN

38F

10K

RN

38F

10K

AC

D8YELLOW LEDD8YELLOW LED

10

9

8

5

4

2

3

7

1

6

A

B

C

D

E

F

G

DP

U33

LDS-A324RI

A

B

C

D

E

F

G

DP

U33

LDS-A324RI

R268 56R268 56

1 2SW7SW7

512

RN

38E

10K

RN

38E

10K

7 10RN39G 220RN39G 220

R269 56R269 56

10

9

8

5

4

2

3

7

1

6

A

B

C

D

E

F

G

DP

U32

LDS-A324RI

A

B

C

D

E

F

G

DP

U32

LDS-A324RI

314

RN

42C

10K

RN

42C

10K

R270 56R270 56

89

RN

38H

10K

RN

38H

10K

3 14RN41C 220RN41C 220

1 16RN41A 220RN41A 220

AC

D7YELLOW LEDD7YELLOW LED

611

RN

42F

10K

RN

42F

10K

710

RN

38G

10K

RN

38G

10K

6 11RN41F 220RN41F 2203 14RN39C 220RN39C 220

7 10RN41G 220RN41G 220

512

RN

42E

10K

RN

42E

10K

1 2SW2SW2

1 16RN39A 220RN39A 220

710

RN

42G

10K

RN

42G

10K

5 12RN39E 220RN39E 220

AC

D6YELLOW LEDD6YELLOW LED

1 2SW5SW5

215

RN

38B

10K

RN

38B

10K

1 2SW3SW3

Page 18: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

EVM_AREnEVM_OEnEVM_CEn3

EVM_ARDYEVM_CEn2

EVM_AWEn

EVM_A20EVM_A18EVM_A16EVM_A14

EVM_A12EVM_A10EVM_A8EVM_A6

EVM_A4EVM_A2EVM_BEn2EVM_BEn0

EVM_D30EVM_D28EVM_D26EVM_D24

EVM_D22EVM_D20EVM_D18EVM_D16

EVM_D14EVM_D12EVM_D10EVM_D8

EVM_D6EVM_D4EVM_D2EVM_D0

EVM_D15EVM_D13EVM_D11EVM_D9

EVM_D7EVM_D5EVM_D3EVM_D1

EVM_A21EVM_A19EVM_A17EVM_A15

EVM_A13EVM_A11EVM_A9EVM_A7

EVM_A5EVM_A3EVM_BEn3EVM_BEn1

EVM_D31EVM_D29EVM_D27EVM_D25

EVM_D23EVM_D21EVM_D19EVM_D17

SRAM_MODESRAM_ZZSRAM_OEnSRAM_CLK_RSRAM_GWnSRAM_BWEnSRAM_ADVnSRAM_ADSCnSRAM_ADSPnSRAM_CEn1SRAM_CE2SRAM_CEn3SRAM_BEn0SRAM_BEn1SRAM_BEn2SRAM_BEn3

SRAM_DQP0SRAM_DQP1SRAM_DQP2SRAM_DQP3

SRAM_D0SRAM_D1SRAM_D2SRAM_D3SRAM_D4SRAM_D5SRAM_D6SRAM_D7SRAM_D8SRAM_D9SRAM_D10SRAM_D11SRAM_D12SRAM_D13SRAM_D14SRAM_D15SRAM_D16SRAM_D17SRAM_D18SRAM_D19SRAM_D20SRAM_D21SRAM_D22SRAM_D23SRAM_D24SRAM_D25SRAM_D26SRAM_D27SRAM_D28SRAM_D29SRAM_D30SRAM_D31

EVM_AWEn

EVM_DMAC0EVM_CEn2

EVM_CNTL0EVM_STAT0

EVM_OEnSRAM_CLK

EVM_BEn0EVM_BEn1EVM_BEn2EVM_BEn3

EVM_INUM0

EVM_CNTL0EVM_STAT0

EVM_DMAC0

EVM_CLKOUT2

EVM_INT1

EVM_INT2EVM_INT3

EVM_INT0

EVM_DR0

EVM_RESET

EVM_FSR0EVM_CLKR0

EVM_FSX0EVM_CLKX0

EVM_DX0

EVM_IACK

SRAM_MODESRAM_GWnSRAM_CE2SRAM_CEn3

SRAM_ZZ

EVM_CLKR0

EVM_CLKOUT2

EVM_FSR0

EVM_RESET

EVM_AWEn

EVM_OEn

EVM_AREn

EVM_DR0

EVM_DX0

EVM_ARDY

EVM_IACK

EVM_INUM0

EVM_CNTL0

EVM_CLKX0

EVM_STAT0

EVM_FSX0

EVM_DMAC0

SRAM_CLK

EVM_INT[3..0]

EVM_BEn[3..0]

EVM_D[31..0]

EVM_A[21..2]

EVM_CEn[3..2]

EVM_A5

EVM_A11

EVM_A17

EVM_A6

EVM_A12

SRAM_A6

EVM_A20

EVM_A18

EVM_A7

SRAM_A4EVM_A4SRAM_A3

EVM_A13

EVM_A8

EVM_A14

EVM_A3SRAM_A2EVM_A2

EVM_A9

EVM_A19

SRAM_A5

EVM_A15

EVM_A21

EVM_A10

SRAM_A1SRAM_A0

EVM_A16

SRAM_A9SRAM_A8

SRAM_A10SRAM_A11SRAM_A12SRAM_A13SRAM_A14SRAM_A15SRAM_A16

SRAM_A7

SRAM_A18SRAM_A19

SRAM_A17

SRAM_A20

EVM_D2

EVM_D3

EVM_D6

EVM_D7

EVM_D4

EVM_D5

EVM_D10

EVM_D11

EVM_D14

EVM_D15

EVM_D12

EVM_D13

EVM_D8

EVM_D9

EVM_D0

EVM_D18

EVM_D19

EVM_D22

EVM_D23

EVM_D20

EVM_D21

EVM_D16

EVM_D17

EVM_D26

EVM_D27

EVM_D30

EVM_D31

EVM_D28

EVM_D29

EVM_D24

EVM_D25

EVM_D1

3.3V

3.3V

3.3V 3.3V 3.3V 3.3V

3.3V3.3V

SRAM_CLK6

EVM_RESET3

EVM_FSR06

EVM_CLKX06

EVM_FSX06

EVM_CLKR06

EVM_ARDY6

EVM_IACK3

EVM_DX06

EVM_INUM03

EVM_AREn3

EVM_AWEn6

EVM_OEn6

EVM_DR06

EVM_DMAC06

EVM_CNTL06

EVM_CLKOUT23

EVM_STAT06

EVM_BEn[3..0]6

EVM_INT[3..0]6

EVM_A[21..2]6

EVM_D[31..0]6

EVM_CEn[3..2]6,10

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

18 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

18 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

18 22Thursday, March 24, 2005

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

Copyright (c) 2005, Altera Corporation. All Rights Reserved.

SSRAM, TI EVM Connectors

Default SRAM Settings

MODE = Linear Burst (GND)

GWn = Global Write Disable (VCC)

CE2 = Always Enabled (VCC)

CEn3 = Always Enabled (GND)

ZZ = Always Enabled (jumper GND)

R228 22R228 22

R15322R15322

R193 22R193 22

5V_1 1

EA21 3

EA19 5

EA17 7

EA15 9

GND 11

EA13 13

EA11 15

EA9 17

EA7 19

5V_21 21

EA5 23

EA3 25

BE3_n 27

BE1_n 29

GND 31

ED31 33

ED29 35

ED27 37

ED25 39

3.3V_41 41

ED23 43

ED21 45

ED19 47

ED17 49

GND 51

ED15 53

ED13 55

ED11 57

ED9 59

GND 61

ED7 63

ED5 65

ED3 67

ED1 69

GND 71

ARE_n 73

AOE_n 75

ACE_n 77

GND 79

5V_22

EA204

EA186

EA168

EA1410

GND12

EA1214

EA1016

EA818

EA620

5V_2222

EA424

EA226

BE2_n28

BE0_n30

GND32

ED3034

ED2836

ED2638

ED2440

3.3V_4242

ED2244

ED2046

ED1848

ED1650

GND52

ED1454

ED1256

ED1058

ED860

GND62

ED664

ED466

ED268

ED070

GND72

AWE_n74

ARDY76

ACE2_n78

GND80

U40

EVM40X2

U40

EVM40X2

R220 22R220 22

C370

0.1uF

C370

0.1uF

R217 22R217 22

DQPC 1

DQC24 2

DQC25 3

VDDQ 4

VSSQ 5

DQC26 6

DQC27 7

DQC28 8

DQC29 9

VSSQ 10

VDDQ 11

DQC30 12

DQC31 13

NC_1414

VDD15

NC_1616

VSS17

DQD16 18

DQD17 19

VDDQ 20

VSSQ 21

DQD18 22

DQD19 23

DQD20 24

DQD21 25

VSSQ 26

VDDQ 27

DQD22 28

DQD23 29

DQPD 30

MODE31

A932

A333

A834

A535

A136A037

A18/18M38

A19/32M39

VSS40

VDD41

A20/72M42

A1143

A1244

A1345

A1446

A1547

A1648

A1749

A750

DQPA 51

DQA0 52

DQA1 53

VDDQ 54

VSSQ 55

DQA2 56

DQA3 57

DQA4 58

DQA5 59

VSSQ 60

VDDQ 61

DQA6 62

DQA7 63

ZZ64

VDD65

NC_6666

VSS67

DQB8 68

DQB9 69

VDDQ 70

VSSQ 71

DQB10 72

DQB11 73

DQB12 74

DQB13 75

VSSQ 76

VDDQ 77

DQB14 78

DQB15 79

DQPB 80

A481

A282

ADV_n83

ADSP_n84ADSC_n85

OE_n86

BWE_n87GW_n88CLK89

VSS90

VDD91

CE3_n92

BWA_n93

BWB_n94

BWC_n95

BWD_n96

CE297CE1_n98

A1099

A6100

U22

CY7C1360B-166AC

U22

CY7C1360B-166AC

R226 22R226 22

R176 22R176 22

R191 22R191 22

R148 22R148 22

R175 22R175 22

C373

0.001uF

C373

0.001uF

12V 1

GND 3

5V_5 5

GND 7

5V_9 9

NC_11 11

NC_13 13

NC_15 15

NC_17 17

3.3V_19 19

CLKXO 21

FSXO 23

GND 25

CLKRO 27

FSRO 29

GND 31

CLKX2 33

FSX2 35

GND 37

CLKR2 39

FSR2 41

GND 43

TOUT0 45

NC_47 47

TOUT1 49

GND 51

EXT_INT4 53

NC_55 55

NC_57 57

RESET 59

GND 61

CNTL1 63

STAT1 65

EXT_INT6 67

ACE3_n 69

NC_71 71

NC_73 73

DC_DET_n 75

GND 77

GND 79

-12V2

GND4

5V_66

GND8

5V_1010

NC_1212

NC_1414

NC_1616

NC_1818

3.3V_2020

CLKS022

DX024

GND26

NC_2828

DR030

GND32

CLKS234

DX236

GND38

NC_4040

DR242

GND44

TINP046

EXT_INT548

TINP150

GND52

NC_5454

NC_5656

NC_5858

NC_6060

GND62

CNTL064

STAT066

EXT_INT768

NC_7070

NC_7272

NC_7474

GND76

ECLKOUT78

GND80

U34

EVM40X2

U34

EVM40X2

R192 22R192 22

R149DNIR149DNI

R182 22R182 22

123

J24

TSW-103-07-L-S

J24

TSW-103-07-L-S

R183 22R183 22

R197 22R197 22

R199 22R199 22

R203 22R203 22

R181 22R181 22

R189 22R189 22

R15022R15022

R186 22R186 22

R177 22R177 22

R171 22R171 22

R227 22R227 22

R231 22R231 22R152 22R152 22

R178 22R178 22

R216 22R216 22

R174 22R174 22

R222 22R222 22

R154DNIR154DNI

R205 22R205 22

R219 22R219 22

C369

0.1uF

C369

0.1uF

R105

332

R105

332

R196 22R196 22

C366

0.001uF

C366

0.001uF

R158 22R158 22

R211 22R211 22

R225 22R225 22

R185 22R185 22

R136 1KR136 1K

R198 22R198 22

R188 22R188 22

R223 22R223 22

R16122R16122

R212 22R212 22

R224 22R224 22

R137 1KR137 1K

R160DNIR160DNI

R194 22R194 22

R13810.0KR13810.0K

R229 22R229 22

R145 22R145 22

R207 22R207 22

R208 22R208 22

R213 22R213 22

R215 22R215 22

R218 22R218 22R209 22R209 22

R204 22R204 22

R214 22R214 22

R180 22R180 22

R221 22R221 22

R170 1KR170 1K

R163DNIR163DNI

R179 22R179 22

R172 22R172 22

R16422R16422

R195 22R195 22

R206 22R206 22

R169 1KR169 1K

R146 22R146 22

R210 22R210 22

R230 22R230 22

R184 22R184 22

R190 22R190 22

R173 22R173 22

R187 22R187 22

R162 22R162 22

Page 19: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

PROTO_CLKOUT

B_PROTO_RESETn

B_PROTO_CARDSELn

PROTO_IO[40..0]

B_PROTO_IO40 PROTO_IO40B_PROTO_CARDSELn PROTO_CARDSELn

PROTO_RESETnB_PROTO_RESETn

B_PROTO_IO30B_PROTO_IO32B_PROTO_IO34B_PROTO_IO36B_PROTO_IO38

B_PROTO_IO40B_PROTO_IO31B_PROTO_IO33B_PROTO_IO35B_PROTO_IO37B_PROTO_IO39

B_PROTO_IO29

B_PROTO_IO16B_PROTO_IO17

B_PROTO_IO22B_PROTO_IO21

B_PROTO_IO25B_PROTO_IO24

B_PROTO_IO28B_PROTO_IO27

B_PROTO_IO19B_PROTO_IO18

B_PROTO_IO0

B_PROTO_IO4B_PROTO_IO2

B_PROTO_IO8B_PROTO_IO6

B_PROTO_IO12B_PROTO_IO10

B_PROTO_IO14

B_PROTO_IO1

B_PROTO_IO5B_PROTO_IO3

B_PROTO_IO9B_PROTO_IO7

B_PROTO_IO13B_PROTO_IO11

B_PROTO_IO15

B_PROTO_IO20

B_PROTO_IO23

B_PROTO_IO26

PROTO_CLKIN

B_PROTO_IO19

B_PROTO_IO11B_PROTO_IO10

B_PROTO_IO12B_PROTO_IO13B_PROTO_IO14B_PROTO_IO15B_PROTO_IO16B_PROTO_IO17B_PROTO_IO18

B_PROTO_IO9

B_PROTO_IO1B_PROTO_IO0

B_PROTO_IO2B_PROTO_IO3B_PROTO_IO4B_PROTO_IO5B_PROTO_IO6B_PROTO_IO7B_PROTO_IO8

B_PROTO_IO29

B_PROTO_IO21B_PROTO_IO20

B_PROTO_IO22B_PROTO_IO23B_PROTO_IO24B_PROTO_IO25B_PROTO_IO26B_PROTO_IO27B_PROTO_IO28

B_PROTO_IO39

B_PROTO_IO31B_PROTO_IO30

B_PROTO_IO32B_PROTO_IO33B_PROTO_IO34B_PROTO_IO35B_PROTO_IO36B_PROTO_IO37B_PROTO_IO38

PROTO_IO9

PROTO_IO1PROTO_IO0

PROTO_IO2PROTO_IO3PROTO_IO4PROTO_IO5PROTO_IO6PROTO_IO7PROTO_IO8

PROTO_IO19

PROTO_IO11PROTO_IO10

PROTO_IO12PROTO_IO13PROTO_IO14PROTO_IO15PROTO_IO16PROTO_IO17PROTO_IO18

PROTO_IO29

PROTO_IO21PROTO_IO20

PROTO_IO22PROTO_IO23PROTO_IO24PROTO_IO25PROTO_IO26PROTO_IO27PROTO_IO28

PROTO_IO39

PROTO_IO31PROTO_IO30

PROTO_IO32PROTO_IO33PROTO_IO34PROTO_IO35PROTO_IO36PROTO_IO37PROTO_IO38

PROTO_CLK_OSCPROTO_CLKOUTPROTO_CARDSELn

PROTO_CLK_OSCPROTO_CLKIN

PROTO_IO13

PROTO_IO21

PROTO_IO10

PROTO_IO18

MICTOR_TR_CLK

MICTOR_PWR2

PROTO_CLKOUT

PROTO_IO15

PROTO_IO22PROTO_IO11

PROTO_IO9

PROTO_IO1PROTO_IO2PROTO_IO3PROTO_IO4PROTO_IO5

PROTO_IO0

PROTO_IO6PROTO_IO7PROTO_IO8

PROTO_IO19

MICTOR_PWR1

PROTO_IO16

PROTO_IO12

PROTO_IO14

PROTO_IO20

MICTOR_PLDCLK

MICTOR_TDO

MICTOR_TCKMICTOR_TMSMICTOR_TDI

PROTO_IO17

PROTO_3_3V_5V

PROTO_IO19

PROTO_IO16

PROTO_IO22

4.3V

PROTO_IO24PROTO_CLKOUT

USER_RESETn PROTO_RESETn

PROTO_IO23

5V

5V

3.3V

3.3V3.3V DC_IN

3.3V

3.3V

3.3V

5V

3.3V

3.3V 3.3V

3.3V

PROTO_IO[40..0]3,4

PROTO_CARDSELn4

JTAG_CONN_TDI10

JTAG_TCK10JTAG_TMS10JTAG_CONN_TDO10

USER_RESETn5,17

PROTO_CLKOUT3

PROTO_CLKIN6PROTO_CLK_OSC3

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

19 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

19 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

19 22Thursday, March 24, 2005

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

Copyright (c) 2005, Altera Corporation. All Rights Reserved.

Altera Daughter Card, Mictor ConnectorAltera Daughter Card Altera Daughter Card Voltage Limiters

MICTOR_TRST (n/c)

Mictor Connector

INSTALLED

NOT INSTALLED(for 5V compatibility)

(pinned out for FS2 hardware trace module)

11

33

55

77

99

1111

1313

2 2

4 4

6 6

8 8

10 10

12 12

14 14

J22

HDR2X7

J22

HDR2X7

D13

MMSD701T1

D13

MMSD701T1

C358

0.1uF

C358

0.1uF

R21 0R21 0

C360

0.1uF

C360

0.1uF

A03

A14

A27

A38

A411

A514

A617

A718

A821

A922

B0 2

B1 5

B2 6

B3 9

B4 10

B5 15

B6 16

B7 19

B8 20

B9 23

BEA- 1

BEB- 13

VCC 24U13

PI5C3384

U13

PI5C3384

R14195.3R14195.3

5VDC1 SCL 2

GND3 SDA 4

CLKE5 CLKO 6

D15E7 D15O 8

D14E9 D14O 10

D13E11 D13O 12

D12E13 D12O 14

D11E15 D11O 16

D10E17 D10O 18

D9E19 D9O 20

D8E21 D8O 22

D7E23 D7O 24

D6E25 D6O 26

D5E27 D5O 28

D4E29 D4O 30

D3E31 D3O 32

D2E33 D2O 34

D1E35 D1O 36

D0E37 D0O 38

GND1 39

GND2 40

GND3 41

GND4 42

GND5 43

J12

MICTOR_HDR

J12

MICTOR_HDR

R118 4.7KR118 4.7K

C359

0.1uF

C359

0.1uF

R106 0R106 0

R101 0R101 0

R97 0R97 0 R120 1KR120 1K

A03

A14

A27

A38

A411

A514

A617

A718

A821

A922

B0 2

B1 5

B2 6

B3 9

B4 10

B5 15

B6 16

B7 19

B8 20

B9 23

BEA- 1

BEB- 13

VCC 24U18

PI5C3384

U18

PI5C3384

R964.7KR964.7K

R11510.0KR11510.0K

R112 0R112 0

11

33

55

77

99

1111

1313

1515

1717

1919

2121

2323

2525

2727

2929

3131

3333

3535

3737

3939

2 2

4 4

6 6

8 8

10 10

12 12

14 14

16 16

18 18

20 20

22 22

24 24

26 26

28 28

30 30

32 32

34 34

36 36

38 38

40 40

J15

HDR2X20

J15

HDR2X20A03

A14

A27

A38

A411

A514

A617

A718

A821

A922

B0 2

B1 5

B2 6

B3 9

B4 10

B5 15

B6 16

B7 19

B8 20

B9 23

BEA- 1

BEB- 13

VCC 24U14

PI5C3384

U14

PI5C3384

R98 0R98 0

C361

0.1uF

C361

0.1uF

C357

0.1uF

C357

0.1uF

R19 0R19 0

C222

0.1uF

C222

0.1uF

R20 DNIR20 DNI

R119 4.7KR119 4.7K

A03

A14

A27

A38

A411

A514

A617

A718

A821

A922

B0 2

B1 5

B2 6

B3 9

B4 10

B5 15

B6 16

B7 19

B8 20

B9 23

BEA- 1

BEB- 13

VCC 24U15

PI5C3384

U15

PI5C3384

C221

0.001uF

C221

0.001uF

C91

0.1uF

C91

0.1uF

R13995.3R13995.3

11

33

55

77

99

1111

1313

1515

1717

1919

2 2

4 4

6 6

8 8

10 10

12 12

14 14

16 16

18 18

20 20

J23

HDR2X10

J23

HDR2X10

R140143R140143

R111 0R111 0

R95 0R95 0

R142143R142143

A03

A14

A27

A38

A411

A514

A617

A718

A821

A922

B0 2

B1 5

B2 6

B3 9

B4 10

B5 15

B6 16

B7 19

B8 20

B9 23

BEA- 1

BEB- 13

VCC 24U19

PI5C3384

U19

PI5C3384

R100 0R100 0

Page 20: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

1.2V

1.2V

1.8V

1.8V

3.3V

3.3V

VCCA_PLL1

VCCA_PLL2

VCCA_PLL3

VCCA_PLL4

1.8V

1.2V

1.2V

VCCA_PLL4

VCCA_PLL1VCCA_PLL2VCCA_PLL3

1.2V

1.8V

3.3V

PLL

PLL

PLL

PLL

PLL

1.8V 3.3V3.3V 1.8V

1.2V

1.2V

1.2V

1.2V

1.8V

3.3V

3.3V

1.8V

1.2V

1.8V

1.2V

1.2V

1.2V

1.2V

1.2V

1.2V

PLL

1.8V

3.3V

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

20 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

20 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

20 22Thursday, March 24, 2005Copyright (c) 2005, Altera Corporation. All Rights Reserved.

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

3.3V VCCIO BYPASS CAPS (23)

1.8V VCCIO BYPASS CAPS (30)

Cyclone II Power & Decoupling

1.2V VCCINT BYPASS CAPS (32 + 25)

C267

0.1uF

C267

0.1uF

C284

0.1uF

C284

0.1uF

C273

0.1uF

C273

0.1uF

C61

0.01uF

C61

0.01uF

C78

10uF (6.3V)

C78

10uF (6.3V)

C311

0.1uF

C311

0.1uF

C336

0.1uF

C336

0.1uF

C230

0.1uF

C230

0.1uF

C310

0.1uF

C310

0.1uF

C258

0.1uF

C258

0.1uF

C296

0.1uF

C296

0.1uF

C261

0.1uF

C261

0.1uF

C251

0.1uF

C251

0.1uF

C283

0.1uF

C283

0.1uF

C312

0.1uF

C312

0.1uF

C269

0.1uF

C269

0.1uF

C245

0.1uF

C245

0.1uF

C290

0.1uF

C290

0.1uF

C286

0.1uF

C286

0.1uF

C331

0.1uF

C331

0.1uF

C349

0.1uF

C349

0.1uF

C274

0.1uF

C274

0.1uF

C256

0.1uF

C256

0.1uF

C292

0.1uF

C292

0.1uF1 2

L4600R100M1AL4600R100M1A

1 2

L10600R100M1AL10600R100M1A

C343

0.1uF

C343

0.1uF

1 2

L8600R100M1AL8600R100M1A

1 2

L14600R100M1AL14600R100M1A

C342

0.1uF

C342

0.1uF

C106

2.2uF

C106

2.2uF

C314

0.1uF

C314

0.1uF

C302

0.1uF

C302

0.1uF

C93

2.2uF

C93

2.2uF

C92

0.001uF

C92

0.001uF

C293

0.1uF

C293

0.1uF

C345

0.1uF

C345

0.1uF

C67

2.2uF

C67

2.2uF

C326

0.1uF

C326

0.1uF

C315

0.1uF

C315

0.1uF

C215

0.1uF

C215

0.1uF

C278

0.1uF

C278

0.1uF

C248

0.1uF

C248

0.1uF

C276

0.1uF

C276

0.1uF

C351

0.1uF

C351

0.1uF

C228

0.1uF

C228

0.1uF

C299

0.1uF

C299

0.1uF

C71

0.01uF

C71

0.01uF

C319

0.1uF

C319

0.1uF

C110

2.2uF

C110

2.2uF

C95

0.01uF

C95

0.01uF

C346

0.1uF

C346

0.1uF

C280

0.1uF

C280

0.1uF

C340

0.1uF

C340

0.1uF

C234

0.1uF

C234

0.1uF

C287

0.1uF

C287

0.1uF

C89

0.01uF

C89

0.01uF

C348

0.1uF

C348

0.1uF

C80

2.2uF

C80

2.2uF

1 2

L5600R100M1AL5600R100M1A

C320

0.1uF

C320

0.1uF

C281

0.1uF

C281

0.1uF

C347

0.1uF

C347

0.1uF

C275

0.1uF

C275

0.1uF

C72

0.001uF

C72

0.001uF

C244

0.1uF

C244

0.1uF

+C99

47uF

+C99

47uF

C334

0.1uF

C334

0.1uF

C322

0.1uF

C322

0.1uF

C56

2.2uF

C56

2.2uF

VCCINTK10

VCCINTK12

VCCINTK13

VCCINTK14

VCCINTK15

VCCINTL11

VCCINTL16

VCCINTL17

VCCINTL18

VCCINTM10

VCCINTM11

VCCINTM16

VCCINTM17

VCCINTN10

VCCINTN17

VCCINTP10

VCCINTR10

VCCINTR11

VCCINTR16

VCCINTT11

VCCINTT16

VCCINTU11

VCCINTU13

VCCINTU14

GND M1

GND M12

GND M13

GND M14

GND M15

GND M26

GND N8

GND N11

GND N12

GND N13

GND N14

GND N15

GND N16

GND N19

GND P8

GND P11

GND P12

GND P13

GND P14

GND P15

GND P16

GND P19

GND R1

GND R12

GND R13

GND R14

GND R15

GND R21

GND R26

GND T5

GND T12

GND T13

GNDB1

GNDA2

GNDA12

GNDA15

GNDA25

GNDB26

GNDC14

GNDC18

GNDD4

GNDD24

GNDH5

GNDH13

GND L5

GND L12

GND L13

GND L14

GND L15

GND L22

GNDH14

GNDH22

GNDK20

GNDE7

GNDE11

GNDE19 GND T14

GND T15

GND U8

GND U19

GND W5

GND W13

GND W14

GND W22

GND Y9

GND Y17

VCCINTU15

VCCINTU16

VCCINTV16

NC

_AC

24A

C24

NC

_N21

N21

VCCINTK11

GNDAB7

GNDAB11

GNDAB19GNDAB16

GND AD9

GND AD18

GND AE1

GNDAF2GND AF12

GND AF15

GND AF25GNDE16

GNDAD14 GND AE26NC

_Y2

Y2

GNDAC4

CYCLONE II, POWERU12K

EP2C35_672FBGA

CYCLONE II, POWERU12K

EP2C35_672FBGA

C247

0.1uF

C247

0.1uF

C229

0.1uF

C229

0.1uF

C237

0.1uF

C237

0.1uF

1 2

L13600R100M1AL13600R100M1A

C257

0.1uF

C257

0.1uF

C54

2.2uF

C54

2.2uF

C341

0.1uF

C341

0.1uF

VCCIO1AB5

VCCIO1AD1

VCCIO1P5

VCCIO1R9

VCCIO1T1

VCCIO2C1

VCCIO2F5

VCCIO2L1

VCCIO2M9

VCCIO2N5

VCCIO3A3

VCCIO3A11

VCCIO3E6

VCCIO3E9

VCCIO3E13

VCCIO4A16

VCCIO4A24

VCCIO4C20

VCCIO4D22

GNDA_PLL1 Y8

GNDA_PLL2 F19

GNDA_PLL3 F8

GNDA_PLL4 Y19

GNDD_PLL1 W7

GNDD_PLL2 G20

GNDD_PLL3 G7

GNDD_PLL4 W20

GNDG_PLL1 Y6

GNDG_PLL3 E4

GNDG_PLL4 AA21

VCCIO5 C26

VCCIO5 F22

VCCIO5 J19

VCCIO5 L26

VCCIO5 M18

VCCIO6 AA22

VCCIO6 AD26

VCCIO6 P22

VCCIO6 R18

VCCIO6 T26

VCCIO7 AB14

VCCIO7 AB17

VCCIO7 AB22

VCCIO7 AD20

VCCIO7 AF16

VCCIO8 AB13

VCCIO8 AF3

VCCIO8 AF11

VCCIO8 V12

VCCIO8 W9

VCCA_PLL1AA8

VCCA_PLL2G19

VCCA_PLL3G8

VCCA_PLL4AA19

VCCD_PLL1Y7

VCCD_PLL2H20

VCCD_PLL3H7

VCCD_PLL4Y20

VCCIO4E14

VCCIO1V8

VCCIO3H9

VCCIO3J12

VCCIO4E17

VCCIO4H18

VCCIO4J15

VCCIO5 N22

VCCIO6 V19

VCCIO7 AF24

VCCIO7 V15

VCCIO7 W18

VCCIO8 AB9VCCIO8 AB6

GNDG_PLL2 E21

CYCLONE II, IO POWERU12L

EP2C35_672FBGA

CYCLONE II, IO POWERU12L

EP2C35_672FBGA

C42

2.2uF

C42

2.2uF

C285

0.1uF

C285

0.1uF

1 2

L12600R100M1AL12600R100M1A

C329

0.1uF

C329

0.1uF

C277

0.1uF

C277

0.1uF

C240

0.1uF

C240

0.1uF

C60

0.1uF

C60

0.1uF

C263

0.1uF

C263

0.1uF

C262

0.1uF

C262

0.1uF

C338

0.1uF

C338

0.1uF

C231

0.1uF

C231

0.1uF

C236

0.1uF

C236

0.1uF

C43

2.2uF

C43

2.2uF

C288

0.1uF

C288

0.1uF

C332

0.1uF

C332

0.1uF

C265

0.1uF

C265

0.1uF

C41

2.2uF

C41

2.2uF

C300

0.1uF

C300

0.1uF

C301

0.1uF

C301

0.1uF

C313

0.1uF

C313

0.1uF

C325

0.1uF

C325

0.1uF

C309

0.1uF

C309

0.1uF

C246

0.1uF

C246

0.1uF

C88

0.1uF

C88

0.1uF

C242

0.1uF

C242

0.1uF

C81

2.2uF

C81

2.2uF

C70

0.1uF

C70

0.1uF

C279

0.1uF

C279

0.1uF

C235

0.1uF

C235

0.1uF

C233

0.1uF

C233

0.1uF

C94

0.1uF

C94

0.1uF

C87

2.2uF

C87

2.2uF

C216

0.1uF

C216

0.1uF

C295

0.1uF

C295

0.1uF

C333

0.1uF

C333

0.1uF

C69

2.2uF

C69

2.2uF

C337

0.1uF

C337

0.1uF

C76

2.2uF

C76

2.2uF

C339

0.1uF

C339

0.1uF

C344

0.1uF

C344

0.1uF

C107

2.2uF

C107

2.2uF

C239

0.1uF

C239

0.1uF

C51

2.2uF

C51

2.2uF

C321

0.1uF

C321

0.1uF

C97

0.001uF

C97

0.001uF

C323

0.1uF

C323

0.1uFC63

0.001uF

C63

0.001uF

C100

2.2uF

C100

2.2uF

+C98

47uF

+C98

47uF

C350

0.1uF

C350

0.1uF

C250

0.1uF

C250

0.1uF

C232

0.1uF

C232

0.1uF

C68

2.2uF

C68

2.2uF

C330

0.1uF

C330

0.1uF

C241

0.1uF

C241

0.1uF

C266

0.1uF

C266

0.1uF

C64

2.2uF

C64

2.2uF

C259

0.1uF

C259

0.1uF

C217

0.1uF

C217

0.1uF

C243

0.1uF

C243

0.1uF

C82

2.2uF

C82

2.2uF

C62

2.2uF

C62

2.2uF

C47

2.2uF

C47

2.2uF

C270

0.1uF

C270

0.1uF

C268

0.1uF

C268

0.1uF

C50

10uF (6.3V)

C50

10uF (6.3V)

C53

2.2uF

C53

2.2uF

C298

0.1uF

C298

0.1uF

C249

0.1uF

C249

0.1uF

C316

0.1uF

C316

0.1uF

C77

2.2uF

C77

2.2uF

C297

0.1uF

C297

0.1uF

C289

0.1uF

C289

0.1uF

C264

0.1uF

C264

0.1uF

C335

0.1uF

C335

0.1uF

C308

0.1uF

C308

0.1uF

C303

0.1uF

C303

0.1uF

C291

0.1uF

C291

0.1uF

C75

2.2uF

C75

2.2uF

C238

0.1uF

C238

0.1uF

1 2

L6600R100M1AL6600R100M1A

C317

0.1uF

C317

0.1uF

Page 21: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

3.3V_TG

1.8V_TG_R

DC_IN_R

1.8V_FB

3.3V_SW_R

DC_IN

1.8V_SW_R

3.3V_SW

3.3V_BG

1.8V_BG

3.3V_SHDN

1.8V_SW

DC_IN

1.8V_SHDN

DC_IN_R

1.8V_TG

DC_IN

VREG5

3.3V_FB

vreg5

3.3V_TG_R

VTT

5V_EN

6V 5V

1.8V_SHDN

DC_IN

3.3V_SHDN

1.8V1.2VOUT 1.2V

5V

VREF

3.3V_FB

1.8V_FB

1.8V

DC_IN

DC_IN

3.3V

1.8V

VTT

5V

6V 5V

DC_IN

5V 1.8V1.2V

1.8VVREF

DC_IN

6V_SHDN 22

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

21 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

21 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

21 22Thursday, March 24, 2005Copyright (c) 2005, Altera Corporation. All Rights Reserved.

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

Digital Power Supplies

(40W)

9V - 20VDC Input

DISABLEENABLE

PIN2-PIN3PIN1-PIN2

Main Power Switch

5V (1A)

0.9V (3A Sink/Src)1.2V (3A)

1.8V (7A)

3.3V (7A)

J5BANANA JACKJ5BANANA JACK

+C4

180uF

+C4

180uF

R7810R7810

C3

0.1uF (25v)

C3

0.1uF (25v)

C20810uF (6.3V)

C20810uF (6.3V)

VDDQSNS 1

VLDOIN 2

VTT 3

PG

ND

4

VTTSNS 5

VTTREF6

S37

GN

D8

S59

VIN10

GN

D11

U8 TPS51100U8 TPS51100

C810uF (6.3V)

C810uF (6.3V)

+C27

180uF

+C27

180uF

C38

1uF

C38

1uF

C191

10uF (25V)

C191

10uF (25V)

C175 0.01uFC175 0.01uF

R1010.0KR1010.0K

R72 10R72 10

R61.15KR61.15K

+C20

47uF

+C20

47uF

5 6

1

4

7 8

2 3

U5Si4392DYU5Si4392DY

C178 0.1uF (25v)C178 0.1uF (25v)

C22310uF (6.3V)

C22310uF (6.3V)

R62 100KR62 100K

R63 4.53KR63 4.53K

R71 12.4KR71 12.4K

R60 1MR60 1M

C181

3300pF

C181

3300pF

C189

10uF (6.3V)

C189

10uF (6.3V)

F5 7AF5 7A

R68

51.1K

R68

51.1K

C35610uF (6.3V)

C35610uF (6.3V)

R1110.0KR1110.0K

C44

0.1uF (25v)

C44

0.1uF (25v)

R2 10R2 10

R70 12.4KR70 12.4K

+C31

180uF

+C31

180uF

C177

22pF

C177

22pF

R6751.1KR6751.1K

C186 22pFC186 22pF

VIN1 VOUT 2

GN

D3

ADJUST 4

ENABLE5

GN

D6

U10

REG104GA

U10

REG104GA

C1910uF (25V)C1910uF (25V)

C183

3300pF

C183

3300pF

+ C33

22uF

+ C33

22uF

R7510R7510

F4 7AF4 7A

C25

10uF (6.3V)

C25

10uF (6.3V)

+ C28

22uF

+ C28

22uF

1

239

8

7

4

56

10

1211

SW1

SW SLIDE-4P2T

SW1

SW SLIDE-4P2T

5 6

1

4

7 8

2 3U1Si4392DYU1Si4392DY

C174 0.01uFC174 0.01uF

+C30

180uF

+C30

180uF

R7710R7710

5 6

1

4

7 8

2 3

U3Si4392DYU3Si4392DY

R171KR171K

C23

10uF (6.3V)

C23

10uF (6.3V)

+C1

180uF

+C1

180uF

R40.1R40.1

C29

10uF (6.3V)

C29

10uF (6.3V)

R6588.7KR6588.7K

C35

10uF (6.3V)

C35

10uF (6.3V)

R66 4.53KR66 4.53K

L2 10uHL2 10uH

C17

10uF (6.3V)

C17

10uF (6.3V)

C187 22pFC187 22pF

C180 470pFC180 470pF

R61 1MR61 1M

R1 0R1 0

R59 100KR59 100K

R710.0KR710.0K

+ C12

22uF

+ C12

22uF

R7610R7610

VB1

VIN2

GND3

VOUT 4

ADJ 5

GND 6

U7

UC382TD

U7

UC382TD

+ C15

22uF

+ C15

22uF

C24

0.1uF (25v)

C24

0.1uF (25v)

C327

0.1uF

C327

0.1uF

+C90

22uF

+C90

22uF

C2110uF (25V)C2110uF (25V)

C510uF (6.3V)

C510uF (6.3V)

R3 0R3 0

C226

0.01uF

C226

0.01uF

+ C13

22uF

+ C13

22uF

R93.32KR93.32K

3

21

J1CONN JACK PWR

J1CONN JACK PWR

C35510uF (6.3V)

C35510uF (6.3V)

C36

1uF

C36

1uFC188

10uF (6.3V)

C188

10uF (6.3V)

C185

1uF

C185

1uF

J3BANANA JACKJ3BANANA JACK

C328

0.1uF

C328

0.1uF

2 1D12 MBR0530D12 MBR0530

INV11

COMP12

SSTRT13

SKIPn4

VO1_VDDQ5

DDRn6

GND7

REF_X8

ENBL19

ENBL210

VO211

PGOOD12

SSTRT213

COMP214

INV215 VBST2 16OUT2_U 17

LL2 18OUT2_D 19

OUTGND2 20REG5_IN 21

VREG5 22TRIP2_SNS 23

VIN 24TRIP1 25

OUTGND1 26OUT1_D 27

LL1 28OUT1_U 29

VBST1 30

U2 TPS51020U2 TPS51020

C45

0.1uF

C45

0.1uF

F2 7AF2 7A

J6BANANA JACKJ6BANANA JACK

123

J7

TSW-103-07-L-S

J7

TSW-103-07-L-S

C179

22pF

C179

22pF

C176 470pFC176 470pF

C352

0.01uF

C352

0.01uF

R16 1KR16 1K

C7

0.1uF (25v)

C7

0.1uF (25v)

L1 10uHL1 10uH

+ C10

47uF

+ C10

47uF

R731.0KR731.0K

C182

10uF (6.3V)

C182

10uF (6.3V)

+C34

180uF

+C34

180uF

R69 10R69 10

5 6

1

4

7 8

2 3U4Si4392DYU4Si4392DY

2 1D11 MBR0530D11 MBR0530

C225

0.01uF

C225

0.01uF

AC

D1LEDD1LED

C2210uF (25V)C2210uF (25V)

C1810uF (25V)C1810uF (25V)

+ C14

22uF

+ C14

22uF

F3 7AF3 7AR74

10R74

10

C353

0.1uF

C353

0.1uF

C253

0.01uF

C253

0.01uF

J4BANANA JACKJ4BANANA JACK

R6434.0KR6434.0K

F1 7AF1 7A

C390.01uFC390.01uF

C184

1uF

C184

1uF C32

10uF (6.3V)

C32

10uF (6.3V)

C252

0.1uF

C252

0.1uF

Page 22: System Block Diagram - Intel · Video DAC DDR2 DIMM DATA LANES, CNTL, CLOCK Pushbuttons DDR2 DIMM DATA LANES, ADDRESS Pushbuttons Dipswitch (2C70 Device Shown) No additional I/O of

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

E E

D D

C C

B B

A A

6V_HDRV

VCCA_ADC_OUT

6V_BOOST

6V VCCA_DAC_OUT

6V_SHDN

VCCA_ADC_EN

6V_SW

6V

6V_LDRV

6V

DC_IN

VCCA_DAC_EN

6V

VCCA_ADC

VCCA_DAC

DAC DAC

DAC DAC DAC

ADC ADC

ADC ADC ADC ADC

DAC DAC

6V

6V

6V

6V

DC_IN

VCCA_DAC

VCCA_ADC

ADC

DAC

ADC

DAC

6V_SHDN 21

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

22 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

22 22Thursday, March 24, 2005

Title

Size Document Number Rev

Date: Sheet of150-0310202-B1 B

Cyclone II DSP BoardB

22 22Thursday, March 24, 2005

Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121

Analog Power Supplies

Copyright (c) 2005, Altera Corporation. All Rights Reserved.

ADC_GND

DAC_GND

DISABLEENABLE

PIN2-PIN3PIN1-PIN2

DISABLEENABLE

PIN2-PIN3PIN1-PIN2

VCCA_DACVoltageSelectJumper

3.3V5V

PIN2-PIN3PIN1-PIN2

DAC_GND

ADC_GND

GND

VCCA_ADC (1A)

VCCA_DAC (1A)

6V (1.5A)

C1220.01uFC1220.01uF

VIN1 VOUT 2

GN

D3

ADJUST 4

ENABLE5

GN

D6

U24

REG104GA

U24

REG104GA

C127

1uF

C127

1uF

J41BANANA_JACK_BLACKJ41BANANA_JACK_BLACK

+ C37

47uF

+ C37

47uF

C213 8200pFC213 8200pF

R79 0R79 0

R257 0R257 0

R2310.0KR2310.0K

R83191KR83191K

L17 DNIL17 DNI F6 7AF6 7AC105

0.1uF

C105

0.1uF

7 8

1

2

U6ASi9936BDYU6ASi9936BDY

C1480.01uFC1480.01uF

123

J28

TSW-103-07-L-S

J28

TSW-103-07-L-S

R263.32KR263.32K

C1380.01uFC1380.01uF

C111

10uF (6.3V)

C111

10uF (6.3V)

L18 DNIL18 DNI

J39BANANA JACK

J39BANANA JACK

L15 10uHL15 10uH

C1210.01uFC1210.01uF

5 6

3

4

U6BSi9936BDYU6BSi9936BDY

+C101

220uF

+C101

220uF

C132

1uF

C132

1uF

C133

1uF

C133

1uF

R86 10.0KR86 10.0K

C210

1uF

C210

1uF

C2

10uF (25V)

C2

10uF (25V)

L16 10uHL16 10uH

R282.0KR282.0K

R90 49.9R90 49.9

R291.33KR291.33K

C120

10uF (6.3V)

C120

10uF (6.3V)

R800R800

C2110.01uFC2110.01uF

R851.33KR851.33K

C104

1uF

C104

1uF

+ C26

47uF

+ C26

47uF

+C103

220uF

+C103

220uF

R868.1KR868.1K

R2342.15KR2342.15K

C134

0.1uF (25v)

C134

0.1uF (25v)

+ C11

47uF

+ C11

47uF

C128

1uF

C128

1uF

C212 68pFC212 68pF

F7 7AF7 7A

J42BANANA JACK

J42BANANA JACK

R5

8.25K

R5

8.25K

R84 15KR84 15K

J2BANANA_JACK_BLACKJ2BANANA_JACK_BLACK

R44 0R44 0C112

0.1uF

C112

0.1uF

J40BANANA_JACK_BLACKJ40BANANA_JACK_BLACK

KFF1

RT2

BP

53

SYNC4

SGND5

SS6

VFB7

COMP8

PGND 9LDRV 10

BP

1011

SW 12

HDRV 13

BOOST 14

VIN15

ILIM 16

GN

D17

U9 TPS40055PWPU9 TPS40055PWP

VIN1 VOUT 2G

ND

3

ADJUST 4

ENABLE5

GN

D6

U23

REG104GA

U23

REG104GA

C190 0.1uF (25v)C190 0.1uF (25v)

R45 0R45 0

C108

1uF

C108

1uF

C131

0.1uF (25v)

C131

0.1uF (25v)

R32 0R32 0

R2321.15KR2321.15K

R255 0R255 0

R810R810

R43 0R43 0

C6

0.1uF (25v)

C6

0.1uF (25v)

C96

10uF (25V)

C96

10uF (25V)

R256 0R256 0

R36 0R36 0

1 2 3J33

TSW-103-07-L-S

J33

TSW-103-07-L-S

C16

100pF

C16

100pF

R2210.0KR2210.0K

123

J25

TSW-103-07-L-S

J25

TSW-103-07-L-S

C40

1uF

C40

1uF

C214 3900pFC214 3900pF

L3 39uHL3 39uH

R270.1R270.1

R240.1R240.1

R87 681R87 681