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The 450mm Semiconductor Wafer Size Transition contrasted to Prior Generations April 29, 2013* By G. Dan Hutcheson VLSIresearch inc

The 450mm Semiconductor Wafer Size Transition contrasted ...€¦ · G. Dan Hutcheson is CEO and Chairman of VLSI Research Inc. His career spans more than thirty years, in which he

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Page 1: The 450mm Semiconductor Wafer Size Transition contrasted ...€¦ · G. Dan Hutcheson is CEO and Chairman of VLSI Research Inc. His career spans more than thirty years, in which he

The 450mm Semiconductor

Wafer Size Transition contrasted

to Prior Generations

April 29, 2013*

By G. Dan Hutcheson

VLSIresearch inc

Page 2: The 450mm Semiconductor Wafer Size Transition contrasted ...€¦ · G. Dan Hutcheson is CEO and Chairman of VLSI Research Inc. His career spans more than thirty years, in which he

We all know why some want to make the leap to 450mm wafers. Larger wafers have always brought benefits in terms of an areal gain that is about 2-2.5x, a cost-per-transistor benefit that is roughly equivalent to a node, for a capital cost rise that is about the same as a 1 node or about 30%. In other words, jumping wafer sizes is like getting a free fab for everyone you build and it’s great insurance for an EUV delay.

But it’s no secret that after the 300mm disaster, suppliers fear it. Some believe that 450mm could be as expensive as $40B to develop, which is roughly equivalent to 7 years of equipment industry R&D at current spending rates. In other words, all other R&D must cease between now and 2018 to do 450mm. Clearly that can’t happen and moreover, current spending rates indicate a much lower ramp. When I look at the historical spend rates for wafer size transitions, the difference in management so far from 300mm, and assume we don’t have to backtrack, I come up with a more reasonable $8B. Admittedly, it’s a lot more that 200mm, but the industry is also 5x the size it was then.

Equipment Industry R&D Spending on New Wafer Size Platforms

I don’t think that anyone can deny that we are doing much better this time around. We certainly got the order of development in a much more sequential order, which should prevent the 1998 U-turn. That redevelopment of tools was largely because automation standards were not developed before the tools.

Page 3: The 450mm Semiconductor Wafer Size Transition contrasted ...€¦ · G. Dan Hutcheson is CEO and Chairman of VLSI Research Inc. His career spans more than thirty years, in which he

300mm versus 450mm Progress Milestones

1998 was a critical inflection point for 300mm wafer development, as this industry stalled. Resistance to it started building early in the year. The industry was heading into a deep downturn, triggered by the Asian Financial Crisis. Intel canceled their 300mm fab in Ft. Worth, which was never built. Then Motorola reassigned it 300mm people and didn’t show up to an ISS panel, but sent the message that they were just as committed as ever. Motorola had been pounding the table, threatening to never buy from equipment suppliers if they weren’t ready by 1998. The unwritten message sent that became true was that they’d never buy much of anything again.

There was another fundamental problem: Canon was still the only litho tool company in the 300mm game. ASML & Nikon chose to focus on 193nm instead, which proved smarter. This timeframe would mark the beginning of Canon missing 7 generations of 193nm tools. Today, is EUV any different?

By April of 1998, Toshiba, NEC, and Hitachi were talking up 300mm, but were not disclosing that they had no funds. By June, Japan started talking up skipping to 400mm and equipment makers began to feel like they’d been duped. Applied Materials and TEL had $1.2B in 300mm inventory that would be scrapped due to postponements and subsequent redesigns. Then, Applied quietly threatened to walk out of I300I because the latter had a strategic operative that made them unwilling to change with the times. I then gave my infamous revolution speech and followed with a Chip Insider series that pretty much reset requirements.

That said, we are at a critical juncture for 450mm and before my panel at ISS, there were only a few straight talkers. One is Morris Chang, who wants it ready for a TSMC pilot line in

Page 4: The 450mm Semiconductor Wafer Size Transition contrasted ...€¦ · G. Dan Hutcheson is CEO and Chairman of VLSI Research Inc. His career spans more than thirty years, in which he

2013. The other is Eric Meurice, who says ASML will have their litho tools ready, in all the appropriate beta flavors by 2016, providing that chip makers belly up to the bar with clear commitments (re: orders) for 2-3 450mm fabs. At least Eric is committed and ASML is in a far better position than Canon was. One thing is clear: the period between 2012 and 2015 is very critical.

So far, 450mm has been pretty inexpensive for the equipment industry. Our analysis shows they’ve spent about half a billion dollars and that’s including all the overhead and ancillary costs like airfares and hotels at all the conferences. So far the ramp has been very slow from what we can see, this slow ramp will continue through this year. But given history, there must be a steep ramp in equipment industry spending by 2013, or 450mm will not be in production by 2018. Every year this ramp gets delayed, will be a year of delay for the production ramp.

Equipment Industry R&D Spending Ramps on New Wafer Size Platforms

Page 5: The 450mm Semiconductor Wafer Size Transition contrasted ...€¦ · G. Dan Hutcheson is CEO and Chairman of VLSI Research Inc. His career spans more than thirty years, in which he

Even though this slope looks steep, the accumulation is not much different than prior generations of wafer sizes.

What equipment suppliers will spend developing 450mm

Page 6: The 450mm Semiconductor Wafer Size Transition contrasted ...€¦ · G. Dan Hutcheson is CEO and Chairman of VLSI Research Inc. His career spans more than thirty years, in which he

Areal Development Cost of Fab Capacity by Wafer Size

The ratio of Equipment Industry Development Spending on New Wafer Size Platforms versus the Cost of a Wafer Fab should be more favorable than any prior generation of tool sets. That’s assuming a $6B fab, which is what they spend today. This ratio is extremely important because it translates into a quicker payback for the wafer size. 300mm was almost 4, so that meant that 4 fabs had to be built before the spending equaled the capex. But the equipment spending in that meant that more like 6 fabs had to be built. Assume an R&D ratio of 15% and 40 fabs had to be built just to cover the R&D. But wait, you have to divide that by 20% to account for the wafer size portion, so a total of 200 fabs had to be built before the R&D spent on 300mm was paid off. That’s why this ratio is so important.

Another number that is critically important is the relative areal cost of the capacity versus the equipment development cost. 300mm was a disaster, because at almost $35 per square centimeter, it was over 6x the semiconductor revenues that would come off that area. So how would the semiconductor industry make enough in a reasonable timespan to pay it back? That’s why the equipment industry got stuck with the bill and the reverberations have been terrible.

Since 2000, equipment development spending has been a flat line. The semiconductor industry has had to share an ever larger percentage of the load.

Page 7: The 450mm Semiconductor Wafer Size Transition contrasted ...€¦ · G. Dan Hutcheson is CEO and Chairman of VLSI Research Inc. His career spans more than thirty years, in which he

Semiconductor Industry RD&E Spending History 1980-2020F

When we came up with the $8B R&D bill for 450mm, we assumed that R&D would continue to flat-line between now and 2020. But that raises an issue I did not factor into the analysis: if the 450mm R&D spend has to come out of a flat line, then that means it has to come out of process node spending. In other words, it inherently assumes Moore’s Law must slow.

If we zoom in on the problem, we can see it much more clearly. In the past, R&D spending always bumped up to accommodate the wafer size transition. Then there was a spending holiday, where it ramped down. But that did not happen with 300mm. Spending continued at high levels because of all the exotic new materials and processes we were introducing to stay on Moore’s curve. I doubt that these pressures are going to disappear.

Page 8: The 450mm Semiconductor Wafer Size Transition contrasted ...€¦ · G. Dan Hutcheson is CEO and Chairman of VLSI Research Inc. His career spans more than thirty years, in which he

Equipment Industry RD&E Spending History 1980-2020F

Now if you’re an old school chip maker you’re probably thinking, ‘Why should I care? It’s their money and they have to do this to keep my business.’ I certainly am. But that assumes your business is worth keeping for anything other than survival.

If equipment industry R&D has flatlined, it must have done so for a real reason … not because R&D is getting cheaper to do. Each new node of Litho tool development costs about a billion dollars today. Applied Materials spends more than two billion advancing its tool sets each node. If anything, R&D has flatlined only because of consolidation efficiencies, which I talked about last year (i.e. Bruck’s rule). Otherwise, R&D expenses would be much higher. In other words, the patient is stent for better revenue flow.

You see, the R&D flatline has occurred because the equipment industry’s revenues have also flatlined. Put on an MBA hat and you say, it doesn’t make sense to invest in 450mm if you are an equipment company.

Page 9: The 450mm Semiconductor Wafer Size Transition contrasted ...€¦ · G. Dan Hutcheson is CEO and Chairman of VLSI Research Inc. His career spans more than thirty years, in which he

Semiconductor and Equipment Revenue History

450mm will make the problem worse, not only because of the cost of its development, but the additional cost of carrying process development for 2-3 nodes across two wafer sizes. We must avoid the 300mm problem of A and B teams and continual push-outs. This is a big worry for equipment suppliers.

All these reasons are why 450mm became a battle of the party of Yes versus the party of No. That is changing to maybe … but only if you pay me. The equipment industry is far more positive about 450mm this year than they have ever been before. Moreover, I would argue that for all the reasons above, the equipment industry is likely to turn into a growth industry again. The customers who buy most of the tools have a justifiable need for 450mm, which means it will happen. That also means that it must be paid for if the equipment industry is going to supply the tools.

Moreover, from a business perspective semiconductors are still very interesting to equipment suppliers. A decade long attempt to find other revenue rivers in LED and Solar has resulted in a few streams and lots of creeks. But nothing comes close to replacing the semiconductor industry. Even if all lights were LED tomorrow, the lighting industry is only a third the size of the semiconductor’s. Worse, LEDs last a lot longer so the market will inherently shrink. Solar is a business of far greater government subsidy than

Page 10: The 450mm Semiconductor Wafer Size Transition contrasted ...€¦ · G. Dan Hutcheson is CEO and Chairman of VLSI Research Inc. His career spans more than thirty years, in which he

semiconductors have ever been. Semiconductors have a lot better value proposition, which means the growth opportunity for equipment makers has to be better over the long run.

Finally I have not written this to be on either party’s side. I have intentionally steered a middle course, so whichever party you’re in means you’ll probably see me as being on the other side. I am not. The intent is to lay out the fundamental business and economic issues so the industry can deal with them on a rational plane.

Source: White Paper is from weSRCH (www.wesrch.com); used with permission.

Page 11: The 450mm Semiconductor Wafer Size Transition contrasted ...€¦ · G. Dan Hutcheson is CEO and Chairman of VLSI Research Inc. His career spans more than thirty years, in which he

Addendum

About the Author

G. Dan Hutcheson is CEO and Chairman of VLSI Research Inc. His career spans more than thirty years, in which he became a well-known visionary for helping companies make businesses out of technology. This includes hundreds of successful programs involving product development, positioning, and launch. Dan is a recognized authority on the economics of innovation and has a proven track record of being able to predict trends accurately using the economic models he develops. He is a senior member of the IEEE and a recipient of SEMI’s Award for outstanding contributions in marketing for his extensive development of the economics behind the semiconductor industry.

He has authored numerous publications on the economic, strategic and tactical aspects of how to succeed in the business of technology, which includes numerous articles and weekly analysis of the memory market. He is respected as a Moore’s Law scholar, having published many papers and invited talks on the subject over his career. This includes, most notably, work for the IEEE, the Semiconductor Industry Association, the National Institute of Standards and Technology, SEMATECH, SEMI, and The Electro Chemical Society. He has twice authored invited articles for Scientific American on Moore’s Law. He has also been the keynote or invited speaker on many other technology topics at dozens of conferences, including the Robert S. Strauss Center’s Technology, Innovation and Global Security Speaker Series.

Dan is arguably best known for his forecasting of strategic infrastructure shifts and his early-eighties development of the first factory cost-of-ownership models, which are now the basis for most large-scale capital decision-making. He predicted the shift of the DRAM memory market from the United States to Japan in the 1980’s, then the shift of it to Korea in 1990’s, as well as the driving forces for the rise of Flash Memory. Most recently, he gave the invited talk, The Future of Memory: Challenges and Opportunities, at the Applied Materials Technical Symposium in Japan.

His pro bono work has included serving as an advisor on innovation to the White House Council of Economic Advisors, teaching invited courses on Manufacturing Economics and The Economics of the Internet at Stanford University, and serving on the Board of Advisors to the Extension School at UC Berkeley. His work at UC Berkeley helped the Extension School avoid wasting millions on capital acquisitions, as well as developing the ‘Lifelong Learning’ strategy that was key in turning this part of the University into a profit center for UC Berkeley.

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Page 13: The 450mm Semiconductor Wafer Size Transition contrasted ...€¦ · G. Dan Hutcheson is CEO and Chairman of VLSI Research Inc. His career spans more than thirty years, in which he

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