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The Central Processing Unit Instruction Sets: Addressing Modes and Formats

The Central Processing Unit Instruction Sets: Addressing Modes and Formats

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Page 1: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

The Central Processing Unit

Instruction Sets:Addressing Modesand Formats

Page 2: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Addressing Modes

The most common addressing techniques:

ImmediateDirect IndirectRegisterRegister IndirectDisplacement (Indexed) Stack

Page 3: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Immediate Addressing

Operand is part of instructionOperand = address fielde.g. ADD 5

Add 5 to contents of accumulator 5 is operand

No memory reference to fetch dataFastLimited range

Page 4: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Immediate Addressing Diagram

OperandOpcode

Instruction

Page 5: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Direct AddressingAddress field contains address of

operandEffective address (EA) = address field (A)e.g. ADD A

Add contents of cell A to accumulator Look in memory at address A for operand

Single memory reference to access data

No additional calculations to work out effective address

Limited address space

Page 6: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Direct Addressing Diagram

Address A

Instruction

Memory

Operand

Opcode

Page 7: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Indirect Addressing (1)

Memory cell pointed to by address field contains the address of (pointer to) the operand

EA = (A) Look in A, find address (A) and look there

for operand e.g. ADD (A)

Add contents of cell pointed to by contents of A to accumulator

Page 8: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Indirect Addressing (2)

Large address space 2n where n = word lengthMay be nested, multilevel, cascaded

e.g. EA = (((A)))Draw the diagram yourself

Multiple memory accesses to find operand

Hence slower

Page 9: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Indirect Addressing Diagram

Address A

Instruction

Memory

Operand

Pointer to operand

Opcode

Page 10: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Register Addressing (1)

Operand is held in register named in address filed

EA = RLimited number of registersVery small address field needed

Shorter instructions Faster instruction fetch

Page 11: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Register Addressing (2)No memory accessVery fast executionVery limited address spaceMultiple registers helps performance

Requires good assembly programming or compiler writing

c.f. Direct addressing

Page 12: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Register Addressing Diagram

Instruction

Registers

Operand

Register Address ROpcode

Page 13: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Register Indirect Addressing

C.f. indirect addressingEA = (R)Operand is in memory cell pointed to

by contents of register RLarge address space (2n)One fewer memory access than

indirect addressing

Page 14: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Register Indirect Addressing Diagram

Register Address R

Instruction

Memory

Operand

Opcode

Pointer to Operand

Registers

Page 15: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Displacement Addressing

EA = A + (R)Address field hold two values

A = base value R = register that holds displacement or vice versa

Page 16: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Displacement Addressing Diagram

Register ROpcode

Instruction

Memory

OperandPointer to Operand

Registers

Address A

+

Page 17: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Relative Addressing

A version of displacement addressingR = Program counter, PCEA = A + (PC)i.e. get operand from A cells from

current location pointed to by PCc.f locality of reference & cache usage

Page 18: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Base-Register Addressing

A holds displacementR holds pointer to base addressR may be explicit or implicite.g. segment registers in 80x86

Page 19: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Indexed Addressing

A = baseR = displacementEA = A + RGood for accessing arrays

EA = A + R R++

Page 20: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Combinations

Postindex (indexing is performed after the indirection)

EA = (A) + (R)

Preindex (indexing is performed before the indirection)

EA = (A+(R))

(Draw the diagrams)

Page 21: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Stack Addressing

A stack is a linear array of locations. It is sometimes referred to as a

pushdown list or last-in-first-out (LIFO) queue.

A stack is a reserved block of locations.Operand is (implicitly) on top of stacke.g.

ADD Pop top two items from stackand add

Page 22: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Instruction Formats

Layout of bits in an instructionIncludes opcodeIncludes (implicit or explicit)

operand(s)Usually more than one instruction

format in an instruction set

Page 23: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Instruction Length

Affected by and affects: Memory size Memory organization Bus structure CPU complexity CPU speed

Trade off between powerful instruction repertoire and saving space

Page 24: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Allocation of Bits

The following interrelated factors go into determining the use of the addressing bits:

Number of addressing modes (Sometimes an addressing mode can be indicated implicitly. In other cases, the addressing modes must be explicit, and one or more mode bits will be needed.)

Number of operands Register versus memory (With a single user-

visible register (usually called the accumulator), one operand is implicit and consumes no instruction bits. However, single-register programming is awkward and requires many instructions.)

Page 25: The Central Processing Unit Instruction Sets: Addressing Modes and Formats

Allocation of Bits

Number of register sets (Most contemporary machines have one set of general-purpose registers, with typically 32 or more registers in the set.)

Address range (For addresses that reference memory, the range of addresses that can be referenced is related to the number of address bits.)

Address granularity (For addresses that reference memory rather than registers, another factor is the granularity of addressing. In a system with 16- or 32-bit words, an address can reference a word or a byte at the designer’s choice. Byte addressing is convenient for character manipulation but requires, for a fixed-size memory, more address bits.)