The effect of the hole current on the channel inversion in trench insulated gate bipolar transistors (TIGBT)

Pergamon Solid-State Ekctronics Vol. 37, No. 3, pp. 507-514. 1994

Copyright 0 1994 Elscvier Science Ltd Printed in Great Britain. All rights reserved

0038-I lOI/ $6.00 + 0.00

THE EFFECT OF THE HOLE CURRENT ON THE CHANNEL INVERSION IN TRENCH INSULATED GATE

BIPOLAR TRANSISTORS (TIGBT)

FLORIN UDREA, GEHAN A. J. AMARATUNGA and QIN HUANG

Department of Engineering, Cambridge University, Cambridge, CB2 IPZ, England

(Received 25 March 1993; in revised form 12 August 1993)

Abstract-It has been found that the hole current flowing vertically through the MOS substrate of a Trench IGBT (TIGBT) contributes significantly to a reduction in channel resistance. Compared to a classical IGBT the potential developed by the hole current is distributed in the p region, which acts as the substrate for the MOS, in parallel with the channel and no longer gives rise to the latch-up of the cathode junction. An analytical model which includes the effect of the potential distribution in the MOS substrate on the carrier inversion in the channel is presented. Numerical simulation and analytical modeling demonstrate a positive feedback effect created by the hole current which improves the I-V characteristics of the TIGBT. The analysis has been extended for different doping profiles of the p base. In the case of a diffused p layer with a Gaussian profile the physical behaviour of the MOS channel in the presence of a substrate current has been found to be different from a classical MOS channel

NOTATION density and to a more natural, unconstricted, current

VA I

InrIp

%P VG V MOS vD V w V PIN V P2 VI VP Vf V

VT0 VT VFB

::

anode voltage (V) anode current (A) electron, hole current (A) static current gain of PNP transistor gate voltage (V) MOS channel voltage drop (V) drain voltage (v) spreading resistance voltage drop (V) PIN diode voltage drop (V) substrate voltagedrop<V) cathode junction voltage drop (V) total voltage drop on the p base (V) substrate potential (V) channel potential (V) channel threshold voltage (V) channel local threshold voltage (V) flat-band voltage (V) surface potential (v) potential difference between intrinsic level and Fermi level (V) semiconductor charge induced by the gate voltage (C/cm2) channel charge (C/cm2) depletion region charge (C/cm’) oxide capacitance (F/imi) p base doping concentration (cm-‘) channel width (cm) channel length (cm) channel mobilitv (cm2/Vs) active area (cmj) . ’ dielectrical constant of silicon (F/cm) electron charge (C) cathode short resistance (a) substrate resistance (D)

1. INTRODUCTION

flow[l4]. Moreover devices such as the DMOSFET and IGBT suffer from a parasitic JFET effect which increases the forward voltage drop in the on-state. Though for a highly modulated n-base (like in an IGBT) the effect is less significan@], but in the proximity of the p well/n-base the modulation of the n-base is very low so that the JFET effect cannot be neglected. In trench devices this effect is totally suppressed. It has been observed that the IGBT is very sensitive to latch-up under inductive load switch- ing[6]. Due to the reduced length of the cathode junction, in the Trench IGBT the latch-up current is increased significantly. A factor of four at room temperature between the static latch-up current density of a Trench IGBT and a classical vertical IGBT has been reported[4].

9000 - A-

! 8000 - (a) 3 7000 - / W,/’ /

/ x

6000 /

- .z / z /

d 5000

/ - /

/ z 4000 - e ; 3000 -

9 2000 -

g 1000 - d

I , I I I 1 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

Anode voltage [V]

Trench Power devices have been found to offer a very Fig. 1. IV characteristics of IGBT and Trench IGBT low on-resistance mainly due to an increased packing (PISCES simulation).

507

508 FLORIN UDREA PI (I/.

In Fig. 1 the simulated IV characteristics for a 12pm Trench IGBT cell and a 24pm IGBT are shown. For both structures a breakdown voltage of 500 V, a life time of 2 vs. and a Gaussian doping profile of the p substrate with N,, = IO” cm 3 have been considered. In addition, for the IGBT, a deep and highly doped p layer has been placed at the surface in the vicinity of the cathode diffusion to increase the latch-up current density. In Fig. I one can see the static latch-up of the parasitic thyristor in the IGBT, whereas the current in the Trench IGBT tends to saturate with increasing anode voltage, thus remaining in the Safe Operating Area (SOA). For high speed devices the life time is typical of 0.1 ps. In this case, at a given anode voltage the current density decreases substantially and the latch-up effect becomes less important. At the same time the potential drop in the channel is negligible compared to the potential drop in the n-base (due to a reduced conductivity modulation) and therefore the potential drop in the n-base of an IGBT caused by the JFET effect is substantially increased. To reduce the influence of this effect the cell dimensions of the IGBT should be further increased. This however leads to a reduced packing density.

The analysis performed in this paper is concerned with the effect of the hole current flow in parallel with the MOS channel on the carrier charge in the inversion layer and consequently, on the current density of the device. It should be noted that due to a different geometrical distribution of the hole current this effect is less effective in conventional vertical IGBTs. Thus, it is shown that one of the factors which contributes to improved on-state performances in the Trench

X

r Y

4.2 0.8 I I- I-

Cathode

n - base

n + base

P+ anode

Anode

Fig. 2. Cross section of Trench IGBT.

2

IGBT over the classical IGBT or similar devices is the way the hole current flows through the MOS substrate. to develop a distributed substrate potential without leading to the latch-up of the parasitic thyristor. The positive substrate potential reduces the charge in the depletion layer formed in the p base at the boundary with the channel and leads to an increase in channel carrier density. An analytical model which takes into account the distributed substrate potential effect on the channel inversion. for different doping profiles of the p layer has been developed. The cross section of a Trench IGBT is shown in Fig. 2. A self aligned process[4] has been assumed with a unit cell of I2 ~tm. The gate oxide layer has a thickness of 0.08 pm. A double n ~. n + base variant rated for 500 V has been chosen. The II + buffer layer has a doping concentration of 5 x 10”cmm3 and a thickness of 2 pm while the thick base has a concentration of lO“‘cm m3 and a thickness of 40 pm. A lifetime of 2 ps has been assumed.

2. THE TRENCH IGBT EQUIVALENT CIRCUIT

Two types of equivalent circuits for an IGBT have been presented so far in the literature: first using a MOS-PIN combination[7] and second using a MOS-PNP combination with the boundary between p and n-base, taken as being the collector/base junction of the PNP transistor[5]. The second model leads to a better understanding of the device because it takes into account both the electron and hole currents. The equivalent circuit proposed here models the region between the anode and the trench MOS drain as being comprised of a modified PIN diode and a spreading resistance in parallel with an accumulation layer resistance. The PIN diode is formed between the accumulation layer at the trench bot- tom, the lightly doped n-base (I region) and the anode terminal. It should be noted that the mobile carrier concentration in the thick n-layer of the PIN diode has a different distribution from a usual PIN diode due to different boundary conditions (the presence of the n + buffer and the p base). To take into account the contribution of the hole current a current source in parallel with a diode is included in the equivalent circuit. It is as if the PNP transistor was split in an Ebbers-Moll model using a PIN diode to describe the high-level injection. In Fig. 3 an equivalent circuit for a Trench IGBT is shown. The main differences between the diagram proposed and the equivalent circuit of a classical IGBT are: (a) The JFET element does not appear in Trench IGBT. (b) The short resistance R,, is much smaller due to a reduced cathode junction length. This will increase the latch-up current density of the Trench IGBT. (c) A substrate resistance Rp2 through which the entire hole current flows parallel to the channel is now included (Fig. 3). The influence of this resistance is negligible in a classical IGBT. It is worthwhile noting that Rrz does not affect the voltage drop on the

Effect of hole current on channel inversion 509

“j

V P2

“II2

Fig. 3. Trench IGBT equivalent circuit.

emitter/base junction of the parasitic NPN transistor but modulates the substrate potential of the MOS component. Therefore the MOS component is mod- elled as being a MOS with a substrate current for which an analytical model is developed in Section 3. With notation shown in Fig. 3, the forward anode voltage drop is given by:

vA = vMOS + Vspr + vPIN (1)

and

V MOS + Vspr = vO2 + VP2 + y. (2)

The total voltage drop across the substrate can be expressed as:

Trench MOS

VP = VP2 + v, = tlpnp I& + R,,). (3)

X

1 Y

I -

3. MOS PHYSICS WITH A SUBSTRATE CURRENT

The analysis below is concerned with the effect of the distributed potential along a MOS substrate on the channel inversion and thereby the IV characteristic. To model this situation a four terminal structure has been simulated (Fig. 4). The substrate current flows vertically through the p resistive substrate of the MOS. The aim is to analyse the influence of this substrate current flowing through the p resistive layer in parallel with the insulated gate on the channel current. Because just a small fraction of the substrate current flows laterally under the source junction it is assumed that the potential drop on this junction, V,, is given only by the vertical current flow to the source contact. V, must be smaller than 0.5 V to prevent the latch-up of the parasitic NPN transistor. For a uniform p doped layer, which acts as the substrate for the Trench MOS channel, the potential varies linearly from the source to the drain. The potential at a point situated between A and B (Fig. 4) is given by V*+ y, (VX=O, Vi= V,- 4). As long as the total substrate voltage VP is close to the drain potential V. so that the depletion region boundary is parallel to the channel 0, axis), the potential in the channel V varies approximately linearly from the source to the drain contact. Since V* also varies linearly with y, we can write:

v*(Y) = Y. V(Y), (4)

where y is a constant for a particular V,. The energy band diagrams for a classical MOS and for a MOS with a distributed substrate potential are shown in Fig. 5. Having as a reference potential the source terminal, the surface potential 4, has the same value in both the cases: 4, = VFB + 2 . q& + V. Nevertheless in the second case [Fig. 5(b)] the energy bands are less bent. In terms of charge, for strong inversion, the semiconductor charge Qs made up from the charge in the depletion region Qs and the charge in the

111 Source

p substrate

I IP

“j n+ ”

A

4 v* V

B ”

P+ n+

Drain

Fig. 4. MOS with a substrate current used to simulate a MOS structure in Trench IGBT.

510

E,

FLORIN UDREA et al.

..E_,

6---- E. 1

I-q ( vi + v* )

E Fp I B

Ev

(b)

Fig. 5. Energy bands for a classical MOS (a). and a MOS with a substrate current (b).

inversion layer Q. does not depend on the substrate while the saturation drain voltage can be found out potential V* + V,: from V, = VT(VDlar):

v ,=v -v. 4.4 +c Ds*t 0 l-a t

2

= -C,,(V,- VFB-2.f#+- V), (5)

where C,,, is the oxide capacitance, Vra is the flat- band voltage, and &. is the potential difference between the intrinsic level and the hole Fermi level. The depletion region in the case of Fig. 5(b) will be less extended due to the positive potential in the p substrate which tends to flatten the energy levels. Therefore the charge in the depletion region will be reduced. A direct effect will be an enhancement in the charge in the channel and thus the channel resistance will be decreased. Using the relationship (4) the charge in the depletion region is now given by:

KI - K

J I’,, - V,, - v,> + a 19)

By integrating the charge in the channel Q,,, one can find out the analytical expression of the drain current I,. The electron charge in the channel is obtained from the relationships (4-6):

Q.= -C,,[V,- I’,,-2.4, - V-K

and:

J2&+(1 -7). v- V,] (IO)

(II)

Q,V(_r)= -C,;K.J2&+(1 -7). V(y)- v,,

(6) 3.0 -

P

where K = J-i. The “local threshold” voltage in a point y in the channel can be written as:

2 2.5 - - Model

x

z . . . - Simulation

2.0 -

b[~cvI = VFB + 2 4F + Vcy)

+K.,/2++(1 -11). V(y)- I’,. (7)

One can notice that at every point of the channel the “local threshold” voltage for the MOS with a distributed potential in the substrate is smaller than for a classical MOS. The first point at which the inversion takes place is at the source contact:

0 0.5 1.1) I 5 z (I 75

Drain voltage [VI

k’r,,= V,,+2++K.~~, (8)

Fig. 6. Modeling and PISCES simulations of IV characteristics for a classical MOS (a) and a MOS with a substrate

current (b) (NA = 8 x 1OL6 cm-‘, V,; = 15 V).


7 0.9 -

” 0.8 - .m i 0.7 -

g 0.6 -

2 0.5 - Channel potential

Distance y [Km]

Fig. 7. Potential distribution in the channel and substrate for a uniform doped p base with NA = 2 x 10”cm-’

(PISCES simulation for VA = 2 V).

Therefore:

I+,, (v&$--2.~,)v~-;v~ { 2

-- 3 K v D

_; + v [(I’, - Vp + W,)3’2 P J

- (WF - v,)3121 1 1 (12)

where W and L are the width and respectively the length of the channel, p the electron mobility in the channel. Equation (12) describes the MOS current as a function of drain voltage VD and total substrate voltage VP for a given gate voltage V,. Because in the MOS structure of a Trench IBGT the voltage developed across the channel and the substrate voltage are related by (2) and because the hole current flowing through the substrate depends on the MOS electron current, VD and VP are not independent variables. Based on numerical simulation of the structure in Fig. 4, using PISCES, a linear dependence between V, and VP (VP = 0.7 Vn) has been assumed, provided that the MOS functions in the linear region and LX~,,~ is approximately constant. The numerical simulations and analytical results for a classical MOS and a MOS with a substrate current are compared in Fig. 6. It can be seen that due to the hole current flowing through the MOS substrate parallel with the channel, the saturation tendency of the drain current is reduced with increasing drain voltage. The IV characteristic in the linear region becomes closer to the ideal model for which the charge in the depletion region has been neglected (K = 0), and therefore for a given drain voltage in the range of l-3 V the current density is increased. At higher drain voltages the mobility decreases due to the increased electric field across the channel and therefore p can no longer be. considered constant. It is important to repeat that the model fits the simulation results for which the values of VD and V, are close to each other. In other words relationship

F 0.8

v1 -ii 0.7 ._

5 0.6 5 ; 0.5

5 ;; 0.4 CI 2 0.3

-0 5 0.2

5 z 0.1

i?! r\ ” 0 0.5 1.0 1.5 2.0 2.5 3.0

Distance y [pm]

Fig. 8. Potential distribution in the channel and substrate for a uniform doped p base with NA = 4 x 10’6cm-3

(PISCES simulation for VA = 2 V).

(4) is valid. This assumption is more accurate for reduced values of the drain voltage (in the linear region), for which the potential in the channel has approximately a linear distribution from the source to the drain contact.

4. TRENCH IGBT MODEL AND ANALYSIS

Several numerical simulations for different p-bases using PISCES II-B[8] have been carried out. The aim is to find an optimal doping profile for the p base in order to improve the on-state performance of the device. As long as the latch-up current is very high (due to both vertical current flow and reduced length of the cathode junction) the doping concentration of the p layer may be reduced. Nevertheless the doping of the p layer is limited by dynamic latch-up (under inductive conditions) and by punch-through in voltage blocking operation mode. Decreasing the doping concentration of the p base anode current

x 10-4

T

0 1 2 3 4 5 6

Anode voltage [V]

Fig. 9. IV characteristics for Trench IGBT for different doping levels of epitaxial p base. (a) NA = 4 x lOI cm-‘, (b) NA = 4 x 1Ol6 cn-3 plus a very doped surface layer, (c)

NA = 4 x 10” cne3 (PISCES simulation for V, = 15 V).

512 FLORIN UDREA et al.

cathode gate

,I, i ,/I ,I,/, , /iI ‘II u ,,,I I, UI, I ,,, j

Fig. 10. Current distribution in Trench IGBT (PISCES simulation for VA = 2 V and V, = 15 V).

density, for a given anode voltage, will be increased by a dual mechanism. First it will lower the threshold voltage and second, will increase the distributed substrate potential which will further reduce significantly the saturation tendency of the drain current. The analysis is performed on two types of p layers, a uniform epitaxial layer and a

Gaussian layer. The physical behavior of the MOS structure has been found to be different for the two situations.

4.1. iJn@rm layer

The Trench IGBT structure is shown in Fig. 2. Neglecting in eqn (2) the contribution of the accumulation and spreading resistance the voltage drop across the channel can be expressed by the sum of the substrate voltage drop and the voltage drop across the p/n-junction. Two concentration levels have been considered for the p base: a p layer with a concentration of 2 x 10” cm ’ for which the voltage drop developed on the substrate is much smaller than the voltage across the p/n-junction and a lighter doped p layer of 4 x lOI cmm3 for which the opposite applies. In the first case the effect of the hole current on the channel inversion is negligible due to a very low substrate resistance, while in the second case the substrate potential has a closer value to the channel potential and thus it increases the charge in the inversion layer. The situations described above can be seen in Figs 7 and 8. To increase the SOA in the second case an additional more heavily doped layer may be placed at the surface with a depth approximately equal to the depth of the cathode junction. This, however will reduce the substrate potential drop and therefore will affect the IV characteristic of the device (Fig. 9). Using eqn (12) and the relationship between the currents:

Fig. 11. Three dimensional simulation of potential distribution in the channel and substrate for a Gaussian doped p base with a peak concentration of Nkr = IO’* cm- ’ (for L’% = 2 V).

4


IL=_ L snp 1 - apnp ’

(13)

one can obtain:

1 -- 2

Vz,,, - 3 K v ‘M’S MOS - RPzaPnPl [(vMos

- (24~ - &a, gnp03’21

where VMos is given by eqn (1). In the case of a p + layer placed at the surface, the

short resistance RP, can be considered zero. In the relationship above one can see the positive feedback effect of the drain current due to the distributed potential (aPn,,RP21) in the substrate. The result is an improvement in the IV characteristic of the device.

4.2. Gaussian doped layer

The short resistance R,,, in this case is reduced while the substrate resistance RP2 is increased. The idea is to increase the total potential drop in the substrate and to reduce simultaneously the voltage drop across the cathode junction. This will lead both to an enhancement in the current density in the linear on-state region and to an increased SOA. The charge in the channel Q, is given by:

Q,(Y)= -C,xV’,- VF,-~.&-- VcV)l

+&Z?Z+J2+,+ WY)- v*(r), (15)

where the contribution of the voltage drop across the cathode junction has been neglected. Due to a reduced charge in the depletion region [caused by the distribution of the potential in the substrate V*(y)] the charge in the inversion layer is increased substantially. For a Gaussian distribution we can write:

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0

Distance y [urn]

Fig. 12. Potential distribution in the channel and substrate for a Gaussian doped p base with a peak concentration of

NAr = lot8 crnm3 (PISCES simulation for VA = 2 V).

x 10” 8r

A’ I I I I I 0 1 2 3 4 5 6

Anode voltage [V]

Fig. 13. IV characteristics for Trench IGBT for different doping levies of p base. (a) Gaussian profile with N,, = lOI crn3 (b) uniform profile with NA= 4 x IOr cm-), (c) uniform profile with NA = 2 x 10” cm-3

(PISCES simulation for V, = 15 V).

NA(y)= N,;exp (16)

%P I v*(j)=-. Y2

qSPN,s 2,/&Y . erfcb /2,/Z) ’ (17)

where 2@t is the diffusion length, S is the cell area, NAs is the peak concentration. The local threshold voltage is given by:

Vr(U_Y))= Vrrl+2.&+ U_Y)

+J_.J co. 2. & + VC_,v) - V*(y). (18)

The minimum value of the VT as a function of y will indicate the first point in the channel where strong inversion takes place while the maximum value will indicate the pinch-off in the channel. In Fig. 10 the simulated current distribution in the Trench IGBT is shown. A three dimensional plot which combines the potentials in the channel and substrate is shown in Fig. 11. The maximum difference between the channel potential and the substrate potential occurs some- where in the middle of the channel where the depletion region width is also at its maximum (Figs 10 and 12). The potential drop across the cathode junction (the MOS source junction, y = 1 pm) is much smaller than 0.5 V which ensures protection against the latch-up (Fig. 12). As expected [from eqn (15)] the amount of charge in the channel is greater at the drain contact than it is in the rest of the channel. Moreover, compared to a classical MOS in which the initial strong inversion point is located at the source contact and the pinch-off occurs at the drain contact, in this case (i.e. with a Gaussian doped p layer and substrate current) the first strong inversion point is closer to drain contact while the pinch- off occurs in the middle of the channel closer to the source contact. This is due to both the variation of NA and V - V* as a function of y. Simulated IV

514 FLORIN UDREA et al

characteristics for uniform and Gaussian p layers are shown in Fig. 13. With idential results in the linear region the saturation current for a Gaussian doped p base is lower than for a uniform doped layer which further improves the SOA. This can be explained by the fact that in the linear region the effect of the substrate potential and reduced concentration level of the p base in the proximity of the p/n-junction on the IV characteristic is very strong, while in the quasi saturation region the effect of the more heavily doped p layer in the proximity of the cathode junction becomes more important.

5. CONCLUSIONS

The effect of the hole current on the channel inversion in a Trench IGBT has been studied for different doping profiles of the p base. Compared to a classical vertical IGBT the entire hole current flows in parallel with the channel modulating the potential in the substrate. Numerical simulations and the analytical model developed demonstrate that the

distributed potential in the p layer leads to a signifi- cant improvement in the IV characteristics of the device. Moreover, it has been found that in the case of a diffused p base both the on resistance and SOA are improved compared to the case of an epitaxial p layer.

I.

2.

3.

4.

5.

6.

7.

8.

REFERENCES

D. Ueda el al.. IEEE Trans. Elecrron Devices ED-32, 2 (1985). H.-R. Chang Ed ul., IEEE Trans. Elecrrm Derices ED-34, 2329 (1987). C. Bulucea and R. Rossen. Solid-SI. E/~/rm. 34, 493 (1991). H.-R. Chang and B. J. Baliga, IEEE Trans. Elecrron Devices ED-36, 1824 (1989). A. R. Hefner and D. L. Blackburn, Solid-St. Elech-on. 31, 1513 (1988). A. Nakagawa e! crl., IEDM Tech. Dig.. p. I51 (1985). B. J. Baliga, Modern Power Devices. p. 358. Wiley. New York (1987). M. Pinto et al.. Pisces II Technical Report. Stanford Univ. (1985).

Documents

The effect of the hole current on the channel inversion in trench insulated gate bipolar transistors (TIGBT)