The Helmholtz program ‘Research with Photons, Neutrons and Ions (PNI)’

Detectors for High and Low Energy Photons

Heinz GraafsmaDESY Photon Science Detector Group

Research Field Structure of Matter

PNI Review 21.-24. April 2009

2PNI Review 22.-24.4.2009

Detectors for High and Low Energy Photons

The 6M-Pilatus detector (PSI)

3PNI Review 22.-24.4.2009

Detectors for High and Low Energy Photons

500 μm Si

500 μm G

aAs700 μm

Ge

Ge: + “perfect” material+ available via industry- processing challenging- small bandgap (cooling) but:+ small pixels small leakage I

Mid-term goal:

• Ge sensor• (10 cm)2 area• classical modules• using existing chips

Long-term goal:

• Ge sensor• 4-side buttable units• 3D-ASICS

4PNI Review 22.-24.4.2009

Detectors for High and Low Energy Photons

special thin window

standard window

Silicon

Low photon energies: * thin entrance windows* low noise or* amplifying structures

+ pnCCD (MPI-HLL)+ Avalanche Photo Diodes

Mid-term goal:

• duplicate 1k x 1kpnCCD (MPI-HLL)

(under development)

Long-term goal:

• develop 2k x 2kpnCCD (MPI-HLL)

(under study)

CMX

CMX

CMX

CMX

ADCADC

ADCADC

ADCADC

ADCADCADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC 1k pixels

1k pixels

3 keV

Ongoing Developments

The Helmholtz program ‘Research with Photons, Neutrons and Ions (PNI)’

Ongoing Detector Developments at DESY-FS (DS)

Heinz GraafsmaDESY Photon Science Detector Group

Research Field Structure of Matter

PNI Review 21.-24. April 2009

7PNI Review 22.-24.4.2009

The Adaptive Gain Integrating Pixel Detector for XFEL

AGIPD: DESY, PSI, U-Bonn, U-HH

C1

C2

C3

Leakage comp.

Discr.

Contr

ol lo

gic

Readout amp.

3 levels

Filter/write amp.

Analogue pipeline

TrimDAC

Vthr ≅ VADCmax

Anal

ogue

enco

din

g

••wide dynamic input rangewide dynamic input range••multiple (3) scaled feedback capacitorsmultiple (3) scaled feedback capacitors••reduced ADC resolution reduced ADC resolution

(10 bit instead of 12 bit)(10 bit instead of 12 bit)••analogue + digital (2 bit) pipelineanalogue + digital (2 bit) pipelineAnalogue pipeline

Colu

mn b

us

Filter/write amp.

8PNI Review 22.-24.4.2009

The Adaptive Gain Integrating Pixel Detector for XFEL

Mechanics and cooling

Interface electronics

9PNI Review 22.-24.4.2009

The 1M pnCCDs for FLASH and LCLS

CAMP: MPG, DESY, ….

Detector 1

Detector 2

• Cooling• Mechanics• Exp. integration

pixel size75x75 µm2

Total sensitive system area:

59 cm

readout time per frame: 4 ms i.e. 250 fps

can be triggered externally

3 mm central hole1st detector moveable

10PNI Review 22.-24.4.2009

Detectors for PETRA-III (and DORIS)

• Equipping P3 with state of the art detectors• Building up of a Detectors Loan Pool• Expert support to Station Scientists

2D APD-Array: DESY, ESRF, U-Heidelberg, PKI, SPring-8

SensorPCB

Chip Chip

PCB

Cooling (metal)

• 32 x 32 pixels• 300 microns• ~ 1 nsec timing• few nsec framing

Diamond X-BPM’s: DESY, ESRF, AT Ltd.

• single crystal CVD Diamond• RF based electronics (same as e-BPMs)

Backup slides

12PNI Review 22.-24.4.2009

Detectors for PETRA-III (and DORIS)

• Equipping P3 with state of the art detectors• Building up of a Detectors Loan Pool• Expert support to Station Scientists

2D APD-Array: DESY, ESRF, U-Heidelberg, PKI, SPring-8

SensorPCB

Chip Chip

PCB

Cooling (metal)

• 32 x 32 pixels• 300 microns• ~ 1 nsec timing• few nsec framing

Hybrid Pixel Detectors

Au

Sensor Substrate

InGaAs

UBM

Insulator

CMOS ROIC

AuUBM

Al

bumpAu

Sensor Substrate

InGaAs

UBM

Insulator

AuUBM

Al

Au

Sensor Substrate

Al

UBM

InsulatorUBM

Al

Hybridization

Cut the sensor as close as possible

Use thinned readout chips

Stay within the exact n-fold pixel pitch

Gaps between modules

3D integration• Edgeless Silicon Sensors• (Pixel redistribution)• Thinned CMOS pixel ASICs• with Through-Silicon Via contacting• High bandwidth readout (Gigabit Ethernet)

Tile-able Microsystems, produced in Industry

Medipix 2.1ROIC

Courtesy Jan Visschers; NIKHEF

ASIC

The 3D future

Bulk

ASIC 1 (ampl)

SENSOR

ASIC 2 (ADC)

ASIC 3 (Storage)

ASIC 4 (I/O)

SENSOR

Current situation Desired situation

ASIC

insensitive gaps: ≈ 800 µm

Full Frame imagingarea per chip512 x 1024

pixel size75x75 µm2

Total sensitive system area:

59 cm

The full sensitive areaof the system is 59 cm2

with 75 µm pixels, 1024 x 1024

CMX

CMX

CMX

CMX

CMX

CMX

CMX

CMX

total areaper chip:29.5 cm2

readout time per frame: 4 ms i.e. 250 fps

can be triggered externally

device fabrication isfinished now

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADCADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

16 ADCoutputs

16 ADCoutputs

hole diameter: 3 mm

transfer of signal charges

Chip 2: area 29.5 cm2

format: 1024 x 512

Chip 1: area 29.5 cm2

format: 1024 x 512

Detector 1

Detector 2CFEL-ASG Chamber

Imaging system: (a) format 1024x1024, pixel size 75x75 µm2, 8x8 cm2 focal surface(b) center hole, typically 3 mm

Due to overlap of the two detectors, effective insensitivearea can be reduced to 1.6 mm, insensitive gaps: 0.8 mm

(c) movement in y-direction: up to 45 mm

Full Frame imaging,format per chip1024 x 1024

pixel size75x75 µm2

The full sensitive areaof the system is 239 cm2

with 75 µm pixels, 2048 x 2048

CMX

CMX

CMX

CMX

total area per chip:59 cm2, per system:

236 cm2

readout time per frame: ≈ 8 ms

i.e.≈ 125 fps

devices are scheduledfor fabrication end 2010ready: end 2011

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADCADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

16 ADCoutputs

Chip 1: area 59 cm2

format: 1024 x 1024

transfer of charges

This system is 3 – sidebuttable, can be extended toa 2048 x 2048 array

CMX

CMX

CMX

CMX

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADCADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

16 ADCoutputs

Chip 1: area 59 cm2

format: 1024 x 1024

transfer of charges

CMXCMXCMXCMX

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

ADC

16 ADC

outputs

Chip 1: area59 cm

2

format: 1024 x 1024

transferof charges

CMX CMX CMX CMX

ADC

ADC ADC

ADC ADC

ADC ADC

ADC

ADC ADC

ADCADC

ADC

ADCADC

ADC

16 A

DCou

tput

s

Chip 1

: ar

ea59

cm

2

form

at:

1024

x 1

024

tran

sfer

of c

harg

es

2048 x 2048 CCD array(resolution points:

at least 4kx4k @ 1 keV)

pixel size: 75 x 75 µm2

total area: 236 cm2

readout time: < 8 ms

read noise < 15 electrons

Charge handling capacity:> 1000 photons pp

Energy 0.1<E<24 keV

thickness: 500 µm

operation temperature:-40oC