© 2018 IEEE

Proceedings of the 2nd IEEE International Power Electronics and Application Conference and Exposition (PEAC 2018), Shenzhen, China, November 4-7, 2018

Three-Phase Two-Phase-Clamped Boost-Buck Unity Power Factor Rectifier Employing Novel Variable DC Link Voltage Input Current Control

D. Menzi,D. Bortis,J. W. Kolar

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Three-Phase Two-Phase-Clamped Boost-BuckUnity Power Factor Rectifier Employing Novel

Variable DC Link Voltage Input Current ControlDavid Menzi, Dominik Bortis and Johann W. Kolar

Power Electronic Systems LaboratoryETH Zurich, Switzerland

menzi@lem.ee.ethz.ch

Abstract— Battery chargers supplied from the three-phasemains are typically realized as two-stage systems consisting ofa three-phase PFC boost-type rectifier with an output DC linkcapacitor followed by a DC/DC buck converter if boost andbuck functionality is required. In this paper, a new modulationscheme for this topology is presented, where always only oneout of three rectifier half-bridges is pulse width modulated,while the remaining two phases are clamped and therefore ahigher efficiency is achieved. This modulation concept with aminimum number of active half-bridges, denoted as 1/3 rectifier,becomes possible if in contrast to other modulation schemes theintermediate DC link voltage is varied in a six-pulse voltagefashion, while still sinusoidal grid currents in phase with theircorresponding phase voltages and a constant battery outputvoltage are obtained. In this paper, a detailed description of thenovel 1/3 rectifier’s operating principle and the correspondingcontrol structure are presented and the proper closed loopoperation is verified by means of a circuit simulation. Finally, theperformance gain of the 1/3 rectifier control scheme comparedto conventional modulation schemes is evaluated by means of avirtual prototype system.

I. INTRODUCTION

In order to allow a further proliferation of electric vehicles(EV), a widely distributed battery charging infrastructure iscrucial [1]. Applications with power levels above severalkW are typically powered by three-phase PFC rectifiers [2],which in certain cases allow for a bidirectional power flowand therefore also feature the option of using the EV batteriesas a grid energy storage and consequently improve the gridstability by feeding power back to the mains [3]. Due tothe wide variation of EV battery voltages, charging stationshave to cover a wide range in DC output voltage Uo andaccording to the recently published China Grid 2017 ElectricVehicle Charging Equipment Supplier Qualification Verifi-cation Standard nominal output power has to be providedfor a DC voltage range of 750 V down to 400 V, whichoverlaps with the Chinese grid peak line-to-line voltageUll =

√3 ·√

2 · 220 V ' 540 V and therefore a charger withboost and buck functionality [4] is needed (cf. Fig. 1(a)). Aprominent solution to comply with these specifications is touse a two-stage converter system consisting of a three-phaseboost-type PFC rectifier followed by a DC/DC buck converter[5], [6] shown in Fig. 1(b). There, the control of the twoconverter stages is typically decoupled, which means that thethree-phase boost PFC rectifier draws sinusoidal grid currentsia, ib, ic in phase with their respective phase voltages ua, ub,uc while at the intermediate DC link capacitor Cpn a constant

voltage upn, which has to be larger than Ull, is generated[7]. This voltage upn is then stepped down to the requiredoutput and/or battery voltage Uo by the subsequent DC/DCconverter with features an independent control structure. Forbattery chargers, especially in mobile applications, typicallya compact and lightweight system realization is demanded.Therefore, high switching frequencies are required in order todownsize the passive components, which due to the increasedswitching losses on the other hand also reduce the converterefficiency. Therefore, for three-phase PFC rectifiers (as wellas inverter systems) third harmonic injection techniques [8]or space vector modulation [9] are employed to reduce thecomponent stresses and better utilize the DC link voltage.Advanced modulation techniques to reduce the switchinglosses have been introduced, e.g. Discontinuous Pulse WidthModulation (DPWM) where only two rectifier half-bridgesare switched at a time and the remaining half-bridge con-nected to either the most positive (DPWMmax) or mostnegative (DPWMmin) [10], or the maximum absolute mainsphase voltage (DPWM1 [11]) is clamped, thus reducing theswitching losses by more than one third compared to normalPWM operation, while still sinusoidal input currents and aconstant DC link voltage can be achieved. In single-stageconverter systems clearly both requirements, i.e. sinusoidalinput currents and constant DC link voltage have to be ful-filled. In two-stage systems as shown in Fig. 1(b), however,there is no need to provide a constant intermediate DC linkvoltage upn to the subsequent DC/DC converter, since anylow-frequency voltage fluctuation at Cpn can be compensatedby the DC/DC converter, such that still a constant outputvoltage Uo is present at the battery terminals.

The novel modulation scheme proposed in this paper, actuallyuses this degree of freedom of a variable intermediate DClink voltage in such a way that only one rectifier half-bridge has to be switched and the other two half-bridgesare clamped to either the positive (p) or negative (n) DClink voltage rail, accordingly the system is denominatedas 1/3 rectifier. Hence, the number of active half-bridgesis reduced to a minimum, resulting in even lower overallswitching losses than DPWM while still sinusoidal inputcurrents and a constant output voltage Uo are obtained.In Section II, the proposed modulation scheme and thecharacteristic waveforms of the 1/3 rectifier are described.Afterwards, a cascaded control structure implementing thedesired clamped rectifier operation is explained in Section

978-1-5386-6054-6/18/$31.00 c©2018 IEEE

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Fig. 1: (a) Battery voltage Uo and current range Io for a 10 kW EV battery charger system corresponding to the China Grid 2017Electric Vehicle Charging Equipment Supplier Qualification Verification Standard. The nominal output power has to be provided for abattery voltage range from 750V down to 400V, which means that for the highlighted grid peak line-to-line voltage Ull, the batterycharging system has to feature boost and buck functionality. (b) Circuit diagram of a typically used two-stage converter system consistingof a three-phase PFC boost-type rectifier and a subsequent DC/DC buck converter to generate output voltages above and below Ull.

III, whereas the proper operation is verified in Section IVby means of a close loop circuit simulation. In a next step,the novel 1/3 rectifier and/or 1/3 modulation is comparedto conventional modulation techniques for a 10 kW batterycharger application in Section V and finally, in Section VIthe findings of this publication are summarized.

II. MODULATION CONCEPT

In order to allow a better understanding of the proposedconverter operating principle, the modulation scheme ofthe 1/3 rectifier is derived from another circuit topology,namely the Integrated Active Filter (IAF) buck-type PFCrectifier [12]–[14] illustrated in Fig. 2(a). The IAF PFCrectifier consists of a passive three-phase diode rectifier, acurrent injection network (highlighted in light yellow) and asubsequent DC/DC buck converter stage. As can be noticed,since the input phase voltages are directly applied to the dioderectifier stage, the conduction state of the diode bridge-legsonly depends on the actual mains voltages. In the following,the converter operation is explained for the first of six mainsvoltage sectors where ua > ub > uc (i.e. ωt ∈ [0, 60]highlighted in Fig. 2(b)-(c)). In sector I, the upper diode ofthe bridge-leg of phase a and the lower diode of the bridge-leg of phase c are conducting, which means that phase a isattached to the positive (p) and phase c to the negative (n)DC link voltage rail and therefore uac = ua−uc determinesthe DC link voltage upn, which always equals the momentarylargest line-to-line input voltage Ull of the respective sector.Hence, within one mains period the DC link voltage upnexhibits a six-pulse voltage shape as shown in Fig. 2(b).Consequently, if the current injection network is disabled,in sector I only the phases a and c are conducting the DClink current ipn, which in case of a constant output poweroperation (i.e. Uo · Io = upn · ipn = const. which meansthe buck stage employs a time varying duty cycle) results inquasi-square wave shaped grid currents ia, ib, ic within onemains period. However, now the current injection networkcan be utilized to impress a current iY to the non-conductingmiddle phase, i.e. in sector I phase b is selected by thebidirectional phase selector switches and a current iY = −ibproportional to the phase voltage ub is injected into phaseb by proper pulse width modulation of the bridge-leg withmidpoint Y . According to Kirchhoff’s current law, at the

neutral point N the phase currents sum up to zero and dueto the constant output power operation, symmetric sinusoidalgrid currents in phase with their respective phase voltages canbe achieved for all three phases (cf. Fig. 2(c)), even thoughin the case of the IAF rectifier only one half-bridge is pulsewidth modulated [13].

The same modulation principle is now applied to the con-ventional three-phase boost-type PFC rectifier shown inFig. 2(d), whereas instead of a dedicated current injec-tion network in each voltage sector always the bridge-legconnected to the minimum absolute phase voltage, i.e. thehighlighted phase b in sector I, is high-frequency switchedand a phase current proportional to the corresponding phasevoltage is injected. In contrast to the IAF converter, thehigh-side switch of the bridge-leg a as well as the low-side switch of the bridge-leg c have to be actively turned-on within sector I, since the mains voltages are not directlyapplied, but are decoupled by the input inductors L. Hence,the voltage across each inductor of the two clamped bridge-legs is found by half of the difference between the momentarylargest mains line-to-line voltage Ull and the DC link voltageupn. This means that in steady state operation, the voltageupn has to closely follow the actual maximum line-to-linevoltage Ull, i.e. it has to show a six-pulse voltage shapeagain, and only a small voltage difference must be appliedto the inductors in order to achieve sinusoidal input currentwaveforms. However, since the switches of the two absolutelargest input phases are permanently clamped, the DC linkvoltage upn has to be controlled by the subsequent DC/DCbuck converter, which in analogy to the IAF converter canbe achieved if in steady state a constant power is drawnfrom the load or the intermediate DC link, respectively. InFig. 2(e)-(f), the corresponding duty cycles and switchingstates for the three-phase boost-type PFC rectifier and theDC/DC buck converter are shown. It can be noted that atany time in total only two bridge-legs, one of the rectifier andthe one of the DC/DC stage, are switched, while the otherbridge-legs are clamped to either the positive (p) or negative(n) DC link voltage rail. Consequently, in comparison tothe DPWM operation principle, the rectifier stage switchinglosses can be further reduced by more than a factor of two,because in case of the 1/3 rectifier beneficially always only

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Fig. 2: (a) IAF buck-type PFC rectifier consisting of a three-phase diode rectifier, a current iY injection network (highlighted in lightyellow) and a subsequent DC/DC buck converter, where the rectifier conduction state is highlighted for mains voltage sector I, whereωt ∈ [0, 60]. (b) Input voltage waveforms ua, ub, uc and resulting six-pulse shaped intermediate DC link voltage upn as well as theconstant output DC voltage Uo within one grid fundamental period. (c) Phase currents ia, ib, ic and resulting DC link current ipn if theDC/DC buck converter is operated as a constant power load. The voltage and current waveforms are obtained with the IAF buck-typePFC rectifier as well as with the proposed 1/3 rectifier. (d) Circuit diagram of the 1/3 rectifier, where for sector I the highlighted phaseb is switching and phases a and c are clamped to the positive (p) and negative (n) DC link voltage rail, respectively. (e) Duty cycles da,db, dc of the 1/3 rectifier and dd of the buck stage, where a value of +1 and -1 refers to clamped operation to p and n, respectively.(f) Schematic view of the 1/3 rectifier’s switching signals sa, sb and sc and the DC/DC buck converter with sd which is continuouslyswitched, such that in total always only two bridge-legs are pulse width modulated at a given time.

the rectifier bridge-leg carrying the lowest instantaneous gridcurrent is switched. In addition, symmetric stresses result forthe high- and low-side rectifier power semiconductors as canbe observed by the half wave symmetry of the duty cyclewaveforms in Fig. 2(e).It should be mentioned that in contrast to the IAF PFC recti-fier, the 1/3 rectifier features boost and buck functionality,however, the proposed operation mode is only applicableas long as the system is operated in buck mode, whereUo <

√32 Ull . In cases where the output voltage exceeds

the peak line-to-line voltage Ull, the converter enters theboost mode and hence the bridge-leg of the DC/DC buckstage is clamped (dd = 1) and the intermediate DC linkvoltage upn is stepped up directly to the desired constantoutput voltage Uo by the boost-type rectifier. This can onlybe achieved if e.g. with DPWM a second rectifier bridge-leg is pulse width modulated. However, also in boost modeonly a total of two bridge-legs are switched at a time. Aswill be shown in Section IV, the intermediate output voltagerange

√32 Ull < Uo ≤ Ull, where buck and boost functionality

is required, can also be covered by only switching twobridge-legs by means of a combined 1/3 and DPWM rectifieroperation.

III. CONTROL

The 1/3 rectifier control structure shown in Fig. 3 is basedon conventional PFC rectifier control with cascaded voltageand current PI regulators. Given unity power factor operation,the rectifier can be described from the grid’s perspective by anequivalent symmetric three-phase star-connected ohmic loadwith conductance value G∗, which is set by the output voltagecontrol depending on the control error of the DC outputvoltage and/or the output power demand P ∗o . Subsequently, inthe grid current control block the grid current references i∗a,i∗b and i∗c are calculated based on G∗ and the respective mea-sured phase voltages ua, ub and uc such that the desired unitypower factor operation is achieved, where each grid currentis controlled individually by a current regulator Rigrid. In aconventionally modulated system, the resulting rectifier half-bridge midpoint voltage references u∗Ba, u∗Bb and u∗Bc wouldbe directly translated into rectifier phase PWM duty cyclesusing e.g. Space Vector Modulation. Instead, according toSection II in the phase selector block the phases with themost positive and negative actual grid voltage are set to beclamped and formulate the reference value of the intermediatevoltage u∗pn = u∗max − u∗min, while the PWM duty cycle of

Buck Stage ControlGrid Current ControlOutput Voltage Control Phase Selector

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Fig. 3: Cascaded 1/3 rectifier output voltage control with the required measurements and indicated phase assignment for sector I.

the remaining rectifier half-bridge is directly calculated fromthe respective voltage reference u∗mid and upn. Subsequently,in the buck stage control block again a cascaded voltage andcurrent control structure for the DC/DC converter is present,where a time varying intermediate voltage u∗pn and a constantoutput voltage reference U∗o have to be tracked.The very same control structure can be applied when feedingpower from a DC source back to the grid in inverter operation(e.g. in case of PV power processing). There the phasecurrents are 180 phase shifted to their respective phasevoltages or, a negative equivalent phase conductance valueG∗ is seen from the grid’s perspective.

IV. SIMULATION

Given the multi-cascaded control structure shown in Fig. 3,each PI controller is to be tuned separately for the present ref-erence tracking demand, where special attention is requiredon the overall performance of the system or, each regulatoris to be designed sufficiently faster than its direct supervisorycontroller to prevent oscillations in transient operation.The control concept of Section III is verified by meansof a closed loop circuit simulation, where the controllersignals are updated once in each switching period in orderto minimize the dead time. The resulting voltage and currentwaveforms for different operating conditions can be observedin Fig. 4, where in all cases a switching frequency of100 kHz, grid and DC inductance values of 100 µH areemployed and a grid phase voltage of 220 Vrms is set. InFig. 4(a) a total output power of 10 kW is converted into aDC output voltage of 400 V in 1/3 rectifier operation, whilein Fig. 4(b) the same power is transferred with capacitivephase shifted currents (φ = π/4), such that larger gridcurrent amplitudes result. Then, in Fig. 4(c) a load step of50 % is applied and finally in Fig. 4(d) an output voltage of525 V is generated by a combined DPWM and 1/3 rectifier

modulation scheme, where only two bridge-legs are pulsewidth modulated at any time.In all considered operating points the control system is ableto maintain a constant output voltage, while the grid currentsare tracked closely to their reference values, confirming theunity power factor and phase shifted sinusoidal input currentoperation. Furthermore, sudden changes in load current oralso a dynamic change of the modulation scheme can beadjusted without significant transient overvoltages or over-currents. Due to the unconnected mains star point N theswitching frequency operated phase in 1/3 modulation (i.e.the phase with the lowest absolute mains voltage) causes aswitching frequency level common mode voltage Ucm,HF =1/3 · UB,mid, where UB,mid is the respective switched nodepotential, while the clamped phases mutually cancel out andcontribute in sum no common mode voltage at all. Therefore,a current ripple results in all AC-side inductors, where themaximum current ripple can be observed always in theswitching phase which is a factor of two higher comparedto the current ripple of the clamped phases.

V. COMPARATIVE EVALUATION

In order to evaluate the gained advantages of the novel1/3 rectifier concept, three modulation schemes are comparedwith respect to the resulting efficiency for the operatingrange defined by the EV battery charger specifications shownin Fig. 1(a), namely conventional PWM without any thirdharmonic injection and an intermediate voltage

upn(Uo) = max(2√3Ull, Uo), (1)

DPWM where the phase with the lowest instantaneous gridvoltage value is clamped and/or the harmonic injection allowsa better intermediate voltage utilization

upn(Uo) = max(Ull, Uo), (2)

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Fig. 4: Resulting closed loop circuit simulation current and voltage waveforms of a 10 kW rectifier for (a) Uo = 400V and ohmic PFCoperation, (b) Uo = 400V and ohmic/capacitive operation (φ = π/4), (c) Uo = 400V, where a load step of 50% (i.e. from 5 kW to10 kW) takes place after half of the fundamental period, (d) Uo = 525V which is generated employing a combined modulation schemewith 1/3 rectifier and DPWM operation.

and the proposed 1/3 modulation scheme employing a timevarying low intermediate voltage

upn(Uo) =

∈ [√32 · Ull, Ull], Uo ≤ Ull

Uo, Uo > Ull

(3)

The resulting semiconductor switching losses depend onboth the hard switched voltage and current [15], where thevoltage across all bridge-legs is defined by the intermediatevoltage upn such that decreased switching losses can beexpected when employing DPWM and 1/3 modulation com-pared to PWM. More importantly, given the discontinuousswitching operation of the rectifier bridge-legs the switchinglosses can be expected to decrease by more than 1/3 forDPWM and 2/3 for the 1/3 modulation compared to PWMdue to the reduced number of switching transitions within agrid fundamental period and especially because of the factthat with 1/3 modulation always the smallest grid current isswitched in unity power factor operation. Then, employingsymmetric bridge-legs the current is impressed by the induc-tor connected to the switched node and flows either throughthe high- or low-side switch, where the resulting conductionlosses are independent of the bridge-leg switching state. Now,

as all inductor currents are subject to closed loop control(cf. Fig. 3) while the occurring inductor current ripple hasonly minor influence on the respective RMS current value atnominal power, the semiconductor conduction stresses can beconsidered independent of the modulation scheme in a goodapproximation.For this reason, a EV battery charger system which wasdimensioned for the specifications in Fig. 1(a) and con-ventional PWM can also be operated with the other mod-ulation schemes of interest, such that a comparison of theoccurring losses for the operation concepts is possible for agiven converter system. The corner points relevant for thecomponent dimensioning with PWM are at the respectivemaximum output power and upn = Uo = 750 V for therectifier bridge-legs and inductors, while Uo = 400 V yieldsthe maximum stresses for the DC/DC converter switchesand Uo = upn/2 = 325 V (i.e. duty cycle dd = 50 %)for the DC-side inductor. The comparison amongst themodulation strategies is carried out in the following for avirtual 10 kW battery charger system employing switchingfrequencies fs = 48 kHz and inductance values L = 100 µHin the AC/DC and DC/DC stage, where the component detailsare given in Table I. The resulting semiconductor hard- and

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Fig. 5: (a.i)-(c.i) Efficiency depending on the output power P and (a.ii)-(c.ii) loss distribution for the respective maximum value of Pof a virtual EV battery charger system according to Table I with PWM, DPWM and 1/3 rectifier modulation for an output voltage of (a)Uo = 200V, (b) Uo = 400V and (c) Uo = 500V.

soft-switching losses are derived using a lossmap, while theinductor iron as well as DC and/or low-frequency and high-frequency copper losses are calculated according to [16]. Asfilm capacitors exhibit a very low ESR they are consideredto be lossless in the efficiency calculation.In Fig. 5(a.i-c.i) the resulting efficiency depending on theoutput power and modulation scheme is shown for severalDC voltage levels Uo, where for Uo < 400 V the poweris restricted by the DC current limit (cf. Fig. 1(a)). Atlow power levels, a flattening or even a non-monotonically

(3x) AC/DC (1x) DC/DCMOSFET 1.2 kV SiC 1.2 kV SiC

Rds = 25 mΩ Rds = 25/2 mΩCoss = 220 pF Coss = 2 · 220 pF

Inductor 4x E36/18/11 N87 4x E 42/21/20 N87dlitz = 2.6 mm dlitz = 3.4 mmdstrand = 200 µm dstrand = 100 µmNwind = 16 Nwind = 14

TABLE I: Virtual 10 kW EV batter charger component specifica-tions for the bridge-legs and inductors, where switching frequenciesfs = 48 kHz and inductance values L = 100 µH are employed inthe PFC rectifier (AC/DC) and the DC/DC stage.

increasing efficiency can be observed for all modulationschemes and output voltage levels Uo, which results due tothe DC/DC converter changing from soft- to hard-switchingwith increasing DC output current and leading locally to asignificant change in the total converter losses. As the inter-mediate voltage upn is not equal for PWM, DPWM and 1/3modulation, different DC current ripples result, and thereforethe transition from soft- to hard-switched operation takesplace for different values of P for each modulation approachand output voltage level Uo. Comparing the efficiencies forthe different modulation schemes, e.g. for Uo = 200 V (cf.Fig. 5(a.i)) the efficiency at P = 5 kW can be increased from98.1 % with PWM to 98.5 % with DPWM and to even 98.7 %employing 1/3 modulation. Very similar relations establishfor a higher output voltage Uo = 400 V (cf. Fig. 5(b.i))and Uo = 500 V (cf. Fig. 5(c.i)), where it can be noted,that the maximum efficiency for DPWM and 1/3 modulationdoes not occur for the maximum respective output power,but for part load operation. This results, as the systemoptimization and dimensioning was carried out for PWM andis by no means optimal for the discontinuous operation ofthe bridge-legs, which is especially accentuated for the 1/3rectifier. Therefore, a further substantial efficiency gain couldbe enabled by a system redesign. Fig. 5(a.ii-c.ii) show thedetailed loss distribution for the same output voltages at the

respective maximum system power, where the semiconduc-tor losses clearly dominate the converter performance. Forall shown cases a reduction of the total system losses byapproximately 25 % for DPWM and 35 % for 1/3 rectifieroperation is possible compared to conventional PWM. Whenfocusing on the rectifier semiconductor switching losses, onecan observe that a loss reduction of a factor 2 is possiblewith DPWM as the phase showing the most negative phasevoltage is clamped while carrying a large current, yielding animproved performance compared to PWM. Then, employingthe proposed 1/3 modulation, the rectifier switching lossesalmost vanish and are now reduced by up to a factor of12. This superior performance follows, as in unity powerfactor operation the rectifier bridge-legs are only switchingin the vicinity of the AC current zero crossing, where also themaximum current ripple occurs, such that even for moderatecurrent ripple values complete soft-switching results. In theswitching losses of the DC/DC converter one can also observethe negative influence of the elevated intermediate voltageupn for PWM operation (cf. (1)-(3)), where the occurringlosses depend both on the transferred power and the voltagedifference ∆u = upn−Uo that has to be converted. Hence, byemploying the DPMW and 1/3 modulation even the switchinglosses of the DC/DC converter can be reduced. Especially atUo = 500 V (cf. Fig. 5c.ii), where the DC/DC converterbridge-leg is already temporarily clamped in 1/3 modulation,also the switching losses in the DC/DC converter are stronglyreduced by 25 % compared to PWM. Furthermore, wheninvestigating the losses in the inductive components, one canobserve that the clamped operation of DPWM and 1/3 modu-lation combined with the reduced intermediate DC link volt-age upn also allows to slightly decrease the high-frequencyinductor losses for Uo = 200 V and Uo = 400 V. When theDC/DC converter bridge-leg is clamped, only DC and/or low-frequency copper losses result and therefore for Uo = 500 Va decrease in inductor losses of more than 40 % results for1/3 modulation with its partially clamped DC/DC converterbridge-leg compared to conventional modulation. Finally, thesemiconductor conduction losses remain unaffected by themodulation scheme in a very good approximation as can beobserved for the AC/DC and the DC/DC stage such thatnow for the 1/3 modulation the rectifier stage losses areclearly dominated by the conduction losses. Therefore, theconverter efficiency could be significantly increased in thatcase by redesigning the converter, i.e. by employing morechip area in order to minimize the total semiconductor losses.In summary, in can be stated for Fig. 5, that for the givenconverter system, the efficiency can be increased significantlyfor the analyzed operating points by employing the novel1/3 modulation instead of conventional PWM modulation,where the efficiency curves of 1/3 modulation and DPWMstart converging once the output voltage approaches Ull.This is clearly shown in Fig. 6(a) where the influence of theDC output voltage on the efficiency (cf. Fig. 6(a.i)) and thelosses (cf. Fig. 6(a.ii)) is further investigated, while againthe maximum output power is considered in each operatingpoint. According to Fig. 1(a) between Uo = 200 V andUo = 400 V, P linearly increases from 5 kW to 10 kWand is then kept constant as shown in Fig. 6(a.iii). When

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Fig. 6: Influence on the system performance of (a) the DC outputvoltage Uo for maximum output power and unity power factor, (b)the grid current-voltage phase shift angle φ for Uo = 400V and anAC apparent power of S = 10 kVA, where only positive values of φare shown as the performance penalty is identical for inductive andcapacitive phase shift. In (a.i) the resulting efficiency and in (a.ii)the total losses of the battery charger system for PWM, DPWMand 1/3 modulation are given, while (a.iii) illustrates the resultingoutput power profile according to Fig. 1(a). In (b.i) again the systemefficiency for all modulation schemes and in (b.ii) the rectifier stagesemiconductor switching losses (Psw) and conduction losses (Pcond)for 1/3 modulation and in (b.iii) the active P and reactive power Qare presented, where for φ = 0 (i.e. unity power factor operation)an active power of P = 10 kW is transferred.

starting from low DC output voltages, the resulting lossesincrease with the system power up to 400 V where themaximum losses result, i.e. the worst case design point (asalready mentioned) for the design of the converter. Then,when further increasing Uo the losses decay with decreasingbuck effort since the power is held constant, which meansthat the DC current decreases. Once Uo = upn is reacheda step in the losses and the efficiency occurs for PWM andDPWM as the DC/DC converter bridge-leg is clamped suchthat only the DC semiconductor conduction losses remain,where the switching transition occurs at different voltagelevels due to the different intermediate DC voltage upn.A difference in efficiency and losses between DPWM andPWM sustains, as with DPWM two and with PWM threerectifier bridge-legs are switched. In contrast, for the 1/3modulation a smooth transition to DPWM operation takesplace within Uo ∈ [

√32 · Ull, Ull], where the DC/DC bridge-

leg is temporarily clamped when the maximum instantaneousline-to-line voltage drops below Uo, while PFC control ismaintained by switching two rectifier bridge-legs employingDPWM. For this reason 1/3 modulation and DPWM yieldidentical performance for higher values Uo > Ull. Mostinterestingly, the application of the 1/3 modulation allowsto decrease the maximally occurring losses at Uo = 400 Vsuch that the required heatsink volume could be decreasedby more than 35 %, which also clearly highlights that the

converter would have to be redesigned to either achieve aneven higher efficiency, higher power density or lower costs(cf. Fig. 6(a.ii)). Finally, in Fig. 6(b) the influence of thereactive power consumption on the system performance (i.e.cosφ < 1) is highlighted for an apparent grid power ofS = 10 kVA and Uo = 400 V. As the occurring lossesare equal for inductive and capacitive grid currents, onlypositive grid current-voltage phase shift angles φ are shown.Fig. 6(b.i) shows again the system efficiency for the threemodulation schemes of interest, where in any case the ef-ficiency drops with the decreasing active P and increasingreactive power Q transfer (cf. Fig. 6(b.iii)). When studyingthe rectifier semiconductor losses for 1/3 modulation shownin Fig. 6(b.ii) in detail, one can observe that the conductionlosses Pcond remain unaffected by φ due to the constantAC current amplitude and thus constant RMS current value.For low values of φ < π/8 also the switching losses Psw

increase only slightly as despite the phase shift the switchingfrequency operated bridge-legs remain soft-switched. Whenφ is further increased, a sudden increase of Psw takes placewhich again saturates once all switching transitions are hard-switched. Therefore the performance of the 1/3 rectifier ishighly insensitive to small current-voltage phase shifts, andeven for large values of φ a performance gain compared toDPWM and PWM sustains.

VI. CONCLUSION

A novel modulation scheme for a three-phase boost-typePFC rectifier system with a subsequent buck converter em-ploying a variable intermediate DC link voltage in order tominimize the current control effort in the rectifier stage wasintroduced and the operating principle was derived from theIntegrated Active Filter PFC Rectifier and discussed in detail.A cascaded control structure for sinusoidal input currentshaping and output voltage/power control was presented andthe two-phase clamped operation was subsequently verifiedby means of a closed loop circuit simulation for severalstress profiles. For a virtual prototype EV battery chargerdesigned for conventional PWM operation, a substantial gainin system efficiency, i.e. a 35 % loss reduction compared to aconventionally modulated system was achieved. This results,as even for moderate AC current ripples the 1/3 rectifiermodulation yields a completely soft-switched rectifier stage,such that the switching losses could be reduced by more thana factor of 10.As was pointed out, the two-phase-clamped and/or 1/3 modu-lation can be applied in any boost-type rectifier system witha subsequent buck converter without changes in hardwareand has therefore a great potential also for existing systems,where 1/3 modulation could be enabled easily by a softwareupdate. Furthermore, a system optimized for 1/3 rectifermodulation could break through current power density andefficiency barriers and therefore is of high interest for in-dustrial EV charger applications. A verification of the newapproach by means of a prototype system will be conductedin a next step.

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