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8/12/2019 Three Types of Diodes
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Planar Diode Fabrication
ELEC 3908, Physical Electronics, Lecture 5
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-2
Lecture Outline
Last lecture described a number of processing techniques
used to fabricate integrated circuits
This lecture will show how those techniques are usedtogether, some many times, in fabricating three integrated
diode structures
As more complex structures are considered, the level ofdetail in the descriptions will be reduced
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-3
Diode Types Considered
Fabrication of three types of diodes examined:
Substrate Diode: simple pn-junction fabricated from a single
counterdoped region in the substrate
Well Diode: slightly more complicated structure with a deeper
region of counter doping and a highly doped diffusion
Epitaxial Diode: More complicated processing using an epitaxial
layer, but offers the best performance
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-4
Substrate Diode - Nitride Protection
First step is to deposit a layer of silicon nitride (Si3N4) over the wafer
surface
Would normally be done using chemical vapor deposition (CVD)
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-5
Substrate Diode - Photoresist Coating
Surface (top of nitride layer) then coated with photoresist (PR)
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Planar Diode FabricationPage 5-6
Substrate Diode - Exposure
Surface of PR is then exposed to UV radiation through a mask created
from geometry information supplied by the designer
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Planar Diode FabricationPage 5-7
Substrate Diode - Development of Photoresist
Photoresist is then developed chemically
A negative photoresist remains where it was exposed to UV
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-9
Substrate Diode - Finished Nitride Etch
When the nitride etching is complete, all of the nitride layer outside the
remaining area of photoresist has been removed
Both nitride and photoresist remain in the exposed area
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-10
Substrate Diode - Photoresist Removal
The photoresist still covering the remaining nitride area is now
removed
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-11
Substrate Diode - Thermal Oxidation
A layer of silicon dioxide is grown using thermal oxidation
The oxide is prevented from growing in the area covered by silicon
nitride - this is the purpose of the nitride layer
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-13
Substrate Diode - Implantation
An implantation (ion implantation or diffusion) is now done to create a
counterdoped region which will form one side of thepn-junction
The oxide absorbs the dopant outside of the active area, preventing
dopant from penetrating into the substrate anywhere but the active area
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ELEC 3908, Physical Electronics:
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Substrate Diode - Surface Metal Patterning
Metal is now deposited over the entire wafer surface
Another series of patterning steps is used, along with another mask, to
remove metal everywhere except the contact to the diode and wherever
else the connection is made
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-15
Substrate Diode - Substrate Connection
Metal is deposited on the backside of the wafer to form the other
connection
Note that all substrate diodes share a common (substrate) connection
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Planar Diode FabricationPage 5-16
Well Diode
Two problems with the substrate diode:
Current flows through the entire thickness of the substrate (500 -
1000 m) to reach the back contact
Substrate is common for all diodes on the chip, diodes all have a
common connection
Better solution is to use a well diode, which is formed in a
region of opposite doping (counterdoped) to the substrate,and a heavily doped region of the same type as the
substrate
Eliminates long current path through the substrate, andallows two independent terminals, since well is isolated
from the substrate
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-17
Well Diode - Nitride Deposition, Thermal Oxidation
A layer of nitride is deposited and patterned so that it exists on where
the active area (including the well) is to be formed
Thermal oxidation used to form an oxide layer
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Planar Diode FabricationPage 5-18
Well Diode - Well implant
A deep implantation is done to create the well - a counterdoped region
which will be one side of the diode
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-20
Well Diode - Diode Diffusion
The other side of the pn-junction structure is formed with a heavy
implant into the well
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-21
Well Diode - Isolation Oxide
A layer of silicon dioxide is deposited on the surface (thermal
oxidation would grow into the existing diffusion structure)
This layer is required because the two contacts to the diode are both at
the surface, hence an isolation layer is required to prevent shorting
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-22
Well Diode - Contact Cuts and Metallization
Contact cuts are etched through the isolation oxide to the diffusions
using a full series of patterning steps
Metal is deposited on the surface and patterned for interconnections
Provided the well to substrate junction is reverse biased, the well diodeis isolated from the substrate, and hence from other devices
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-23
Epitaxial Diode
Well diode is an improvement over the substrate diode, but
current flow is lateral so the exact performance is hard to
predict
Best solution, but with corresponding process complexity,
is the epitaxial diode, fabricated on an epitaxial layer of
silicon
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-25
Epitaxial Diode - Buried Layer Formation
Using a photolithography step (and an associated mask) a window is
formed in the oxide and a heavy n-type implant performed to create a
highly doped n-type (n+) region called theburied layer
The oxide is then removed using a selective etching step The result is a heavy n+ doping which will form the back connection to
the diode
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Epitaxial Diode - Epitaxial Deposition
The next step is to use epitaxy to deposit a layer of high quality
crystalline silicon called the epi layeron the wafer surface
Some diffusion of dopant from the n+ region occurs into the epi layer
Another series of photolithography steps is used to form a maskingoxide over the region which will become the active diode area
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-27
Epitaxial Diode - Isolation Implants
A heavy p-type (p+) implant is then used to form regions extending
right through the epi and into the substrate (lateral diffusion also
results in extension under masking oxide)
These isolation regions electrically isolate the device from all othersfabricated in the epi layer
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-28
Epitaxial Diode - n+ andp+ Implants
Oxide is deposited and patterned to open a window for an n+ doping
which will form a contact through the n-type epi layer down to the
buried layer
Oxide is again deposited and patterned to produce an opening for aheavyp-type implant which will form the other side of thepn-junction
with the epi layer
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-30
Epitaxial Diode - Current Flow
The active diode area is only a small portion of the epitaxial structure
Current flow in the epi diode is through the active area, along the
buried layer and up and out the n+ contact diffusion
Benefit is well controlled current flow path
Also forms a major portion of the structure of an integrated BJT
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-31
Summary of Diode Structures
Three diode structures examined
Substrate: simple, but poor performance
Well: better, and getting more complicated
Epi: best, but most complicated
lightly doped substratep-
p+ p+n+p
+
n+buried layer
n-epitaxial layer
p-substrate
n-well
p+n+
Al
substrate thickness not to scale
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ELEC 3908, Physical Electronics:
Planar Diode FabricationPage 5-32
Lecture Summary
The use of the basic processing techniques from lecture 4
in creating three diode structures was discussed
Note that many of the techniques are performed over andover as successive features are created
The substrate diode is simple but suffers from at least one
disadvantage all substrate diodes have one terminal
connected together
The well diode is an improvement, but has primarily lateral
flow, which can be difficult to characterize
The epi diode gives the best performance, but is much
more complex to fabricate than the first two