A. Barigelli, F. Vitulli, A. SurianiVia Saccomuro, 24 ‐ Rome, Italy

SPACE  TECHNOLOGIES :

‐ Q /V BAND LNA MODULE FOR SPACE  APPL ICAT IONS

‐ KU BAND MMIC VCO WITH ENHANCED L INEAR ITY

Thales AleniaSpace Italia

L. Pantoli, G. LeuzziDept. Industrial and Information Engineering and Economics

University of L’Aquila

P r i m o W o r k s h o p N a z i o n a l e :L a C o m p o n e n t i s t i c a N a z i o n a l e p e r l o S p a z i o :s t a t o d e l l ’ a r t e , s v i l u p p i e p r o s p e t t i v e1 8 - 2 0 G e n n a i o 2 0 1 6

J a n u a r y   2 0 ,   2 0 1 6

Definition of an LNA Module for future space applications

Analysis and design of Low Noise Amplifiers in Q/V band‐ Specifications‐ Circuits topologies and characterization‐ Simulations and performance

On Jig Measurements

Definition of a Ku band VCO with enhanced linearity.

Linearization scheme

VCO structure

Results and measurements

WP2WP1Index

Index

Outline

WP2WP1Index

The LNA Module

Scenario

Current imitations of the Ka‐band systems concern the simultaneous use of the same band for both user links and feeder links. 

In this scenario, the prospect to adopt the Q/V‐band in future broadband telecommunication satellites will bring several advantages, enabling full use of the Ka‐band for users.

The proposed LNA module has been conceived as a hybrid solution for future Q/V‐band space systems in which low noise characteristics, high linearity, robustness and compactness are the main driving factors. 

UMS offers a new process dedicated to millimeter wave applications, the PH10, a 0.1 μm gate length process in GaAs pHEMT Technology with a typical Ft of 130GHz. 

The LNA Module

Requirements

Frequency Band 42 to 52 GHzInput Power Level ‐95 to ‐45dBmOverdrive survivability  ‐35 dBmNoise Figure 2.5 dB Gain 45±1 dB Gain Stability over temperature  <1.5 dBpp

Gain Stability over frequency <1.5 dBpp

Input and Output Return Loss >20dB DC Power 250mW

Third Order Intercept point  +23dBm

Temperature Range  ‐30 to 70 degreeMass  400gr.

WP2WP1Index

The LNA configuration

Specifications

and the following configuration has been analyzed:

Three different MMICs have been designed:

WP2WP1Index

Bond wires characterization

Interconnections

MMIC LNA W

50ΩGaAs

GaAs

MMIC MLA

GaAs

Alumina

50Ω

MLINMLEFX

CAP

BWIRES2 PORT2

MLIN MLEFX

PORT1

CAP

Full EM analyses have been performed on the Au 18um bond wires with CST Studio and an equivalent, scalable, electrical model has been extracted and included in the electrical simulations.

The model takes into account of:‐ Number of wires‐Wire length‐ Distance between RF pads

WP2WP1Index

MMICs electrical characteristics

Performance

Freq. Range 42.0 – 52.0GhzGain  16.5dBVd (single bias) 2.25 VVg (single bias) 0 VΔGain vs. freq.  42‐48GHz  0.1dBppΔGain vs. freq.  47.2‐50.2 GHz 0.1dBppNoise figure  1.9 dBP‐1dB  6 dBmIP3 >21dBmInput matching: < ‐11dBOutput matching: < ‐11dBDC current 39mATemperature range  ‐30 to 70°CDimensioni: 1x3 mm

LNA /LNAW performance

Freq. Range 42 – 52.0GhzGain  18dBVd (single bias) 2.25 VVg (single bias) 0 VΔGain vs. freq.  42‐48GHz  0.4dBppΔGain vs. freq.  47.2‐50.2GHz  0.4dBppNoise figure  2.8 dBP‐1dB  11dBmIP3 23dBmInput matching: < ‐15dBOutput matching: < ‐15dBDC current 60mATemperature range  ‐30 to 70°CDimensioni: 1x3 mm

MLA performance

WP2WP1Index

Layout example

MMIC LNA

Gate pad grounded through a resistor

Pad  for the Gate control voltage

Resistors preventing RF feedback loop 

All the DC bias lines are realized with quarter‐wave stubs at the operating frequency

Stabilization networks

Bias Pad

WP2WP1Index

Solutions

MMIC Stability analysis

The local and global stability of each MMIC have been analyzed and ensuredwith Platzker method and Gamma Probe analysis.

All the Amplifiers share the same topology for the ancillary passivecomponents which encircle the Active Device.

The general stabilization scheme is here reported.R and C have effect at medium and low frequencies, while RG and RD , coupled with their shunt capacitances, stabilize at very low frequency and prevent or properly attenuate any unwanted feedback of RF signals.

WP2WP1Index

LNA measured S-parameters

MMIC performance

1,90dB

-25-20-15-10-505

10152025

30 35 40 45 50 55 60

S21,

S11

, S22

, NF

[dB

]

Freq [GHz]

S21 S11 S22 NF

WP2WP1Index

-25-20-15-10-505

10152025

30 35 40 45 50 55 60

S21,

S11

, S22

, NF

[dB

]

Freq [GHz]

S21 S11 S22 NF

2.9dB

LNAW

MLA

Measurements setup

On Jig Measurements

Isolator

A first characterization of the LNA chain has been performed on the systemLNAW+MLA using a Test‐Jig already available and operating in the frequencyBand 47‐50GHz.

The two MMICs have been directly connected by bond wires; an Isolator hasbeen used at the input port of the Test‐Jig and Transitions have beenconnected at both the RF ports for measurements.

Trn WR22-WR19 Trn WR22-WR19

Trn Guide-Coax Trn Guide-Coax

Test-Jig

WP2WP1Index

Noise Figure

On Jig Measurements

The Noise Figure of the proposed setup has been measured and thecontributions of the transitions Guide‐Coax and TR22‐TR19 have been de‐embedded in order to obtain the NF provided by the system Isolator and Test‐Jig.

A final NF between 2.85 e 3.15dB has been obtained.

These values include a noise contribution of 0.25dBaccountable  to the Isolator and of 0.55dB due to the Guide‐to‐Microstrip Transition inside the Test‐Jig.   

WP2WP1Index

S-Parameters

On Jig Measurements

Measured S‐Parameters and power transfer function provided by the systemIsolator and Test‐Jig.

11,86

12,10

0123456789

101112131415

-28 -26 -24 -22 -20 -18 -16 -14 -12

Pout

[dB

m]

Pin [dBm]

P-1dB @47GHzP-1dB @50GHzPout @47GHzPout @50GHz

WP2WP1Index

WP2WP1Index

The Ku band MMIC VCO 

Scenario

The straightforward approach to synthesize signals consists in obtaining the desired tone by frequency multiplication of a clean reference signal. 

However, due to the complexity of some systems, an alternative approach is becoming preferable and it consists in the use of Phase Locked Loops (PLL) based on frequency synthesizer and VCO directly available on‐chip. 

This choice offers clear advantages for what concerning size, flexibility and cost, but at the same time it requires strictly performances from the integrated components. 

The designed VCO  provides improved electrical performance thanks to the introduction of an innovative linearization circuit and of an integrated output buffering section.

WP2WP1Index

The Ku band MMIC VCO

Frequency Band 10.52 to 12.53 GHz

Tuning range 16%

Tuning voltage 0 ‐ 10 V

Output power 8dBm

Gain variation <1 dBpp

Harmonics level ‐50dBc

PN@100kHz [dBc/Hz] ‐98 dBc/Hz

PN@1MHz [dBc/Hz] ‐122 dBc/Hz

Max sensitivity 300 MHz/V

Total power consumption 440mW

Temperature Range  ‐30 to 70 degree

Size 2.2mm x 4.3mm

Performance

Block scheme

Linearization approach

The idea concerns the pre‐distorsion of the tuning voltage that allows to improve the operational bandwidth of the VCO providing a linear relationship in a wider tuning range between the frequency of the synthesized signal and the input control signal.

WP2WP1Index

f out

Vout

V out

Vctrl

f out

Vctrl

A CB

Linearization Circuit

Vctrl Vout fout

B A

C

VCO

Circuit details

Linearization approach

The output voltage is obtained with a resistive divider at the emitter terminal of T1, and the values of RL1 and RL2 can be set, in order to determine the desired slope of Vout, after the relation:

WP2WP1Index

Vout Vemitter ∙RL2

RL1 RL2

The use of the diode‐connected transistor T2 in series with T1, provide a suitable compensation to circuit variations due to thermal effects.The measured temperature dependency in the range from ‐30°C to +70°C is less than 0.1mV/°C in the full bandwidth.

0

1

2

3

4

5

6

7

8

0 1 2 3 4 5 6 7 8 9 10 11Vctrl

Vout

[V]

RL1 ↓RL2 ↑

RL1 ↑RL2 ↓

Circuit details

VCO structure

A push‐push architecture has been selected for the VCO circuit.

Each oscillator is based on a Clapp configuration.

The input resonators are realized with variable diodes in anti‐series configuration coupled with passive inductors. 

WP2WP1Index

Clapp osc.@fo

Clapp osc.@fo

Output combiner

Output Buffer

Resonator@fo

Resonator@fo

Linearizer@2fo

Circuit details

VCO structure

WP2WP1Index

The MMIC VCO has been realized in HBT Technology with the HB20M process provided by UMS Foundry.

The Transistor has been biased in order to reach a Negative Resistance as lower as possible and connected in common emitter configuration.

Oscillator topology foresees the possibility to bias the Monolithics either symmetrically or asymmetrically.

In order to avoid the onset of spurious frequencies, a fully stability analysis has been performed by means of both differential nonlinear probes and conversion matrix methods. Compensation network has been added accordingly to suppress even and odd mode spurious oscillations.

Oscillation frequency

Results and measurements

WP2WP1Index

The oscillation frequency as a function of the tuning voltage and temperature is shown and compared with simulation.  The tuning range is about the 16%.The chip has been measured in the range ‐30°C÷70°C showing a maximum frequency variation of the output signal of 70MHz.

Sensitivity

Results and measurements

WP2WP1Index

The average sensitivity is 200MHz/V, with a maximum value of 300MHz/V for the lowest value of the control voltage.  The maximum temperature dependence measured in the range ‐30°C÷70°C is 30MHz/V.

WP2WP1Index

The measured phase noise is ‐98.5dBc/Hz at 100kHz offset for a reference frequency of 11.7GHz.

Also the phase noise shows a limited temperature dependence. 

Phase Noise

Results and measurements

f0  = 11.7GHz

Conclusions

The design of a state‐of‐the‐art LNA Module in Q/V band is presented and addressed with circuitry details.

The complete LNA Demonstrator is currently under construction with the integration of 4 MMICs, temperature‐depended attenuators, a WG isolator and novel microstrip‐to‐waveguide transitions designed in LTCC. 

The design of a MMIC VCO with enhanced characteristics of linearity and sensitivity and a low temperature dependence is also provided. 

A new PLL module which embeds the designed VCO for new generation on‐board equipment and satellite communications is currently under test.

WP2WP1Index

mail: leonardo.pantoli@univaq.it