Using co-design techniques to increase the reliability of the Electronic control System for a Multilevel Power Converter Javier C. Brook, Francisco J

Using co-design techniques to increase the reliability of the Electronic

controlSystem for a Multilevel Power

Converter

Javier C. Brook, Francisco J. Rodríguez, Pedro Martín, Emilio J. Bueno

Department of Electronics. University of Alcalá (Spain)

[email protected]

IECON 2006

University of Alcalá Department of Electronics

Researching group in Electronic Engineering applied to the Renewable Energies

Contents

1. Introduction

2. Objectives

3. Overview of the Processing System

4. Proposals to apply co-design techniques

5. Experimental results

6. Conclusions

Department of Electronics

IECON 2006Researching group in Electronic Engineering applied to the Renewable Energies

University of Alcalá

Contents

1. Introduction

2. Objectives




6. Conclusions




Introduction: System to control




Power Electronic System VSC 1 VSC 2

Sa2

Sa1

Sa2

Sa1

Sb2

Sb1

Sb2

Sb1

Sc2

Sc1

Sc2

Sa2

Sa1

Sa2

Sa1

Sb2

Sb1

Sb2

Sb1

Sc2

Sc1

Sc2

Sc1

CDC2

NP

P

N

CDC1

Da2

Da1

Db2

Db1

Dc2

Dc1

Da2

Da1

Db2

Db1

Dc2

Dc1

Control Electronic System

Sc1

3*L13*L2

3*Co

PCC

Distribution line

AC motor

vN

vP

iNP1 iNP2

Grid filter

Grid

Ubase (Base voltage) 480V

ωbase (Base frequency) 2π50rad/s

Converter

Sn (Nominal Power) 150kVA

Ibase (Base current) 312,5A

Introduction: Control Electronic System




AC motorVSC1

3*L13*L2

3*Co

CDC2NP

P

N

PCC

CDC1

uDC meas.NP Voltage

Balancing Controller

uDC controller

)(kuDC

)(kuDC

Current controller

)(kid

)(kiq

)(* ku

Grid current meas.

Grid voltage meas.SPLL

tititi cgbgag ,, tetete cPCCbPCCaPCC ,,

)(kig

kek g

),(1

Control of VSC connected to the grid Control of VSC connected to the AC machine

iDC1 iDC2Distribution line

High level controller

References from the grid operator

PWMgenerator

)(* ku

12 pulses

Machine measurements

tr

Current controller Machine

controller

)(ki

)(kr)(kd

kki r),( kr

tititi cba ,,

Turbine controller

kPw

PWMgenerator

12 pulses

VSC2

Contents

1. Introduction

2. Objectives




6. Conclusions




Objectives

• The main objective is to increase the reliability of the electronic control system, applying codesign techniques.

• This objective will be achieve by means of several partial objectives:

– Hardware and software reliability modelling

– New codesign algorithms, that take into account time, area, power and reliability restrictions


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Contents

1. Introduction

2. Objectives




6. Conclusions




Block diagram of the Control Electronic System


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DSP

Data acquisitionA/D conversion

FPGA

Adaptation of analog signals

Analog signals

System references

Driving of IGBTs

Faults of IGBT

drivers

Driving of relays

Optical transmitters

Opticalreceivers

Relays

To IGBTdrivers

To control the converter breakers

FPGA-DSP Interface

12 bits

Processor Module

Coprocessor Module

Computational Module

TMS320C6713 SPARTAN II

MAX1309

Ts=200μs

Analysis of the tasks executed by the “Computational Module”


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Tasks TS Trun Operation type Algorithm type

Selected Device

For the line-side converter

Current vector controller 200μs

<200μs

Trigonometric

and matrixControl

DSP

Identification of different disturbances 200μs FPGA

DSC (Delay Signal Cancellation) [17] 200μs FPGA

SPLL [17] 200μs Arithmetic DSP

DC-bus voltage controller 200μs Arithmetic DSP

For the generator-side converter

Vector controller. 200μs

<200μs

Trigonometric and matrix

Control

DSP

Turbine controller. Tracking of the maximum power point.

200μsArithmetic DSP

For the two converters

PWM generation (carrier frequency 2.5KHz and 24 signals) 200μs Arithmetic Parallel FPGA

Encoder reading 200μs Arithmetic Parallel FPGA

Acquisition data 200μs - Parallel FPGA

DSP Programming


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Data acquisition

Start main() and init_system()

t(k)=k·TS=k·200?s No

Output of controller reference_PWM()

PI SPLL spll_pi()

DSC dsc()

Current controller currentcontroller()

DC_bus controller dcbuscontroller()

Any fault?

System protection system_protection()

Stop

Any hardware fault?

Yes ? c_int(4) Yes

Yes ? c_int(5)

No

+

+ acquisition_data()

c_int(5) Control algorithm

FPGA Programming


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To EMIF bus

Configuration and control registers

DSP Interface

PWM generator

Synchronization DSP-FPGA

FAULTs control ADCs control

Encoders I/O digital signals

To IGBTs drivers

Control lines

Data

12 bits

From IGBTs drivers

From encoders

To relays

High Performance

computacional Unit

Timing events in the DSP and FPGA


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SYNC

FPGA events

t

DSP events

k k+1

t

SYNC

Data acquisition

Acquired data transmission from

FPGA to DSP

References calculated in k-1 are transmitted from DSP to FPGA

New references will be applied in k+1

Control algorithms

Generation of PWM signals from references calculated in k-1

Generation of PWM signals from references calculated in k

t

PWM carrier 2

PWM carrier 1

Contents

1. Introduction

2. Objectives




6. Conclusions




Reliability calculation

• Reliability definition:

– Is the probability that a component will perform its intended function satisfactorily for a period of time [t0,t], given that the component was working properly at time t0


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• Hardware reliability:

– Error in semiconductor devices: soft errors.

• Due to external radiations, impurities in the devices, etc.

– Evaluation of soft errors [Tosun, et al. 05][Alexandrescu, et al. 02]

• Simulation.

• Fault injection.

– As the result of this evaluation, it can be obtained a table with the reliability of some basic elements: adder, multiplier, etc.


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• Hardware reliability:

– Reliability of some basic device implemented in FPGA [Tosun, et al. 05][Alexandrescu, et al. 02]


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• Software reliability:

– Definition:

• The probability of failure-free software operation for a specified period of time in a specified environment .

– To model and predict software reliability, a SRGM (software reliability growth model) can be used.


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• Appling hardware and software reliability models and estimation algorithms, the following table (technology library) can be obtained for the digital control system tasks:


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A. Acquisition data.B. PWM generation (carrier frequency

2 2.5KHz and 24signals)C. Identification of different

disturbancesD. SPLL .E. DSC (Delay Signal Cancellation) F. DC-bus voltage controller.G. Current vectorial controller.H. Vectorial controller.I. Turbine controller. Tracking of the

mnmaximum power point.J. Encoders reading.

Codesign algorithm

• In order to increase the overall digital control system reliability, we use a partition algorithm that take into account several parameters:

– Reliability, time processing, delay and area.

• Our co-design methodology consists of the following steps:

– Obtaining an initial solution by allocating the most reliable elements from the technology library to each task.

– To make adjustments to fulfill the specification delay, the specification area and other design requirements.

– To apply Engineering Software Reliability to the tasks implemented in DSP.


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Contents

1. Introduction

2. Objectives




6. Conclusions




Experimental Setup


DIGILAB 2E

Link Board

Interface Board

TMS320C6713 DSK

Optical transmitters

Optical receivers

ADCsRelays

Digital Signal Processing

Acquisition card

Glue logic

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DSP execution


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TS

Control algorithm execution

k-1 k k+1 k+2

Number of cycles

Execution graph

Task distribution

• Applying the codesign algorithm, the task distribution is:


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Contents

1. Introduction

2. Objectives




6. Conclusions




Conclusions

• A co-design algorithm has been presented, based on applying the metric reliability of hardware and software, in order to improve the performance of a processing system that uses FPGA and DSP.

• Future works:– Accurate evaluation of hardware and software

reliability.

– New co-design algorithms (partitioning task between other processing units)


IECON 2006



Using co-design techniques to increase the reliability of the Electronic control

System for a Multilevel Power Converter

Javier C. Brook, Francisco J. Rodríguez, Pedro Martín, Emilio J. Bueno

Department of Electronics. University of Alcalá (Spain)

[email protected]

IECON 2006

University of Alcalá Department of Electronics


ACKNOWLEDGMENTS

This work has been financied by the Spanish administration (ENE2005-08721-C04-01)

Documents

Using co-design techniques to increase the reliability of the Electronic control System for a Multilevel Power Converter Javier C. Brook, Francisco J