usrp2

2

1

3

J101 F101SMD−XXX

C10014.7uF CER X5R 25V

12

C10

02

100u

F 30

V

C1003

0.47uFL102

C10040.1uF

C1005220pF

C10060.1uF

C1007220pF

3_3V:1 AVDD_RX:1

AGND_RX:1

12C1008

47uF

L103

C10090.1uF

C1010220pF

C10110.1uF

C1012220pF

3_3V:1 AVDD_TX:1

AGND_TX:1

12C1013

47uF

1_2V:1

AVDD_TX:1DVDD_TX:1

AGND_TX:1

C10220.1uF

C10230.1uF

C10240.1uF

C10500.1uF

C10510.1uF

C10530.1uF

C10540.1uF

C10550.1uF

C10580.1uF

C10590.1uF

C10600.1uF

C10610.1uFC1064

0.1uFC10650.1uFC1066

0.1uFC10670.1uF

C10680.1uF

C10690.1uF

C10700.1uF

C10710.1uF

C10720.1uF

C10730.1uF

C10880.1uF

C10890.1uF

C10900.1uF

C10910.1uF

C10920.1uF

C10930.1uF

USRP2 Power$Date$

power.sch $Revision$$Author$

FILE: REVISION:

DRAWN BY: PAGE OF

TITLE

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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 221 8

L106

C11120.1uF

C1113220pF

C11140.1uF

C1115220pF

3_3V:1 DVDD_FPGA:1

12C1116

47uF

17G

ND

64G

ND

65G

ND

_EP

7AVdd

10AVdd

18AVdd

63AVdd

31D

GN

D

50D

GN

D32

DVdd

49D

Vdd

LTC2284−PW

R

U2

1C

LKVD

D

3C

LKVD

D

4C

LKG

ND

7C

LKG

ND

9D

GN

D

17D

GN

D

25D

GN

D

35D

GN

D

44D

GN

D

52D

GN

D

81D

GN

D_E

P

10D

VDD

18D

VDD

26D

VDD

36D

VDD

43D

VDD

51D

VDD

61AV

DD

63AV

DD

65AV

DD

76AV

DD

78AV

DD

80AV

DD

62AG

ND

64AG

ND

66AG

ND

67AG

ND

70AG

ND

71AG

ND

74AG

ND

75AG

ND

77AG

ND

79AG

ND

AD97

77−P

WR

U3

Vunreg:1

D10

2

B360

AVDD_RX:1

AGND_RX:1

DVDD_RX:1

A1G

ND

A22G

ND

B2G

ND

B21G

ND

C9

GN

D

C14

GN

D

J3G

ND

J9G

ND

J10G

ND

J11G

ND

J12G

ND

J13G

ND

J14G

ND

J20G

ND

K9G

ND

K10G

ND

K11G

ND

K12G

ND

K13G

ND

K14G

ND

L9G

ND

L10G

ND

L11G

ND

L12G

ND

L13G

ND

L14G

ND

M9

GN

D

M10

GN

D

M11

GN

D

M12

GN

D

M13

GN

D

M14

GN

D

N9

GN

D

N10

GN

D

N11

GN

D

N12

GN

D

N13

GN

D

N14

GN

D

P3G

ND

P9G

ND

P10G

ND

P11G

ND

P12G

ND

P13G

ND

P14G

ND

P20G

ND

Y9G

ND

Y14G

ND

AA2G

ND

AA21G

ND

AB1G

ND

AB22G

ND

A6VC

CAU

X

A17VC

CAU

X

F1VC

CAU

X

F22VC

CAU

X

U1

VCC

AUX

U22

VCC

AUX

AB6VC

CAU

X

AB17VC

CAU

X

G7

VCC

INT

G8

VCC

INT

G15

VCC

INT

G16

VCC

INT

H7

VCC

INT

H16

VCC

INT

R7

VCC

INT

R16

VCC

INT

T7VC

CIN

T

T8VC

CIN

T

T15VC

CIN

T

T16VC

CIN

T

XC3SXX00FG

456−PWR

U1

Power Supplies6V Daughterboard Power (<1A)3.3VAN LTC2284 (200mA), AD9777 (<500mA)3.3VCLK AD9510 (<500mA), CLOCK (88mA) 3.3VDIG All IO (<2A)2.5V FPGA AUX (<100mA), Ethernet Core (<300mA), SERDES (<150mA)1.8V Ethernet Core (~500mA)1.2V FPGA Core (<2A)

L108

C11220.1uF

C1123220pF

C11240.1uF

C1125220pF

3_3V:1 DVDD_TX:1

12C1126

47uF

L109

C11270.1uF

C1128220pF

C11290.1uF

C1130220pF

3_3V:1 DVDD_RX:1

12C1131

47uF

2_5V_FPGA:11_2V:1

L110

C11320.1uF

C1133220pF

C11340.1uF

C1135220pF

2_5V:1 2_5V_ETH:1

12C1136

47uF

L111

C11370.1uF

C1138220pF

C11390.1uF

C1140220pF

2_5V:1 2_5V_SER:1

12C1141

47uF

L112

C11420.1uF

C1143220pF

C11440.1uF

C1145220pF

2_5V:1 2_5V_FPGA:1

12C1146

47uF

10 Vin2

11

BST2

21GND_EP

9SW2

8IND2

7Vout2

6 PG2

14FB2

12SS/Track2

13 Vc2 LT3510−B

U14

1 Vin1

20

BST1

21GND_EP

2SW1

3IND1

4Vout1

5 PG1

17FB1

19SS/Track1

18 Vc1

16 RT/SYNC

15 SHDN

LT3510−A

U14

24.9KR101

C1147

10pF

C1148

470pF

40.2KR102

C1149

0.1uF

8.06KR103NONE

R104

sync

1

Vunreg:1

C1150

22uF CER X5R 6.3V

3_3V:1


C1152

0.47uF

D10

4

B360

4KR105

C1153

10pF

C1154

470pF

40.2KR106

C1155

0.1uF

8.06KR107

Vunreg:1

C1156

22uF CER X5R 6.3V

1_2V:1


C1158

0.47uF

D10

6

B360

10 Vin2

11

BST2

21GND_EP

9SW2

8IND2

7Vout2

6 PG2

14FB2

12SS/Track2

13 Vc2 LT3510−B

U15

1 Vin1

20

BST1

21GND_EP

2SW1

3IND1

4Vout1

5 PG1

17FB1

19SS/Track1

18 Vc1

16 RT/SYNC

15 SHDN

LT3510−A

U15

16.9KR108

C1159

10pF

C1160

470pF

40.2KR109

C1161

0.1uF

8.06KR110NONE

R111

sync

2

Vunreg:1

C1162

22uF CER X5R 6.3V

2_5V:1


C1164

0.47uF

D10

8

B360

10KR112

C1165

10pF

C1166

470pF

40.2KR113

C1167

0.1uF

8.06KR114

Vunreg:1

C1168

22uF CER X5R 6.3V

1_8V:1

C11

694.

7uF

CER

X5R

25V

C1170 0.47uF

C1173

0.1uF

Vunreg:1

C1175

4.7uF CER

X5R 25V

C11760.47uF

C1179

0.1uF

L118

2_5V_FPGA:1

6V:13_3V:1 2_5V:1 1_8V:1

1

2

J1071_2V:1

1

2

J106

1

2

J105

1

2

J104

1

2

J103

1

2

J102

D101

PMEG4005ET

D103

PMEG4005ET

D105

PMEG4005ET

D107

PMEG4005ET

C11190.1uF

C5411uF

L107

12C540

47uF

6V_CLK:16V:1

C11810.1uF

C11821uF

L119

12C1183

47uF

6V_TX:16V:1

C11840.1uF

C11851uF

L120

12C1186

47uF

6V_RX:16V:1

12

C120347uF

6V:1

12C1207

47uF

1_8V:1

12C1206

47uF

1_2V:1

L801

C8030.1uF

C804220pF

C8010.1uF

C802220pF

2_5V:1 2_5V_RAM:1

12C805

47uF

2_5V:1

12C1205

47uF

12C1204

47uF

3_3V:1

Removed C1014−C1021 b/c they don’t fit

Removed C1025, C1052, C1056, C1057 b/c they don’t fit

F102SMD−XXXL121

ALT PowerFront Panel Power

12

R1301

2

J108Vunreg:1

FAN Power

L122

2

4

3

1

L101 8uH

2

4

3

1

L113 8uH

2

4

3

1

L114 8uH

2

4

3

1

L115 8uH

2 GND3 SET 4MOD

1 V+5OUT2

6OUT1

LTC6908S6−X

U23

TSOT−23C12080.1uF

190K

R131

3_3V:1

C12091000pF

0

R132

NONE

R133

NONE

R134

NONE

R135

ps_osc_2ps_osc_1

SSFM ModulationOFF1/641/321/16

3_3V:1

pg1

pg2

pg3

pg4

ps_osc_2 pg3

sync2

61.9KR136

61.9KR137

ps_osc_1 pg1

sync1

61.9KR138

61.9KR139

F103500mA

M1 M2 M3 M4 M5 M6 M7 M8 M9 M10

L101A

6.5uH

L113A

6.5uHL114A

6.5uH

L115A

6.5uH

©2012 Ettus Research. All rights reserved.

IOUTP_A

IOUTN_A

IOUTP_B

IOUTN_B

VINP_A

VINN_A

VINP_B

VINN_B

TX13_A

TX12_A

TX11_A

TX10_A

TX09_A

TX08_A

TX07_A

TX06_A

TX05_A

TX04_A

TX03_A

TX02_A

TX01_A

TX00_A

ADC00_B

ADC01_B

ADC02_B

ADC03_B

ADC04_B

ADC05_B

ADC06_B

ADC07_B

ADC08_B

ADC09_B

ADC10_B

ADC11_B

TX13_B

TX12_B

TX11_B

TX10_B

TX09_B

TX08_B

TX07_B

TX06_B

TX05_B

TX04_B

TX03_B

TX02_B

TX01_B

TX00_B

io_tx_14

io_tx_11

io_tx_13

io_tx_12

io_tx_08

io_tx_10

io_tx_09

io_tx_05

io_tx_07

io_tx_06

io_tx_02

io_tx_04

io_tx_03

io_tx_00

io_tx_01

io_rx_15

io_rx_14

io_rx_11

io_rx_13

io_rx_12

io_rx_08

io_rx_10

io_rx_09

io_rx_05

io_rx_07

io_rx_06

io_rx_02

io_rx_04

io_rx_03

io_rx_00

io_rx_01

FILE: REVISION:

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$Date$$Revision$$Author$

fpga.sch

USRP2 FPGA and CODECs

3 8

io_tx_15

11 DB15_P1

12 DB14_P1

13 DB13_P1

14 DB12_P1

15 DB11_P1

16 DB10_P1

19 DB9_P1

20 DB8_P1

21 DB7_P1

22 DB6_P1

23 DB5_P1

24 DB4_P1

27 DB3_P1

28 DB2_P1

29 DB1_P1

30 DB0_P1

73IOUT1_P

72IOUT1_N

AD9777−CH1 U3

31 DB15_P2/IQSEL

32 DB14_P2/ONEPORTCLK

33 DB13_P2

34 DB12_P2

37 DB11_P2

38 DB10_P2

39 DB9_P2

40 DB8_P2

41 DB7_P2

42 DB6_P2

45 DB5_P2

46 DB4_P2

47 DB3_P2

48 DB2_P2

49 DB1_P2

50 DB0_P2

69IOUT2_P

68IOUT2_N

AD9777−CH2 U3

1 VIN+_A

2 VIN−_A

8 CLK_A

41D0_A

42D1_A

43D2_A

44D3_A

45D4_A

46D5_A

47D6_A

48D7_A

51D8_A

52D9_A

53D10_A

54D11_A

55D12_A

56D13_A

57OVF_A

58 OEB_A

59 PDWN_A

LTC2284−A U2

16 VIN+_B

15 VIN−_B

9 CLK_B

24D0_B

25D1_B

26D2_B

27D3_B

28D4_B

29D5_B

30D6_B

33D7_B

34D8_B

35D9_B

36D10_B

37D11_B

38D12_B

39D13_B

40OVF_B

23 OEB_B

22 PDWN_B

LTC2284−A U2

CLK_ADC

TX15_A

TX14_A

TX15_B

TX14_B

ADC12_B

ADC13_B

A3 IO/VREF_0

C7 IO/VREF_0

F7 IO/VREF_0

E5 IO/VREF_0/400NC

B7 IO_L19N_0/400NC

A7 IO_L19P_0/400NC

E8 IO_L22N_0/400NC

D8 IO_L22P_0/400NC

C11 IO_L31P_0/VREF_0

A10IO

D9IO

D10IO

F6IO

B4IO_L01N_0/VRP_0/DCI

A4IO_L01P_0/VRN_0/DCI

D5IO_L06N_0

C5IO_L06P_0

B5IO_L09N_0

A5IO_L09P_0

E6IO_L10N_0

D6IO_L10P_0

C6IO_L15N_0

B6IO_L15P_0

E7IO_L16N_0

D7IO_L16P_0

B8IO_L24N_0

A8IO_L24P_0

F9IO_L25N_0

E9IO_L25P_0

B9IO_L27N_0

A9IO_L27P_0

F10IO_L28N_0

E10IO_L28P_0

C10IO_L29N_0

B10IO_L29P_0

F11IO_L30N_0

E11IO_L30P_0

D11IO_L31N_0

C8

VCC

O_0

F8VC

CO

_0

G9

VCC

O_0

G10

VCC

O_0

G11

VCC

O_0

XC3SXX00FG456−IO0

U1

E13IO/VREF_1

F14IO/VREF_1/400NC

A19IO_L06N_1/VREF_1

A18IO_L10N_1/VREF_1

C16IO_L19N_1/400NC

D16IO_L19P_1/400NC

A16IO_L22N_1/400NC

B16IO_L22P_1/400NC

D12IO_L31N_1/VREF_1

A12 IO

E16 IO

F12 IO

F13 IO

F16 IO

F17 IO

C19 IO_L01N_1/VRP_1/DCI

B20 IO_L01P_1/VRN_1/DCI

B19 IO_L06P_1

C18 IO_L09N_1

D18 IO_L09P_1

B18 IO_L10P_1

D17 IO_L15N_1

E17 IO_L15P_1

B17 IO_L16N_1

C17 IO_L16P_1

D15 IO_L24N_1

E15 IO_L24P_1

B15 IO_L25N_1

A15 IO_L25P_1

D14 IO_L27N_1

E14 IO_L27P_1

A14 IO_L28N_1

B14 IO_L28P_1

C13 IO_L29N_1

D13 IO_L29P_1

A13 IO_L30N_1

B13 IO_L30P_1

E12 IO_L31P_1

C15

VCC

O_1

F15

VCC

O_1

G12

VCC

O_1

G13

VCC

O_1

G14

VCC

O_1

XC3SXX00FG456−IO1U1

D22IO_L17P_2/VREF_2

F19IO_L23N_2/VREF_2

G20IO_L26N_2/400NC

H19IO_L26P_2/400NC

H18IO_L28N_2/400NC

J17IO_L28P_2/400NC

H21IO_L29N_2/400NC

H22IO_L29P_2/400NC

J18IO_L31N_2/400NC

J19IO_L31P_2/400NC

J21IO_L32N_2/400NC

J22IO_L32P_2/400NC

K17IO_L33N_2/400NC

K18IO_L33P_2/400NC

K19IO_L34N_2/VREF_2

L22IO_L40P_2/VREF_2

C22 IO

C20 IO_L01N_2/VRP_2/DCI

C21 IO_L01P_2/VRN_2/DCI

D20 IO_L16N_2

D19 IO_L16P_2

D21 IO_L17N_2

E18 IO_L19N_2

F18 IO_L19P_2

E19 IO_L20N_2

E20 IO_L20P_2

E21 IO_L21N_2

E22 IO_L21P_2

G17 IO_L22N_2

G18 IO_L22P_2

G19 IO_L23P_2

F20 IO_L24N_2

F21 IO_L24P_2

G21 IO_L27N_2

G22 IO_L27P_2

K20 IO_L34P_2

K21 IO_L35N_2

K22 IO_L35P_2

L17 IO_L38N_2

L18 IO_L38P_2

L19 IO_L39N_2

L20 IO_L39P_2

L21 IO_L40N_2

H17

VCC

O_2

H20

VCC

O_2

J16

VCC

O_2

K16

VCC

O_2

L16

VCC

O_2


C1 IO_L16P_7/VREF_7

D3 IO_L19N_7/VREF_7

G3 IO_L26N_7/400NC

G4 IO_L26P_7/400NC

G2 IO_L27P_7/VREF_7

H1 IO_L28N_7/400NC

H2 IO_L28P_7/400NC

J4 IO_L29N_7/400NC

H4 IO_L29P_7/400NC

J5 IO_L31N_7/400NC

J6 IO_L31P_7/400NC

J1 IO_L32N_7/400NC

J2 IO_L32P_7/400NC

K5 IO_L33N_7/400NC

K6 IO_L33P_7/400NC

L1 IO_L40N_7/VREF_7

C2IO

C3IO_L01N_7/VRP_7/DCI

C4IO_L01P_7/VRN_7/DCI

D1IO_L16N_7

E4IO_L17N_7

D4IO_L17P_7

D2IO_L19P_7

F4IO_L20N_7

E3IO_L20P_7

E1IO_L21N_7

E2IO_L21P_7

G6IO_L22N_7

F5IO_L22P_7

F2IO_L23N_7

F3IO_L23P_7

H5IO_L24N_7

G5IO_L24P_7

G1IO_L27N_7

K3IO_L34N_7

K4IO_L34P_7

K1IO_L35N_7

K2IO_L35P_7

L5IO_L38N_7

L6IO_L38P_7

L3IO_L39N_7

L4IO_L39P_7

L2IO_L40P_7

H3

VCC

O_7

H6

VCC

O_7

J7VC

CO

_7

K7VC

CO

_7

L7VC

CO

_7


CLK_ADC

3 REFH_A

4 REFH_A

5 REFL_A

6 REFL_A

13 REFH_B

14 REFH_B

11 REFL_B

12 REFL_B

62SENSE_A

19SENSE_B

21MUX

60MODE

61VCM_A

20VCM_B

LTC2284−CTRL U2

C3012.2uF

C302

1uF

C303 1uF

C3040.1uF

C3052.2uF

C306

1uF

C307 1uF

C3080.1uF

AVDD

_RX:1

C3092.2uF

C3102.2uF

MODE ==> 2/3Vdd = 2’s Comp, w/DCSMUX ==> A−> A, B −> BSENSE ==> 1 Vpp or 2 Vpp Range

2V Range

ADC_OVF_B

ADC00_A

ADC01_A

ADC02_A

ADC03_A

ADC04_A

ADC05_A

ADC06_A

ADC07_A

ADC08_A

ADC09_A

ADC10_A

ADC11_A

ADC12_A

ADC13_A

ADC_OVF_A

ADC_OE_B_N

ADC_OE_A_N

ADC_PDN_B

ADC_PDN_A

TX13_A

TX12_A

TX11_A

TX10_A

TX09_A

TX08_A

TX07_A

TX06_A

TX05_A

TX04_A

TX03_A

TX02_A

TX01_A

TX00_A

TX15_A

TX14_A

TX13_B

TX12_B

TX11_B

TX10_B

TX09_B

TX08_B

TX07_B

TX06_B

TX05_B

TX04_B

TX03_B

TX02_B

TX01_B

TX00_B

TX15_B

TX14_B

DVDD_FPGA:1

DVDD_FPGA:1

DVDD_FPGA:1

DVDD_FPGA:1

ADC00_B

ADC01_B

ADC02_B

ADC03_B

ADC04_B

ADC05_B

ADC06_B

ADC07_B

ADC08_B

ADC09_B

ADC10_B

ADC11_B

ADC12_B

ADC13_B

ADC_OVF_B

ADC00_A

ADC01_A

ADC02_A

ADC03_A

ADC04_A

ADC05_A

ADC06_A

ADC07_A

ADC08_A

ADC09_A

ADC10_A

ADC11_A

ADC12_A

ADC13_A

ADC_OVF_A

ADC_OE_B_N

ADC_PDN_B

ADC_OE_A_N

ADC_PDN_A

C3110.1uF

C3130.1uF

C3160.1uF

C3170.1uF

C3190.1uF

C3210.1uF

C3220.1uF

C3260.1uF

C3270.1uF

C3280.1uF

C3290.1uF

C3300.1uF

DVD

D_F

PGA:

1

2.2K

R301SCL

DVD

D_F

PGA:

1

2.2KR302 SDA

SCLK_TX_DB

SCLK_TX_ADC

SCLK_TX_DAC

SDI_TX_DB

SDI_TX_ADC

SDI_TX_DAC

SEN_TX_DB

SEN_TX_ADC

SEN_TX_DAC

SDO_TX_DB

SDO_TX_ADC

SCLK_RX_DB

SCLK_RX_ADC

SCLK_RX_DAC

SDI_RX_DB

SDI_RX_ADC

SDI_RX_DAC

SEN_RX_DB

SEN_RX_ADC

SEN_RX_DAC

SDO_RX_DB

SDO_RX_ADC

SDI

SDO

SCLK

SEN_CLK

SEN_DAC

clk_sel1

clk_sel0

clk_en1

clk_en0

AGN

D_R

X:1

AGN

D_R

X:1

AGND_RX:1

1234

J305

DVDD_FPGA:1

RXD

TXD

330

R315

330

R316

DAC_LOCK

1KR311

1KR312

DVDD_FPGA:1

LED2

LED1

1KR313

DVDD_FPGA:1

LED4

1KR314

DVDD_FPGA:1

LED3

K3A3

LED1slot=3

K1A1

LED2slot=1

K2A2 LED2

slot=2

K3A3

LED2slot=3

AVDD_RX:1

0R304

0R305

NONER306

NONER307

1V Range

Removed C318, C320 b/c they don’t fit

Removed C312, C314, C315 b/c they don’t fit

Removed C323−325 b/c they don’t fit

1KR317

2KR318 C350

1uFC3511uF

K2A2

LED1slot=2

DVDD_FPGA:1

LED0

1KR319

PPS_IN


12

D201

1KR201

1KR202

C201NONE

10KR203

POR

2_5V_FPGA:1

10K

R20

6


config.sch

USRP2 Configuration

2 8

Both JTAG ports are 2.5V

1 CD_DAT[3]/NC/nCS

2 CMD/CMD/Din

3 Vss1

4 Vdd

5 CLK

6 Vss2

7 DAT[0]/DAT[0]/Dout

8 DAT[1]/NC/NC

9 DAT[2]/NC/NC

Pin Defs:SD/MMC/SPI

11prot_det_com12protect10detect

13G

ND

14G

ND

J201

DVDD_FPGA:1

Y4IO

_L01N_5/R

DW

R_B

AA3IO

_L01P_5/CS_B

AA14IO

_L27N_4/D

IN/D

0

AB14IO

_L27P_4/D1

AB9IO

_L28N_5/D

6

AA9IO

_L28P_5/D7

U12

IO_L30N

_4/D2

V12IO

_L30P_4/D3

W12

IO_L31N

_4/INIT_B

W11

IO_L31N

_5/D4

Y12IO

_L31P_4/DO

UT/BU

SY

V11IO

_L31P_5/D5

AA22C

CLK

AB21D

ON

E

B3H

SWAP_EN

AB2M

0

AA1M

1

AB3M

2

A2PR

OG

_B

XC3SXX00FG

456−CFG

U1

A21 TCK

B1 TDI

B22 TDO

A20 TMS

XC3SXX00FG456−JTAG U1

1 GND

3 GND

5 GND

7 GND

9 GND

11 GND

13 GND

2Vref/Vref

4PROG/TMS

6CCLK/TCK

8Done/TDO

10Din/TDI

12NC/NC

14INIT/NC

XIL−PLAT−CABLEJ203

TDI_FPGA

TCK

TDO_FPGA

15VccIN

T

35VccIN

T

26VccIO

4G

ND

17G

ND

25G

ND

XC9572−VQ

44−PWR

U10

39 IO_B1MC2

40 IO_B1MC5

41 IO_B1MC6

42 IO_B1MC8

43 IO_B1MC9/GCK1

44 IO_B1MC11/GCK2

1 IO_B1MC14/GCK3

2 IO_B1MC15

3 IO_B1MC17

29 IO_B2MC2

30 IO_B2MC5

31 IO_B2MC6

32 IO_B2MC8

33 IO_B2MC9/GSR

34 IO_B2MC11/GTS2

36 IO_B2MC14/GTS1

37 IO_B2MC15

38 IO_B2MC17

5IO_B3MC2

6IO_B3MC5

7IO_B3MC8

8IO_B3MC9

12IO_B3MC11

13IO_B3MC14

14IO_B3MC15

18IO_B3MC16

16IO_B3MC17

19IO_B4MC2

20IO_B4MC5

21IO_B4MC8

22IO_B4MC11

23IO_B4MC14

27IO_B4MC15

28IO_B4MC179

TDI

24TD

O

11TC

K

10TM

S

XC9572−VQ44−IOU10

sd_clk_25

sd_din_25

sd_cs_25

DVDD_FPGA:12_5V_FPGA:1

2_5V_FPGA:1

Slave Serial 2.5VBank 4 must be 2.5V

cpld_din

0

R210

0

R211

2_5V_FPGA:14.7K

R212cpld_init_b

330

R213

2_5V_FPGA:1

1KR214

C2020.1uFC203

0.1uF

C2040.1uF

cpld_detached

2_5V_FPGA:1

POR

C2050.1uFcpld_clk

cpld_start

cpld_mode

cpld_done

5SDA

1 A0

3 A2 6SCL2 A1 7n/c

24CxxU11

24LC024/SN

GND:4DVDD_FPGA:8

SCLSDA

cpld_clk

cpld_start

cpld_mode

cpld_done

ser_loopenser_prbsen

ser_rx_en

ser_enable

CLK_25MHZ

CLK_25MHZ_EN

TCK

TMS

TCK

TMS

TMS

TDO_PORT

TDI_PORT

TDI_

CPL

D

TDO

_CPL

D

TDI_PORT10R221

TDI_FPGA

TDI_CPLD

TDO_FPGA TDO_PORT

TDO_CPLD10R222

10R223

TDI_PORTNONER224

TDI_FPGA

TDI_CPLDTDO_FPGA

TDO_PORTTDO_CPLD

NONER225

NONER226

1

2

3

4

5

6

7

8

9

10

J204

cpld_detached

cpld_misc

cpld_misc

2_5V_FPGA:1

sd_prot

10KR

227

sd_det

10KR

228

sd_prot

sd_det

K1A1

LED1slot=11

2

D202

pg1

NO

NER

229

2_5V_FPGA:1

C2068200pF 2 SWT3 SRT

7RESETn1 RSTin/MRn

5WDS

6WDI

MAX6749KA+T

U24

2_5V_FPGA:8GND:4

PORWDI

C207 0.1uF

100KR233

NONER232

130KR231

2_5V

_FPG

A:1

DVD

D_F

PGA:

1

NO

NER

234

3 A

1 B

6 C

4Y

5Vc

c

2G

ND

SN74AUP1T57U31

DVD

D_F

PGA:

1

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A

1 2 3 4 5 6 7 8 9 10 11

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

12 13 14 15 16 17

sd_cs_33

sd_din_33

sd_clk_33

sd_cs_25

sd_cs_33 3 A

1 B

6 C

4Y

5Vc

c

2G

ND

SN74AUP1T57U32

DVD

D_F

PGA:

1sd_din_25

sd_din_33 3 A

1 B

6 C

4Y

5Vc

c

2G

ND

SN74AUP1T57U33

DVD

D_F

PGA:

1

sd_clk_25

sd_clk_33


12

34

56

78

910

1112

1314

1516

1718

1920

2122

2324

2526

27 29 31 33

28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64

35 37 39 41 43 45 47 49 51 53 55 57 59 61 63

J401

12

34

56

78

910

1112

1314

1516

1718

1920

2122

2324

2526

27 29 31 33

28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64

35 37 39 41 43 45 47 49 51 53 55 57 59 61 63

J402

SDA

SCL

AGND_RX:1

DVDD_TX:1

DVDD_RX:1

AGND_TX:1

AGND_RX:1

SCLK_R

X_DB

SDO

_RX_D

B

SEN_TX_D

BSEN

_RX_D

B

AGND_RX:1

AGND_TX:1

AGND_TX:1

AGND_RX:1

SDI_R

X_DB

AGND_RX:1AGND_RX:1AGND_RX:1

VINP_A

VINN

_A

VINP_B

VINN

_B

AGND_TX:1AGND_TX:1AGND_TX:1AGND_TX:1 IOU

TP_A

IOU

TN_A

IOU

TP_B

IOU

TN_B

AGND_TX:1

AGND_RX:1

AVDD_RX:1AVDD_RX:1

AVDD_TX:1AVDD_TX:1

6V_RX:1

AVDD_RX:1AVDD_RX:1

AVDD_TX:1AVDD_TX:1

6V_TX:1

DVDD_RX:1

I2C Address

io_tx_15

io_tx_14

io_tx_11

io_tx_13

io_tx_12

io_tx_08

io_tx_10

io_tx_09

io_tx_05

io_tx_07

io_tx_06

io_tx_02

io_tx_04

io_tx_03

io_tx_00

io_tx_01

io_rx_15

io_rx_14

io_rx_11

io_rx_13

io_rx_12

io_rx_08

io_rx_10

io_rx_09

io_rx_05

io_rx_07

io_rx_06

io_rx_02

io_rx_04

io_rx_03

io_rx_00

io_rx_01

FILE: REVISION:

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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

12 13 14 15 16 17


dboard.sch

USRP2 Daughterboad Interface

4 8

cloc

k_rx

_p

cloc

k_rx

_n

AGND_RX:1

AVDD_RX:1

AVDD_RX:1

AGND_RX:1

SDI_

RX_

DAC

SCLK

_RX_

DAC

SDO_RX_ADC

SEN

_RX_

DAC

SCLK_RX_ADC

SEN_RX_ADC

SDA

SCL

SCLK_TX_D

B

SDO

_TX_DB

SDI_TX_D

B

I2C Address

cloc

k_tx

_p

cloc

k_tx

_n

AVDD_TX:1

AGND_TX:1 AGND_TX:1

AVDD_TX:1

SDO_TX_ADC

SCLK_TX_ADC

SEN_TX_ADC

SDI_

TX_D

AC

SCLK

_TX_

DAC

SEN

_TX_

DAC

C40

10.

1uF

AVDD_TX:1

C40

20.

1uF

AVDD_TX:1

C40

30.

1uF

AGND_RX:1

C404 0.1uF

AGND_RX:1

8

Vdd

7GND

6 Vin0

5 Vin1

4 Din

2CS

1Dout

3SCLK

AD79X2−MSOP

U6

SDI_TX_ADC

8

Vdd

7GND

6 Vin0

5 Vin1

4 Din

2CS

1Dout

3SCLK

AD79X2−MSOP

U7

SDI_RX_ADC

Vref

Vref

C40

510

uFAVDD_RX:1

C406

0.1uF

AGND_RX:1

L401

L402

C408

0.1uF

9 Vdd

3GN

D

7SC

LK

6SY

NC

8D

in

1O

UTA

2O

UTB

4LD

AC

5C

LR

10R

ef

AD56

x3

U4

AGND_TX:1

9Vdd

3 GN

D

7SC

LK

6SYN

C

8D

in

1O

UTA

2O

UTB

4LD

AC

5C

LR

10R

ef

AD56x3

U5

C40

710

uF

AGND_RX:1

AGND_TX:1

AVDD_RX:1


5 8

16 FUNCTION

17 STATUS

18 SCLK

19 SDIO

20 SDO

21 CSB

AD9510−CTRLU9

58OUT0_P

57OUT0_N

54OUT1_P

53OUT1_N

35OUT2_P

34OUT2_N

29OUT3_P

28OUT3_N

AD9510−OUTAU9

47OUT4_P

46OUT4_N

43OUT5_P

42OUT5_N

39OUT6_P

38OUT6_N

25OUT7_P

24OUT7_N

AD9510−OUTBU9

1 REFIN_P

2 REFIN_N

14 CLK1_P

15 CLK1_N

10 CLK2_P

11 CLK2_N

6CP

AD9510−PLL U9

4VS

9VS

13VS

23VS

26VS

30VS

31VS

33VS

36VS

37VS

40VS

41VS

44VS

45VS

48VS

51VS

52VS

56VS

59VS

60VS

64VS

5Vcp

3G

ND

7G

ND

8G

ND

12G

ND

22G

ND

27G

ND

32G

ND

49G

ND

50G

ND

55G

ND

62G

ND

65G

ND

_EP

61R

SET63

CPR

SET

AD9510−PW

R

U9

SDO

SCLK

5 CLK_P

6 CLK_N

2LPF

8DATACLK/PLL_LOCK

60FSADJ1

59FSADJ2

58REFIO

57 RESET

53 SDO

54 SDIO

55 SCLK

56 CSB

AD9777−CTRLU3

C5010.1uF

C5020.1uF

C5030.1uF

C5040.1uF

C5050.1uF

C5060.1uF

C5070.1uF

C5080.1uF

C5090.1uF

C5100.1uF

C5110.1uF

C5120.1uF

C5130.1uF

C5140.1uF

C5150.1uF

C5160.1uF

C5170.1uF

C5180.1uF

C5190.1uF

C5200.1uF

C5210.1uF

C5220.1uF

DVDD_CLK:1

R5014.12K 1% R502

5.1K 1%

DVDD_CLK:1

SDI

SEN_CLK

6

4

3

1

25,

T501

2

1

345

J501

R503100

Outputs to:DAC −− PECLFPGA −− PECLExpansion −− PECL

TX−Dboard −− CMOS/LVDSRX−Dboard −− CMOS/LVDSADC −− CMOSDVDD_CLK:1

R504 390

C523

1.2uF

C524

0.12uF

R50

5

12K

C525

33uF

R506 25

R507200

R508200 R509200

C5260.1uF

C527 0.1uF

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USRP2 Clocking$Date$

clock.sch$Author$

$Rev$

B11 IO_L32N_0/GCLK7

B12 IO_L32N_1/GCLK5

AA12 IO_L32N_4/GCLK1

AA11 IO_L32N_5/GCLK3

A11 IO_L32P_0/GCLK6

C12 IO_L32P_1/GCLK4

AB12 IO_L32P_4/GCLK0

Y11 IO_L32P_5/GCLK2

XC3SXX00FG456−CLK U1

CLK_FPGA_P

CLK_FPGA_N

CLK_DAC_P

CLK_DAC_N

clock_tx_p

clock_tx_n

clock_rx_p

clock_rx_n

CLK_ADC

CLK_DAC_P

CLK_DAC_N

SDO

SCLK

SDI

SEN_DAC R510950 1%C528

0.1uF

R511

1K

DVDD_CLK:1

CLK_FUNC

CLK_STATUS

C5310.1uF

C5320.1uF

C5330.1uF

R512825

R580

100

R514825

R515

1.3KDVDD_FPGA:1

CLK_FPGA_P

CLK_FPGA_N

R516NONE

2

1

345

J502PPS_IN

R517 1M R518 1MDVDD_CLK:1

Bias VCXO to 1.65V when no reference

R519 200

R520 25

R52149.9

R522 1K

C5340.1uF

DVDD_CLK:1

ser_rx_clk

1VccA

2A

3G

ND

4EN

6 VccY

5 Y

ADG3301U17

6V_CLK:1 DVDD_CLK:1

DVDD_FPGA:1

CLK_TO_MAC

C536NONE

C535

NONE

DVDD_TX:1

AGND_TX:1

1 SEL1

2 SEL0

3 IN0_P

4 IN0_N

5Vc

c

6 IN1_P

7 IN1_N

8 NC

16EN0

15EN1

14OUT0_P

13OUT0_N

12G

ND

11OUT1_P

10OUT1_N

9NC

DS90CP22U18

R523100

R524 100

DVDD_CLK:1

clk_sel1

clk_sel0 clk_en1

clk_en0

C5370.1uF

clk_exp_in_n

clk_exp_out_p

R525100

R52610K

R527

17.4Kclk_exp_in_p

DVDD_CLK:1

R52

817.4K

DVDD_CLK:1

R52910K

R53383R532127

R53183R530127

DVDD_TX:1

R53749.9

R535

25

R536

25

CLK_FUNC

CLK_STATUS

clk_exp_out_n

C539100pF

DAC_LOCK

3kHz BW, 45 deg Phase marginwith 5 MHz compare freq and 3mA CP current

R54110K

testclk_pR542200

R543200testclk_n

1

2

J504

12 J505

clkadc_p

clkadc_n

34 5

DS90LT012AHU20

AVDD_RX:1AGND_RX:2

C11170.1uF

C1118220pF

12C1121

47uFC5420.1uF

DVDD_CLK:1

6V_CLK:1

C544

1uF

1 EN

2NC

3Vout

4 Vin

5GND

LP38692MPU22

1 2 3 4

J503

C5430.1uF

AGND_RX:1

AVDD_RX:1

C5450.1uF

C5460.1uF

GMII_RX_CLK

3OUT

1ENB/TUNE

4 Vcc

2 GND

VCTCXO U8

R57125

R570 25

R581 200

R582 200C5800.1uF

C5810.1uF

R513

1.3K


ser_out_n

ser_out_p

ser_in_n

ser_in_p

USRP2 Expansion

7 8 $Author$expansion.sch $Revision$

53DINRXN

54DINRXP

25 LCKREFN

29 RKLSB/RX_ER/PRBS_PASS

30 RKMSB/RX_DV/LOS

51 RXD0

50 RXD1

49 RXD2

47 RXD3

46 RXD4

45 RXD5

44 RXD6

42 RXD7

40 RXD8

39 RXD9

37 RXD10

36 RXD11

35 RXD12

34 RXD13

32 RXD14

31 RXD15

41 RX_CLK

TLK2XX1−RXU13

59DOUTTXN

60DOUTTXP

8 GTX_CLK

22 TKLSB/TX_ER

20 TKMSB/TX_EN

62 TXD0

63 TXD1

64 TXD2

2 TXD3

3 TXD4

4 TXD5

6 TXD6

7 TXD7

10 TXD8

11 TXD9

12 TXD10

14 TXD11

15 TXD12

16 TXD13

17 TXD14

19 TXD15

TLK2XX1−TX U13

ser_out_n

ser_out_pser_in_n

ser_in_p

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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

12 13 14 15 16 17

ser_tx_clk

ser_tklsb

ser_tkmsb

ser_t00

ser_t01

ser_t03

ser_t02

ser_t05

ser_t04

ser_t07

ser_t06

ser_t09

ser_t08

ser_t11

ser_t10

ser_t13

ser_t12

ser_t15

ser_t14

ser_rklsb

ser_rkmsb

ser_r00

ser_r01

ser_r02

ser_r03

ser_r04

ser_r05

ser_r06

ser_r07

ser_r08

ser_r09

ser_r10

ser_r11

ser_r12

ser_r13

ser_r14

ser_r15

ser_rx_clk

ser_rx_en

5G

ND

13G

ND

18G

ND

28G

ND

33G

ND

43G

ND

52G

ND

A

58G

ND

A

61G

ND

A

65G

ND

_EP

1VD

D

9VD

D

23VD

D

38VD

D

48VD

D

55VD

DA

57VD

DA

24 ENABLE

21 LOOPEN

26 PRBSEN

56 Rref

27 TESTEN

TLK2XX1−PWR

U13

2_5V_SER:1

C707 0.01uF

C7080.01uF49.9

R707

49.9R

708

200 R709 800 R710

2_5V_SER:1

C709 0.01uF

C7100.01uF

49.9R

711

49.9R

712

2_5V_SER_AN:1

200 R713

L707C7110.01uF

C712 0.01uF

2_5V_SER_AN:1

2_5V_SER_AN:1

ser_enable

ser_loopen

ser_prbsenC713

0.01uF

C714

0.01uF

C715

0.01uF

C716

0.01uF

C717

0.01uF

2_5V_FPGA:1

C7180.1uF

C7190.1uF

C7200.1uF

C7210.1uF

C7220.1uF

ser_tx_clk

ser_tklsb

ser_tkmsb

ser_t00

ser_t01

ser_t03

ser_t02

ser_t05

ser_t04

ser_t07

ser_t06

ser_t09

ser_t08

ser_t11

ser_t10

ser_t13

ser_t12

ser_t15

ser_t14

ser_rklsb

ser_rkmsb

ser_r00

ser_r01

ser_r02

ser_r03

ser_r04

ser_r05

ser_r06

ser_r07

ser_r08

ser_r09

ser_r10

ser_r11

ser_r12

ser_r13

ser_r14

ser_r15W1IO_L17P_6/VREF_6

U3IO_L24N_6/VREF_6

T3IO_L26N_6/400NC

R4IO_L26P_6/400NC

R5IO_L28N_6/400NC

P6IO_L28P_6/400NC

R2IO_L29N_6/400NC

R1IO_L29P_6/400NC

P5IO_L31N_6/400NC

P4IO_L31P_6/400NC

P2IO_L32N_6/400NC

P1IO_L32P_6/400NC

N6IO_L33N_6/400NC

N5IO_L33P_6/400NC

N4IO_L34N_6/VREF_6

M1IO_L40P_6/VREF_6

Y1 IO

Y3 IO_L01N_6/VRP_6/DCI

Y2 IO_L01P_6/VRN_6/DCI

W4 IO_L16N_6

W3 IO_L16P_6

W2 IO_L17N_6

V5 IO_L19N_6

U5 IO_L19P_6

V4 IO_L20N_6

V3 IO_L20P_6

V2 IO_L21N_6

V1 IO_L21P_6

T6 IO_L22N_6

T5 IO_L22P_6

U4 IO_L23N_6

T4 IO_L23P_6

U2 IO_L24P_6

T2 IO_L27N_6

T1 IO_L27P_6

N3 IO_L34P_6

N2 IO_L35N_6

N1 IO_L35P_6

M6 IO_L38N_6

M5 IO_L38P_6

M4 IO_L39N_6

M3 IO_L39P_6

M2 IO_L40N_6

M7

VCC

O_6

N7

VCC

O_6

P7VC

CO

_6

R3

VCC

O_6

R6

VCC

O_6


clk_exp_out_p

clk_exp_out_n

exp_pps_in_p

exp_pps_out_p

5 CLK0

7 A3[7]

9 A3[6]

11 A3[5]

13 A3[4]

15 A3[3]

17 A3[2]

19 A3[1]

21 A3[0]

23 A2[7]

25 A2[6]

27 A2[5]

29 A2[4]

31 A2[3]

33 A2[2]

35 A2[1]

37 A2[0]

6CLK1

8A1[7]

10A1[6]

12A1[5]

14A1[4]

16A1[3]

18A1[2]

20A1[1]

22A1[0]

24A0[7]

26A0[6]

28A0[5]

30A0[4]

32A0[3]

34A0[2]

36A0[1]

38A0[0]

39G

ND

40G

ND

41G

ND

42G

ND

43G

ND

1N

C

2N

C

3N

C

4N

C

MICTOR43−LAJ301

debug_31

debug_30

debug_29

debug_28

debug_27

debug_26

debug_25

debug_24

debug_23

debug_22

debug_21

debug_20

debug_19

debug_18

debug_17

debug_16

debug_15

debug_14

debug_13

debug_12

debug_11

debug_10

debug_09

debug_08

debug_07

debug_06

debug_05

debug_04

debug_03

debug_02

debug_01

debug_00

debug_31

debug_30

debug_29

debug_28

debug_27

debug_26

debug_25

debug_24

debug_23

debug_22

debug_21

debug_20

debug_19

debug_18

debug_17

debug_16

debug_15

debug_14

debug_13

debug_12

debug_11

debug_10

debug_09

debug_08

debug_07

debug_06

debug_05

debug_04

debug_03

debug_02

debug_01

debug_00

debug_clk0 debug_clk1

2_5V_FPGA:1

C7230.1uF

C7240.1uF

C7250.1uF

C7260.1uF

C7270.1uF

U9IO/400NC

U6IO/VREF_5

AB11IO/VREF_5

Y7IO_L19N_5/400NC

W7IO_L19P_5/VREF_5/400NC

AB7IO_L22N_5/400NC

AA7IO_L22P_5/400NC

W9IO_L27N_5/VREF_5

W10IO_L29P_5/VREF_5

U7 IO

U10 IO

U11 IO

V7 IO

V10 IO

AB4 IO_L06N_5

AA4 IO_L06P_5

Y5 IO_L09N_5

W5 IO_L09P_5

AB5 IO_L10N_5/VRP_5/DCI

AA5 IO_L10P_5/VRN_5/DCI

W6 IO_L15N_5

V6 IO_L15P_5

AA6 IO_L16N_5

Y6 IO_L16P_5

W8 IO_L24N_5

V8 IO_L24P_5

AB8 IO_L25N_5

AA8 IO_L25P_5

V9 IO_L27P_5

Y10 IO_L29N_5

AB10 IO_L30N_5

AA10 IO_L30P_5

T9VC

CO

_5

T10

VCC

O_5

T11

VCC

O_5

U8

VCC

O_5

Y8VC

CO

_5


debug_clk0

debug_clk1

A1 GND

A2 RX0_P

A3 RX0_N

A4 GND

A5 RX1_P

A6 RX1_N

A7 GND

A8 RX2_P

A9 RX2_N

A10 GND

A11 RX3_P

A12 RX3_N

A13 GND

B1GND

B2TX0_P

B3TX0_N

B4GND

B5TX1_P

B6TX1_N

B7GND

B8TX2_P

B9TX2_N

B10GND

B11TX3_P

B12TX3_N

B13GND

IPASS−SAS−X4J707

clk_exp_in_p

clk_exp_in_n

exp_pps_in_n

exp_pps_out_p

exp_pps_out_n

C7280.1uF

C7290.1uF

C730 0.1uF

C731 0.1uF

C7320.1uF

C7330.1uF

C734 0.1uF

C735 0.1uF

exp_pps_out_n

100R714

100R715

CML

LVDS

LVDS

exp_pps_in_p

exp_pps_in_n

10KR717

10KR716

2_5V_FPGA:1

exp_user_out_p

exp_user_out_n

C7430.1uF

C7440.1uF100R721

100R

722

exp_user_in_p

C741 0.1uF

C742 0.1uF

exp_user_in_n

29G

ND

30G

ND

31G

ND

32G

ND

33G

ND

34G

ND

35G

ND

36G

ND

37G

ND

IPAS

S−SA

S−X4

−SH

LD

J707

100R730

$Date$


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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17

12 13 14 15 16 17


ethernet.sch

USRP2 Ethernet

6 8

1 NON_IEEE_STRAP

6 MAN_MDIX_STRAP/TX_TCLK

7ACTIVITY_LED/SPEED0_STRAP

8LINK10_LED/RLED/SPEED1_STRAP

9LINK100_LED/DUPLEX_STRAP

10LINK1000_LED/AN_EN_STRAP

13DUPLEX_LED/PHYADDR0_STRAP

14 PHYADDR1_STRAP

17 PHYADDR2_STRAP

18 PHYADDR3_STRAP

95 PHYADDR4_STRAP

94 MULTI_EN_STRAP/TX_TRIGGER

89 MDIX_EN_STRAP

88 MAC_CLK_EN_STRAP/TX_SYN_CLK

34 VDD_SEL_STRAP

DP83865−CFGLED U12

86 CLK_IN

87 CLK_OUT

85 CLK_TO_MAC

33 RESET

DP83865−CLKU12

32 TRST

31 TDI

28 TDO

27 TMS

24 TCK

DP83865−JTAGU12

39 COL/CLK_MACFREQ

40 CRS/RGMII_SEL0

60 TX_CLK/RGMII_SEL1

76TXD0

75TXD1

72TXD2

71TXD3

68TXD4

67TXD5

66TXD6

65TXD7

62TX_EN/TX_EN\ER

79GTX_CLK/TCK

61TX_ER

57 RX_CLK

56 RXD0

55 RXD1

52 RXD2

51 RXD3

50 RXD4

47 RXD5

46 RXD6

45 RXD7

41 RX_ER/RXDV\ER

44 RX_DV/RCK

DP83865−MAC U12

108MDIA_P

109MDIA_N

114MDIB_P

115MDIB_N

120MDIC_P

121MDIC_N

126MDID_P

127MDID_N

DP83865−MDIU12

4IO

_Vdd

15IO

_Vdd

21IO

_Vdd

29IO

_Vdd

37IO

_Vdd

42IO

_Vdd

53IO

_Vdd

58IO

_Vdd

69IO

_Vdd

77IO

_Vdd

83IO

_Vdd

90IO

_Vdd

11C

ore_Vdd

19C

ore_Vdd

25C

ore_Vdd

35C

ore_Vdd

48C

ore_Vdd

63C

ore_Vdd

73C

ore_Vdd

92C

ore_Vdd

1012V5_Avdd1

962V5_Avdd2

1031V8_AVdd1

1051V8_AVdd1

1111V8_AVdd1

1171V8_AVdd1

1231V8_AVdd1

981V8_AVdd2

1001V8_AVdd3

5Vss

12Vss

16Vss

20Vss

22Vss

26Vss

30Vss

36Vss

38Vss

43Vss

49Vss

54Vss

59Vss

64Vss

70Vss

74Vss

78Vss

82Vss

91Vss

93Vss

97Vss

99Vss

104Vss

106Vss

107Vss

110Vss

112Vss

113Vss

116Vss

118Vss

119Vss

122Vss

124Vss

125Vss

128Vss

102 BG_REF

2N

C

23N

C

84N

C

DP83865−PW

RU12

11 MDIA_P

10 MDIA_N

4 MDIB_P

5 MDIB_N

3 MDIC_P

2 MDIC_N

8 MDID_P

9 MDID_N

BEL 0826−1X1T−23−F

12 MCTA6 MCTB1 MCTC7 MCTD

13 LED1(Yellow Cath)14 LED1(Yellow Anode)15 LED2(Grn Cath/Org An)16 LED2(Grn An/Org Cath)

SG1SHIELD/GNDSG2SHIELD/GND

J601

2_5V_ETH:1

49.9

R60

1

49.9

R60

2

49.9

R60

3

49.9

R60

4

49.9

R60

5

49.9

R60

6

49.9

R60

7

49.9

R60

8

2_5V_ETH:1

C6010.1uFC6020.1uF

C6030.1uFC6040.1uF

CHASSIS_GND:1

2_5V_ETH_A:1

330R609

330R610

ETH_LED

Add caps at 2.5V near PHY

2KR611

1_8V:1

18

R612

10

R613C60522uF CER X5R 6.3V

C60622uF CER X5R 6.3V

C6070.01uF

2_5V_ETH:1

9.76K

R614

2KR615

2_5V

_ETH

:1

2KR616

2KR617

2KR618

2KR619

2KR620

2KR621

2_5V

_ETH

:1

2KR622

2K R623ACT_LED

2K R624LINK10

2K R625LINK100

2_5V_ETH:1

2K R626LINK1G

2_5V_ETH:1

2K R627DUP_LED

2_5V_ETH:1

Everything on 2.5V

33 R628

33 R629

33 R630

33 R631

33 R632

33 R633

33 R634

33 R635

33 R636

33 R637

33 R638

33 R639

33 R640

33 R641

909R642

909R643

909R644

2_5V

_ETH

:1

LED Polarities!!!Section 5.9

NONER645

NONER646

CHASSIS_GND:1

GMII_RXD0

GMII_RXD1

GMII_RXD2

GMII_RXD3

GMII_RXD4

GMII_RXD5

GMII_RXD6

GMII_RXD7

GMII_TXD0

GMII_TXD1

GMII_TXD2

GMII_TXD3

GMII_TXD4

GMII_TXD5

GMII_TXD6

GMII_TXD7

GMII_GTX_CLK

GMII_TX_ER

GMII_TX_EN

GMII_COL

GMII_CRS

GMII_RX_DV

GMII_RX_ER

GMII_TX_CLK

GMII_RX_CLK

81 MDC

80 MDIO

3 INTERRUPT

DP83865−MGTU12

MDCPHY_CLK

PHY_RESET

V18IO/VREF_4

Y16IO/VREF_4

AB13IO/VREF_4

AA19IO_L05N_4/400NC

AB19IO_L05P_4/400NC

W18IO_L06N_4/VREF_4

AA16IO_L19N_4/400NC

AB16IO_L19P_4/400NC

V15IO_L22N_4/VREF_4/400NC

W15IO_L22P_4/400NC

U16 IO

U17 IO

W13 IO

W14 IO

AA20 IO_L01N_4/VRP_4/DCI

AB20 IO_L01P_4/VRN_4/DCI

Y18 IO_L06P_4

AA18 IO_L09N_4

AB18 IO_L09P_4

V17 IO_L10N_4

W17 IO_L10P_4

Y17 IO_L15N_4

AA17 IO_L15P_4

V16 IO_L16N_4

W16 IO_L16P_4

AA15 IO_L24N_4

AB15 IO_L24P_4

U14 IO_L25N_4

V14 IO_L25P_4

U13 IO_L28N_4

V13 IO_L28P_4

Y13 IO_L29N_4

AA13 IO_L29P_4

T12

VCC

O_4

T13

VCC

O_4

T14

VCC

O_4

U15

VCC

O_4

Y15

VCC

O_4


GMII_RXD0

GMII_RXD1

GMII_RXD2

GMII_RXD3

GMII_RXD4

GMII_RXD5

GMII_RXD6

GMII_RXD7

GMII_TXD0

GMII_TXD1

GMII_TXD2

GMII_TXD3

GMII_TXD4

GMII_TXD5

GMII_TXD6

GMII_TXD7

GMII_GTX_CLK

GMII_TX_ER

GMII_TX_EN

GMII_COL

GMII_CRS

GMII_RX_DV

GMII_RX_ER

GMII_TX_CLK

33R647

33R648

33R649

33R650

33R651

33R652

33R653

33R654

33R655

33R656

33R657

PHY_INTn

2KR

658

2_5V_ETH:1

MDC

MDIO

PHY_RESET

PHY_INTn

2_5V_FPGA:1

C6080.1uF

C6090.1uF

C6100.1uF

C6110.1uF

C6120.1uF

C6130.1uF

L6011_8V:1

C6140.1uF

1_8VA:1

1_8VA:1

C6150.1uF

C6160.1uF

C6170.1uF

C6180.1uF1_8VA:1

C6190.1uF

C6200.1uF

C6210.1uF

C6220.1uF

C6230.1uF

C6240.1uF

C6250.1uF

C6260.1uF

L602

C6270.1uF

C6280.1uF

C6290.1uF

C6300.1uF

C6310.1uF

C6320.1uF

C6330.1uF

C6340.1uF

C6350.1uF

2_5V_ETH_A:12_5V_ETH:1

C6360.1uF

C6370.1uF

C6380.1uF

C6390.1uF

CLK_TO_MAC

C6410.1uF

C6400.1uF

0R659ACT_LED0R660

3OUT

1ENB/TUNE

4 Vcc

2 GND

VCTCXO X2L603

2_5V_ETH:1

C6420.1uF

NONE

R661

1K R662

2_5V_ETH:1

CLK_25MHZ

0 R672

CLK_25MHZ_EN

10 R671PHY_CLK

ETH_LED

POR

WDI

4.7K

R23

6

C36

10.

1uF

12

S1

reset_fpga

2_5V_FPGA:1

2KR

680

MDIO


W19IO_L17P_3/VREF_3

U20IO_L23P_3/VREF_3

T20IO_L26N_3/400NC

T19IO_L26P_3/400NC

R22IO_L28N_3/400NC

R21IO_L28P_3/400NC

P19IO_L29N_3/400NC

R19IO_L29P_3/400NC

P18IO_L31N_3/400NC

P17IO_L31P_3/400NC

P22IO_L32N_3/400NC

P21IO_L32P_3/400NC

N18IO_L33N_3/400NC

N17IO_L33P_3/400NC

N19IO_L34P_3/VREF_3

M22IO_L40N_3/VREF_3

Y21 IO

Y20 IO_L01N_3/VRP_3/DCI

Y19 IO_L01P_3/VRN_3/DCI

W22 IO_L16N_3

Y22 IO_L16P_3

V19 IO_L17N_3

W21 IO_L19N_3

W20 IO_L19P_3

U19 IO_L20N_3

V20 IO_L20P_3

V22 IO_L21N_3

V21 IO_L21P_3

T17 IO_L22N_3

U18 IO_L22P_3

U21 IO_L23N_3

R18 IO_L24N_3

T18 IO_L24P_3

T22 IO_L27N_3

T21 IO_L27P_3

N20 IO_L34N_3

N22 IO_L35N_3

N21 IO_L35P_3

M18 IO_L38N_3

M17 IO_L38P_3

M20 IO_L39N_3

M19 IO_L39P_3

M21 IO_L40P_3

M16

VCC

O_3

N16

VCC

O_3

P16

VCC

O_3

R17

VCC

O_3

R20

VCC

O_3


2_5V_FPGA:1

C3310.1uF

C3320.1uF

C3330.1uF

C3340.1uF

C3350.1uF

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1 2 3 4 5 6 7 8 9 10 11

USRP2 RAM$Date$

ram.sch $Revision$$Author$8 8

2_5V_RAM:1

RAM_D00

RAM_D01

RAM_D02

RAM_D03

RAM_D04

RAM_D05

RAM_D06

RAM_D07

RAM_D08

RAM_D09

RAM_D10

RAM_D11

RAM_D12

RAM_D13

RAM_D14

RAM_D15

RAM_D16

RAM_D17

RAM_A18

RAM_A17

RAM_A16

RAM_A15

RAM_A14

RAM_A13

RAM_A12

RAM_A11

RAM_A10

RAM_A09

RAM_A08

RAM_A07

RAM_A06

RAM_A05

RAM_A04

RAM_A03

RAM_A02

RAM_A01

RAM_A00

RAM_D00

RAM_D01

RAM_D02

RAM_D03

RAM_D04

RAM_D05

RAM_D06

RAM_D07

RAM_D08

RAM_D09

RAM_D10

RAM_D11

RAM_D12

RAM_D13

RAM_D14

RAM_D15

RAM_D16

RAM_D17

RAM_A18

RAM_A17

RAM_A16

RAM_A15 RAM_A14

RAM_A13

RAM_A12

RAM_A11

RAM_A10

RAM_A09

RAM_A08

RAM_A07

RAM_A06

RAM_A05

RAM_A04

RAM_A03

RAM_A02

RAM_A01

RAM_A00

RAM

_CLK

RAM

_WEn

RAM

_OEn

2_5V_RAM:1

RAM

_CE1

n

RAM

_CEN

n

RAM

_LD

n

RAM_CLK

RAM_WEn

RAM_OEn

RAM_CENn

RAM_LDn

RAM_CE1n

31MODE

64ZZ

CY7C1356C−AC−CTRLU19

5GND

10GND

17GND

21GND

26GND

40GND

55GND

60GND

67GND

71GND

76GND

90GND

4 VDDQ

11 VDDQ

20 VDDQ

27 VDDQ

54 VDDQ

61 VDDQ

70 VDDQ

77 VDDQ

15 VDD

41 VDD

65 VDD

91 VDD

CY7C1356C−AC−PWRU19

58 DQa

59 DQa

62 DQa

63 DQa

68 DQa

69 DQa

72 DQa

73 DQa

74 DQPa

8 DQb

9 DQb

12 DQb

13 DQb

18 DQb

19 DQb

22 DQb

23 DQb

24 DQPb

32A

33A

34A

35A

44A

45A

46A

47A

48A

49A

50A

80A

81A

82A

83A

99A

100A

36A1

37A0

98C

E1

97C

E2

92C

E3

87C

EN

89C

LK

88W

E

86O

E

85AD

V/LD

93BW

a

94BW

b

CY7C1356C−AC−RAMU19

C8060.1uF

C8070.1uF

2_5V_RAM:1

C8080.1uF

C8090.1uF

C8100.1uF

C8110.1uF

C8120.1uF

C8130.1uF

C8140.1uF

C8150.1uF

C8160.1uF

C8170.1uF


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