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Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and Engineering Indian Institute of Technology, Kharagpur, India 10 March 2015

Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

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Page 1: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

Utilizing Performance Monitors for Compromising keys of RSA on Intel

Platforms

Sarani Bhattacharya and Debdeep Mukhopadhyay

Dept. of Computer Science and Engineering

Indian Institute of Technology, Kharagpur, India

10 March 2015

Page 2: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

Public-Key Cryptography

Page 3: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

RSA Encryption & Decryption

3

Plaintext: M

C = Me mod (n=pq)

Ciphertext: C

Cd mod n

From n, difficult to figure out p,qFrom (n,e), difficult to figure d.From (n,e) and C, difficult to figure out M s.t. C = Me

Page 4: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

Popular variants of Modular Exponentiation Algorithm

Page 5: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

SPA and Timing Side Channel Resistant Algorithm for Modular Exponentiation

Page 6: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

Primitive Algorithm for Performing Multiplication and Squaring

Page 7: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

Modelling Branch Miss as Side-Channel from HPC

Profiling of HPCs are done using performance monitoring tools and considered as side-channel.

Provides simple user interface to different hardware event counts.

Branch misses rely on the ability of the branch predictor to correctly predict future branches to be taken.

Page 8: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

Strong Correlation between two-bit predictor and system predictor

• $ perf stat -e branch-misses executable-name

Direct correlation is observed for the branch misses from HPCs and from the simulated 2-bit dynamic predictor over a sample of exponent bitstream.

This confirms assumption of 2-bit dynamic predictor being an approximation to the underlying system branch predictor.

Page 9: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

Threat model of the AttackAttacker knows first i bits of the

private key and wants to determine next unknown bit of the key (, , · · · , , · · · , )

Generate a trace of branches as (, , · · · , )

Under the assumption of having value j, where j ∈ {0, 1}, appropriate value of is simulated.

Page 10: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

Offline Phase of Attack

Page 11: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

Separation of Random Inputs

We ensure there must be nocommon ciphertexts in the sets (, ) and (, ) and the sets are disjoint.

Page 12: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

Online PhaseBranch misses from HPCs are

monitored for execution of cipher over the entire secret key on each ciphertext for 4 separate sets.

The probable next bit is decided as:

Page 13: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and
Page 14: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

Experimental ValidationA large input set is separated by

simulations over bimodal and two-level adaptive predictor.

Average branch misses are observed from HPCs for each elements in set and

Each set has L = 1000 elements.Experiment is repeated over I =

1000 iterations.

Page 15: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and
Page 16: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

Comparison with Timing Side-channel

Page 17: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

Variation in separation with increase of Ciphertexts

Page 18: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

Variation in separation with increase in number of Iterations

Page 19: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

RSA-OAEP Randomized Padding Scheme

Page 20: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

Decryption in RSA-OAEP

Page 21: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

Separation for RSA-OAEP scheme

Page 22: Utilizing Performance Monitors for Compromising keys of RSA on Intel Platforms Sarani Bhattacharya and Debdeep Mukhopadhyay Dept. of Computer Science and

Thank you.