38
Steven A. Vitale 2019 NSF/DOE/AFOSR Quantum Science Summer School June 12, 2019 Valleytronic Information Processing and Applications DISTRIBUTION STATEMENT A. Approved for public release. Distribution is unlimited. This material is based upon work supported by the Under Secretary of Defense for Research and Engineering under Air Force Contract No. FA8702-15-D-0001. Any opinions, findings, conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the Under Secretary of Defense for Research and Engineering. © 2019 Massachusetts Institute of Technology. Delivered to the U.S. Government with Unlimited Rights, as defined in DFARS Part 252.227-7013 or 7014 (Feb 2014). Notwithstanding any copyright notice, U.S. Government rights in this work are defined by DFARS 252.227-7013 or DFARS 252.227-7014 as detailed above. Use of this work other than as specifically authorized by the U.S. Government may violate any copyrights that exist in this work.

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Page 1: Valleytronic Information Processing and Applicationsqs3.mit.edu/images/pdf/Valleytronic_Information_reduced.pdf · 10 • Computation rate is limited by power, either available system

Steven A. Vitale

2019 NSF/DOE/AFOSR Quantum Science Summer School

June 12, 2019

Valleytronic InformationProcessing and Applications

DISTRIBUTION STATEMENT A. Approved for public release. Distribution is unlimited.

This material is based upon work supported by the Under Secretary of Defense for Research and Engineering under Air Force Contract No. FA8702-15-D-0001. Any opinions, findings, conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the Under Secretary of Defense for Research and Engineering.

© 2019 Massachusetts Institute of Technology.

Delivered to the U.S. Government with Unlimited Rights, as defined in DFARS Part 252.227-7013 or 7014 (Feb 2014). Notwithstanding any copyright notice, U.S. Government rights in this work are defined by DFARS 252.227-7013 or DFARS 252.227-7014 as detailed above. Use of this work other than as specifically authorized by the U.S. Government may violate any copyrights that exist in this work.

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2

Air & MissileDefense Cyber Communications

SpaceSurveillance

HomelandProtection

ISR & TacticalSystems

• EW systems• Optical Surv.• Optical seekers

• Air surveillance• CBRNE sensors• Bio systems

• Space Systems• Persistent Surv.• HSI

• Adv. Ladar.• PNT Syst.• EW systems• SBR

• Graph comp.• Anti-tamper• Cyber devices

• Adv. Laser comm.• Novel RF Comm.

Advanced Technology Development

RFElectronics

Optics/ BeamCombining Materials

PackagingIntegratedPhotonics

Bio / ChemPhenomenology

Quantum Information Sciences

CompoundSemiconductors

SiliconFabrication

AdvancedComputing

Novel Sensors& MicrosystemsImagersLasersRF Technology

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Materials That Made an Impact

Stone2,600,000 years ago

Useful qualities: hard, durable, sharp

Applications: pounding, cutting, scraping

Wood 500,000 years ago

Useful qualities: light, easier to carve, ubiquitous

Applications: fuel, spears, handles, buildings, boats

Ceramics 20,000 years ago

Useful qualities: moldable, durable, easy to make,

cheap as dirt

Applications: food storage, cooking

Strong, sharp, reusable, corrosion resistant

Applications: Swords, axes, arrowheads, plows, machinery

Metal Alloys5,500 years ago

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4

More Recently

So, What’s Next?

Quantum Materials?(Topological Insulators,

Graphene, 2D TMDs, etc.)

A Few Years Ago

Useful qualities: ??

Applications: ???

ConductorsPolymers

SemiconductorsDielectrics

150-200 Years AgoUseful qualities: Transport and

control of electrons

Applications: microelectronics

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• Beyond Moore’s Law Computing: A new device for classical computing which is not constrained by the ubiquitous 60 mV/decade thermodynamic limit

• Quantum Computing: New qubit modalities with robust retain gate fidelity due to spin-valley locking

• Photonics: New integrated microphotonic non-reciprocal elements such as optical isolators

• Lasers: New energy-efficient, low-threshold on-chip lasers based on exciton polaritons

Potential Applications of Quantum Materials

Recently discovered physics phenomena in low dimensional materials may enable transformational performance or power advantages in electronic and photonic information processing systems

Today’sFocus

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Two Dimensional Materials for Electronics

2D: 1D: 0D:3D:

A Full Suite of Electronic Properties in 2D Materials

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Monolayer Transition Metal Dichalcogenides

2D TMDs are unquestionably scientifically interesting. Can they be applied to solve our computational technology

problem?

keyword = dichalcogenide

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• Thin– Single monolayer < 10 Ǻ

• Stretchable – Strain up to 11% demonstrated

• Direct bandgap • No surface states

– No trap-induced device degradation

• Strong exciton binding energy– 200-500 meV vs 10’s meV in bulk

semiconductors

• Broken inversion symmetry– Valley contrasting Berry curvature &

orbital magnetic moment

• Strong spin-orbit coupling

2D Transition Metal Dichalcogenide Properties

Fiori et al, 2014

Flexible, transparentelectronic/photonic devices

Can we exploit these properties to develop a logic device that outperforms silicon?

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Zoology of Logic Devices to Outperform SiliconSimulated Circuit Performance of Proposed Devices

ASL

ASL-HA

ASL-Has

ASL-PMA

BisFET

CMOS HP

CMOS LV

CoMET

CSL

CSL-CCCSL-New

CSL-YIG

ExFETFEFET

GaNTFET

gnrTFET

GpnJ -Vg2

GpnJ -Vg3

HetJTFET

HomJTFET

ITFET

MEMTJ

MEMTJ-Pres

MEMTJs

MITFET

mLogic

NCFET

PiezoFETSMG

STO

SWDThinTFET

TMDTFET

vdWFET-BP

102 103 104 105 106 107

Delay (ps)

10-1

100

101

102

103

104

105

Ener

gy (p

J)

All spin logic

Complementary spin logic

Other spintronic

Magnetoelectric tunneling

Other

Ferroelectric

Tunnel FET

32 bit ALU Simulations from Nikonov and Young, IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, 2015.

Nearly all proposed devices are worse than

silicon CMOS!

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• Computation rate is limited by power, either available system power (e.g., cell phones) or dissipated power causing overheating (e.g., servers)

• Total power is the sum of static and dynamic (switching) power

What’s the fundamental problem here?

0

2

4

6

8

10

0 0.2 0.4 0.6 0.8 1

Ener

gy (n

orm

alize

d)

Vdd (V)

Static

Dynamic

Total 𝑬𝑬𝒅𝒅𝒅𝒅𝒅𝒅𝒅𝒅𝒅𝒅𝒅𝒅𝒅𝒅 = 𝜶𝜶𝑪𝑪𝑽𝑽𝟐𝟐

𝑬𝑬𝒔𝒔𝒔𝒔𝒅𝒅𝒔𝒔𝒅𝒅𝒅𝒅 = 𝑽𝑽𝒅𝒅𝒅𝒅𝑲𝑲𝒆𝒆𝑽𝑽𝒈𝒈−𝑽𝑽𝒔𝒔𝑽𝑽𝑻𝑻 𝟏𝟏 − 𝒆𝒆−

𝑽𝑽𝒅𝒅𝑽𝑽𝑻𝑻 𝝉𝝉

From Wang, VLSI, 2002

• One way to reduce power is to make the device smaller

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10-4

10-2

100

102

104

106

108

102 103 104 105 106 107 108 109

Ener

gy (f

J/tr

ansi

stor

/cyc

le)

Transistor Density (mm-2)

2013

Switching Energy Near the End of Scaling

Raw Data from Stanford CPU Database 1975 - 2013

Can we gothis way?

finFET

Intel

Ge, III-V channel additives

imec

Gate All-Around

imec

Vertically stacked

xtors Samsung

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12

• Computation rate is limited by available power, either system power (e.g., cell phones) or dissipated power causing overheating (e.g., servers)

• Total power is the sum of static and dynamic (switching) power

What’s the fundamental problem here?

0

2

4

6

8

10

0 0.2 0.4 0.6 0.8 1

Ener

gy (n

orm

alize

d)

Vdd (V)

Static

Dynamic

Total 𝑬𝑬𝒅𝒅𝒅𝒅𝒅𝒅𝒅𝒅𝒅𝒅𝒅𝒅𝒅𝒅 = 𝜶𝜶𝑪𝑪𝑽𝑽𝟐𝟐

𝑬𝑬𝒔𝒔𝒔𝒔𝒅𝒅𝒔𝒔𝒅𝒅𝒅𝒅 = 𝑽𝑽𝒅𝒅𝒅𝒅𝑲𝑲𝒆𝒆𝑽𝑽𝒈𝒈−𝑽𝑽𝒔𝒔𝑽𝑽𝑻𝑻 𝟏𝟏 − 𝒆𝒆−

𝑽𝑽𝒅𝒅𝑽𝑽𝑻𝑻 𝝉𝝉

From Wang, VLSI, 2002

• One way to reduce power is to make the device smaller• The most efficient way to reduce power is to reduce operating voltage

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• Any switching device based on gated drift/diffusion of electrons will be limited to no more than one decade of current rise per 60 mV of Vgs at room temperature

Thermodynamic Tyranny

-2.0 -1.0 0.0 1.0 2.010-12

10-10

10-8

10-6

10-4

Vdd =0.05V

Vdd =0.3V

I ds(A

/μm

)

Vg (V)

W = 8 µm / L = 150 nm

≤ 1 decade / 60 mV

Fermi Dirac electron distribution

e-

VdVs

Vg

𝑺𝑺 = 𝒍𝒍𝒅𝒅(𝟏𝟏𝟏𝟏)𝒌𝒌𝑻𝑻𝒒𝒒

𝟏𝟏 +𝑪𝑪𝒅𝒅𝑪𝑪𝒐𝒐𝒐𝒐

Long channel transistors

𝒇𝒇 𝑬𝑬 =𝟏𝟏

𝟏𝟏 + 𝒆𝒆 𝑬𝑬−𝑬𝑬𝒇𝒇 /𝒌𝒌𝑻𝑻

Taking into account static power, Vt variation, and stochastics across o(109) transistors, the minimum

practical VDD for high performance computing is ~ 0.6 V

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• Any switching device based on gated drift/diffusion of electrons will be limited to no more than one decade of current rise per 60 mV of Vgs at room temperature

Thermodynamic Tyranny

What other options do we have for logic devices?

SpinFETs? Well spin is usually carried by electrons, so …

Photons? Maybe, but would need λ ≈ 20nm to achieve competitive device size/speed

Are we done?

No, there is another …

How about valleys?

TunnelFETs? Possibly. Different set of challenges.

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15

Valleytronics Refresher

Valleytronics: Exploiting the crystal momentum state of real or quasi particles in 2D materials for something useful

Material Properties Lack of inversion symmetry Time reversal symmetry Direct bandgap Strong spin orbit coupling

2D Transition Metal DichalcogenideTwo well-defined and

accessible crystal momentum states, protected by spin-

valley coupling

Interesting Properties• Deterministic valley initialization• Valley coupling to external fields• Valley-specific state readout

Valley Polarized Current Transport [Shimazaki, Nature Physics, 2015]

Spin/valley injector [Zhong, Sci Adv, 2017]

Moire potential [Mischenko, Nature Nanotech, 2014] [Vitale, Small, 2018]

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Let’s Look at the Valley Information Carrier Candidates

Information Carrier

Valley polarized

Spin polarized

Existing logic implementations

Low switching energy

Free electron Yes Slightly Yes MaybeFree hole Yes Yes Yes MaybeExciton Yes No Not yet MaybeTrion Maybe Maybe Not yet MaybeBiexcitons, dark excitons etc. Inefficient generation and readout

For now, let’s assume excitons are the information carrier

Fermi function for valley-polarized e/h is unchanged

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Logical 0 and 1 States in Momentum Space

Γ ΓM K

Ener

gy

Γ-M-K

1.9 eV

“0”

Parameter Logical “0” Logical “1”

CMOS Voltage Low High

Valleytronic Particle crystal momentum

K -K

Monolayer MoS2 Band Diagram

1.9 eV

+

-

“1”

+

-

But … how do we switch a ⟩|𝟏𝟏 to a ⟩|𝟏𝟏 ?

Can initialize and readout ⟩|𝟏𝟏 and ⟩|𝟏𝟏 statesSOC not shown

⟩|𝑲𝑲 ⟩| −𝑲𝑲T: t -t

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Can We Do It By Breaking Valley Degeneracy?

Γ ΓM K

1.9 eV

Ener

gy

Γ-M-K

<1.9 eV

+

Well … a ⟩|𝑲𝑲 state probably will not evolve to a ⟩| −𝑲𝑲 state since they are momentum protected

Shift energy of K valley vs -K valley via:- Optical Stark Effect [Sie, Nature Materials, 2015]

- Zeeman Effect [MacNeil, PRL, 2015]

- Magnetic Proximity Effect [Zhong, Sci Adv, 2017]

-

-K

-K

-K

K

K

K

Γ

e-

K -Ke-

e-

e-“0” “1”

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19

⟩|𝑲𝑲

⟩|𝑲𝑲𝑲

Deterministic Switching from 0 to 1: ⟩|𝑲𝑲 to ⟩|𝑲𝑲𝑲

K K’

K K’

⟩|𝑹𝑹 =𝟏𝟏𝟐𝟐

⟩|𝒐𝒐 + 𝒅𝒅 ⟩|𝒅𝒅

⟩|𝑳𝑳 =𝟏𝟏𝟐𝟐

⟩|𝒐𝒐 − 𝒅𝒅 ⟩|𝒅𝒅

Hard problem #1: figure out a way to deterministically flip an exciton between ⟩|𝑲𝑲 and

⟩| −𝑲𝑲 states

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Perhaps Using Spatially Indirect Excitons

•Bilayer of two different TMDs withType II band alignment

•Electron resides in one layer, hole resides in other layer

•Spatial separation forces an out-of-plane static dipole

•Maybe flip dipole (and valley) electrostatically?

WSe2

WS2d

Possible route to an WSe2

MoSe2 V TG

PL energy (eV)

Need to increase contrast and reduce voltage

Ciarrocchi et al, Nature Photonics, Feb 2019

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⟩|𝑲𝑲

⟩|𝑲𝑲𝑲

Deterministic Switching from 0 to 1: ⟩|𝑿𝑿 to ⟩|𝒀𝒀

⟩|𝑿𝑿 =𝟏𝟏𝟐𝟐

⟩|𝒐𝒐 + 𝒅𝒅 ⟩|𝒅𝒅 +𝟏𝟏𝟐𝟐

⟩|𝒐𝒐 − 𝒅𝒅 ⟩|𝒅𝒅

⟩|𝒀𝒀 =𝟏𝟏𝟐𝟐

⟩|𝒐𝒐 + 𝒅𝒅 ⟩|𝒅𝒅 −𝟏𝟏𝟐𝟐

⟩|𝒐𝒐 − 𝒅𝒅 ⟩|𝒅𝒅

𝑬𝑬𝑲𝑲 ≥ 𝑬𝑬𝑲𝑲′

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Deterministic Switching from 0 to 1: ⟩|𝑿𝑿 to ⟩|𝒀𝒀

ℏΩ = 𝒈𝒈µ𝑩𝑩𝑩𝑩𝑺𝑺𝒐𝒐 =

𝑺𝑺𝒐𝒐𝒐𝒐𝟏𝟏 + Ω𝑻𝑻𝑺𝑺𝟐𝟐∗

𝟐𝟐 𝑺𝑺𝒅𝒅 =Ω𝑻𝑻𝑺𝑺𝟐𝟐∗ 𝑺𝑺𝒐𝒐𝒐𝒐

𝟏𝟏 + Ω𝑻𝑻𝑺𝑺𝟐𝟐∗𝟐𝟐

Ye, Sun, Heinz, Nature Physics, 2016

Optical Stark Effect

Precession of valley polarization by 40o demonstrated, limited by valley

coherence time and Stark field

Possible route to an

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23

That’s nice, but did anyone notice the 800 pound Gorilla?

• Intel Core i9-7980XE• 18 CPU cores• 14nm++ process• Approx. 8 billion transistors

We’re going to need more than an inverter ...

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Need Complete Set of Logic Gates

NOT

AND

OR

NAND

NOR

XOR

XNOR

2-input gates

2 bit multiplier

• Any non-trivial circuit requires concatenation• All inputs and outputs must be in the same

domain: excitons-in → excitons-out • Could have an ancillary control line in a

different domain

Hard problem #2: develop a viable set of 2-input exciton logic gates

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Concatenation Implies Fan-Out and Gain

• Must have some way to vary the drive strength of valley gates

• For silicon CMOS this is easy: drive current is proportional to transistor width

• One gate wide transistor can provide the input to many smaller gates

1

2

n

Hard problem #3: Demonstrate a device that supports exciton fan out and gain

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• Valley information has a rather short lifetime• How long does the valley lifetime have to be?• In a classic RISC architecture there are five stages

Valley Lifetime

Instructionfetch

Instructiondecode Execution Memory

addressWriteback

* Requires gate speed o(100 ps)

• Assume:– simple non-pipelined CPU – simple 1-cycle execution stage– valley information transport velocity ≈ CMOS info transport velocity*

• Need ~ 5 ns to complete an instruction

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Measured Valley Lifetime

Single valley rotation time (50 ps)

Minimum to complete an instruction (5 ns)

Useful BER ≤ 10-5 (50 ns)

Valley lifetimes approaching that needed for practical computation have been measured for electrons and holes, but not for excitons.

Need to improve material quality.

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Valleytronic Quality Material

Molybdenite crystal

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• Grown material (e.g., CVD, MBE, ALD) is the only practical option• So far, monocrystalline, monolayer TMD growth has not been demonstrated

– Growth process is not self limiting

• Many reports of “wafer scale” growth but these are polycrystalline, multilayer, or both

Valleytronic Quality Material

1st layer: discontinuous, crystallites 0.1 um 2nd layer: continuous, crystallites 1 to 10 um Typical:

5th layer: discontinuous6th layer: discontinuous

How do we get decent wafer-scale monolayer material?

3rd layer: continuous, crystallites 1 to 10 um 4th layer: continuous, crystallites 1 to 10 um

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Valleytronic Quality Material

Shim et al, Science, 2018

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Successful Layer Resolved Splitting

Opt

ical

AFM

Before 1st ML 2nd ML 3rd ML 4th “ML” Photoluminescence

Before

1st 3 ML

Isolation of wafer scale monolayer 2D material is an important advancement

But, the material is still polycrystalline …

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When Reality Sets InA Look at Real TMD Materials

Single crystals: 1 to 100 µm Polycrystalline monolayers: µm’s to cm’s

CVD

Gro

wn

MoS

2

• Are Valleytronic properties preserved in polycrystalline monolayers?

• Or do we need to grow cm-scale single crystals for integrated device fabrication?

Measure valley photoluminescence polarization across various crystal morphologies

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Raman-corrected Photoluminescence Imaging

Optical

10 μm

Valley Polarization Imaging

PL vectors at many incidence polarizations

0

30

60

90

120

150

180

210

240

270

300

330

KK

-K

Simultaneous polarized Raman and PL

Allows precise, artifact-free measurement of valley initialization

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Effect of Morphology on Valley PolarizationTemperature = 4 K

0

30

60

90

120

150

180

210

240

270

300

330

Triangle

10 μm

42% polarization

0

30

60

90

120

150

180

210

240

270

300

330

Star

10 μm

32% polarization

0

30

60

90

120

150

180

210

240

270

300

330

Merged

10 μm

41% polarization

Domain boundaries and polycrystallinity does not strongly degrade valley polarization Note: spot size 1μm << domain size

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Valley Polarization MappingTemperature = 4 K

Star30%

-30%

FWHM = 4%

TriangleMerged

FWHM = 4% FWHM = 6%

Remarkably, valley polarization uniformity is comparable for polycrystalline and single crystal domains

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36

What about at Room Temperature?

18%

Need significant improvement in state initialization

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Towards Efficient State Initialization

𝑷𝑷𝒅𝒅𝒅𝒅𝒄𝒄𝒅𝒅 =𝑷𝑷𝒐𝒐

𝟏𝟏 + 𝟐𝟐 τ𝒆𝒆𝒐𝒐𝒅𝒅τ𝒗𝒗Steady State PL polarization:

Exciton lifetime

Kioseoglou et al., Appl Phys Lett, 2012.Valley lifetime

•Can get very high polarization if τexc is short

•But for computation need long τexc and τv >> τexc

Decreased by Increased By

ExcitonLifetime

Strong binding energySmall Bohr radius

Recombination centers

StrainLocalization

Valley Lifetime

Exchange interaction Phonons

Magnetic scattering centers

SOCSubstrate isolation

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• Valleytronics offers a new degree of freedom for information processing• For classical computing, the key bottleneck for new logic devices is switching energy

– Any logic device based on diffusion/drift of charge will be no better (or only marginally better) than conventional silicon CMOS

• Computation based on valley-polarized excitons is plausible but there are several hard problems to be solved– figure out a way to deterministically flip an exciton between ⟩|𝑲𝑲 and ⟩| −𝑲𝑲 states– develop a viable set of 2-input exciton logic gates– demonstrate exciton fan out and gain

• Alternatively, it might be easier to develop a valley tunnel FET

A Tale of Two Valleys

It was the best of times, it was the worst of times, it was the age of wisdom, it was the age of foolishness, it was the epoch of belief, it was the epoch of incredulity, it was the season of Light, it was

the season of Darkness, it was the spring of hope, it was the winter of despair …