Communications Engineering LabProf. Dr.rer.nat. Friedrich K. Jondral

Wireless Networks In-the-Loop:Software Radio as the EnablerJens Elsner, Martin Braun, Stefan Nagel, Kshama Nagaraj and Friedrich JondralSoftware Defined Radio Forum Technical Conference, Washington DC, December 3, 2009

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OverviewWireless Networks In-the-Loop: Software Radio as the Enabler

Introduction: Network Simulators and Software Radio

Design Concepts

Implementation

Sample Network

Conclusion and Future Work

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OverviewWireless Networks In-the-Loop: Software Radio as the Enabler

Introduction: Network Simulators and Software Radio

Design Concepts

Implementation

Sample Network

Conclusion and Future Work

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IntroductionSoftware Radio techniques allow for loop-testing of heterogeneous networks.

Design requires theoretical analysis andcomputer-based Monte Carlo methodsimulations

Simulation is done in parallel to design

Dedicated tool: network simulators

Design of wireless networks

Iterative model-based design stages, e.g., Platform independent model Platform specific model Executable

Software Radio Techniques

Wireless Network In-the-Loop

Simple idea: Use Software Radio code / modelin simulation

Offer virtual mode / real mode

Use production code in simulation,reproducible test environment and results

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OverviewWireless Networks In-the-Loop: Software Radio as the Enabler

Introduction: Network Simulators and Software Radio

Design Concepts

Implementation

Sample Networks

Conclusion and Future Work

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Design Concepts: Real ModeReal mode needs standardized digital I/Q base band / RF software interface.

System overviewReal mode Network in real environment:

Different SR terminals running ondifferent machines with differentRF hardware

Components: SR terminal RF hardware Physical channel

RF hardware is addressed using astandardized software I/Q base bandinterface

E.g. SDR Forum TransceiverFacility API or GNU Radio USRPAPI

See GNU Radio (http://gnuradio.org/trac) or E. Nicollet and L. Pucker, “Standardizing Transceiver APIs for SoftwareDefined and Cognitive Radio,” RF Design, Feb 2008, SDR Transceiver Facility Working Group

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Design Concepts: Virtual ModeVirtual mode additionally needs to abstract RF hardware and channel.

System overview

Network in simulation: Components are run as separate

processes, on same or separatemachines

Components: Dispatch / Control process SR terminals Virtual RF hardware Channel matrix

Virtual RF software API identical to RFsoftware API

Virtual mode

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Design Concepts: Components Virtual ModeDCP controls SR processes, provides world model and parameterizes channel matrix.

Dispatch and Control Process (DCP)

Initiates and controlsthe SR processes

Responsible forselecting a channelmodel

Constantly updateschannel matrix processaccording to internalworld model

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Design Concepts: Components Virtual ModeVirtual radio front-end models analogue processing.

Virtual radio front-end (Virt RF)

Simulates signal pathfrom I/Q base band toantenna

Models non-idealities ofanalogue processing

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Design Concepts: Components Virtual ModeSR processes provide I/Q base band processing, transmit and receive path.

Software Radio (SR) terminals

SR terminals processI/Q base band samples,send and receive

Control (virtual) RFfront-end parameters,such as frequency,gain, transmit poweretc.

SR terminal processesinteract through virtualRF and channel matrix

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Design Concepts: Components Virtual ModeThe channel matrix models antenna to antenna wave propagation.

The channel

Channel matrixsimulates thepropagation path fromantenna to antenna

Parameterized by theDCP according to aworld model

Adds and redistributesI/Q streams from SRs

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OverviewWireless Networks In-the-Loop: Software Radio as the Enabler

Introduction: Network Simulators and Software Radio

Design Concepts

Implementation

Sample Network

Conclusion and Future Work

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Implementation: Software / Hardware ToolsChoice of SR framework: GNU Radio and Ettus Research USRP.

Tools

Virtual Mode Software

SR terminals RF software API: USRP-based Channel

See Ettus Research LLC (http://ettus.com) and GNU Radio (http://gnuradio.org/trac/)

Real Mode Software and Hardware

Ettus USRP1 or USRP2 GNU Radio Python USRP

interface

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Implementation: Virt RFVirtual RF front-end signal processing is a hierarchical GNU Radio block.

Virtual RF front-end

Implemented as GNURadio signal processingblock

Models internal USRPstructure (DUC, DAC)and analogueprocessing

Resulting digital signalis upsampled tosimulation bandwidth(virtual IF)

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Implementation: Virt RF interpolationSimulation bandwidth is shared by all SR terminals.

Virtual RF front-end and simulation bandwidth

Virtual USRPinterpolates to DACrate, 128 MSamples/s

Simulation bandwidth:128 MHz

Interpolation CIC/FIR-based, factor 4 – 512(USRP1)

I/Q base band ratesfrom 250 kHz to 32MHz

Decimation accordinglyas in USRP1

Simulation bandwidth with three SR terminals operating

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Implementation: Virt RF modeled non-idealitiesVirtual RF front-end models radio non-idealities .

Virtual RF front-end non-idealities

Digital to Analog,Analog to Digitalconversion:Quantization effects

Frequency offset, drift

Phase noise

Non-linear amplification Analogue filtering Johnson noise

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Implementation: Virt RF / channel APISR terminal / Channel processes communicate via named pipes.

Data transfer between Virtual RF and Channel Matrix Each SR terminal

process interacts withchannel matrix vianamed pipes

FIFO buffer forinter-processcommunication

Channel matrixsynchronizes streamson a sample per samplebasis

SR terminalsprovide streamingI/Q at simulationbandwidth

c

c

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Implementation: Channel matrixChannel matrix is hierarchical block: Time variant FIR tapped delay line model.

Channel Matrix

The entirety of channelscan between N SRterminals can be writtenin a NxN matrix ofimpulse responses

Modeled effects: Free space loss Multi-path

propagation Doppler spread

Resulting signal atterminal k is calculatedvia summation of filteredsignals

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OverviewWireless Networks In-the-Loop: Software Radio as the Enabler

Introduction: Network Simulators and Software Radio

Design Concepts

Implementation

Sample Network

Conclusion and Future Work

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Sample Network: Checking consistencyA simple SR network with 4 SR terminals is simulated.

Test consistency between RealMode and Virtual Mode with asimple SR network setup

Virtual mode: simulation Real mode: measurement

Here: Realistic packet error rateanalysis under co-channelinterference for a complete SRterminal stack

Transmitters: SR 1, SR 2,receivers: SR 3, SR 4

Frequency flat fading assumed

Simulating an SR network Network setup

SR 1 SR 2

SR 4SR 3

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Sample Network: Checking consistencyA simple SR network with 4 SR terminals is simulated.

Flow graph for each terminal usesstandard GNU Radioframing/deframing, modulation

GMSK on PHY

Custom code for Speex Narrow band codec for

speech Supports Packet-loss

concealment

No channel coding used

SR terminal code Flow graph

SR 1 SR 2

SR 4SR 3

See Speex: A Free Codec for Speech, http://www.speex.org

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Sample Network: Checking consistencyA simple SR network with 4 SR terminals is verified by measurement.

Simulation and Measurement results

Modulation : GMSKInterpolation : 64Decimation : 64Samples/Symbol : 2Bit Rate : 1 Mb/sTx1 SNR : 22 dBTx2 SNR : VariedSignal BW : 1.5MHzRF Filter : 2 MHz

SIR : Signal to InterferenceRatio is calculated as Rx power ofSR 1 to Rx power of SR 2 at SR 3

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OverviewWireless Networks In-the-Loop: Software Radio as the Enabler

Introduction: Network Simulators and Software Radio

Design Concepts

Implementation

Sample Network

Conclusion and Future Work

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Conclusion and Future WorkWireless Networks In-the-Loop: On going work.

Framework, sampleimplementation of a wirelessnetwork simulator, allowing loop-testing of wireless networks Simple USRP abstraction

Needed for verifiableperformance testing of SRnetworks Especially for ad hoc or

overlay networks:evaluation of Interference

Code under development

Introducing an absolutetime reference Sample-based

synchronization is akludge

Improving performance

Improving abstraction ofhardware (e.g. accuratemodeling of RF filters)

Better demos, …, <yourwork here>

Goal: freenetwork simulator

So far… Future Work

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Thank you for your attention!

Q&A / Discussion