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Xiuzhen Cheng Xiuzhen Cheng [email protected] Csci136 Computer Architecture II Csci136 Computer Architecture II – Introduction – Introduction

Xiuzhen Cheng [email protected] Xiuzhen Cheng [email protected] [email protected] Csci136 Computer Architecture II – Introduction

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Page 1: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Xiuzhen ChengXiuzhen Cheng [email protected]

Csci136 Computer Architecture IICsci136 Computer Architecture II – Introduction – Introduction

Page 2: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Lecture Outline

Administrivia – syllabus

Introduction, Technology Trend

Page 3: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Administrivia – syllabus

Course Information3 credits; CRN: 62513

11:10AM – 12:25PM, Tuesday & Thursday; PHIL 110

http://www.seas.gwu.edu/~cheng/136

Instructor InformationXiuzhen Cheng, Academic Center, Room 716Tel: 202 994 9751 Fax: 202 994 [email protected]

Office hour: 1:00PM-3:00PM, Tue. & Thur.; or by appointment

Page 4: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Syllabus (Cont.)

Lab SectionsSection 30: Tomp 405, Wed. 4:10PM – 6:00PM

Section 31: Tomp 405, Wed. 10:00AM – 12:00PM

Discussion on homework problems, projects, lectures, etc.

Must attend one of them.

TA InformationFanchun Jin: [email protected]

Office: Academic Center, Room 730Office hours: Mon, Thur. 4 – 6PM

Fang Liu: [email protected]: Academic Center, Room 710Office hours: ???

Page 5: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Syllabus (Cont.)

Textbook“Computer Organization & Design: the hardware/software interface”, 3rd edition, by D.A. Patterson & J.L. Hennessy, ISBN 1-55860-604-1, required

“Introduction to RISC Assembly Language Programming”, by J. Waldron, 1999, ISBN 0-201-39828-1, optional

PrerequisiteCsci 135 or equivalent knowledge

Programming ability in a higher-level language

Course Planwww.seas.gwu.edu/~cheng/136/agenda.html

Page 6: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Syllabus (Cont.)

No midterm; 1 final. Final will cover all material.

5 quizes, among which 4 will be counted in your final grades.

Open book, open notes

Graded by Instructors

More than 10 homework assignments. 3 projects. Will be graded by TA

1: Merge Sort (7%); 2: Simple Calculator (6%); 3: Single Precision Floating Point Addition and Subtraction (7%).

Method of instruction: lecture and in-class discussion

Page 7: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Syllabus (Cont.)

Grading PolicyBased on curve. You must pass final to pass the course

Homework assignments: 20%Projects: 20%quizes 30%Final: 30%

Make-up policy: NO

Page 8: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Syllabus (Cont.)

Lab plan: www.seas.gwu.edu/~cheng/136/labPlan.html

Announcement PagePlease visit routinely

Useful link pageSPIM related pages

Questions?

Page 9: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Focus of the Course

Focuses of this course:

How computers workMIPS instruction set architecture, Assembly Programming

The implementation of MIPS instruction set architecture ( a subset) – MIPS processor design

Issues affecting modern processors (caches, pipelines)Pipelining – processor performance improvement.

Memory system, I/O systems

Page 10: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Course Objective

Objective of the course:Help you become a better programmer!Learn tools to solve problemsStudy the interaction between hardware/softwareLearn the design trade-offs that drive the performance of computer systems

By the end of this semester, you will be able to understand…

How is high-level language translated to machine code?How does the hardware execute the program?What is the interface between hardware and software?How does software instruct the hardware to perform the job?What determines the performance and how to improve it?…

Page 11: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Course Problems…Cheating

What is cheating?Studying together in groups is encouraged.

Turned-in work must be completely your own.

Common examples of cheating: running out of time on a assignment and then pick up output, take homework from box and copy, person asks to borrow solution “just to take a look”, copying an exam question, …

Both “giver” and “receiver” are equally culpable

Cheating on homeworks: negative points for that assignment (e.g., if it’s worth 10 pts, you get -10)

Cheating on projects / exams; At least, negative points for that project / exam.In most cases, F in the course.

Page 12: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

What is Computer Organization

Computer Organization: the high-level aspects of a computer’s design

CPU (datapath and control), memory system, I/O system …

Datapath: performs arithmetic operation

Control: guides the operation of other components based on the user instructions

Page 13: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Anatomy: 5 components of any Computer

Personal Computer

Processor

Computer

Control(“brain”)

Datapath(“brawn”)

Memory

(where programs, data live whenrunning)

Devices

Input

Output

Keyboard, Mouse

Display, Printer

Disk (where programs, data live whennot running)

Page 14: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

What is Computer Architecture

Programmer’s view: a pleasant environment

Operating system’s view: a set of resources (hw & sw)

System architecture view: a set of components

Compiler’s view: an instruction set architecture with OS help

Microprocessor architecture view: a set of functional units

VLSI designer’s view: a set of transistors implementing logic

Mechanical engineer’s view: a heater!

For this course, computer architecture mainly refers to Instruction Set Architecture

Programmer-visible. Serves as the boundary between the software and hardware.

Page 15: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Example Computer Architectures

Accumulator architecture1 general purpose register called accumulator. Hold one source and the destination. The 2nd source is in memory

Eg. EDSAC (1949), Motorola 6800 (1974)

Stack architecture: HP handheld calculator

Load-store register architecture – since 1980Load data from memory to register, register-register operation

MIPS, SPARC, PowerPC, DEC Alpha

Others:Register-memory architecture: DEC VAX, Motorola 6800, etc

Memory-memory architecture: DEC VAX

Page 16: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Why Register Architecture Dominates?

Mainly refers to General Purpose Register Architecture

A general purpose register can hold an address, an integer, an instruction, a floating point number, an integer, …

Why General Purpose Register?Registers are faster than memoryRegisters are more efficient for a compiler to use than other forms of internal storageRegisters can be used to hold variables

How many registers are sufficient?Compiler requires at least 16The more, the better? No! Why?MIPS R3000 has 32 32-bit general purpose register

Page 17: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Overview of Physical Implementations

The hardware out of which we make systems.

Integrated Circuits (ICs)

Combinational logic circuits, memory elements, analog interfaces.

Printed Circuits (PC) boards

substrate for ICs and interconnection, distribution of CLK, Vdd, and GND signals, heat dissipation.

Power Supplies

Converts line AC voltage to regulated DC low voltage levels.

Chassis (rack, card case, ...)

holds boards, power supply, provides physical interface to user or other systems.

Connectors and Cables.

Page 18: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Integrated Circuits (2003 state-of-the-art)Primarily Crystalline Silicon

1mm - 25mm on a side

2003 - feature size ~ 0.13µm = 0.13 x 10-6 m

100 - 400M transistors

(25 - 100M “logic gates")

3 - 10 conductive layers

“CMOS” (complementary metal oxide semiconductor) - most common.

Package provides:spreading of chip-level signal paths to board-level

heat dissipation.

Ceramic or plastic with gold wires.

Chip in Package

Bare Die

Page 19: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Printed Circuit Boards

fiberglass or ceramic

1-20 conductive layers

1-20in on a side

IC packages are soldered down.

Page 20: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Technology Trends: Memory Capacity (Single-Chip DRAM)

size

Year

Bits

1000

10000

100000

1000000

10000000

100000000

1000000000

1970 1975 1980 1985 1990 1995 2000

year size (Mbit)

1980 0.0625

1983 0.25

1986 1

1989 4

1992 16

1996 64

1998 128

2000 256

2002 512• Now 1.4X/yr, or 2X every 2 years.• 8000X since 1980!

Page 21: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Technology Trends: Microprocessor Complexity

Year

Transistors

1000

10000

100000

1000000

10000000

100000000

1970 1975 1980 1985 1990 1995 2000

i80386

i4004

i8080

Pentium

i80486

i80286

i80862X transistors/ChipEvery 1.5 years

Called “Moore’s Law”

Alpha 21264: 15 millionPentium Pro: 5.5 millionPowerPC 620: 6.9 millionAlpha 21164: 9.3 millionSparc Ultra: 5.2 million

Moore’s Law

Athlon (K7): 22 Million

Itanium 2: 410 Million

Page 22: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Technology Trends: Processor Performance

1.54X/yr

Intel P4 2000 MHz(Fall 2001)

We’ll talk about processor performance later on…

year

Per

form

ance

mea

sure

0100200300400500600700800900

87 88 89 90 91 92 93 94 95 96 97

DEC Alpha 21264/600

DEC Alpha 5/500

DEC Alpha 5/300

DEC Alpha 4/266

IBM POWER 100

Page 23: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Computer Technology - Dramatic Change!Memory

DRAM capacity: 2x / 2 years (since ‘96); 64x size improvement in last decade.

ProcessorSpeed 2x / 1.5 years (since ‘85); 100X performance in last decade.

DiskCapacity: 2x / 1 year (since ‘97)250X size in last decade.

Page 24: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Computer Technology - Dramatic Change!

State-of-the-art PC when you graduate: (at least…)

Processor clock speed: 5000 MegaHertz (5.0 GigaHertz)

Memory capacity: 4000 MegaBytes(4.0 GigaBytes)

Disk capacity: 2000 GigaBytes(2.0 TeraBytes)

New units! Mega => Giga, Giga => Tera

(Kilo, Mega, Giga, Tera, Peta, Exa, Zetta, Yotta = 1024)

Come up with a clever mnemonic, fame!

Page 25: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Technology in the News

BIGLaCie the first to offer consumer-level 1.6 Terabyte disk!

$2,200

Weighs 11 pounds!

5 1/4” form-factor

SMALLPretec is soon offering a 12GB CompactFlash card

Size of a silver dollar

Cost? > New Honda!

FastSamsung 256 Mbit XDR DRAM

www.lacie.com/products/product.htm?id=10129

www.engadget.com/entry/4463693158281236/

http://www.tomshardware.com/hardnews/20050125_170734.html

Page 26: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

So What You Will Learn?

Learn some of the big ideas in CS & engineering:5 Classic components of a ComputerData can be anything (integers, floating point, characters): a program determines what it isStored program concept: instructions just dataPrinciple of Locality, exploited via a memory hierarchy (cache)Greater performance by exploiting parallelismPrinciple of abstraction, used to build systems as layersCompilation v. interpretation thru system layersPrinciples/Pitfalls of Performance Measurement

Assembly Language ProgrammingThis is a skill you will pick up

Hardware designWe think of hardware at the abstract level, with only a little bit of physical logic to give things perspective

Page 27: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Summary

Continued rapid improvement in computing2X every 2.0 years in memory size;

every 1.5 years in processor speed; every 1.0 year in disk capacity;

Moore’s Law enables processor(2X transistors/chip ~1.5 yrs)

5 classic components of all computers Control Datapath Memory Input Output

Processor

}

Page 28: Xiuzhen Cheng cheng@gwu.edu Xiuzhen Cheng cheng@gwu.edu cheng@gwu.edu Csci136 Computer Architecture II – Introduction

Homework and Questions

Homework #1:Readings: Chapter 1

Problems:1.1-1.28, 1.29-1.45, 1.46, 1.51-1.52, 1.54-1.55

Questions?