Upload
boroda2410
View
116
Download
21
Tags:
Embed Size (px)
Citation preview
01V96
1
SERVICE MANUAL
PA 011680
1.329K-1933 Printed in Japan 03.03
HAMAMATSU, JAPAN
CONTENTS
SPECIFICATIONS ................................................... 4DIMENSIONS .......................................................... 12PANEL LAYOUT .................................. 13CIRCUIT BOARD LAYOUT ............... 21DISASSEMBLY PROCEDURE ............................ 23INSTALLING AN OPTIONAL CARD
............................................ 32LSI PIN DESCRIPTION ................................ 33IC BLOCK DIAGRAM .................................. 41CIRCUIT BOARDS ....................................... 46INSPECTIONS ....................................................... 76/83SERVICE CHECK PROGRAM ... 90/102INITIALIZING THE 01V96 ....................... 114TRANSMITTING PARAMETER SETTINGS VIA MIDI (BULK DUMP)
.... 115/117CHECKING THE BATTERY AND THE SYSTEM VERSION
.......... 119CALIBRATING THE FADERS
................................... 119MIDI DATA FORMAT ............... 120MIDI IMPLEMENTATION CHART
............................ 134PARTS LISTBLOCK DIAGRAMOVERALL CONNECTOR CIRCUIT DIAGRAM
CIRCUIT DIAGRAMThis document is printed on chlorine free (ECF) paper with soy ink.
DIGITAL MIXING CONSOLE
200304-250000
LSIIC
01V96
MIDI
MIDI
MIDI
ECF
01V96
2
IMPORTANT NOTICEThis manual has been provided for the use of authorized Yamaha Retailers and their service personnel. It has been assumedthat basic service procedures inherent to the industry, and more specifically Yamaha Products, are already known and under-stood by the users, and have therefore not been restated.
WARNING : Failure to follow appropriate service and safety procedures when servicing this product may result in per-sonal injury, destruction of expensive components and failure of the product to perform as specified. Forthese reasons, we advise all Yamaha product owners that all service required should be performed by anauthorized Yamaha Retailer or the appointed service representative.
IMPORTANT : This presentation or sale of this manual to any individual or firm does not constitute authorization certifi-cation, recognition of any applicable technical capabilities, or establish a principal-agent relationship ofany form.
The data provided is belived to be accurate and applicable to the unit(s) indicated on the cover. The research engineering, andservice departments of Yamaha are continually striving to improve Yamaha products. Modifications are, therefore, inevitableand changes in specification are subject to change without notice or obligation to retrofit. Should any discrepancy appear toexist, please contact the distributors Service Division.
WARNING : Static discharges can destroy expensive components. Discharge any static electricity your body may haveaccumulated by grounding yourself to the ground bus in the unit (heavy gauge black wires connect tothis bus.)
IMPORTANT : Turn the unit OFF during disassembly and parts replacement. Recheck all work before you apply powerto the unit.
WARNING: CHEMICAL CONTENT NOTICE!The solder used in the production of this product contains LEAD. In addition, other electrical/electronic and/or plastic (Whereapplicable) components may also contain traces of chemicals found by the California Health and Welfare Agency (and possiblyother entities) to cause cancer and/or birth defects or other reproductive harm.DO NOT PLACE SOLDER, ELECTRICAL/ELECTRONIC OR PLASTIC COMPONENTS IN YOUR MOUTH FOR ANY REASON WHATSO EVER!
Avoid prolonged, unprotected contact between solder and your skin! When soldering, do not inhale solder fumes or exposeeyes to solder/flux vapor!
If you come in contact with solder or components located inside the enclosure of this product, wash your hands before handlingfood.
WARNINGComponents having special characteristics are marked and must be replaced with parts having specification equal to thoseoriginally installed.
WARNING: THIS APPARATUS MUST BE EARTHEDIMPORTANT
THE WIRES IN THIS MAINS LEAD ARE COLOURED IN ACCORDANCE WITH THE FOLLOWING CODE: GREEN-AND-YELLOW : EARTH BLUE : NEUTRAL BROWN : LIVEAs the colours of the wires in the mains lead of this apparatus may not correspond with the coloured markings identifying the terminals in your plug, proceed as follows:The wire which is coloured GREEN and YELLOW must be connected to the terminal in the plug which is marked by the letter E or by the safety earth symbol or coloured GREEN and YELLOW.The wire which is coloured BLUE must be connected to the terminal which is marked with the letter N or coloured BLACK.The wire which is coloured BROWN must be connected to the terminal which is marked with the letter L or coloured RED.
* This applies only to products distributed by YAMAHA KEMBLE MUSIC (U.K.) LTD.
01V96
3
Take care not to trap your fingers.
LITHIUM BATTERY HANDLINGThis product uses a lithium battery for memory back-up.WARNING : Lithium batteries are dangerous because they can be exploded by improper handling. Observe the following pre-
cautions when handling or replacing lithium batteries.Leave lithium battery replacement to qualified service personnel.Always replace with batteries of the same type.When installing on the PC board by soldering, solder using the connection terminals provided on the battery cells.Never solder directly to the cells. Perform the soldering as quickly as possible.Never reverse the battery polarities when installing.Do not short the batteries.Do not attempt to recharge these batteries.Do not disasemble the batteries.Never heat batteries or throw them into fire.
ADVARSEL!Lithiumbatteri-Eksplosionsfare ved fejlagtig handtering. Udskiftning ma kun ske med batteri af samme fabrikat og type. lever det brugtebatteri tilbage til leverandren.VARNINGExplosionsfara vid felaktigt batteribyte.Anvand samma batterityp eller en ekvivalent typ som rekommenderas av apparattillverkaren.Kassera anvant batteri enligt fabrikantens instruktion.VAROITUSParisto voi rajahtaa, jos se on virheellisesti asennettu.Vaihda paristo ainoastaan laitevalmistajan suosittelemaan tyyppiiin.Havita kaytetty paristo valmistajan ohjeiden mukaisesti.The following information complies with Dutch official Gazette 1995. 45; ESSENTIALS OF ORDER ON THE COLLECTION OF BATTERIES.
Please refer to the diassembly procedure for the removal of Back-up Battery. Leest u voor het verwijderen van de backup batterij deze beschrijving.
01V96
4
SPECIFICATIONS
General Spec
Number of scene memories 99
Sampling FrequencyInternal 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz
External Normal rate: 44.1 kHz10% to 48 kHz+6%Double rate: 88.2 kHz10% to 96 kHz+6%
Signal Delayfs=48 kHz Less than 1.6 ms CH INPUT to STEREO OUTfs=96 kHz Less than 0.8 ms CH INPUT to STEREO OUT
Fader 100 mm motorized with touch sense 17
Fader Resolution +10 to 138, dB input faders0 to 138, dB master faders, stereo fader
Total Harmonic Distortion*1(CH INPUT to STEREO OUT)(Input Gain=Min.)
fs=48 kHz Less than 0.05% 20 Hz20 kHz @ +14 dB into 600 WLess than 0.01% 1 kHz @ +24 dB into 600 W
fs=96 kHz Less than 0.05% 20 Hz40 kHz @ +14 dB into 600 WLess than 0.01% 1 kHz @ +24 dB into 600 W
Frequency Response(CH INPUT to STEREO OUT)
fs=48 kHz 20 Hz20 kHz, 0.5, 1.5 dB @ +4 dB into 600 Wfs=96 kHz 20 Hz40 kHz, 0.5, 1.5 dB @ +4 dB into 600 W
Dynamic Range (maximum level to noise level)
110 dB typ. DA Converter (STEREO OUT)105 dB typ. AD+DA (to STEREO OUT) @ fs=48 kHz105 dB typ. AD+DA (to STEREO OUT) @ fs=96 kHz
Hum & Noise*2(20 Hz20 kHz)Rs=150 W
128 dB Equivalent Input Noise86 dB residual output noise. STEREO OUT (STEREO OUT off)
Input Gain=Max.Input Pad =0 dB
86 dB (90 dB S/N) STEREO OUT (STEREO fader at nominal level and all CH INPUT faders at minimum level)
Input Pad =0 dBInput Sensitivity =60 dB
64 dB (68 dB S/N) STEREO OUT(STEREO fader at nominal level and one CH INPUT fader at nominal level)
Maximum Voltage Gain
74 dB CH INPUT (CH112) to STEREO OUT/OMNI (BUS) OUT40 dB CH INPUT (CH1316) to STEREO OUT74 dB CH INPUT (CH112) to OMNI (AUX) OUT (via pre input fader)74 dB CH INPUT (CH112) to MONITOR OUT (via STEREO BUS)
Crosstalk (@ 1 kHz)Input Gain=Min.
80 dB adjacent input channels (CH112)80 dB adjacent input channels (CH1316)80 dB input to output
AD Input (112)
Phantom switch +48 V DC (each 4ch)Pad switch 0/20 dB attenuationGain control 44 dB (60 to 16), detentedPeak indicator LED (red) turns on when post HA level reaches 3 dB below clipping at dig-
ital domain
Signal indicator LED (green) turns on when post HA level reaches 20 dB below nominal at digital domain
AD converter 24-bit linear, 128-times oversampling (fs=44.1, 48 kHz), 64-times over-sampling (fs=88.2, 96 kHz)
AD Input (1316)
Gain control 30 dB (26 to +4), detentedPeak indicator LED (red) turns on when post HA level reaches 3 dB below clipping at dig-
ital domain
Signal indicator LED (green) turns on when post HA level reaches 20 dB below nominal at digital domain
AD converter 24-bit linear, 128-times oversampling (fs=44.1, 48 kHz), 64-times over-sampling (fs=88.2, 96 kHz)
Input selector CH15/16/2TR IN for CH15/16
01V96
5
Digital Input(2TR IN DIGITAL, ADAT input)Option Input (SLOT) Available cards Optional digital interface cards (MY16, MY8, MY4 series)
Input Channel CH132
Input patch
Phase Normal/reverse
Gate-type*3On/offKey in: 12 ch Group (112, 1324, 2532)/AUX18
Comp-type*4On/offKey in: self /Stereo LinkPre EQ/pre fader/post fader
Attenuator96.0 to +12.0 dB (0.1 dB step)
EQ 4-band PEQ (TYPE1) *5On/off
Delay 043400 samplesOn/off
Fader 100 mm motorized (INPUT/AUX18)Aux send On/off
AUX18; pre fader/post fader
Solo On/offPre fader/after pan
Pan 127 positions (Left= 163, Center, Right= 163)Surround pan 127 127 positions [(Left= 163, Center, Right= 163)], [(Front= 163, Center, Rear= 163)]LFE level
, 96 dB to +10 dB (256 step)Routing STEREO, BUS18, DIRECT OUTDirect out Pre EQ/pre fader/post fader
Metering Displayed on LCDPeak hold on/off
Stereo Input Channel CH14
Input patch (L/R)
Phase (L/R) Normal/reverseAttenuator (L/R)
96.0 to +12.0 dB (0.1 dB step)Equalizer 4band PEQ (TYPE1) *5On/off
Fader 100 mm motorizedINPUT/AUX18 send
Aux send On/offAUX18; pre fader/post fader
Solo On/off Pre fader/after pan
Pan (L/R) 127 positions (Left= 163, Center, Right= 163)Surround pan (L/R)
127 127 positions ([Left= 163, Center, Right= 163] x [Front= 163, Center, Rear= 163])
LFE level (L/R) , 96 dB to +10 dB (256 step)
Routing STEREO, BUS18, DIRECT OUT
Metering Displayed on LCDPeak hold on/off
OSCILLATOR
Level 0 to 96 dB (1 dB step)On/off
Waveform Sine 100 Hz, sine 1 kHz, sine 10 kHz, pink noise, burst noiseRouting BUS18, AUX18, STEREO L/R
STEREO OUT DA converter 24-bit linear, 128-times oversampling (@fs=44.1, 48 kHz), 64-times over-sampling (@fs=88.2, 96 kHz)
01V96
6
MONITOR OUT DA converter 24-bit linear, 128-times oversampling (@fs=44.1, 48 kHz), 64-times over-sampling (@fs=88.2, 96 kHz)
OMNI OUT 14Output patch
STEREO, BUS18, AUX18, DIRECT OUT 132, INSERT OUT (CH132, BUS18, AUX18, STEREO), CASCADE OUT (BUS18, AUX 18, STEREO, SOLO)
DA converter 24-bit linear, 128-times oversampling (@fs=44.1, 48 kHz), 64-times over-sampling (@fs=88.2, 96 kHz)
2TR OUT DIGITAL
Dither On/offWord length 16, 20, 24-bit
Output patchSTEREO, BUS18, AUX 18, DIRECT OUT 132, INSERT OUT (CH 132, BUS 18, AUX 18, STEREO), CASCADE OUT (BUS 18, AUX 18, STEREO, SOLO)
ADAT Output
Dither On/offWord length 16, 20, 24-bit
Output patchSTEREO, BUS18, AUX 18, DIRECT OUT 132, INSERT OUT (CH 132, BUS 18, AUX 18, STEREO), CASCADE OUT (BUS 18, AUX 18, STEREO, SOLO)
Option Output (SLOT)
Available card Optional digital interface card (MY16, MY8, MY4 series)Dither On/off
Word length 16/20/24-bit
Output patchSTEREO, BUS18, AUX 18, DIRECT OUT 132, INSERT OUT (CH 132, BUS 18, AUX 18, STEREO), CASCADE OUT (BUS 18, AUX 18, STEREO, SOLO)
STEREO
Comp-type*4On/offPre EQ/pre fader/post fader
Attenuator96.0 to +12.0 dB (0.1 dB step)
EQ 4-band PEQ*5
On/offOn/off
Fader 100 mm motorizedBalance 127 positions (Left=163, Center, Right=163)Delay 029100 samples
MeteringDisplayed on LCDPeak hold on/off12-elements x2 LED meters
BUS18
Comp-type*4On/offPre EQ/pre fader/post fader
Attenuator96.0 to +12.0 dB (0.1 dB step)
EQ 4-band PEQ*5
On/offOn/off
Fader 100 mm motorizedDelay 029100 samples
Bus to stereoLevel ( , 130 dB0 dB)On/offPan: 127 positions (Left=163, Center, Right=163)
Metering Displayed on LCDPeak hold on/off
01V96
7
AUX18
Comp-type*4On/offPre EQ/pre fader/post fader
Attenuator96.0 to +12.0 dB (0.1 dB step)
EQ 4-band PEQ*5
On/offOn/off
Fader 100 mm motorizedDelay 029100 samples
Metering Displayed on LCDPeak hold on/off
INTERNAL EFFECTS(EFFECT 14)
Number of effects
[email protected], [email protected], 96kHz
Bypass On/offIn/out 2-in, 2-outEffect-in from AUX18/INSERT OUTEffect-out to
JapanU.S/Canada
Others
Input patch
Power Requirements100 V, 50/60 Hz 90 W120 V, 60 Hz 90 W
220-240 V, 50/60 Hz 90 WDimensions (H x D x W) 150 x 548 x 436 mmNet weight 15 kgOperating free-air temperature range 1035CStorage temperature range
2060C
Supplied AccessoriesAC Cable (3P/2P AC plug adapter)CD-ROM (Studio Manager)Owners ManualStudio Manager Installation Guide
Options Digital interface card (MY16, MY8, MY4 series)RACK MOUNT KIT: RK1
*1. Total harmonic distortion is measured with a 6 dB/octave filter @ 80 kHz.*2. Hum & Noise are measured with a 6 dB/octave filter @ 12.7 kHz; equivalent to a 20 kHz filter with infinite dB/octave
attenuation.*3. See Gate Parameters on page 8.*4. See Comp Parameters on page 8.*5. See EQ Parameters on page 7.
LOW/HPF L-MID H-MID HIGH /LPF
Q0.110.0
(41 points)low shelving
HPF
0.110.0(41 points)
0.110.0(41 points)
high shelvingLPF
F 20 Hz20 kHz (1/12 oct step)
G 18 dB
(0.1 dB step)HPF: on/off
18 dB(0.1 dB step)
18 dB(0.1 dB step)LPF: on/off
Warranty card (J)
EQ ParametersEQ
01V96
8
Gate
Threshold54 dB0 dB (0.1 dB step)
Range70 dB0 dB (1 dB step)
Attack 0 ms120 ms (1 ms step)
Hold
0.02 ms1.96 s (216 points) @ 48 kHz0.02 ms2.13 s (216 points) @ 44.1 kHz0.01 ms981 ms (216 points) @ 96 kHz0.01 ms1.06 s (216 points) @ 88.2 kHz
Decay
5 ms42.3 s (160 points) @ 48 kHz6 ms46.0 s (160 points) @ 44.1 kHz3 ms21.1 s (160 points) @ 96 kHz3 ms23.0 s (160 points) @ 88.2 kHz
Ducking
Threshold54 dB0 dB (0.1 dB step)
Range70 dB0 dB (1 dB step)
Attack 0 ms120 ms (1 ms step)
Hold
0.02 ms1.96 s (216 points) @ 48 kHz0.02 ms2.13 s (216 points) @ 44.1 kHz0.01 ms981 ms (216 points) @ 96 kHz0.01 ms1.06 s (216 points) @ 88.2 kHz
Decay
5 ms42.3 s (160 points) @ 48 kHz6 ms46.0 s (160 points) @ 44.1 kHz3 ms21.1 s (160 points) @ 96 kHz3 ms23.0 s (160 points) @ 88.2 kHz
Compressor
Threshold54 dB0 dB (0.1 dB step)
Ratio (x :1) x=1, 1.1, 1.3, 1.5, 1.7, 2, 2.5, 3, 3.5, 4, 5, 6, 8, 10, 20, (16 points)Out gain 0 dB to +18 dB (0.1 dB step)Knee Hard, 1, 2, 3, 4, 5 (6 step)Attack 0 ms120 ms (1 ms step)
Release
5 ms42.3 s (160 points) @ 48 kHz6 ms46.0 s (160 points) @ 44.1 kHz3 ms21.1 s (160 points) @ 96 kHz3 ms23.0 s (160 points) @ 88.2 kHz
Expander
Threshold54 dB to 0 dB (0.1 dB step)
Ratio (x :1) x=1, 1.1, 1.3, 1.5, 1.7, 2, 2.5, 3, 3.5, 4, 5, 6, 8, 10, 20, (16 points)Out gain 0 dB to +18 dB (0.1 dB step)Knee Hard, 1, 2, 3, 4, 5 (6 points)Attack 0 ms120 ms (1 ms step)
Release
5 ms42.3 s (160 points) @ 48 kHz6 ms46.0 s (160 points) @ 44.1 kHz3 ms21.1 s (160 points) @ 96 kHz3 ms23.0 s (160 points) @ 88.2 kHz
Gate Parameters
Comp Parameters
Gate
Comp
01V96
9
Compander H
Threshold54 dB to 0 dB (0.1 dB step)
Ratio (x :1) x=1, 1.1, 1.3, 1.5, 1.7, 2, 2.5, 3, 3.5, 4, 5, 6, 8, 10, 20 (15 points)Out gain
18 dB to 0 dB (0.1 dB step)Width 1 dB90 dB (1 dB step)Attack 0 ms120 ms (1 ms step)
Release
5 ms42.3 s (160 points) @ 48 kHz6 ms46.0 s (160 points) @ 44.1 kHz3 ms21.1 s (160 points) @ 96 kHz3 ms23.0 s (160 points) @ 88.2 kHz
Compander S
Threshold54 dB to 0 dB (0.1 dB step)
Ratio (x :1) x=1, 1.1, 1.3, 1.5, 1.7, 2, 2.5, 3, 3.5, 4, 5, 6, 8, 10, 20 (15 points)Out gain
18 dB to 0 dB (0.1 dB step)Width 1 dB90 dB (1 dB step)Attack 0 ms120 ms (1 ms step)
Release
5 ms42.3 s (160 points) @ 48 kHz6 ms46.0 s (160 points) @ 44.1 kHz3 ms21.1 s (160 points) @ 96 kHz3 ms23.0 s (160 points) @ 88.2 kHz
Effect library (EFFECT 14) Presets 44User memories 76
Compressor library Presets 36User memories 92
Gate library Presets 4User memories 124
EQ library Presets 40User memories 160
Channel library Presets 2User memories 127
Input patch library Presets 1User memories 32
Output patch library Presets 1User memories 32
Libraries
01V96
10
In these specifications, when dB represents a specific voltage, 0 dB is referenced to 0.775 Vrms.For 2TR IN levels, 0 dBV is referenced to 1.00 Vrms.All input AD converters (CH INPUT 116) are 24-bit linear, 128-times oversampling. (@fs=44.1, 48 kHz)+48 V DC (phantom power) is supplied to CH INPUT (112) XLR type connectors via individual switches.Three PHANTOM +48V switches CH14, 58, 912 turn on the phantom power for inputs 14, 58, 912 respectively.
In these specifications, when dB represents a specific voltage, 0 dB is referenced to 0.775 Vrms.2TR OUT [L, R] levels, 0 dBV is referenced to 1.00 Vrms.All output DA converters are 24-bit, 128-times oversampling. (@fs=44.1, 48 kHz)
Input PAD GAIN Actual LoadImpedanceFor Use With
Nominal
Input levelConnector
Sensitivity*1
*1. Sensitivity is the lowest level that will produce an output of +4 dB (1.23 V) or the nominal output level when the unit is set to maximum gain. (All faders and level controls are maximum position.)
Nominal Max. before clip
INPUT A/B 112
060 dB
3k W50600 W
Mics & 600 W Lines
70 dB (0.245 mV)
60 dB (0.775 mV)
40 dB (7.75 mV) A: XLR-3-31 type
(Balanced)*2B: Phone jack (TRS) (Balanced)*3
*2. XLR-3-31 type connectors are balanced (1=GND, 2=HOT, 3=COLD).*3. Phone jacks are balanced (Tip=HOT, Ring=COLD, Sleeve=GND).
16 dB
26 dB (38.8 mV)
16 dB (123 mV)
+4 dB(1.23 V)
20 6 dB (338 mV)+4 dB
(1.23 V)+24 dB
(12.28 V)
INPUT 1316
26 dB10k W 600 W Lines
36 dB (1.23 mV)
26 dB (38.8 mV)
6 dB (388 mV) Phone jack (TRS)
(Balanced)*3+4 dB 6 dB (388 mV)
+4 dB (1.23 V)
+24 dB(12.28 V)
CH INSERT IN 112 10k W 600 W Lines
12 dB(195 mV)
2 dB(616 mV)
+18 dB (6.16 V)
Phone jack (TRS) (Unbalanced) *4
*4. CH INSERT IN/OUT phone jacks are unbalanced. (Tip=OUTPUT, Ring=INPUT, Sleeve=GND).
2TR IN [L, R] 10k W 600 W Lines 10 dB(316 mV)
10 dBV(316 mV)
+10 dBV (3.16 V)
RCA pin jack (Unbalanced)
OutputActual Source
ImpedanceFor Use With
Nominal
Output levelConnector
Nominal Max. before clip
STEREO OUT [L, R] 150 W 600 W Lines +4 dB (1.23 V)+24 dB
(12.28 V) XLR-3-32 type (Balanced) *1
*1. XLR-3-32 type connectors are balanced (1=GND, 2=HOT, 3=COLD).
OMNI OUT 14 150 W 10k W Lines +4 dB (1.23 V)+24 dB
(12.28 V) Phone jack (TRS) (Balanced)*2
*2. Phone jacks are balanced (Tip=HOT, Ring=COLD, Sleeve=GND).
MONITOR OUT [L, R] 150 W 10k W Lines +4 dB (1.23 V)+24 dB
(12.28 V) Phone jack (TRS) (Balanced)*2
CH INSERT OUT 112 600 W 10k W Lines 2 dB (616 mV)+18 dB(6.16 V)
Phone jack (TRS) (Unbal-anced) *3
*3. CH INSERT IN/OUT phone jacks are unbalanced. (Tip=OUTPUT, Ring=INPUT, Sleeve=GND).
2TR OUT [L, R] 600 W 10k W Lines 10 dBV(316 mV)+10 dBV(3.16 V) RCA Pin Jack (Unbalanced)
PHONES 100 W8 W Phones 4 mW 25 mW Stereo Phone Jack (TRS)
(Unbalanced) *4
*4. PHONES stereo phone jack is unbalanced (Tip=LEFT, Ring=RIGHT, Sleeve=GND).
40 W Phones 12 mW 75 mW
Analog Input Spec
Analog Output Spec
01V96
11
Each I/O SLOT accepts a Digital interface card. SLOT1 has a serial interface.
Input Format Data length Level Connector2TR IN DIGITAL IEC-60958 24-bit 0.5 Vpp/75 W RCA pin jackADAT IN ADAT *1
*1. ALESIS proprietary multichannel optical digital interface format
24-bit OPTICAL
Output Format Data length Level Connector
2TR OUT DIGITAL IEC-60958*1
Consumer use
*1. Channel status of 2TR OUT DIGITALType: linear PCMCategory code: Digital signal mixerCopy prohibit: NOEmphasis: NOClock accuracy:Level II (1000 ppm)Sampling rate: depends on the internal configuration
24-bit *3 0.5V pp/75 W RCA pin jack
ADAT OUT ADAT *2
*2. ALESIS proprietary multichannel optical digital interface format
24-bit *3
*3. Dither: word length 16/20/24 bit
OPTICAL
Maker Model Function INPUT OUTPUT *1
*1. Selectable from STEREO/BUS/AUX/DIRECT/OUT/INSERT OUT/CASCADE OUT (STEREO, BUS18, AUX18, SOLO).Details depend on each interface card.
Format Resolution FrequencyThe
number of Available
cardsNote
Yamaha
MY8-AT
Digital I/O
8 8ADAT
20 bit 44.1/48 kHz 1Can handle 24 bit/96 kHz by double channel mode
MY16-AT 16 16
24 bit
44.1/48 kHz 1MY8-TD 8 8 TASCAM 44.1/48 kHz 1MY8-AE 8 8
AES/EBU
44.1/48 kHz 1
MY8-AE96S 8 8 44.1/48/88.2/96 kHz 1 Sampling Rate Con-verter for input
MY8-AE96 8 8 44.1/48/88.2/96 kHz 1MY4-AD
ANALOG IN
4 44.1/48 kHz 1MY8-AD 8 20 bit 44.1/48 kHz 1MY8-AD24 8
24 bit44.1/48 kHz 1
MY8-AD96 8 44.1/48/88.2/96 kHz 1MY4-DA
ANALOG OUT 4 20 bit 44.1/48 kHz 1
MY8-DA96 8
24 bit
44.1/48/88.2/96 kHz 1MY-mLAN mLAN Interface 8 8 IEEE1394 44.1/48 kHz 1 Maximum 5 nodes
Waves Y56K Effect & I/O 8 8 ADAT 44.1/48 kHz 1
ApogeeAP8AD ANALOG IN 8 44.1/48/88.2/96 kHz 1
4ch @fs=88.2, 96 kHzAP8DA ANALOG OUT 8 44.1/48/88.2/96 kHz 1
Digital Input Spec
Digital Output Spec
I/O Slot Spec
I/O
01V96
12
430
(Not
includ
ed S
crew
Head
s)43
6 (In
clude
d Scre
w He
ads)
150
540350101
548
350
DIMENSIONS
Top view
Side view
Control I/O SpecI/O Port Format Level Connector in Console
TO HOST USB USB 0 V3.3 V B type USB connector
MIDIIN*1
*1. MIDI IN can use as TIME CODE IN MTC.
MIDI DIN Connector 5POUT MIDI DIN Connector 5PTHRU MIDI DIN Connector 5P
WORD CLOCKIN
TTL/75 W BNC ConnectorOUT
TTL/75 W BNC Connector
Units: mm
Front view
I/O
13
01V96
Control Panel
PANEL LAYOUT
SOLO SOLO
ON ON
SOLO
ON
SOLO
ON
SOLO
ON
SOLO
ON
SOLO
ON
SOLO
ON
SOLO
ON
SOLO
ON
SOLO
ON
SOLO
ON
SOLO
ON
SOLO
ON
SOLO
ON
SOLO
ON
SOLO
ON
SOLO
ONON
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
1-16 17-32 MASTER REMOTE
LAYER
SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SEL SELSEL
ST IN
ENTER
EQUALIZER
HIGH
HIGH-MID
LOW-MID
LOW
Q
FREQUENCY
GAIN
STEREO
SELECTED CHANNEL
PAN DEC INC
SOLO CLEARRECALLSTORE
SCENE MEMORY
PHONESMONITOROUT
MONITOR2TR IN
CH15/162TR IN
LEVEL
PHONES
LEVEL 0 100 10+4 -26GAIN
+4 -26GAIN
+4 -26GAIN
GAIN+4 -26GAIN
20dB
-16 -60GAIN
20dB
-16 -60GAIN
20dB20dB20dB20dB20dB20dB20dB20dB20dB20dB
-16 -60GAIN
-16 -60GAIN
-16 -60GAIN
-16 -60GAIN
-16 -60GAIN
-16 -60GAIN
-16 -60GAIN
-16 -60GAIN
-16 -60GAIN
-16 -60
PAD
FADER MODE
DISPLAY ACCESS
AUX 1
AUX 1 AUX 2 AUX 3 AUX 4 AUX 5 AUX 6 AUX 7 AUX 8 BUS 1 BUS 2 BUS 3 BUS 4 BUS 5 BUS 6 BUS 7 BUS 8
AUX 2 AUX 3 AUX 4
AUX 8AUX 7AUX 6AUX 5
HOME (METER)
DYNAMICS EQ EFFECT VIEW
PATCH
UTILITYMIDISCENE DIO/SETUP
/ INSERT/DELAY
PAN/ROUTING
PAIR/GROUP
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B16
151312111098764321 5
14
INSERT I/O INSERT I/O INSERT I/O INSERT I/O INSERT I/O INSERT I/O INSERT I/O INSERT I/O INSERT I/O INSERT I/O INSERT I/O INSERT I/O
L
R
IN OUT2TR
-10dBV (UNBAL)
PHANTOM +48V
CH9-12CH5-8CH1-4
INPUT(BAL)
INSERT
OUT IN(UNBAL)
ST IN 1 ST IN 2
USER DEFINEDKEYS
1 2
3 4
5 6
7 8
555
+10
5
1010
10
1515
15
2020
20
303030
30
4040
40
5050
50
60607070
20
30
40
40
50
50
6070
00
5
10
15
20
0
0
5
+10
5
10
1530
20
30
40
40
50
50
6070
20
30
40
40
50
50
6070
20
30
40
40
50
50
6070
20
30
40
40
50
50
6070
20
30
40
40
50
50
6070
15
0
5
10
15
20
0
5
+10
5
10
0
3015
5
10
15
20
0
5
+10
5
10
0
3015
5
10
15
20
0
5
+10
5
10
0
3015
5
10
15
20
0
5
+10
5
10
0
3015
20
30
40
40
50
50
6070
3015
20
30
40
40
20
30
40
20
30
40
20
30
40
50
50505050
20
30
40
50
20
30
40
50
6070
40
50
6070
40
50
6070
40
50
6070
40
50
6070
40
50
6070
40
50
6070
40
50
6070
3015
5
10
15
20
0
5
+10
5
10
0
5
10
15
20
0
5
+10
5
10
0
5
10
15
20
0
30
5
10
15
20
0
30
5
10
15
20
0
30
5
10
15
20
0
30
5
10
15
20
0
303030
5
10
15
20
0
5
10
15
20
0
5
10
15
20
0
5
+10
5
10
0
15
5
+10
5
10
0
15
5
+10
5
10
0
15
5
+10
5
10
0
15
20
30
40
50
15 15
20
30
40
50
15
5
+10
5
10
0
5
+10
5
10
0
5
+10
5
10
0
5
+10
5
10
0
1 2 3 4 5 6
1 2 3 4 5 6
7 8 9 10 11 12
7 8 9 10 11 12
13 14 15 16
13 14 15 16
32313029282726252423222120191817STEREO
13 14 15 16
OVER0-3-6-9
-12-15-18-24-30-36-48
AD Input Section (p. 14)
SELECTEDCHANNELSection (p. 17)
Monitor Out& Head- phones Sec-tion (p. 14)
SOLO Section (p. 18)
Channel Strip Section (p. 15) STEREO Section (p. 15) USER DEFINED KEYSSection (p. 18)
Data EntrySection (p. 18)
LAYER Section (p. 16)
SCENE MEMORY Section (p. 17)
Display Section (p. 17)
DISPLAY ACCESS Section (p. 16)
ST IN Section (p. 16)
FADER MODESection (p. 16)
AD
/
01V96
14
q [INPUT] connectors A/Bw [INPUT] connectors 1316e [INSERT I/O] connectorsr [PAD] switchest [GAIN] controlsy [PEAK] indicatorsu [SIGNAL] indicatorsi [AD15/16] selector
AD Input Section
Monitor Out & Headphones Section
q [2TR IN/OUT] connectorsw Monitor Source selectore [MONITOR LEVEL] controlr [PHONES LEVEL] controlt [PHONES] jack
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
PEAKSIGNAL
CH15/162TR IN
+4 -26GAIN
+4 -26GAIN
+4 -26GAIN
GAIN+4 -26GAIN
20dB
-16 -60GAIN
20dB
-16 -60GAIN
20dB20dB20dB20dB20dB20dB20dB
-16 -60GAIN
-16 -60GAIN
-16 -60GAIN
-16 -60GAIN
-16 -60GAIN
-16 -60GAIN
-16 -60
PAD
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B
A
B16
151312111094321 5
14
INSERT I/O INSERT I/O INSERT I/O INSERT I/O INSERT I/O I NSERT I/O INSERT I/O INSERT I/O INSERT I/O
CH1-4
INPUT(BAL)
INSERT
OUT IN(UNBAL)
13 14 15 16
PHONESMONITOROUT
MONITOR2TR IN
LEVEL
PHONES
LEVEL 0 100 10
L
R
IN OUT2TR
-10dBV (UNBAL)
PHANTOM +48V
CH9-12CH5-8
A/B 13 16 / AD15/16
AD
2 /
15
01V96
STEREO Section
q [SEL] buttonsw [SOLO] buttonse [ON] buttonsr Channel faders
SOLO
ON
SEL
AUX 1
40
50
6070
30
5
10
15
20
0
20
30
40
50
15
5
+10
5
10
0
1
1
17
ON
SEL
5
10
15
20
30
40
50
6070
0
STEREO
q [SEL] buttonw [ON] buttone [STEREO] fader
Channel Strip Section
01V96
16
LAYER Section
ST IN Section
q [ST IN] buttonw [SEL] buttonse [SOLO] buttonsr [ON] buttonst Level controls
FADER MODE Section
SOLO
ON
SOLO
ON
SEL SEL
ST IN
ST IN 1 ST IN 2
FADER MODE
AUX 1 AUX 2 AUX 3 AUX 4
AUX 8AUX 7AUX 6AUX 5
HOME (METER)
q [AUX 1] - [AUX 8] buttonsw [HOME] button
DISPLAY ACCESS Section
DISPLAY ACCESS
DYNAMICS EQ EFFECT VIEW
PATCH
UTILITYMIDISCENE DIO/SETUP
/ INSERT/DELAY
PAN/ROUTING
PAIR/GROUP
UTILITYMIDISCENE DIO/SETUP
q [SCENE] buttonw [DIO/SETUP] buttone [MIDI] buttonr [UTILITY] buttont [/INSERT/DELAY] buttony [PAN/ROUTING] buttonu [PAIR/GROUP] buttoni [PATCH] buttono [DYNAMICS] button!0 [EQ] button!1 [EFFECT] button!2 [VIEW] button
1-16 17-32 MASTER REMOTE
LAYERq [1-16]/[17-32] buttonsw [MASTER] buttone [REMOTE] button
AUX 1AUX 8
/ // / /
116/17 32
17
01V96
q Displayw Stereo meterse Contrast controlr [F1]-[F4] buttonst Left Tab Scroll [ ] buttony Right Tab Scroll [ ] button
SELECTED CHANNEL Section
Display Section
STEREO
OVER0-3-6-9
-12-15-18-24-30-36-48
q [PAN] controlw [HIGH] buttone [HIGH-MID] buttonr [LOW-MID] buttont [LOW] buttony [Q] controlu [FREQUENCY] controli [GAIN] control
EQUALIZER
HIGH
HIGH-MID
LOW-MID
LOW
Q
FREQUENCY
GAIN
SELECTED CHANNEL
PAN
SCENE MEMORY Section
RECALLSTORE
SCENE MEMORYq [STORE] buttonw Scene Up [ ] / Down [ ] buttonse [RECALL] button
F1F4
- - Q
/
01V96
18
USER DEFINED KEYS Section
q [1]-[8] buttons
USER DEFINEDKEYS
1 2
3 4
5 6
7 8
q Parameter wheelw [ENTER] buttone [DEC] & [INC] buttonsr Left, Right, Up, Down
([ ] / [ ] / [ ] / [ ])cursor buttons
Data Entry Section
ENTER
DEC INC
SOLO Section
q [SOLO] indicatorw [CLEAR] buttonSOLO CLEAR
18
DEC/INC / / /
19
01V96
Rear Panel
PHANTOM +48V (p. 19)
Power Section (p. 20)
AD Output Section (p. 19)
SLOT Section (p. 20)
MIDI/Control Section (p. 20)Digital I/O Section (p. 20)+48V
/ /
q [CH1-4 ON/OFF] switchw [CH5-8 ON/OFF] switche [CH9-12 ON/OFF] switch
PHANTOM +48V
AD Output Section
q [MONITOR OUT] connectors L/Rw [OMNI OUT] connectors 1-4e [STEREO OUT] connectors L/R
+48V
CH14 / CH58 / CH912 /
L/R 1 4 L/R
01V96
20
q [WORD CLOCK OUT] connectorw [WORD CLOCK IN] connectore [ADAT IN/OUT] connectorsr [2TR OUT DIGITAL COAXIAL] connectort [2TR IN DIGITAL COAXIAL] connector
Digital I/O Section
q [MIDI IN/THRU/OUT] portsw [TO HOST USB] port
MIDI/Control Section
q [SLOT]
SLOT Section
Power Section
q [POWER ON/OFF] switchw [AC IN] connector
ADAT / 2 COAXIAL 2 COAXIAL
/
/ /
/
SLOT
/ [AC IN]
21
01V96
CIRCUIT BOARD LAYOUT
Bottom Assembly
MAIN
DCA
AC
DCD
Power Transformer
Assy
01V96
22
Control Panel Assembly
PN1 (1/2)PN1 (2/2)
ADA
ADA
FD
PN2
PN2
LCD
PN1 (2/2)
HA
HA
PN1 (1/2)
Assy
23
01V96
DISASSEMBLY PROCEDURE
Note: Take care not to trap your fingers.
[50]
[50]
Side panel L
L)Control panel assemblyAss'y)
Bottom assemblyAss'y)
Side panel RR)
[50]
[50]
[50]: Bind Head Tapping Screw-B 4.0X8 MFZN2BL (EG340190)
After replacing the circuit board or fader of FD, pleasecalibrate the faders. (See page 119.)
1. Control Panel Assembly(Time required: About 3 minutes)
1-1. Remove the twenty (20) screws marked [50]. (Fig.1)1-2. Lift the control panel assembly from the rear side
and fasten them by the stay. (Photo.1) When assembling the control panel assemblywith the bottom assembly, put the screws ofthe front side fi right side panel side fi leftside panel side fi rear side in order.
FD(119)
1. Ass'y31-1. [50]2011-2. Ass'y1
1Ass'y Ass'y
Fig .1 (1)(B)
01V96
24
Stay(WA963600)
Ass'yControl panel assembly
Bottom assemblyAss'y) Photo.1
Bottom Assembly Section
2. MAIN Circuit Board(Time required: About 5 minutes)
2-1. Fasten the control panel assembly. (See procedure 1.)2-2. Remove the nine (9) screws marked [130]. The MAIN
circuit board can then be removed. (Fig.2)
3. Replacing the Lithium Battery(Time required: About 3 minutes)
3-1. Fasten the control panel assembly. (See procedure 1.)3-2. You can replace the lithium battery from the MAIN
circuit board. (Fig.2) The lithium battery is not part of the MAINcircuit board. When you replace the MAINcircuit board, you should remove the lithiumbattery from the board, and install in the holderon the new circuit board.
Important data should be backed up by MIDIdump. (See page 115.)
4. DCA Circuit Board(Time required: About 6 minutes)
4-1. Fasten the control panel assembly. (See procedure 1.)4-2. Remove the four (4) screws marked [220], the three
(3) screws marked [221] and the five (5) screwsmarked [222]. The DCA circuit board can then beremoved. (Fig.2, Photo.2)
5. DCD Circuit Board(Time required: About 5 minutes)
5-1. Fasten the control panel assembly. (See procedure 1.)5-2. Remove the four (4) screws marked [290] and the
two (2) screws marked [291]. The DCD circuit boardcan then be removed. (Fig.2, Photo.3)
6. AC Shield Plate(Time required: About 4 minutes)
6-1. Fasten the control panel assembly. (See procedure 1.)6-2. Remove the four (4) screws marked [170]. The AC
shield plate can then be removed. (Fig.2, Photo.4)
7. Power Transformer(Time required: About 5 minutes)
7-1. Fasten the control panel assembly. (See procedure 1.)7-2. Remove the AC shield plate. (See procedure 6.)7-3. Remove the four (4) screws marked [110]. The power
transformer can then be removed. (Fig.2)
Ass'y
2. MAIN52-1. Ass'y12-2. [130]9MAIN
2
3. 33-1. Ass'y13-2. MAIN
2MAINMAIN
MIDI117
4. DCA64-1. Ass'y14-2. [220]4[221]3[222]5
DCA22
5. DCD55-1. Ass'y15-2. [290]4[291]2DCD
23
6. AC46-1. Ass'y16-2. [170]4AC
24
7. 57-1. Ass'y17-2. AC67-3. [110]4
2
(1)
25
01V96
MAIN
DCA
DCD
AC shield plate
[291]
[170]
[220]
[130]
[130]
Battery VN103500VN103600(Battery holder for VN103500)
Notice for back-up battery removalPush the battery as shown in figure,then the battery will pop up.Druk de batterij naar beneden zoalsaangeven in de tekening de batterijspringt dan naar voren.
Battery
Battery holder
[221]
DCD
DCA
[110]
[170]
Power transformer
Lithium Battery
AC
[290]
[222]
[110]: Bind Head Tapping Screw-B 4.0X8 MFZN2BL (EG340190)[130]: Bind Head Tapping Screw-B 3.0X6 MFZN2BL (EP600230)[170]: Bind Head Tapping Screw-B 3.0X6 MFZN2BL (EP600230)[220]: Bind Head Tapping Screw-B SP 3.0X10 MFZN2BL (VH741100)[221]: Bind Head Screw SP 3.0X12 MFZN2Y (VB763800)[222]: Bind Head Tapping Screw-B 3.0X6 MFZN2BL (EP600230)[290]: Bind Head Tapping Screw-B 3.0X6 MFZN2BL (EP600230)[291]: Bind Head Tapping Screw-B SP 3.0X10 MFZN2BL (VH741100)
Fig. 2
Photo.2 (2)Photo.4 (4)
Photo.3 (3)
(2)
(B)(B)(B)(B)
(B)(B)(B)
()
01V96
26
[165]: Bind Head Tapping Screw-B3.0X8 MFZN2BL (EP600190)
Photo.7
8. AC Circuit Board(Time required: About 5 minutes)
8-1. Fasten the control panel assembly. (See procedure 1.)8-2. Remove the AC shield plate. (See procedure 6.)8-3. Remove the cord holder fastened the AC circuit
board and the ferrite core.(Photo.5)8-4. Remove the two (2) screws marked [145]. The AC
circuit board can then be removed from the two (2)locking card spacers. (Photo.5)
The power switch knob is not part of the ACcircuit board. When you replace the AC circuitboard, you should remove the power switchknob from the AC circuit board, and install inthe new AC circuit board. (Photo.6)
9. AC Inlet Assembly(Time required: About 5 minutes)
9-1. Fasten the control panel assembly. (See procedure 1.)9-2. Remove the AC shield plate. (See procedure 6.)9-3. Remove the cord holder fastened the AC inlet
assembly and the ferrite core.(Photo.8)9-4. Remove the two (2) screws marked [165] and the
screw marked [175]. The AC inlet assembly can thenbe removed. (Photo.7, 8)
Locking card spacer [145]
Power switch knobPSW
AC
Ferrite core
Cord holder (underneath the ferrite core)
AC inlet assemblyACAss'y
Ferrite coreCord holder
[175]
[165]
8. AC58-1. Ass'y18-2. AC68-3. AC
58-4. [145]2
2AC5PSWACACACPSWAC6
9. ACAss'y59-1. Ass'y19-2. AC69-3. ACAss'y
89-4. [165]2[175]1AC
Ass'y7, 8
[145]: Bind Head Tapping Screw-B3.0X6 MFZN2BL (EP600230)
Photo.5 (5)
(B)
(7)
(B)
Photo.6 (6)
[175]: Bind Head Tapping Screw-S4.0X8 MFZN2BL (VI693100)
(S)
Photo.8 (8)
27
01V96
ADA
[300]Knob
Push button
Knob
[320][310] [310] [320]
Ass'y
Ass'y45180
10. ADA610-1. Ass'y110-2. [300]3[310]13[320]3
ADA310
11. HA1511-1. [280]
291111-2. Ass'y111-3. ADA1011-4. [260]5[270]25HA
11, 1211-5. HA189
1212HA813, 14
[300]: Bind Head Tapping Screw-B3.0X8 MFZN2BL (EP600190)
[310]: Bonding Tapping Screw-B3.0X8 MFZN2BL (VN413300)
[320]: Bonding Screw3.0X8 MFZN2BL (VP157800)
Control Panel Assembly Section When removing the circuit board, if it is hard to handlewhile the control panel assembly is fixed slantwiseat the stay, open it widely at 180 for the work.
10. ADA Circuit Board(Time required: About 6 minutes)
10-1. Fasten the control panel assembly. (See procedure 1.)10-2. Remove the three (3) screws marked [300], the
thirteen (13) screws marked [310] and the three (3)screws marked [320]. The ADA circuit board can thenbe removed. (Fig.3, Photo.10)
11. HA Circuit Board(Time required: About 15 minutes)
11-1. Remove the twenty-nine (29) hexagonal nuts marked[280] from the control panel side. (Photo.11)
11-2. Fasten the control panel assembly. (See procedure 1.)11-3. Remove the ADA circuit board. (See procedure 10.)11-4. Remove the five (5) screws marked [260] and the
twenty-five (25) screws marked [270]. The HA circuitboard can then be removed. (Photo.11, 12)
11-5. Remove the eighteen (18) knobs from the HA circuitboard. (Photo.9)
When you replace the twelve (12) cannonconnectors and the twelve (12) phone jacks,remove the phone cannon shield soldered tothe HA circuit board by eight (8) places.(Photo.13, 14)
Photo.9 (9)
(B)
(B)
()
Fig. 3 (3)
Photo.10 (10)
01V96
28
ADA
[260]
[270][270][280]
[280] x 28
[270] [270] [270] [270] [270]
HA
12. FD Circuit Board(Time required: About 5 minutes)
12-1. Remove the seventeen (17) fader knobs from thecontrol panel side. (Photo.15)
12-2. Fasten the control panel assembly. (See procedure 1.)12-3. Remove the ten (10) screws marked [210]. The FD
circuit board can then be removed with the insulationsheet. (Photo.16)
12-4. Remove the four (4) cord holders. The insulationsheet can then be removed from the FD circuit board.(Photo.16)
The insulation sheet is fastened to the FDcircuit board by the cord holders.
When you replace the FD circuit board, be sureto attach the insulation sheet as before.
Cannon connector x 12
Phone cannon shield
Phone jack x 12
Soldering
HA
HA
12. FD512-1. 17
1512-2. Ass'y112-3. [210]10FD
1612-4. 4FD
16FDFD
[270]: Bonding Tapping Screw-B3.0X8 MFZN2BL (VN413300)
[280]: Hexagonal Nut9 12X2 MFNI3 (VP034300)
(B)
()
Photo.11 (11)
Photo.12 (12)
[260]: Bind Head Tapping Screw-B3.0X8 MFZN2BL (EP600190)
(B)
Photo.13 (13) Photo.14 (14)
29
01V96
[80][190A][190A]
[190A]
PN1 shield plate 2PN12
HA-ADA angleHA-ADAPN1 shield plate 1
PN11
LCD LCD
[190A]: Bind Head Tapping Screw-B3.0X8 MFZN2BL (EP600190)
(B)
Photo.17 (17)
[80]: Bind Head Tapping Screw-B3.0X8 MFZN2BL (EP600190)
(B)
Photo.18 (18)
[210]
[210]
Cord holder
Insulation sheet
Cord holder
Fader knob
FD
13. LCD Circuit Board and LCD(Time required: About 20 minutes)
13-1. Fasten the control panel assembly. (See procedure 1.)13-2. Remove the ADA circuit board. (See procedure 10.)13-3. Remove the HA circuit board. (See procedure 11.)13-4. Remove the six (6) screws marked [190A]. The HA-
ADA angle, PN1 shield plate 1 and 2 can then beremoved. (Photo.17)
13-5. Remove the five (5) screws marked [80]. The LCDcircuit board can then be removed. (Photo.18)
13-6. Remove the two (2) screws marked [100] and thetwo (2) screws marked [190B]. The LCD shield platecan then be removed. (Photo.19)
13-7. Remove the four (4) screws marked [60]. The LCDcan then be removed. (Photo.20)
[210]: Bind Head Tapping Screw-B3.0X8 MFZN2BL (EP600190)
(B)Photo.15 (15)
Photo.16 (16)
13. LCD20
13-1. Ass'y113-2. ADA1013-3. HA1113-4. [190A]6HA-ADAPN1
121713-5. [80]5LCD
1813-6. [100]2[190B]2LCD
1913-7. [60]4
20
01V96
30
14. PN1 (1/2) and PN1 (2/2) Circuit Boards(Time required: About 17 minutes each)
14-1. Remove the encoder knob marked [450A] and thethree (3) encoder knobs marked [460] from thecontrol panel side. (Photo.21)
14-2. Fasten the control panel assembly. (See procedure 1.)14-3. Remove the ADA circuit board. (See procedure 10.)14-4. Remove the HA circuit board. (See procedure 11.)14-5. Remove the FD circuit board. (See procedure 12.)14-6. Remove the LCD shield plate. (See procedure 13-6.)14-7. PN1 (1/2) Circuit Board:
Remove the seven (7) screws marked [190C]. ThePN1 (1/2) circuit board can then be removed.(Photo.22)
14-8. PN1 (2/2) Circuit Board:Remove the three (3) screws marked [190D]. ThePN1 (2/2) circuit board can then be removed withthe encoder knob and the encoder angle bracket.(Photo.22)Remove the encoder knob and the hexagonal nut.The encoder angle bracket can then be removedfrom the PN1 (2/2) circuit board. (Photo.23)
15. PN2 Circuit Boards(Time required: About 4 minutes)
15-1. Remove the two (2) encoder knobs marked [450B]from the control panel side. (Photo.21)
15-2. Fasten the control panel assembly. (See procedure 1.)15-3. Remove the four (4) screws marked [190E]. The PN2
circuit board can then be removed. (Photo.24)
[60]: Bind Head Tapping Screw-B3.0X8 MFZN2BL (EP600190)
Photo.19 (19)
Photo.20 (20)
(B)[100]: Bind Head Tapping Screw-B3.0X8 MFZN2BL (EP600190)
[190B]: Bind Head Tapping Screw-B3.0X8 MFZN2BL (EP600190)
(B)
(B)
[100]
[190B]
[60]
[60]
LCD shield plateLCD
LCD
14. PN1 (1/2)PN1 (2/2)17
14-1. [450A]1[460]321
14-2. Ass'y114-3. ADA1014-4. HA1114-5. FD1214-6. LCD13-614-7. PN1 (1/2):
[190C]7PN1 (1/2)22
14-8. PN1 (2/2):[190D]3PN1 (2/2)22PN1 (2/2)23
15. PN2415-1. [450B]
22115-2. Ass'y115-3. [190E]4PN2
24
31
01V96
Photo.21 (21)
[190D]
[190D]
[190C]
[190C]
Hexagonal nut
Encoder angle bracket
Encoder knob
PN1
PN1 (2/2)
PN2
(1/2)(1/2)
[190E]
[190E]
PN2
[190]: Bind Head Tapping Screw-B3.0X8 MFZN2BL (EP600190)
Photo.22 (22)
(B)
[190E]: Bind Head Tapping Screw-B3.0X8 MFZN2BL (EP600190)
Photo.24 (24)
(B)
Photo.23 (23)
[460]: Encoder knob
[450A]: Encoder knob
[450B]: Encoder knob
01V96
32
INSTALLING AN OPTIONAL CARD
mini YGDAI
1 01V96 2
3
4
Follow the steps below to install an optional mini-YGDAIcard.
1 Make sure that the power to the 01V96 is turned off.2 Undo the two fixing screws and remove the slot
cover, as shown below.Keep the cover and fixing screws in a safe place forfuture use.
3 Insert the card between the guide rails and slide itall the way into the slot, as shown below.You may have to push firmly to fully insert the card intothe internal connector.
4 Secure the card using the attached thumbscrews.Tighten the screws firmly to secure the card. Otherwise,the card may not be grounded cor-rectly.
33
01V96
LSI PIN DESCRIPTION
M37641M8-141FP (X2485200) CPU (USB 32K) .......................................................................... 33HD6417709SF133 (X2081A00) CPU (SH-3) ................................................................................. 34YSS910-S (XV988A00) DSP6 (Digital Signal Processor) ........................................................... 35YSS919B-H (XZ693B00) DSP7 (Digital Signal Processor) ......................................................... 36SGH603064F-62F (XV973A00) Gate Array .................................................................................. 37YM3436DK (XG948E00) DIR2 (Digital Format Interface Receiver) ........................................... 37MBCG61594-130 (X3299A00) ATSC2A ....................................................................................... 38CS8415A-CS (X2089A00) DIR (Digital Audio Interface Receiver) ............................................. 39S1D13704F00A100 (X3498A00) LCDC (LCD Controller) ............................................................ 39CS8405A-CS (XZ349A00) DIT (Digital Audio Interface Transmitter) ........................................ 40AK4393-VF-E2 (XW029A00) DAC (Digital to Analog Converter) .............................................. 40CS5361-KS (X3447A00) ADC (Analog to Digital Converter) ..................................................... 40
ADA: IC002PINNO. I/O FUNCTIONNAME
PINNO. I/O FUNCTIONNAME
12345678910111213141516171819202122232425262728293031323334353637383940
P61/DQ1P60/DQ0P57//W/(R//W)P56//R(E)
P55/A0P54//S0
P53//IBF0P52/OBF0CNVSS/VPP/RESET
P51/TOUT/XCOUTP50/XCIN
VSSXIN
XOUTVCC
AVCCLPFAVSS
P44/CNTR1P43/CNTR0P42/INT1P41/INT0P40//EDMAP87//RTS1P86//CTS1P85/URXD1P84/UTXD1P83//RTS2/STXDP82//CTS2/SRXDP81/URXD2/SCLKP80/UTXD2//SRDYP37//RDP36//WRP35/SYNCOUTP34/OUTP33/DMAOUT
P32P31
P30/RDY
I/OI/OI/OI/OI/OI/OI/OI/OII
I/OI/O
IO
O
I/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/O
Port 6
Port 5
Chip operation modeReset inputPort 5GroundQuartz crystal inputQuartz crystal outputPower supply +5VAnalog power supply +5VLoop filter for synthesizerAnalog ground
Port 4
Port 8
Port 3
41424344454647484950515253545556575859606162636465666768697071727374757677787980
P17/AB15P16/AB14P15/AB13P14/AB12P13/AB11P12/AB10P11/AB9P10/AB8P07/AB7P06/AB6P05/AB5P04/AB4P03/AB3P02/AB2P01/AB1P00/AB0P27/DB7P26/DB6P25/DB5P24/DB4P23/DB3P22/DB2P21/DB1P20/DB0
P74/OBF1P73//IBF1//HLDAP72//S1
P71//HOLDP70//SOFUSB D+USB D-Ext. Cap
VSSVCC
P67/DQ7P66/DQ6P65/DQ5P64/DQ4P63/DQ3P62/DQ2
I/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/O
I/OI/OI/OI/OI/OI/O
Port 1
Port 0
Port 2
Port 7
USB +voltage line interfaceUSB -voltage line interfacePower supply +3.3VGroundPower supply +5V
Port 6
M37641M8-141FP (X2485200) CPU (USB 32K)
LSI
01V96
34
PINNO. I/O FUNCTIONNAME
PINNO. I/O FUNCTIONNAME
123456789
101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899
100101102103104
MD1MD2
Vcc(RTC)XTAL2
EXTAL2Vss(RTC)
NMIIRQ0/IRL0/PTH0IRQ1/IRL1/PTH1IRQ2/IRL2/PTH2IRQ3/IRL3/PTH3IRQ4/PTH4D31/PTB7D30/PTB6D29/PTB5D28/PTB4D27/PTB3D26/PTB2
VssQD25/PTB1
VccQD24/PTB0D23/PTA7D22/PTA6D21/PTA5D20/PTA4
VssD19/PTA3
VccD18/PTA2D17/PTA1D16/PTA0
VssQD15
VccQD14D13D12D11D10D9D8D7D6
VssQD5
VccQD4D3D2D1D0A0A1A2A3
VssQA4
VccQA5A6A7A8A9
A10A11A12A13
VssQA14
VccQA15A16A17A18A19A20A21VssA22VccA23
VssQA24
VccQA25
BS/PTK4RD
WE0/DQMLLWE1/DQMLU/WE
WE2/DQMUL/ICIORD/PTK6WE3/DQMUU/ISIOWR/PTK7
RD/WRAUDSYNC/PTE7
VssQCS0/MCS0
VccQCS2/PTK0CS3/PTK1CS4/PTK2
CS5/CE1A/PTK3CS6/CE1B
CE2A/PTE4CE2B/PTE5
II-
OI-
IIIIII
I/OI/OI/OI/OI/OI/O-
I/O-
I/OI/OI/OI/OI/O-
I/O-
I/OI/OI/O-
I/O-
I/OI/OI/OI/OI/OI/OI/OI/OI/O-
I/O-
I/OI/OI/OI/OI/OOOOO-
O-
OOOOOOOOO-
O-
OOOOOOO-
O-
O-
O-
OI/OOOO
I/OI/OO
I/O-
O-
I/OI/OI/OI/OO
I/OI/O
Mode controlPower supply +1.8 VCrystal oscillatorGroundNon-maskable interrupt request
Interrupt request / Port H
Data bus / Port B
GroundData bus / Port BPower supply +3.3 VData bus / Port B
Data bus / Port A
GroundData bus / Port APower supply +1.8 V
Data bus / Port A
GroundData busPower supply +3.3 V
Data bus
GroundData busPower supply +3.3 V
Data bus
Address bus
GroundAddress busPower supply +3.3 V
Address bus
GroundAddress busPower supply +3.3 V
Address bus
GroundAddress busPower supply +1.8 VAddress busGroundAddress busPower supply +3.3 VAddress busBus cycle / Port KRead strobeSelect signal (D7-D0) / D QM (SDRAM)Select signal (D15-D8) / D QM (SDRAM) / Write enableSelect signal (D23-D16) / D QM (SDRAM) / I/O read / Port KSelect signal (D31-D24) / D QM (SDRAM) / I/O write / Port KRead / WriteAUD cycle / Port EGroundChip select / Mask ROM chip selectPower supply +3.3V
Chip select / Port K
Chip select / Chip enable / Port KChip select / Chip enableChip enable / Port E
105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208
CKE/PTK5RAS3L/PTJ0
PTJ1CASL/PTJ2
VssQCASU/PTJ3
VccQPTJ4PTJ5
DACK0/PTD5DACK1/PTD7
PTE6PTE3
RAS3U/PTE2PTE1
TDO/PTE0BACKBREQWAIT
RESETMADTRG/PTH5IOIS16/PTG7ASEMD0/PTG6ASEBRKAK/PTG5PTG4/CKIO2AUDATA3/PTG3AUDATA2/PTG2
VssAUDATA1/PTG1
VccAUDATA0/PTG0TRST/PTF7/PINT15TMS/PTF6/PINT14TDI/PTF5/PINT13TCK/PTF4/PINT12IRLS3/PTF3/PINT11IRL2/PTF2/PINT10IRLS1/PTF1/PINT9IRLS0/PTF0/PINT8
MD0Vcc(PLL1)
CAP1Vss(PLL1)Vss(PLL2)
CAP2VCC(PLL2)AUDCK/PTH6
VssVssVcc
XTAL1EXTAL1
STATUS0/PTJ6STATUS1/PTJ7TCLK/PTH7
/IRQOUTVssQCKIOVccQ
TXD0/SCPT0SCK0/SCPT1TXD1/SCPT2SCK1/SCPT3TXD2/SCPT4SCK2/SCPT5RTS2/SCPT6RXD0/SCPT0RXD1/SCPT2
VssRXD2/SCPT4
VccCTS2/IRQ5/SCPT7
MCS7/PTC7/PINT7MCS6/PTC6/PINT6MCS5/PTC5/PINT5MCS4/PTC4/PINT4
VssQWAKEUP/PTD3
VccQRESETOUT/PTD2MCS3/PTC3/PINT3MCS2/PTC2/PINT2MCS1/PTC1/PINT1MCS0/PTC0/PINT0DRAK0/PTD1DRAK1/PTD0DREQ0/PTD4DREQ1/PTD6
RESETPCA
MD3MD4MD5AVss
AN0/PTL0AN1/PTL1AN2/PTL2AN3/PTL3AN4/PTL4AN5/PTL5
AVccAN6/DA1/PTL6AN7/DA0/PTL7
AVss
I/OI/OI/OI/O-
I/O-
I/OI/OI/OI/OI/OI/OI/OI/OI/OOIIIIII
I/OI/OI/OI/O-
I/O-
I/OIIIIIIIII-
-
-
-
-
-
I-
-
-
OI
I/OI/OI/OO-
I/O-
OI/OO
I/OO
I/OI/OII-
I-
II/OI/OI/OI/O-
I/O-
I/OI/OI/OI/OI/OI/OI/OIIIIIII-
IIIIII-
I/OI/O-
CK enable / Port KRAS address bus / Port JPort JCAS address bus / Port JGroundCAS address bus / Port JPower supply +3.3 VPort J
DMA acknowledge / Port D
Port ERAS address bus / Port EPort ETest data / Port EBus acknowledgeBus requestHardware wait requestManual reset Analog trigger / Port HWrite protect / Port GASE mode / Port GASE break acknowledge / Port GPort G / Clock outputAUD data / Port GGroundAUD data / Port GPower supply +1.8 VAUD data / Port GTest reset / Port F / Port interruptionTest mode switch / Port F / Port interruptionTest data / Port F / Port interruptionTest clock / Port F / Port interruption
Interrupt request / Port F / Port interruption
Mode controlPower supply +1.8 VCapacitorGroundGroundCapacitorPower supply +1.8 VAUD clock / Port HGroundPower supply +1.8 VCrystal oscillator
Processor status / Port JTimer clock / Port HInterrupt request outputGroundSystem clock input / outputPower supply +3.3 VData transmission / SCI portSerial clock / SCI portData transmission / SCI portSerial clock / SCI portData transmission / SCI portSerial clock / SCI portTransmit request / SCI portData reception / SCI portGroundData reception / SCI portPower supply +1.8 VTransmit clear / Interrupt request / SCI port
Mask ROM chip select / Port C / Port interruption
GroundStandby mode Interrupt request output / Port DPower supply +3.3 VReset output / Port D
Mask ROM chip select / Port C / Port interruption
DMA acknowledge / Port D
DMA request / Port DPower on resetChip active
Mode control
Analog ground
Analog input / Port L
Analog power supply +3.3 VAnalog input / Analog output / Port LAnalog ground
HD6417709SF133 (X2081A00) CPU (SH3) MAIN: IC001
35
01V96
PINNO. I/O FUNCTIONNAME
PINNO. I/O FUNCTIONNAME
123456789
10111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788
VddVssXIXO
Vdd5/SYNCI/SYNCO
Vdd5CKICKO
CKSELVss
MCKS/SSYNC
/IC/TESTBTYP/IRQTRIGVdd5Vss/CS/WR/RDCA7CA6CA5CA4CA3CA2CA1VssVdd
CD15CD14CD13CD12CD11CD10CD09CD08CD07CD06VssVdd
Vdd5CD05CD04CD03CD02CD01CD00/WAITVssSI0SI1SI2SI3SI4SI5SI6SI7Vss
Vdd5SO0SO1SO2SO3SO4SO5SO6SO7Vss
DB00DB01DB02DB03DB04DB05DB06DB07DB08DB09DB10DB11DB12Vdd5Vdd
IO
IO
IOI
IIIIIOI/O
III
I/OI/OI/OI/OI/OI/OI/O
I/OI/OI/OI/OI/OI/OI/OI/OI/OI/O
I/OI/OI/OI/OI/OI/OO
IIIIIIII
OOOOOOOO
I/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/O
Power supply (3.3 V)GroundSystem master clock input (60 MHz or 30 MHz)System master clock output (High or 30 MHz)Power supply (5 V)Sync. signal inputSync. signal outputPower supply (5 V)System clock input (30 MHz)System clock output (30 MHz)System master clock select (0: 60 MHz, 1: 30 MHz)GroundSerial I/O master clock input (128 x Fs)Serial I/O Sync. signal outputInitial clear (RESET)Test mode setting (0: Test, 1: Normal)Data bus type select (0: 8 bit, 1: 16 bit)IRQ outputTrigger signal input/outputPower supply (5 V)Groundchip select signal inputWrite signal inputRead signal input
Address bus of internal register
GroundPower supply (3.3 V)
Data bus of internal register
GroundPower supply (3.3 V)Power supply (5 V)
Data bus of internal register
WAIT outputGround
Serial data input
GroundPower supply (5 V)
Serial data output
Ground
Parallel data bus
Power supply (5 V)Power supply (3.3 V)
8990919293949596979899
100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176
VssDB13DB14DB15DB16DB17DB18DB19DB20DB21DB22VssVdd
DB23DB24DB25DB26DB27DB28DB29DB30DB31
TIMO/DBOBVss
Vdd5DA00DA01DA02DA03DA04DA05DA06DA07Vss
DA08DA09DA10DA11DA12DA13DA14DA15VssVdd(n.c)Vdd5DA16DA17DA18DA19DA20DA21DA22DA23Vss
DA24DA25DA26DA27DA28DA29DA30DA31Vdd5VssA00A01A02A03A04A05A06A07A08A09VssVddA10A11A12A13A14
A15/RASA16/CASA17/CE
/WE/OE
Vdd5
I/OI/OI/OI/OI/OI/OI/OI/OI/OI/O
I/OI/OI/OI/OI/OI/OI/OI/OI/OI/O
I/OI/OI/OI/OI/OI/OI/OI/O
I/OI/OI/OI/OI/OI/OI/OI/O
I/OI/OI/OI/OI/OI/OI/OI/O
I/OI/OI/OI/OI/OI/OI/OI/O
OOOOOOOOOO
OOOOOOOOOO
Ground
Parallel data bus
GroundPower supply (3.3 V)
Parallel data bus
Timing signal output/ Parallel data bus output/ inputGroundPower supply (5 V)
Memory data bus
Ground
Memory data bus
GroundPower supply (3.3 V)Not usedPower supply (5 V)
Memory data bus
Ground
Memory data bus
Power supply (5 V)Ground
Memory address (SRAM, PSRAM, DRAM)
GroundPower supply (3.3 V)Memory address (SRAM, PSRAM, DRAM)
Memory address (SRAM, PSRAM)Memory address (SRAM, PSRAM), /RAS (DRAM)Memory address (SRAM, PSRAM), /CAS (DRAM)Memory address (SRAM), /CE (PSRAM)Memory write enable signalMemory output enable signalPower supply (5 V)
YSS910-S (XV988A00) DSP6 (Digital Signal Processor) MAIN: IC301, 302
01V96
36
PINNO. I/O FUNCTIONNAME
PINNO. I/O FUNCTIONNAME
123456789
101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899
100101102103104
PLLEN/TEST
AVddVssVdd/IC
/MUTE/SSYNCMCKS
XIBTYP/CS/WR/RDCA7CA6CA5CA4CA3CA2VssVdd
CD31/CA1CD30CD29CD28CD27CD26CD25CD24VddVss
CD23CD22CD21CD20CD19CD18CD17CD16VssVdd
CD15CD14CD13CD12CD11CD10CD09CD08Vss
CD07CD06CD05CD04CD03CD02CD01CD00/WAITVddVssVdd
SIO00SIO01SIO02SIO03SIO04SIO05SIO06SIO07
SIO08SIO09SIO10SIO11SIO12SIO13SIO14SIO15
SIO16SIO17SIO18SIO19SIO20SIO21SIO22SIO23
SIO24SIO25SIO26SIO27SIO28SIO29SIO30SIO31
Vss
VssVdd
Vss
Vss
Vdd
Vdd
II
I
Analog ground
Power supply (3.3 V)
105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208
SIO32SIO33SIO34SIO35SIO36SIO37SIO38SIO39
SIO40SIO41SIO42SIO43SIO44SIO45SIO46SIO47
SIO48SIO49SIO50SIO51SIO52SIO53SIO54SIO55
SIO56SIO57SIO58SIO59SIO60SIO61SIO62SIO63
VssVdd
VssVdd
Vss
Vss
VssVdd
VssVdd
VddVss
/WE/CASSDCKCKE/RASVddVssBA1BA0A12A11A10A09A08
A07A06A05A04A03A02A01A00
VssVdd
Vss
YSS919B-H (XZ693A00) DSP7 (Digital Signal Processor)
AVssCPO
VddDA00DA01DA02DA03DA04DA05DA06DA07Vss
DA08DA09DA10DA11DA12DA13DA14DA15
DA16DA17DA18DA19DA20DA21DA22DA23
DA24DA25DA26DA27DA28DA29DA30DA31
Vdd
Test mode setting (0: TEST, 1: Normal)PLL enable input (0: PLL unuse, 1: PLL use)
PLL filter
Initial clear
Power supply (2.5 V)Ground
I Mute control (0: SIO mute, 1: SIO normal in-out)Serial I/O Sync. signal inputSerial I/O master clock input (128 x Fs)System master clock input (60 MHz or 15 MHz)Data bus type select (0: 16 bits, 1: 32 bits)Chip selectWrite enable inputRead enable input
CPU data bus / CPU address bus
CPU data bus
Wait output
I/O
Power supply (2.5 V)Ground
Memory write enable signalColumn address strobe
O Clock (SDRAM)O CKE (SDRAM)
Row address strobe
OO
Power supply (3.3 V)Ground
Ground
Power supply (2.5 V)Power supply (3.3 V)Ground
Ground
GroundPower supply (3.3 V)
Power supply (2.5 V)Ground
Power supply (3.3 V)Ground
Power supply (2.5 V)Ground
Power supply (3.3 V)Ground
Ground
GroundPower supply (3.3 V)
GroundPower supply (2.5 V)
GroundPower supply (3.3 V)
Ground
GroundPower supply (2.5 V)Power supply (3.3 V)
Ground
GroundPower supply (3.3 V)
Power supply (2.5 V)Ground
GroundPower supply (3.3 V)
I
I
I
IIIIIII
I/OI/OI/OI/OI/OI/OI/OI/O
I/OI/OI/OI/OI/OI/OI/OI/O
I/OI/OI/OI/OI/OI/OI/OI/O
I/OI/OI/OI/OI/OI/OI/OI/OO
I
CPU address bus
I/OI/OI/OI/OI/OI/OI/OI/O
I/OI/OI/OI/OI/OI/OI/OI/O
I/O
I/OI/O
I/OI/O
I/O
I/OI/OI/OI/OI/OI/OI/OI/O
I/OI/O
CPU data bus
CPU data bus
CPU data bus
Serial data bus
Serial data bus
Serial data bus
Serial data bus
Serial data bus
I/OI/OI/OI/OI/OI/OI/O
I/OI/OI/OI/OI/OI/OI/OI/O
I/O
I/O
I/OI/OI/OI/O
I/OI/O
I/OI/OI/OI/OI/OI/OI/OI/O
I/OI/OI/OI/OI/OI/OI/OI/O
I/OI/OI/OI/OI/O
I/O
I/OI/O
I/OI/OI/OI/OI/OI/OI/OI/O
I/OI/OI/OI/OI/OI/OI/OI/O
OO
I
O
OOOOO
OOOOOOOO
I
Serial data bus
Serial data bus
Serial data bus
Memory data bus
Memory data bus
Memory data bus
Memory data bus
Memory address (SDRAM, DRAM)
Memory address (SDRAM, DRAM)
Bank select (SDRAM)
MAIN: IC201-204
37
01V96
PINNO. I/O FUNCTIONNAME
PINNO. I/O FUNCTIONNAME
123456789
1011121314151617181920212223242526272829303132
RA1RB1RA2RB2VSSRA3RB3RA4RB4VSSRA5RB5RA6RB6VSSRA7RB7RA8RB8A0A1A2VSSRDNCSNVDDASNA3NSELNCNCNC
IIII
IIII
IIII
IIIIIII
II
III
Encoder input
Ground
Encoder input
Ground
Encoder input
Ground
Encoder input
Address bus
GroundReadChip selectPower supply +5VAddress strobeAddress busBus select
Not used
3334353637383940414243444546474849505152535455565758596061626364
D0D1VSSD2D3VSSD4D5VSSD6D7VSSNCNCRA9RB9
RA10RB10RA11RB11RA12RB12RA13RB13RA14VDD
RB14RA15RB15RA16RB16VSS
OO
OO
OO
OO
IIIIIIIIIII
IIIII
Data busGroundData busGroundData busGroundData busGroundNot used
Encoder input
Power supply +5V
Encoder input
Ground
SGH603064F-62F (XV973A00) Gate Array MAIN: IC712
PINNO. I/O FUNCTIONNAME
PINNO. I/O FUNCTIONNAME
123456789
1011
12
1314
1516171819
20
21
22
DAUXHDLTDOUTVFLOPT
SYNCMCCWCMCBMCASKSY
XI
XOP256
LOCKVssTC
DIM1DIM0
DOM1
DOM0
KM1
IOOOOOOOOOI
I
OO
O
OII
I
I
I
Auxiliary input for audio dataAsynchronous buffer operation flagAudio data outputParity flag outputFs x 1 Synchronous output signal for DACFs x 1 Synchronous output signal for DSPFs x 64 Bit clock outputFs x 1 Word clock outputFs x 128 Bit clock outputFs x 256 Bit clock outputClock synchronization control input
Crystal oscillator connection or external clock inputCrystal oscillator connectionVCO oscillating clock connection
PLL lock flagLogic section power (GND)PLL time constant switching outputData input mode selectionData input mode selection
Data output mode selection
Data output mode selection
Clock mode switching input 1
2324252627282930313233
34
3536
3738394041
42
43
44
RSTNVddaCTLNPCO(NC)CTLPVssaTSTNKM2KM0FS1
FS0
CSMEXTW
DDINLRVddERREMP
CD0
CCK
CLD
I
IO
I
IIIO
O
II
IO
OO
O
I
I
System reset inputVCO section power (+5V)VCO control input NPLL phase comparison output
VCO control input PVCO section power (GND)Test terminal. Open for normal useClock mode switching input 2Clock mode switching input 0Channel status sampling frequency display output 1Channel status sampling frequency display output 0Channel status output method selectionExternal synchronous auxiliary input word clockEIAJ (AES/EBU) data inputPLL word clock outputLogic section power (+5 V)Data error flag outputChannel status emphasis control code output3-wire type microcomputer interface dataoutput3-wire type microcomputer interface clock input3-wire type microcomputer interface load input
YM3436DK (XG948E00) DIR2 (Digital Format Interface Receiver) MAIN: IC144, 456
01V96
38
PINNO. I/O FUNCTIONNAME
PINNO. I/O FUNCTIONNAME
123456789
101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172
VDDXTSTVSS
WT_XRD_XCS_X
HS_SELRES_X
VSSADD[0]ADD[1]ADD[2]ADD[3]ADD[4]ADD[5]ADD[6]ADD[7]
VDDVSS
DAT[0]DAT[1]DAT[2]DAT[3]
VDDVSS
DAT[4]DAT[5]DAT[6]DAT[7]
VSSVDD
PA_I_H_MODE[0]PA_I_H_MODE[1]PA_I_H_MODE[2]PA_O_H_MODE[0]PA_O_H_MODE[1]PA_O_H_MODE[2]PA_SI0_ATIPA_SI1PA_SI2PA_SI3
PA_I_SW_SELPA_SYNC_WC_SIPA_FS256_SI
VSSPA_FS256_SOPA_SYNC_WC_SOPA_O_SW_SEL
VSSPA_SO0PA_SO1PA_SO2PA_SO3
VDDVSS
PA_CLK_ATIPA_H_M4_SELPA_O_MUTEPB_SI0PB_SI1PB_SI2PB_SI3
PB_I_SW_SELPB_SYNC_WC_SIPB_FS256_SI
VSSPB_FS256_SOPB_SYNC_WC_SOPB_O_SW_SELPB_I_H_MODE[0]PB_I_H_MODE[1]PB_I_H_MODE[2]
I
IIIII
IIIIIIII
I/OI/OI/OI/O
I/OI/OI/OI/O
IIIIIIIIIIIII
III
OOOO
IIIIIIIIII
IIIIII
Power supply +3.3VLSI test pinGroundCPU interface write inputCPU interface read inputCPU interface chip select inputChip active selectSystem reset inputGround
CPU interface address bus
Power supply +3.3VGround
CPU interface data bus
Power supply +3.3VGround
CPU interface data bus
GroundPower supply +3.3V
Port A audio data input mode select
Port A audio data output mode select
Port A audio data input
Port A audio data input sync/wc selectPort A audio data input sync/wc inputPort A audio data input bit clock input (256fs)GroundPort A audio data output bit clock input (256fs)Port A audio data output sync/wc inputPort A audio data output sync/wc selectGround
Port A audio data output
Power supply +3.3VGroundPort A ADAT clock inputPort A audio data input buffer active selectPort A mute
Port B audio data input
Port B audio data input sync/wc selectPort B audio data input sync/wc inputPort B audio data input bit clock input (256fs)GroundPort B audio data output bit clock input (256fs)Port B audio data output sync/wc inputPort B audio data output sync/wc select
Port B audio data input mode select
737475767778798081828384858687888990919293949596979899
100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144
VDDPB_H_M4_SELPB_O_MUTE
VSSPB_SO0_ATOPB_SO1PB_SO2PB_SO3
VSSPB_O_H_MODE[0]PB_O_H_MODE[1]PB_O_H_MODE[2]PC_I_H_MODE[0]PC_I_H_MODE[1]PC_I_H_MODE[2]PC_H_M4_SELPC_SI0_ATI
VDDVSS
PC_SI1PC_SI2PC_SI3
PC_I_SW_SELPC_SYNC_WC_SIPC_FS256_SI
VSSPC_FS256_SOPC_SYNC_WC_SOPC_O_SW_SEL
VSSPC_SO0PC_SO1PC_SO2PC_SO3
VSSPC_O_MUTEPC_O_H_MODE[0]PC_O_H_MODE[1]PC_O_H_MODE[2]PC_CLK_ATI
VSSPD_I_H_MODE[0]PD_I_H_MODE[1]PD_I_H_MODE[2]
VSSPD_H_M4_SELPD_SI0PD_SI1PD_SI2PD_SI3
PD_I_SW_SELPD_SYNC_WC_SIPD_FS256_SI
VDDVSS
PD_FS256_SOPD_SYNC_WC_SOPD_O_SW_SEL
VSSPD_SO0_ATOPD_SO1PD_SO2PD_SO3
VSSPD_O_MUTE
VSSPD_O_H_MODE[0]PD_O_H_MODE[1]PD_O_H_MODE[2]
XSMPA_WC_ATIPC_WC_ATI
II
OOOO
IIIIIIII
IIIIII
III
OOOO
IIIII
III
IIIIIIII
III
OOOO
I
IIIIOO
Power supply +3.3VPort B audio data input buffer active selectPort B muteGround
Port B audio data output
Ground
Port B audio data output mode select
Port C audio data input mode select
Port C audio data input buffer active selectPort C audio data inputPower supply +3.3VGround
Port C audio data input
Port C audio data input sync/wc selectPort C audio data input sync/wc inputPort C audio data input bit clock input (256fs)GroundPort C audio data output bit clock input (256fs)Port C audio data output sync/wc inputPort C audio data output sync/wc selectGround
Port C audio data output
GroundPort C mute
Port C audio data output mode select
Port C ADAT clock inputGround
Port D audio data input mode select
GroundPort D audio data input buffer active select
Port D audio data input
Port D audio data input sync/wc selectPort D audio data input sync/wc inputPort D audio data input bit clock input (256fs)Power supply +3.3VGroundPort D audio data output bit clock input (256fs)Port D audio data output sync/wc inputPort D audio data output sync/wc selectGround
Port D audio data output
GroundPort D muteGround
Port D audio data output mode select
LSI test pinPort A ADAT word clock outputPort C ADAT word clock output
MBCG61594-130 (X3299A00) ATSC2A MAIN: IC401, 457
39
01V96
PINNO. I/O FUNCTIONNAME
PINNO. I/O FUNCTIONNAME
123456789
1011121314
CDOUT/CS
/EMPHRXP0RXN0VA+
AGNDFILT/RST
RMCKRERRRXP1RXP2RXP3
OIOII
OOI/OOIII
Data out (SPI)Control port chip select (SPI)Pre-emphasisAES3/SPDIF receiver portPositive analog power supply +5VAnalog groundPLL loop filterResetInput section recovered master clockReceiver error
Additional AES3/SPDIF receiver port
1516171819202122232425262728
RXP4OSCLKOLRCKSDOUT
INTU
OMCKDGND
VL+H//S
RXP5RXP6CDINCCLK
II/OI/OOOOI
IIIII
Additional AES3/SPDIF receiver portSerial audio output bit clockSerial audio output left/right clockSerial audio output dataInterruptUser dataSystem clockDigital groundPositive logic power supply +5VHardware/software mode controlAdditional AES3/SPDIF receiver portSerial control data in (SPI)Control port clock
CS8415A-CS (X2089A00) DIR (Digital Audio Interface Receiver) MAIN: IC501
PINNO. I/O FUNCTIONNAME
PINNO. I/O FUNCTIONNAME
123456789
10111213141516171819202122232425262728293031323334353637383940
COREVDD/WAITDB15DB14DB13DB12DB11DB10DB9
IOVDDDB8DB7DB6DB5DB4DB3DB2DB1DB0VSS
COREVDDGPIO0
FPDAT11FPDAT10FPDAT9FPDAT8
VSSFPSHIFT
IOVDDFPDAT7FPDAT6FPDAT5FPDAT4FPDAT3FPDAT2FPDAT1FPDAT0FPLINEFPFRAME
VSS
OI/OI/OI/OI/OI/OI/OI/O
I/OI/OI/OI/OI/OI/OI/OI/OI/O
I/OOOOO
O
OOOOOOOOOO
Power supply +3.3VWait signal
Data bus
Power supply +3.3V
Data bus
GroundPower supply +3.3VGeneral purpose input/output
Panel data
GroundShift clockPower supply +3.3V
Panel data
Line pulseFrame pulseGround
41424344454647484950515253545556575859606162636465666768697071727374757677787980
COREVDDDRDY
LCDPWRTESTEN
CNF4CNF3CNF2CNF1CNF0VSS
CLKIIOVDDAB15AB14AB13AB12AB11AB10AB9VSS
COREVDDAB8AB7AB6AB5AB4AB3AB2AB1AB0
BCLKVSS
/RESET/CS/BS/RD
/WE0/WE1
RD//WRVSS
OOIIIIII
I
IIIIIII
IIIIIIIIII
IIIIIII
Power supply +3.3VTFT/D-TFD display enableLCD power controlTest enable input
Configure the S1D13704
GroundInput clockPower supply +3.3V
Address bus
GroundPower supply +3.3V
Address bus
System bus clockGroundResetChip select signalBus start signalRead signalWrite enable signal for the lower data byteWrite enable signal for the upper data byteRead/write signalGround
S1D13704F00A100 (X3498A00) LCDC (LCD Controller) MAIN: IC019
01V96
40
PINNO. I/O FUNCTIONNAME
PINNO. I/O FUNCTIONNAME
123456789
1011121314
SDA/CDOUTAD0//CS
AD2RXP
DGND2VD2+
DGND4DGND3
/RSTNC1NC2
ILRCKISCLKSDIN
I/OI/OII
I
I/OI/OI
Serial control data I/O (I2C) / Data out (SPI)Address bit 0 (I2C) / Control port chip select (SPI)Address bit 2 (I2C)Auxiliary AES3 Receiver portDigital groundPositive digital power supply (+5V)Digital groundResetNot usedSerial audio input left/right clockSerial audio bit clockSerial audio data port
1516171819202122232425262728
TCBLNC3NC4NC5INTU
OMCKDGNDVD+H//STXNTXP
AD1/CDINSCL/CCLK
I/O
OI/OI
IOOII
Transmit channel status block start
Not used
InterruptUser dataMaster clockDigital groundPositive digital power supply (+5V)Hardware/software control mode selectDifferential line driversAddress bit 1 (I2C) / Serial control data in (SPI)Control port clock
CS8405A-CS (XZ349A00) DIT (Digital Audio Interface Transmitter) MAIN: IC504
PINNO. I/O FUNCTIONNAME
PINNO. I/O FUNCTIONNAME
123456789
1011121314
DVSSDVDDMCLK/PD
BICKSDATALRCK
SMUTE//CSDFS
DEM0/CCLKDEM1/CDTI
DIF0DIF1DIF2
-
-
IIIIIIIIIIII
Digital groundDigital power supplyMaster clockPower down modeAudio serial data clockAudio serial data inputL/R clockSoft muteDouble speed sampling modeDe-emphasis enable
Digital input format
1516171819202122232425262728
BVSSVREFLVREFHAVDDAVSS
AOUTR-AOUTR+AOUTL-AOUTL+VCOMP//S
CKS0CKS1CKS2
-
II-
-
OOOOOIIII
Substrate groundLow level voltage referenceHigh level voltage referenceAnalog power supply +5 VAnalog groundRch negative analog outputRch positive analog outputLch negative analog outputLch positive analog outputCommon voltage outputParallel/serial select
Master clock select
AK4393-VS-E2 (XW029A00) DAC (Digital to Analog Converter) ADA: IC151, 251, 351, 451
PINNO. I/O FUNCTIONNAME
PINNO. I/O FUNCTIONNAME
123456789
101112
/RSTM//S
LRCKSCLKMCLK
VDGNDVL
SDOUTDIV
/HPFDIF
II
I/OI/OI
OIII
ResetMaster/slave modeLeft right clockSerial clockMaster clockDigital power supply +5VGroundLogic power supply +3.3VSerial audio data outputDividerHigh pass filter enableDigital input format
131415161718192021222324
M0M1TST
AINL+AINL-GNDVA
AINR-AINR+VCOM
REFGNDFILT+
IIIII
IIO
O
Mode selectionTestDifferential left channel analog inputGroundAnalog power supply +5VDifferential right channel analog inputCommon voltageReference groundPositive voltage reference
CS5361-KS (X3447A00) ADC (Analog to Digital Converter) ADA: IC103, 303, 503, 703, 903, B03, D03, F03
41
01V96
IC BLOCK DIAGRAM
TC74VHC00F (XT229A00)MAIN: IC138Quad 2 Input NAND
74VHC04SJX (XY871A00)MAIN: IC131, 453SN74HCU04NSR (XW842A00)ADA: IC007Hex Inverter
74VHC08SJX (XY872A00)MAIN: IC014, 015, 503Quad 2 Input AND
TC74VHC14F-EL (XW876A00)ADA: IC005Hex Inverter
TC74VHC74F-EL (XW875A00)MAIN: IC024, 307, 455Dual D-Type Flip-Flop
HD74HC123AP (IR012310)DCA: IC350Dual Retriggerable Signale Shot
74VHC138SJX (XY873A00)MAIN: IC707, 708, 7143 to 8 Demultiplexer
1
2
3
1A
1Y
42A
52B
62Y
7Vss
1B
14
13
12
VDD
4A
11 4Y
10 3B
9 3A
8 3Y
4B
1
2
3
1A
1Y
42A
52B
62Y
7VSS
1B
14
13
12
VDD
4A
11 4Y
10 3B
9 3A
8 3Y
4B1
2
3
4
5
6
7
1A
1Y
2A
2Y
3A
3Y
Vss
14
13
12
11
10
9
8
VDD
6A
6Y
5A
5Y
4A
4Y
1
2
3
4
5
6
7
1A
1Y
2A
2Y
3A
3Y
GND
14
13
12
11
10
9
8
VDD
6A
6Y
5A
5Y
4A
4Y
INPUTS OUTPUTSPR CLR CLK D Q Q
LHHLHQ O
HLHHLQ O
XXXHLX
XXXffL
HLLHHH
LHLHHH
1
2
3
4
5
6
7
1CLR
1D
1CK
1PR
1Q
1Q
GND
14
13
12
11
10
9
8
VCC
2CLR
CLR
2DD
2CKCK
2PRPR
2Q
2QQ
Q
CLR
D
CK
PR
Q
Q
1A
1B
1
1Q
2Q
2 Cext
2 Rext / Cext
GND
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
Vcc
1 Rext / Cext
Cext
1Q
2Q
CLR
2B
2A
CLR
Q Q
CLR
1
2
3
4
5
6
7
AA
Select
Enable
Output
Output
B B
C C
G2A G2A
G2BG2B
G1 G1
Y7 Y7 Y5
Y4
Y3
Y2
Y1
Y0
Y6
16
15
14
13
12
11
10
Vcc
YO
Y1
Y2
Y3
Y4
Y5
8GND 9 Y6
74VHC157SJX (XY870A00)MAIN: IC402, 403Quad 2 to 1 Multiplexer
1
2
3
4
5
6
7
SELECT
1A 1A
1B 1B
1Y 1Y
2A 2A
2B 2B
2Y 2Y
16
15
14
13
12
11
10
Vcc
STROBEG
4A
S3Y
4A
4B4B
4Y4Y
3A3A
3B3B
8GND 9 3Y
TC74VHC244F (XT800A00)ADA: IC006Octal 3-State Bus Buffer
1G
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
VDD (Vcc)
2G
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1(GND) Vss
IC
01V96
42
SN74HC273NSR (XH223A00)MAIN: IC701-706TC74VHC273F (EL) (XY254A00)FD: IC007-010Octal D-Type Flip-Flop
74VHC245SJX (XY874A00)ADA: IC951, 952MAIN: IC102-104, 106, 113-116, 132, 506, 507
SN74HC245NSR (XD838A00)FD: IC005, 006MAIN: IC709-711, 713
TC74VHC245F (XT487A00)ADA: IC001, 003
TC74VHCT245AF (XV242A00)MAIN: IC020, 109, 110, 140, 141, 508, 601 602, 716Octal 3-State Bus Transceiver
1
2
3
4
5
6
7
20
19
18
17
16
15
14
Vcc
G
B1
B2
B3
B4
B5
B6
B7
B8
8
9
10
12
11GND
A8
A7
A6
A5
A4
A3
A2
A1
D1R
13
CLEAR
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
VCC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLOCK
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
Q
D CKCL
D
Q
CKCL
Q
D CKCL
D
Q
CKCL
D
Q
CKCL
Q
DCKCL
D
Q
CKCL
Q
DCKCL
TC74VHC541F-EL (X3954A00)MAIN: IC117, 209, 505, 603Octal 3-State Buffer
1
2
3
4
5
6
7
20
19
18
17
16
15
14
Vcc
G2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
8
9
10
12
11GND
A8
A7
A6
A5
A4
A3
A2
A1
G1
13
SN74LV4052ANSR (IS405210)FD: IC003, 004Differential 4-channelMultiplexer/Demultiplexer
SN74LV4051ANSR(X3955A00)FD: IC011, 014, 017Single 8-channelMultiplexer/Demultiplexer
TC74LVX4245FS (XU229A00)MAIN: IC107, 108, 111, 112Dual Supply Octal Bus Transceiver
1Channel IN/OUT 4
2
3
4
5
6
7
8
- do. - 6
Control Inhibit
-DC Voltage Supply
- do -
VDD
CH2
CH1
CH0
CH3
A
B
C 9
10
11
12
13
14
15
16 +DC Voltage Supply
Channel IN/OUT 2
- do. - 1
- do - 3
Control Input A
- do. - B
- do. - C
CH4
CH6
COM
CH7
CH5
INH
VEE
VSS
Commons OUT/IN
Channel IN/OUT 7
- do. - 5
- do - 0
1
2
3
4
5
6
7
0Y
2Y
Y-COM
1Y
INH
VEE
VSS
3Y
16
15
14
13
12
11
VDD
2X
1X
X-COM
0X
3X
A
8 9
10
B
2Y
0Y
Y-COM
3Y
1Y
INH
B
2X
1X
X-COM
0X
3X
A
VCCA
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
GND
VCCB
VCCB
/G
B1
B2
B3
B4
B5
B6
B7
B8
GND
1
2
3
4
5
6
7
01
2
3
4
5
6
7
8
9
10 12
13
14
15
G1
G2
D
D
B
A
11
24
23
22
21
20
19
18
8
9
10
11
12
16
15
14
13
17 SN75121NSR (XU816A00)ADA: IC010Dual Line Driver
SN75124NSR (XV930A00)ADA: IC009Triple Line Receiver
Vcc
2F
2E
2A
2YGND
1Y
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
2C
2B
2D
1A
1B
1C
1D
1E
1F
1A
1B
2R
2S
2A
2B
2Y
GND
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
Vcc
1S
1R
1Y
3A
3S
3R
3Y
43
01V96
DS26C32ATMX (XU815A00)ADA: IC008Quad Differential Line Receiver
TC7WU04FU (XQ805A00)MAIN: IC459Triple Inverter
TC7WH08FU TE12L (XW948A00)MAIN: IC018, 021Dual 2 Input AND Gate
MC26LS30DR2 (XL334A00)ADA: IC011Line Driver
1
2
3
4
5
6
7
Vcc
Input A
Input B/Enable AB
GND
Input C/Enable CD
Input D
VEE
Mode
16
15
14
13
12
11
SR-A
Output A
Output B
SR-B
SR-C
Output C
Output D
8 9
10
SR-D
Input AEnable ABSR-A
Out A23
15
14Input A 2
1615
Input BSR-BOut B
Out AOut B
31314
Input CSR-COut C6
12
11
Input DSR-DOut D7
910
SINGLE-ENDED MODEEIA-423
DIFFERENTIAL MODEEIA-422
Enable CD
7 11
10Input D
6Out COut D
Vcc 1 Gnd 5Mode 4VEE 8
Inputs OutputsOperation Vcc Mode A B C D
X X X X
A B C D
Z Z Z Z
VEE00000011111
01X10101000
00100000100
01101X00001
00000100010
01Z10101000
10Z01000100
01101Z00001
10010Z00010
+5.0 GND
+5.0 -5.0
Differential(EIA-422-A)
Single-Ended(EIA-423-A)
X = Don't CareZ = High Impedance (Off)
X 0 X X
1
2
3
4
5
6
7
INPUT A
INPUT A
OUTPUT A
OUTPUT C
INPUT C
INPUT C
GND
ENABLE
16
15
14
13
12
11
Vcc
INPUT B
INPUT B
OUTPUT B
ENABLE
OUTPUT D
INPUT D
8 9
10
INPUT D
+
-
-
+
+
-
-
+
1
2
3
4
8
7
6
5
1A
2A
GND
Vcc
1Y
3A
2Y
3Y
1
2
3
4
8
7
6
5
1A
2Y
GND
Vcc
1Y
2B
2A
1B
TC7S04F (XM182A00)ADA: IC953Inverter Gate
1
2
3
5
4
NC
VSS
VDD
OUT
IN
TC7SH04FU (XS775A00)MAIN: IC101, 139, 502, 715Inverter Gate
1
2
3
5
4
NC
GND
VCC
OUT Y
IN A
TC7SH08FU (XR680A00)MAIN: IC013, 4522 Input AND Gate
1 5
2
3 4
IN B
GND
Vcc
OUT Y
IN A
01V96
44
TC7SH32FU (TE85L) (XW633A00)MAIN: IC016, 017
TC7SET32FU (XW814A00)MAIN: IC022, 451, 458Input OR Gate
1 5
2
3 4
IN B
GND
Vcc
OUT Y
IN A
CY2305 (XY937A00)MAIN: IC005Clock Buffer
NJM4556AL (XP844A00)ADA: IC155, 156HA: IC651Dual Operational Amplifier
NJM2360AM