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RRUS 01 2 log**************
[2015-01-13 08:04:21.248] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:324 INFO:tRuReportedDelayDl:298948 = tRuInternalDlDb:292940 + tDlFreqCompDelay:598 + tInternalBfnDelay:3661 + DpdDelay:1749[2015-01-13 08:04:21.252] trxCtrlDpdProc_0 dlDelayHandler.cc:106 INFO:gsm (dl filterBranch:2)tTrpToArp:30435[ns] = salCarrierReportedDelay:298948 + vldbSize_0_1ns/2:2590 + tAnpDl:0 + tTRpToRuInput:0 + tRicrTRpToRuInput:2730 + tExtBFNDelayDiff:80 + tFrameOffset:0.00,tFrameOffsetFrac:0.00[0.1ns],setBfnAdvancerAtFirstCarrier:0,setBfnAdvanceAtEveryCarrier:0
[2015-01-13 08:04:21.252] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:154 INFO:setTotalDelay set vldb to 260 ns[2015-01-13 08:04:21.332] trxCtrlDpdProc_0 dpdController.cc:327 INFO:Not a RUWAHardcopy device[2015-01-13 08:04:21.332] trxEvtProc eventHandler.cc:1003 INFO:Fault already subscribed for faultId=0x33,txId=0[2015-01-13 08:04:21.332] trxEvtProc eventHandler.cc:1003 INFO:Fault already sub
scribed for faultId=0x37,txId=0[2015-01-13 08:04:21.352] trxCtrlDpdProc_0 dpdController.cc:340 INFO:ConfigDatainformation isWarp: 0x1, isClassic 0x0[2015-01-13 08:04:21.352] trxCtrlDpdProc_0 dpdController.cc:2153 INFO:DGB main/peak swap inactive.[2015-01-13 08:04:21.356] trxCtrlDpdProc_0 dpdController.cc:2172 INFO:DAC main/peak swap inactive.[2015-01-13 08:04:21.356] trxCtrlDpdProc_0 dpdController.cc:357 INFO:dgbExist: NO, dgbEnable: NO
[2015-01-13 08:04:21.356] trDcProc vddComp.cc:208 INFO:VddComp:tempCompInit: getting "/pa/table/id6" from DB, powerClassIndex: 0, paIdInternal: 0[2015-01-13 08:04:21.564] trxCtrlDpdProc_0 dpdController.cc:2375 INFO:TX_SETUP:dev = 1, carrierFrequency = 955800, txLo: 955840, Status: dpd off, state OFF, deoff, ga on; dev: 1, txFreq: 0, state: OFF; dev: 2, txFreq: 0, state: OFF; dev: 3, txFreq: 0, state: OFF; dev: 4, txFreq: 0, state: OFF; dev: 5, txFreq: 0, state: OFF; dev: 6, txFreq: 0, state: OFF; dev: 7, txFreq: 0, state: OFF; dev: 8, txFreq: 0, state: OFF;
[2015-01-13 08:04:21.564] trxCtrlDpdProc_0 dpdController.cc:2391 INFO:Number of
configured carriers: tx: 0, rx: 0[2015-01-13 08:04:21.564] trxCtrlDpdProc_0 dpdController.cc:3601 INFO:1 carrierconfiguration, freqSetup: 955800
[2015-01-13 08:04:21.564] trxCtrlDpdProc_0 dpdController.cc:1605 INFO:boardFreq= 955840, mgnOffsetPeakDig = 0, dpdIqGiPeakOld = 0x7197C900, dpdIqGiPeakNew = 0x7197C900, dpdIqGqPeakOld = 0x72913B00, dpdIqGqPeakNew = 0x72913B00.
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[2015-01-13 08:04:21.564] trDcProc warpBasedDlFreqConfig.cc:35 INFO:updateTrxCtrlAtSetup antennaBranchId: 0, trxDeviceId: 1, txLoFreq: 955840 (result: true)[2015-01-13 08:04:21.568] trxCtrlDpdProc_0 dpdController.cc:2375 INFO:TX_SETUP:dev = 3, carrierFrequency = 955800, txLo: 955840, Status: dpd off, state OFF, deoff, ga on; dev: 1, txFreq: 955800, state: OFF; dev: 2, txFreq: 0, state: OFF; dev: 3, txFreq: 0, state: OFF; dev: 4, txFreq: 0,state: OFF; dev: 5, txFreq: 0, state: OFF; dev: 6, txFreq: 0, state: OFF; dev: 7, txFreq: 0, state: OFF; dev: 8, txFreq: 0, state:OFF;
[2015-01-13 08:04:21.568] trxCtrlDpdProc_0 dpdController.cc:2391 INFO:Number ofconfigured carriers: tx: 1, rx: 0[2015-01-13 08:04:21.568] trxCtrlDpdProc_0 dpdController.cc:3614 INFO:2 carrierconfiguration[2015-01-13 08:04:21.568] trxCtrlDpdProc_0 dpdDeviceSetHandler.cc:300 INFO:Tx frequencies: HiFreq = 955800, LoFreq = 955800[2015-01-13 08:04:21.568] trxCtrlDpdProc_0 dpdController.cc:4510 INFO:Setting upsecond carrier[2015-01-13 08:04:21.568] trxCtrlDpdProc_0 dpdController.cc:1605 INFO:boardFreq
= 955840, mgnOffsetPeakDig = 0, dpdIqGiPeakOld = 0x7197C900, dpdIqGiPeakNew = 0x7197C900, dpdIqGqPeakOld = 0x72913B00, dpdIqGqPeakNew = 0x72913B00.[2015-01-13 08:04:21.568] trDcProc warpBasedDlFreqConfig.cc:35 INFO:updateTrxCtrlAtSetup antennaBranchId: 0, trxDeviceId: 3, txLoFreq: 955840 (result: true)[2015-01-13 08:04:21.568] trxCtrlDpdProc_0 dpdController.cc:2375 INFO:TX_SETUP:dev = 5, carrierFrequency = 955800, txLo: 955840, Status: dpd off, state OFF, deoff, ga on; dev: 1, txFreq: 955800, state: OFF; dev: 2, txFreq: 0, state: OFF; dev: 3, txFreq: 955800, state: OFF; dev: 4, txFreq: 0, state: OFF; dev: 5, txFreq: 0, state: OFF; dev: 6, txFreq: 0, state: OFF; dev: 7, txFreq: 0, state: OFF; dev: 8, txFreq: 0, s
tate: OFF;
[2015-01-13 08:04:21.568] trxCtrlDpdProc_0 dpdController.cc:2391 INFO:Number ofconfigured carriers: tx: 2, rx: 0[2015-01-13 08:04:21.568] trxCtrlDpdProc_0 dpdController.cc:3614 INFO:3 carrierconfiguration[2015-01-13 08:04:21.568] trxCtrlDpdProc_0 dpdDeviceSetHandler.cc:300 INFO:Tx frequencies: HiFreq = 955800, LoFreq = 955800[2015-01-13 08:04:21.568] trxCtrlDpdProc_0 dpdController.cc:4510 INFO:Setting upsecond carrier
[2015-01-13 08:04:21.568] trxCtrlDpdProc_0 dpdController.cc:1605 INFO:boardFreq= 955840, mgnOffsetPeakDig = 0, dpdIqGiPeakOld = 0x7197C900, dpdIqGiPeakNew = 0x7197C900, dpdIqGqPeakOld = 0x72913B00, dpdIqGqPeakNew = 0x72913B00.[2015-01-13 08:04:21.568] trDcProc warpBasedDlFreqConfig.cc:35 INFO:updateTrxCtrlAtSetup antennaBranchId: 0, trxDeviceId: 5, txLoFreq: 955840 (result: true)[2015-01-13 08:04:21.572] trDcProc powerClassCtrl.cc:356 INFO:salPowerClassDbm o
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n branch 1 calculated to 4900 (closest actual 4900)[2015-01-13 08:04:21.572] trDcProc platformXDlDataInterface.cc:406 INFO:sampleFrequency 6 , radioAccessType 0 , samplesPerBasicFrame 1[2015-01-13 08:04:21.572] trDcProc platformXDlDataInterface.cc:410 INFO:currentIqPosition 0 , filterBranch 3[2015-01-13 08:04:21.572] trDcProc dlPwrClippingHandler.cc:126 INFO:configClipping: carrTypeCombination = 1, noOfWcdmaCarrier = 0, noOfLteCdmaCarrier = 0, noOfGsmCarrier = 4[2015-01-13 08:04:21.572] trDcProc dlClippingHalWarpImpl.cc:521 INFO:Does not support filter[2015-01-13 08:04:21.572] trDcProc dlPwrClippingEventSubscriber.cc:77 INFO:carrierUpdateEvent successful for carrier: 801 event :8[2015-01-13 08:04:21.576] trxCtrlDpdProc_0 dpdController.cc:2375 INFO:TX_SETUP:dev = 7, carrierFrequency = 955800, txLo: 955840, Status: dpd off, state OFF, deoff, ga on; dev: 1, txFreq: 955800, state: OFF; dev: 2, txFreq: 0, state: OFF; dev: 3, txFreq: 955800, state: OFF; dev: 4, txFreq: 0, state: OFF; dev: 5, txFreq: 955800, state: OFF; dev: 6, txFreq: 0, state: OFF; dev: 7, txFreq: 0, state: OFF; dev: 8, txFreq:
0, state: OFF;
[2015-01-13 08:04:21.576] trxCtrlDpdProc_0 dpdController.cc:2391 INFO:Number ofconfigured carriers: tx: 3, rx: 0[2015-01-13 08:04:21.576] trxCtrlDpdProc_0 dpdController.cc:3614 INFO:4 carrierconfiguration[2015-01-13 08:04:21.576] trxCtrlDpdProc_0 dpdDeviceSetHandler.cc:300 INFO:Tx frequencies: HiFreq = 955800, LoFreq = 955800[2015-01-13 08:04:21.576] trxCtrlDpdProc_0 dpdController.cc:4510 INFO:Setting upsecond carrier
[2015-01-13 08:04:21.580] trxCtrlDpdProc_0 dpdController.cc:1605 INFO:boardFreq= 955840, mgnOffsetPeakDig = 0, dpdIqGiPeakOld = 0x7197C900, dpdIqGiPeakNew = 0x7197C900, dpdIqGqPeakOld = 0x72913B00, dpdIqGqPeakNew = 0x72913B00.[2015-01-13 08:04:21.580] trDcProc warpBasedDlFreqConfig.cc:35 INFO:updateTrxCtrlAtSetup antennaBranchId: 0, trxDeviceId: 7, txLoFreq: 955840 (result: true)[2015-01-13 08:04:21.648] trDcProc dlCarrierPowerEventSubscriber.cc:81 INFO:CarrierUpdateEvent successful for carrier: 801, event: 8[2015-01-13 08:04:21.648] trDcProc dlDelayEventSubscriber.cc:233 INFO:carrierUpd
ateEvent, carrierId (hex): 321, event :8[2015-01-13 08:04:21.648] trDcProc dlFreqHopHandler.cc:111 INFO:3 GSM carriers with frequency hopping enabled found[2015-01-13 08:04:21.672] trDcProc dlFreqHopHandler.cc:205 INFO:GSM carriers frequency hopping end for range:1 after 13 iteration[2015-01-13 08:04:21.672] trDcProc HAL_Interface.cc:1069 INFO:warp 17. filter =true
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[2015-01-13 08:04:21.672] trDcProc filterEventSubscriber.cc:80 INFO:supportFilter 1[2015-01-13 08:04:21.676] trDcProc vddComp.cc:53 INFO:VddComp::carrierUpdateEvent: setting center frequency to 955800 and vector width to 2600[2015-01-13 08:04:21.676] trDcProc dlDelayEventSubscriber.cc:233 INFO:carrierUpdateEvent, carrierId (hex): 321, event :1024[2015-01-13 08:04:21.680] trDcProc linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3661 [0.1ns]
[2015-01-13 08:04:21.680] trDcProc linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1262), hardDelay:(834)
[2015-01-13 08:04:21.680] trDcProc linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 08:04:21.680] trDcProc platformXDlDelayAdjust.cc:324 INFO:tRuReporte
dDelayDl:298948 = tRuInternalDlDb:292940 + tDlFreqCompDelay:598 + tInternalBfnDelay:3661 + DpdDelay:1749[2015-01-13 08:04:21.684] trDcProc dlDelayEventSubscriber.cc:233 INFO:carrierUpdateEvent, carrierId (hex): 321, event :128[2015-01-13 08:04:21.684] trDcProc dlDelayEventSubscriber.cc:777 INFO:isBfnAdvancerSetAtFirstCarrier: OFF, VldbReport a28, rfPort 1[2015-01-13 08:04:21.684] trDcProc dlDelayEventSubscriber.cc:805 INFO:isBfnAdvancerSetAtEveryCarrier: ON. rfPort 0[2015-01-13 08:04:21.684] trDcProc linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:36
61 [0.1ns]
[2015-01-13 08:04:21.684] trDcProc linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1262), hardDelay:(834)
[2015-01-13 08:04:21.684] trDcProc linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 08:04:21.684] trDcProc linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:36
61 [0.1ns]
[2015-01-13 08:04:21.684] trDcProc linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1262), hardDelay:(834)
[2015-01-13 08:04:21.684] trDcProc linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
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[2015-01-13 08:04:21.688] trDcProc platformXDlDelayAdjust.cc:324 INFO:tRuReportedDelayDl:298948 = tRuInternalDlDb:292940 + tDlFreqCompDelay:598 + tInternalBfnDelay:3661 + DpdDelay:1749[2015-01-13 08:04:21.688] trDcProc dlDelayHandler.cc:106 INFO:gsm (dl filterBranch:3)tTrpToArp:30435[ns] = salCarrierReportedDelay:298948 + vldbSize_0_1ns/2:2590 + tAnpDl:0 + tTRpToRuInput:0 + tRicrTRpToRuInput:2730 + tExtBFNDelayDiff:80 + tFrameOffset:0.00,tFrameOffsetFrac:0.00[0.1ns],setBfnAdvancerAtFirstCarrier:0,setBfnAdvanceAtEveryCarrier:1
[2015-01-13 08:04:21.688] trDcProc platformXDlDelayAdjust.cc:154 INFO:setTotalDelay set vldb to 260 ns[2015-01-13 08:04:21.700] trDcProc trDcHandler.cc:643 INFO:Device state: BUSY/DEACTIVATE for carrierId:33, clientId:102[2015-01-13 08:04:21.724] - fault_manager.cc:1910 INFO:Set event PA_ON_EVENT totime: 20000[ms], from 0x10097[2015-01-13 08:04:21.724] trxCtrlDpdProc_0 dpdPaController.cc:66 INFO:paCtrl called with newState = paOnPendEvent. Current state is paOffEvent
[2015-01-13 08:04:21.724] trxCtrlDpdProc_0 dpdPaController.cc:96 INFO:new pa state: TRX_PA_ON_PEND_EVENT or TRX_PA_OFF_EVENT for txBranch 0[2015-01-13 08:04:21.728] trxCtrlDpdProc_0 paHalIf.cc:79 INFO:PA_OFF: paA SET TOSTATUS OFF[2015-01-13 08:04:21.728] trxEvtProc eventHandler.cc:1028 INFO:Event already subscribed,eventId=0x80, txId=0[2015-01-13 08:04:21.728] trDcProc txTraceWarp1x.cc:172 INFO:dlFbA0Cfg:0x80010001, dlFbA1Cfg:0x80020001, dlFbA2Cfg:0x80040001, dlFbA3Cfg:0x80080001,dlFbB0Cfg:0xf0000, dlFbB1Cfg:0xf0000, dlFbB2Cfg:0xf0000, dlFbB
3Cfg:0xf0000, cgbDlTest:0x0[2015-01-13 08:04:21.728] trDcProc tx.cc:388 INFO:carrierUpdateEvent: ENABLED ccData.deviceId 5, ccData.filterBranch 2, carrierConf.carrierId 798[2015-01-13 08:04:21.728] - fault_manager.cc:1910 INFO:Set event TX_ON_EVENT totime: 10000[ms], from 0x10097[2015-01-13 08:04:21.728] trxCtrlDpdProc_0 dpdController.cc:2592 INFO:TX_ON: dev= 5; Status: dpd off, state OFF, de off, ga on; dev: 1, txFreq: 955800, state:OFF; dev: 2, txFreq: 0, state: OFF; dev: 3, txFreq: 955800, state: OFF; dev: 4, txFreq: 0, state: OFF; dev: 5, txFreq: 955800, state: OFF; dev: 6, txFreq: 0, state: OFF; dev: 7, txFreq: 955800, state: OFF; dev:
8, txFreq: 0, state: OFF;
[2015-01-13 08:04:21.728] trxCtrlDpdProc_0 trxCtrl11HandlerPf4.cc:228 INFO:Tx input disabled[2015-01-13 08:04:21.732] trxCtrlDpdProc_0 dpdPaController.cc:66 INFO:paCtrl called with newState = paOnEvent. Current state is paOnPendEvent[2015-01-13 08:04:21.740] trxCtrlDpdProc_0 paHalIf.cc:108 INFO:PA_ON: paA SET TOSTATUS ON
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[2015-01-13 08:04:21.816] trxCtrlDpdProc_0 dpdController.cc:1605 INFO:boardFreq= 955840, mgnOffsetPeakDig = 0, dpdIqGiPeakOld = 0x7197C900, dpdIqGiPeakNew = 0x7197C900, dpdIqGqPeakOld = 0x72913B00, dpdIqGqPeakNew = 0x72913B00.[2015-01-13 08:04:21.820] trxCtrlDpdProc_0 dpdController.cc:2676 INFO:m_commonConf.m_isPeakBranchPresent= 1, m_commonConf.m_isWarp= 1, pTrx->hasRuwaHardcopy= 0[2015-01-13 08:04:21.820] trxCtrlDpdProc_0 trxCtrl11HandlerPf4.cc:233 INFO:Tx input enabled[2015-01-13 08:04:21.820] trxCtrlDpdProc_0 dpdStateHandler.cc:662 INFO:Trainingsignals. (attTuning:true dpdStart:false delEst:true)[2015-01-13 08:04:21.820] trxCtrlDpdProc_0 dpdStateHandler.cc:664 INFO:Wait fordata. (Pma:-i[-42.55 -8.00], DpdPma:-i[-i -i], Pmb:-i, TorPmb:-58.23[-i -8.00] dB)[2015-01-13 08:04:21.820] trDcProc internalGammaCtrl.cc:371 INFO:internalGammaCtrl: Requesting BFN resynchronization on warpA_mcr, reason: Carrier 798 ENABLE event[2015-01-13 08:04:21.820] trDcProc internalGammaCtrl.cc:377 INFO:internalGammaCt
rl: Requesting BFN resynchronization on warpB_mcr, reason: Carrier 798 ENABLE event[2015-01-13 08:04:21.820] trDcProc commonCsc.cc:130 INFO:filterBranchId 2 already unblocked.[2015-01-13 08:04:21.820] trDcProc commonCsc.cc:254 INFO:carrierUpdateEvent ENABLED successful for carrier 798[2015-01-13 08:04:21.824] trDcProc dlPerfCtrlHandler.cc:1011 INFO:##### Reporting #####: PAR = 750[2015-01-13 08:04:21.824] trDcProc trDcHandler.cc:663 INFO:Device state: BUSY/AC
TIVATE for carrierId:30, clientId:102[2015-01-13 08:04:21.828] trxEvtProc eventHandler.cc:1028 INFO:Event already subscribed,eventId=0x80, txId=0[2015-01-13 08:04:21.828] trDcProc txTraceWarp1x.cc:172 INFO:dlFbA0Cfg:0x80010001, dlFbA1Cfg:0x80020001, dlFbA2Cfg:0x80040001, dlFbA3Cfg:0x80080001,dlFbB0Cfg:0xf0000, dlFbB1Cfg:0xf0000, dlFbB2Cfg:0xf0000, dlFbB3Cfg:0xf0000, cgbDlTest:0x0[2015-01-13 08:04:21.828] trDcProc tx.cc:388 INFO:carrierUpdateEvent: ENABLED ccData.deviceId 7, ccData.filterBranch 3, carrierConf.carrierId 801
[2015-01-13 08:04:21.828] - fault_manager.cc:1901 INFO:Event TX_ON_EVENT increased with time: 10000[ms], from 0x10097[2015-01-13 08:04:21.912] trxCtrlDpdProc_0 dpdController.cc:2592 INFO:TX_ON: dev= 7; Status: dpd off, state RAMPING, de off, ga on; dev: 1, txFreq: 955800, state: OFF; dev: 2, txFreq: 0, state: OFF; dev: 3, txFreq: 955800, state: OFF; dev: 4, txFreq: 0, state: OFF; dev: 5, txFreq: 955800,state: INIT; dev: 6, txFreq: 0, state: OFF; dev: 7, txFreq: 955800, state: OFF;dev: 8, txFreq: 0, state: OFF;
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[2015-01-13 08:04:21.912] trxCtrlDpdProc_0 trxCtrl11HandlerPf4.cc:233 INFO:Tx input enabled[2015-01-13 08:04:21.912] trxCtrlDpdProc_0 commonCsc.cc:498 INFO:filterBranchId2 already unblocked.[2015-01-13 08:04:21.912] trDcProc internalGammaCtrl.cc:371 INFO:internalGammaCtrl: Requesting BFN resynchronization on warpA_mcr, reason: Carrier 801 ENABLE event[2015-01-13 08:04:21.912] trDcProc internalGammaCtrl.cc:377 INFO:internalGammaCtrl: Requesting BFN resynchronization on warpB_mcr, reason: Carrier 801 ENABLE event[2015-01-13 08:04:21.912] trDcProc commonCsc.cc:130 INFO:filterBranchId 3 already unblocked.[2015-01-13 08:04:21.912] trDcProc commonCsc.cc:254 INFO:carrierUpdateEvent ENABLED successful for carrier 801[2015-01-13 08:04:21.916] trDcProc trDcHandler.cc:663 INFO:Device state: BUSY/ACTIVATE for carrierId:33, clientId:102[2015-01-13 08:04:21.920] trxEvtProc eventHandler.cc:1028 INFO:Event already sub
scribed,eventId=0x80, txId=0[2015-01-13 08:04:21.920] trDcProc txTraceWarp1x.cc:172 INFO:dlFbA0Cfg:0x80010001, dlFbA1Cfg:0x80020001, dlFbA2Cfg:0x80040001, dlFbA3Cfg:0x80080001,dlFbB0Cfg:0xf0000, dlFbB1Cfg:0xf0000, dlFbB2Cfg:0xf0000, dlFbB3Cfg:0xf0000, cgbDlTest:0x0[2015-01-13 08:04:21.920] trDcProc tx.cc:388 INFO:carrierUpdateEvent: ENABLED ccData.deviceId 1, ccData.filterBranch 0, carrierConf.carrierId 792[2015-01-13 08:04:21.920] - fault_manager.cc:1901 INFO:Event TX_ON_EVENT increased with time: 10000[ms], from 0x10097
[2015-01-13 08:04:21.928] trxCtrlDpdProc_0 dpdStateRamping.cc:56 INFO:Start Ramping. (Pma:-26.50[-42.55 -8.00], DpdPma:-29.50[-30.00 -29.00], Pmb:-26.50, TorPmb:-33.97[-61.50 -8.00] dB)[2015-01-13 08:04:21.928] trxCtrlDpdProc_0 dpdController.cc:2592 INFO:TX_ON: dev= 1; Status: dpd off, state RAMPING, de off, ga on; dev: 1, txFreq: 955800, state: OFF; dev: 2, txFreq: 0, state: OFF; dev: 3, txFreq: 955800, state: OFF; dev: 4, txFreq: 0, state: OFF; dev: 5, txFreq: 955800,state: INIT; dev: 6, txFreq: 0, state: OFF; dev: 7, txFreq: 955800, state: INIT; dev: 8, txFreq: 0, state: OFF;
[2015-01-13 08:04:21.928] trxCtrlDpdProc_0 trxCtrl11HandlerPf4.cc:233 INFO:Tx input enabled
[2015-01-13 08:04:21.928] trxCtrlDpdProc_0 commonCsc.cc:498 INFO:filterBranchId2 already unblocked.[2015-01-13 08:04:21.928] trxCtrlDpdProc_0 commonCsc.cc:498 INFO:filterBranchId3 already unblocked.[2015-01-13 08:04:21.932] trDcProc internalGammaCtrl.cc:371 INFO:internalGammaCtrl: Requesting BFN resynchronization on warpA_mcr, reason: Carrier 792 ENABLE event
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[2015-01-13 08:04:21.932] trDcProc internalGammaCtrl.cc:377 INFO:internalGammaCtrl: Requesting BFN resynchronization on warpB_mcr, reason: Carrier 792 ENABLE event[2015-01-13 08:04:21.932] trDcProc commonCsc.cc:130 INFO:filterBranchId 0 already unblocked.[2015-01-13 08:04:21.932] trDcProc commonCsc.cc:254 INFO:carrierUpdateEvent ENABLED successful for carrier 792[2015-01-13 08:04:21.936] trDcProc trDcHandler.cc:663 INFO:Device state: BUSY/ACTIVATE for carrierId:24, clientId:102[2015-01-13 08:04:21.944] trxEvtProc eventHandler.cc:1028 INFO:Event already subscribed,eventId=0x80, txId=0[2015-01-13 08:04:21.944] trDcProc txTraceWarp1x.cc:172 INFO:dlFbA0Cfg:0x80010001, dlFbA1Cfg:0x80020001, dlFbA2Cfg:0x80040001, dlFbA3Cfg:0x80080001,dlFbB0Cfg:0xf0000, dlFbB1Cfg:0xf0000, dlFbB2Cfg:0xf0000, dlFbB3Cfg:0xf0000, cgbDlTest:0x0[2015-01-13 08:04:21.944] trDcProc tx.cc:388 INFO:carrierUpdateEvent: ENABLED ccData.deviceId 3, ccData.filterBranch 1, carrierConf.carrierId 795
[2015-01-13 08:04:21.944] - fault_manager.cc:1901 INFO:Event TX_ON_EVENT increased with time: 10000[ms], from 0x10097[2015-01-13 08:04:21.944] trxCtrlDpdProc_0 dpdController.cc:2592 INFO:TX_ON: dev= 3; Status: dpd off, state RAMPING, de off, ga on; dev: 1, txFreq: 955800, state: INIT; dev: 2, txFreq: 0, state: OFF; dev: 3, txFreq: 955800, state: OFF; dev: 4, txFreq: 0, state: OFF; dev: 5, txFreq: 955800, state: INIT; dev: 6, txFreq: 0, state: OFF; dev: 7, txFreq: 955800, state: INIT; dev: 8, txFreq: 0, state: OFF;
[2015-01-13 08:04:21.944] trxCtrlDpdProc_0 trxCtrl11HandlerPf4.cc:233 INFO:Tx input enabled
[2015-01-13 08:04:21.948] trxCtrlDpdProc_0 commonCsc.cc:498 INFO:filterBranchId0 already unblocked.[2015-01-13 08:04:21.948] trxCtrlDpdProc_0 commonCsc.cc:498 INFO:filterBranchId2 already unblocked.[2015-01-13 08:04:21.948] trxCtrlDpdProc_0 commonCsc.cc:498 INFO:filterBranchId3 already unblocked.[2015-01-13 08:04:21.948] trDcProc internalGammaCtrl.cc:371 INFO:internalGammaCtrl: Requesting BFN resynchronization on warpA_mcr, reason: Carrier 795 ENABLE event
[2015-01-13 08:04:21.948] trDcProc internalGammaCtrl.cc:377 INFO:internalGammaCtrl: Requesting BFN resynchronization on warpB_mcr, reason: Carrier 795 ENABLE event[2015-01-13 08:04:21.948] trDcProc commonCsc.cc:130 INFO:filterBranchId 1 already unblocked.[2015-01-13 08:04:21.948] trDcProc commonCsc.cc:254 INFO:carrierUpdateEvent ENABLED successful for carrier 795
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[2015-01-13 08:04:21.952] trDcProc dlPerfCtrlHandler.cc:1004 INFO:##### Reporting #####: GAIN_OFFSET = -2 (gainOffset:0 + gainMargin:-2)[2015-01-13 08:04:21.952] trDcProc trDcHandler.cc:663 INFO:Device state: BUSY/ACTIVATE for carrierId:27, clientId:102[2015-01-13 08:04:21.968] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x0 C1 0x0 C2 0x0 C3 0x0, pmPa0C0 0x0 C1 0x0C2 0x0 C3 0x0, pa0C0Adj 0x1fda C1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010 C3 0x8010, pmPa1 0x0 pa1Adj 0x4779[2015-01-13 08:04:22.492] trxCtrlDpdProc_0 dpdStateTuning.cc:68 INFO:gainAdjust:0.092855, gainAdjustValue: true, maxDiffAddr: 1, diffAddrLimit: 0, gainAdjustmentLoopChanged: 0[2015-01-13 08:04:22.636] trxCtrlDpdProc_0 dpdStateTuning.cc:152 INFO:Start DPD.(Pma:-26.50[-42.55 -8.00], DpdPma:-29.50[-30.00 -29.00], Pmb:-26.50, TorPmb:-26.47[-61.50 -8.00] dB)[2015-01-13 08:04:22.636] trxCtrlDpdProc_0 dpdController.cc:1605 INFO:boardFreq= 955840, mgnOffsetPeakDig = 0, dpdIqGiPeakOld = 0x7197C900, dpdIqGiPeakNew = 0x7197C900, dpdIqGqPeakOld = 0x72913B00, dpdIqGqPeakNew = 0x72913B00.
[2015-01-13 08:04:22.636] trxCtrlDpdProc_0 dpdController.cc:3757 INFO:DPD forcedidle prior to peak-phase calibration. dpdIrqStat: 0x04340008, dpdStat: 0x00140000, dpdStatusPd0: 0x00000000, dpdStatusPd1: 0x00000000[2015-01-13 08:04:22.636] trxCtrlDpdProc_0 dpdController.cc:3785 INFO:Using standard peak-phase calibration algorithm[2015-01-13 08:04:22.668] trxCtrlDpdProc_0 dpdController.cc:3846 INFO:Peak_calibrate_result_phase status ok: step 0: 54 deg[2015-01-13 08:04:22.668] trxCtrlDpdProc_0 dpdController.cc:3915 INFO:Peak_calib
rate_result_phase: 54 deg[2015-01-13 08:04:22.668] trxCtrlDpdProc_0 dpdController.cc:3916 INFO:Peak_calibrate_result_value: 24947[2015-01-13 08:04:22.668] trxCtrlDpdProc_0 dpdController.cc:4017 INFO:Performedpeak phase calibration in 30666 us.[2015-01-13 08:04:22.668] trxCtrlDpdProc_0 dpdController.cc:4018 INFO:Peak-phasecorrection versus flash: 2 deg.[2015-01-13 08:04:22.696] trxCtrlDpdProc_0 dpdController.cc:4260 INFO:PerformedDelay estimation with training signal in 24533 us. IntegerDelay: 0x1d3 FracDela
y: 0x36[2015-01-13 08:04:22.696] trxCtrlDpdProc_0 dpdController.cc:4293 INFO:First fractional delay ok. dpdIrqStat: 0x00140000, dpdStat = 0x00140000, dpdMode = 0x08410610, dpdTxSurMaxAddr = 0x00000749, dpdDelEstFracDeltaInt = 0x00000000, dpdDelEstIntCorr = 0x00000000, dpdDelEstFracCorr = 0x00001ffc[2015-01-13 08:04:22.696] trxCtrlDpdProc_0 dlDpdDelayCompHandler.cc:84 INFO:DPDdelay update, dpdDelay = 2743, currentDpdDelay[1]=1714 (0.1 ns)
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[2015-01-13 08:04:22.696] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3659 [0.1ns]
[2015-01-13 08:04:22.696] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1260), hardDelay:(834)
[2015-01-13 08:04:22.696] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 08:04:22.700] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3659 [0.1ns]
[2015-01-13 08:04:22.700] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1260), hardDelay:(834)
[2015-01-13 08:04:22.700] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPor
tDelay:(80)
[2015-01-13 08:04:22.700] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:324 INFO:tRuReportedDelayDl:298911 = tRuInternalDlDb:292940 + tDlFreqCompDelay:598 + tInternalBfnDelay:3659 + DpdDelay:1714[2015-01-13 08:04:22.700] trxCtrlDpdProc_0 dlDelayHandler.cc:106 INFO:gsm (dl filterBranch:0)tTrpToArp:30431[ns] = salCarrierReportedDelay:298911 + vldbSize_0_1ns/2:2590 + tAnpDl:0 + tTRpToRuInput:0 + tRicrTRpToRuInput:2730 + tExtBFNDelayDiff:80 + tFrameOffset:0.00,tFrameOffsetFrac:0.00[0.1ns],setBfnAdvancerAtFirstCarrier:0,setBfnAdvanceAtEveryCarrier:0
[2015-01-13 08:04:22.700] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:154 INFO:setTotalDelay set vldb to 264 ns[2015-01-13 08:04:22.716] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3659 [0.1ns]
[2015-01-13 08:04:22.716] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1260), hardDelay:(834)
[2015-01-13 08:04:22.716] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDela
y:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 08:04:22.716] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3659 [0.1ns]
[2015-01-13 08:04:22.716] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1260), hardDelay:(834)
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[2015-01-13 08:04:22.716] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 08:04:22.716] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:324 INFO:tRuReportedDelayDl:298911 = tRuInternalDlDb:292940 + tDlFreqCompDelay:598 + tInternalBfnDelay:3659 + DpdDelay:1714[2015-01-13 08:04:22.720] trxCtrlDpdProc_0 dlDelayHandler.cc:106 INFO:gsm (dl filterBranch:1)tTrpToArp:30431[ns] = salCarrierReportedDelay:298911 + vldbSize_0_1ns/2:2590 + tAnpDl:0 + tTRpToRuInput:0 + tRicrTRpToRuInput:2730 + tExtBFNDelayDiff:80 + tFrameOffset:0.00,tFrameOffsetFrac:0.00[0.1ns],setBfnAdvancerAtFirstCarrier:0,setBfnAdvanceAtEveryCarrier:0
[2015-01-13 08:04:22.720] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:154 INFO:setTotalDelay set vldb to 264 ns[2015-01-13 08:04:22.732] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3659 [0.1ns]
[2015-01-13 08:04:22.732] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1260), hardDelay:(834)
[2015-01-13 08:04:22.732] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 08:04:22.732] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3659 [0.1ns]
[2015-01-13 08:04:22.732] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1260), hardDelay:(834)
[2015-01-13 08:04:22.732] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 08:04:22.732] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:324 INFO:tRuReportedDelayDl:298911 = tRuInternalDlDb:292940 + tDlFreqCompDelay:598 + tInternalBfnDelay:3659 + DpdDelay:1714
[2015-01-13 08:04:22.736] trxCtrlDpdProc_0 dlDelayHandler.cc:106 INFO:gsm (dl filterBranch:2)tTrpToArp:30431[ns] = salCarrierReportedDelay:298911 + vldbSize_0_1ns/2:2590 + tAnpDl:0 + tTRpToRuInput:0 + tRicrTRpToRuInput:2730 + tExtBFNDelayDiff:80 + tFrameOffset:0.00,tFrameOffsetFrac:0.00[0.1ns],setBfnAdvancerAtFirstCarrier:0,setBfnAdvanceAtEveryCarrier:0
[2015-01-13 08:04:22.736] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:154 INFO:setTotalDelay set vldb to 264 ns
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[2015-01-13 08:04:22.748] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3659 [0.1ns]
[2015-01-13 08:04:22.748] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1260), hardDelay:(834)
[2015-01-13 08:04:22.748] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 08:04:22.748] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3659 [0.1ns]
[2015-01-13 08:04:22.748] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1260), hardDelay:(834)
[2015-01-13 08:04:22.748] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPor
tDelay:(80)
[2015-01-13 08:04:22.748] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:324 INFO:tRuReportedDelayDl:298911 = tRuInternalDlDb:292940 + tDlFreqCompDelay:598 + tInternalBfnDelay:3659 + DpdDelay:1714[2015-01-13 08:04:22.752] trxCtrlDpdProc_0 dlDelayHandler.cc:106 INFO:gsm (dl filterBranch:3)tTrpToArp:30431[ns] = salCarrierReportedDelay:298911 + vldbSize_0_1ns/2:2590 + tAnpDl:0 + tTRpToRuInput:0 + tRicrTRpToRuInput:2730 + tExtBFNDelayDiff:80 + tFrameOffset:0.00,tFrameOffsetFrac:0.00[0.1ns],setBfnAdvancerAtFirstCarrier:0,setBfnAdvanceAtEveryCarrier:0
[2015-01-13 08:04:22.752] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:154 INFO:setTotalDelay set vldb to 264 ns[2015-01-13 08:04:22.764] trxCtrlDpdProc_0 dpdController.cc:5585 INFO:RU_TX_ON_IND sent for device id1[2015-01-13 08:04:22.764] trxCtrlDpdProc_0 dpdController.cc:5585 INFO:RU_TX_ON_IND sent for device id3[2015-01-13 08:04:22.764] trxCtrlDpdProc_0 dpdController.cc:5585 INFO:RU_TX_ON_IND sent for device id5
[2015-01-13 08:04:22.764] trxCtrlDpdProc_0 dpdController.cc:5585 INFO:RU_TX_ON_IND sent for device id7[2015-01-13 08:04:22.976] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x2062efb C1 0x0 C2 0x0 C3 0x0, pmPa0C0 0x6eb4b9c C1 0x0 C2 0x0 C3 0x0, pa0C0Adj 0x1fda C1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010 C3 0x8010, pmPa1 0x8a557ce pa1Adj 0x4779[2015-01-13 08:04:23.780] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,
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fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x1effb02 C1 0x0 C2 0x0 C3 0x0, pmPa0C0 0x9028d21 C1 0x0 C2 0x0 C3 0x0, pa0C0Adj 0x1fda C1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010 C3 0x8010, pmPa1 0xb422e9d pa1Adj 0x4779[2015-01-13 08:04:24.784] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x2062748 C1 0x0 C2 0x0 C3 0x0, pmPa0C0 0x90053ea C1 0x0 C2 0x0 C3 0x0, pa0C0Adj 0x1fda C1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010 C3 0x8010, pmPa1 0xb3f671b pa1Adj 0x4779[2015-01-13 08:04:25.804] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x1efdfab C1 0x0 C2 0x0 C3 0x0, pmPa0C0 0x8ffbda0 C1 0xa99f95 C2 0x0 C3 0x0, pa0C0Adj 0x1fda C1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010 C3 0x8010, pmPa10xc122cb4 pa1Adj 0x4779[2015-01-13 08:04:26.808] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x1f00925 C1 0x0 C2 0x0 C3 0x0, pmPa0C0 0x902476b C1 0x10ded7f C2 0x0 C3 0x0, pa0C0Adj 0x1fdaC1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010 C3 0x8010, pmPa10xc926ab6 pa1Adj 0x4779[2015-01-13 08:04:27.812] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,
fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x1eff0ed C1 0x0 C2 0x0 C3 0x0, pmPa0C0 0x8feea09 C1 0x21b0691 C2 0x0 C3 0x0, pa0C0Adj 0x1fdaC1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010 C3 0x8010, pmPa10xddb2bcb pa1Adj 0x4779[2015-01-13 08:04:28.816] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x1f7aef2 C1 0x0 C2 0x0 C3 0x0, pmPa0C0 0x900b4f7 C1 0x4e17164 C2 0x0 C3 0x0, pa0C0Adj 0x1fdaC1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010 C3 0x8010, pmPa10x1152e567 pa1Adj 0x4779[2015-01-13 08:04:29.828] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x1efeee7 C1 0x10b54e4 C2 0x0 C3 0x0, pmPa0C
0 0x904a24d C1 0x30d6e0e C2 0x0 C3 0x0, pa0C0Adj 0x1fda C1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010 C3 0x8010,pmPa1 0xf10627b pa1Adj 0x4779[2015-01-13 08:04:30.832] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x1ef86d4 C1 0x0 C2 0x758d70 C3 0x0, pmPa0C00x901d909 C1 0x3b1459f C2 0x21c1f59 C3 0x0, pa0C0Adj 0x1fda C1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010 C3 0x8010, pmPa1 0x1277fa0f pa1Adj 0x4779[2015-01-13 08:04:31.836] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x202f1db C1 0xce8e09 C2 0x0 C3 0x0, pmPa0C00x8ff3371 C1 0x2508177 C2 0x2a3e047 C3 0x0, pa0C0
Adj 0x1fda C1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010 C3 0x8010, pmPa1 0x1165e8ba pa1Adj 0x4779[2015-01-13 08:04:32.840] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x1effbab C1 0x8d8949 C2 0x0 C3 0x0, pmPa0C00x9101cf1 C1 0x1af6ef0 C2 0x10de17c C3 0x0, pa0C0Adj 0x1fda C1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010 C3 0x8010, pmPa1 0xebae175 pa1Adj 0x4779[2015-01-13 08:04:33.648] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,
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fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x1fedb60 C1 0x42dcc1 C2 0x0 C3 0x0, pmPa0C00x91a08b7 C1 0xc058ae C2 0x6b6799 C3 0x0, pa0C0Adj 0x1fda C1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010 C3 0x8010, pmPa1 0xcd4ef39 pa1Adj 0x4779[2015-01-13 08:04:34.652] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x218ac15 C1 0x685acb C2 0x0 C3 0x0, pmPa0C00x8ffbb9c C1 0x2276b90 C2 0x87b6e1 C3 0x0, pa0C0Adj 0x1fda C1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010 C3 0x8010, pmPa1 0xe960195 pa1Adj 0x4779[2015-01-13 08:04:35.664] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x1f02023 C1 0x8ae27 C2 0x2271ea C3 0x0, pmPa0C0 0x8efb36b C1 0x12d7d0c C2 0x162161c C3 0x0, pa0C0Adj 0x1fda C1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010 C3 0x8010, pmPa1 0xe5b2f4c pa1Adj 0x4779[2015-01-13 08:04:36.668] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x1eff965 C1 0x10987c C2 0x31ab4c C3 0x0, pmPa0C0 0x8fe11b9 C1 0x1a55028 C2 0x1c8f055 C3 0x0,pa0C0Adj 0x1fda C1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010C3 0x8010, pmPa1 0xf82d55f pa1Adj 0x4779[2015-01-13 08:04:37.672] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,
fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x1efda26 C1 0x6b2b5 C2 0x0 C3 0x0, pmPa0C00x91e4893 C1 0xad9c0f C2 0x2550fb6 C3 0x0, pa0C0Adj 0x1fda C1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010 C3 0x8010, pmPa1 0xf24e10f pa1Adj 0x4779[2015-01-13 08:04:38.676] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x1ef9034 C1 0x3ef86e C2 0x77c87 C3 0x0, pmPa0C0 0x8dd7048 C1 0x8341e9 C2 0x1bd6f31 C3 0x0, pa0C0Adj 0x1fda C1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010 C30x8010, pmPa1 0xde18e93 pa1Adj 0x4779[2015-01-13 08:04:39.680] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x2046179 C1 0x0 C2 0x0 C3 0x0, pmPa0C0 0x8f
3886c C1 0x27470bf C2 0x2456503 C3 0x0, pa0C0Adj 0x1fda C1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010 C3 0x8010,pmPa1 0x11118ba0 pa1Adj 0x4779[2015-01-13 08:04:40.684] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xf,fabEnCd 0xf, fabForce 0x0, mplPwrC0 0x1df9da7 C1 0x1289ff C2 0x1c4db58 C3 0x0, pmPa0C0 0x9051409 C1 0xbe5c13 C2 0x235310a C3 0x0,pa0C0Adj 0x1fda C1 0x2014 C2 0x2014 C3 0x2014, ncoC0 0x8010 C1 0x8010 C2 0x8010C3 0x8010, pmPa1 0xef25d2a pa1Adj 0x4779[2015-01-13 10:02:10.992] trDcProc commonCsc.cc:275 INFO:carrierUpdateEvent DISABLED successful for carrier 793
[2015-01-13 10:02:10.992] trDcProc trDcHandler.cc:1613 INFO:Device state: BUSY/DEACTIVATE for carrierId:25, clientId:102[2015-01-13 10:02:10.996] trDcProc cfpgaComUlCpriCtrlBlock.cc:135 INFO:disableLink, fb 3[2015-01-13 10:02:11.000] trDcProc HAL_Interface.cc:1069 INFO:warp 17. filter =true[2015-01-13 10:02:11.000] trDcProc filterEventSubscriber.cc:80 INFO:supportFilte
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r 1[2015-01-13 10:02:11.000] trDcProc rxGainComp.cc:199 INFO:updateCarrierData() carrierConf.carrierId=793, carrierConf.carrierRfPort=B[2015-01-13 10:02:11.000] trDcProc rxGainComp.cc:225 INFO:rx4A4 m_vectorWidth=200, signalBW=200, carrierFreqMin=910700, carrierFreqMax=910900[2015-01-13 10:02:11.000] trDcProc vddComp.cc:53 INFO:VddComp::carrierUpdateEvent: setting center frequency to 955800 and vector width to 2600[2015-01-13 10:02:11.004] trDcProc trDcHandler.cc:1620 INFO:Device state: IDLE for carrierId:25, clientId:102[2015-01-13 10:02:11.004] trDcProc trDcHandler.cc:1644 INFO:Carrier released clientId:102 carrierId:25[2015-01-13 10:02:11.016] trDcProc commonCsc.cc:275 INFO:carrierUpdateEvent DISABLED successful for carrier 794[2015-01-13 10:02:11.016] trDcProc trDcHandler.cc:1613 INFO:Device state: BUSY/DEACTIVATE for carrierId:26, clientId:102[2015-01-13 10:02:11.020] trDcProc cfpgaComUlCpriCtrlBlock.cc:135 INFO:disableLi
nk, fb 7[2015-01-13 10:02:11.024] trDcProc HAL_Interface.cc:1069 INFO:warp 17. filter =true[2015-01-13 10:02:11.024] trDcProc filterEventSubscriber.cc:80 INFO:supportFilter 1[2015-01-13 10:02:11.024] trDcProc rxGainComp.cc:199 INFO:updateCarrierData() carrierConf.carrierId=794, carrierConf.carrierRfPort=B[2015-01-13 10:02:11.024] trDcProc rxGainComp.cc:225 INFO:rx4B4 m_vectorWidth=200, signalBW=200, carrierFreqMin=910700, carrierFreqMax=910900
[2015-01-13 10:02:11.024] trDcProc vddComp.cc:53 INFO:VddComp::carrierUpdateEvent: setting center frequency to 955800 and vector width to 2600[2015-01-13 10:02:11.028] trDcProc trDcHandler.cc:1620 INFO:Device state: IDLE for carrierId:26, clientId:102[2015-01-13 10:02:11.028] trDcProc trDcHandler.cc:1644 INFO:Carrier released clientId:102 carrierId:26[2015-01-13 10:02:11.032] trDcProc tx.cc:447 INFO:TX_OFF: Start txTrace instance: TxTracerA
[2015-01-13 10:02:11.032] trDcProc txTraceWarp1x.cc:172 INFO:dlFbA0Cfg:0x80010001, dlFbA1Cfg:0x80020001, dlFbA2Cfg:0x80040001, dlFbA3Cfg:0x80080001,dlFbB0Cfg:0xf0000, dlFbB1Cfg:0xf0000, dlFbB2Cfg:0xf0000, dlFbB3Cfg:0xf0000, cgbDlTest:0xf[2015-01-13 10:02:11.052] trxCtrlDpdProc_0 dpdController.cc:2820 INFO:TX_OFF: dev = 1; Status: dpd on, state TUNED, de on, ga on; dev: 1, txFreq: 955800, state:OFF; dev: 2, txFreq: 0, state: OFF; dev: 3, txFreq: 955800, state: ON; dev: 4, txFreq: 0, state: OFF; dev: 5, txFreq: 955800, state: ON; dev: 6, txFreq: 0, state: OFF; dev: 7, txFreq: 955800, state: ON; dev: 8
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, txFreq: 0, state: OFF;
[2015-01-13 10:02:11.052] trDcProc commonCsc.cc:254 INFO:carrierUpdateEvent DISABLED successful for carrier 792[2015-01-13 10:02:11.056] trDcProc dlPerfCtrlHandler.cc:1004 INFO:##### Reporting #####: GAIN_OFFSET = 0 (gainOffset:0 + gainMargin:122)[2015-01-13 10:02:11.056] trDcProc paConfig.cc:136 INFO:Not allowed to turn offPA: 1 since there is carrier setup in carrierList[2015-01-13 10:02:11.056] trDcProc trDcHandler.cc:1613 INFO:Device state: BUSY/DEACTIVATE for carrierId:24, clientId:102[2015-01-13 10:02:11.060] trDcProc dlPwrClippingHandler.cc:126 INFO:configClipping: carrTypeCombination = 1, noOfWcdmaCarrier = 0, noOfLteCdmaCarrier = 0, noOfGsmCarrier = 3[2015-01-13 10:02:11.060] trDcProc dlClippingHalWarpImpl.cc:521 INFO:Does not support filter[2015-01-13 10:02:11.060] trDcProc commonCsc.cc:498 INFO:filterBranchId 1 already unblocked.
[2015-01-13 10:02:11.060] trDcProc commonCsc.cc:498 INFO:filterBranchId 2 already unblocked.[2015-01-13 10:02:11.060] trDcProc commonCsc.cc:498 INFO:filterBranchId 3 already unblocked.[2015-01-13 10:02:11.060] trDcProc dlPwrClippingEventSubscriber.cc:77 INFO:carrierUpdateEvent successful for carrier: 792 event :4[2015-01-13 10:02:11.060] trxCtrlDpdProc_0 dpdController.cc:2499 INFO:TX_RELEASE: dev = 1, txLo: 955840, Status: dpd on, state TUNED, de on, ga on; dev: 1, txFreq: 955800, state: OFF; dev: 2, txFreq: 0, state:OFF; dev: 3, txFreq: 955800, state: ON; dev: 4, txFreq: 0, state: OFF; dev: 5, t
xFreq: 955800, state: ON; dev: 6, txFreq: 0, state: OFF; dev: 7, txFreq: 955800,state: ON; dev: 8, txFreq: 0, state: OFF;
[2015-01-13 10:02:11.064] trxCtrlDpdProc_0 dpdDeviceSetHandler.cc:300 INFO:Tx frequencies: HiFreq = 955800, LoFreq = 955800[2015-01-13 10:02:11.128] trxCtrlDpdProc_0 dpdController.cc:1605 INFO:boardFreq= 955840, mgnOffsetPeakDig = 0, dpdIqGiPeakOld = 0x7197C900, dpdIqGiPeakNew = 0x7197C900, dpdIqGqPeakOld = 0x72913B00, dpdIqGqPeakNew = 0x72913B00.[2015-01-13 10:02:11.128] trxCtrlDpdProc_0 dpdController.cc:1605 INFO:boardFreq= 955840, mgnOffsetPeakDig = 0, dpdIqGiPeakOld = 0x7197C900, dpdIqGiPeakNew = 0x
7197C900, dpdIqGqPeakOld = 0x72913B00, dpdIqGqPeakNew = 0x72913B00.[2015-01-13 10:02:11.128] trxCtrlDpdProc_0 dpdController.cc:3757 INFO:DPD forcedidle prior to peak-phase calibration. dpdIrqStat: 0x00340008, dpdStat: 0x00140000, dpdStatusPd0: 0x00000000, dpdStatusPd1: 0x00000000[2015-01-13 10:02:11.128] trxCtrlDpdProc_0 dpdController.cc:3785 INFO:Using standard peak-phase calibration algorithm
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[2015-01-13 10:02:11.176] trxCtrlDpdProc_0 dpdController.cc:3846 INFO:Peak_calibrate_result_phase status ok: step 0: 54 deg[2015-01-13 10:02:11.176] trxCtrlDpdProc_0 dpdController.cc:3915 INFO:Peak_calibrate_result_phase: 53 deg[2015-01-13 10:02:11.176] trxCtrlDpdProc_0 dpdController.cc:3916 INFO:Peak_calibrate_result_value: 25384[2015-01-13 10:02:11.176] trxCtrlDpdProc_0 dpdController.cc:4017 INFO:Performedpeak phase calibration in 47466 us.[2015-01-13 10:02:11.176] trxCtrlDpdProc_0 dpdController.cc:4018 INFO:Peak-phasecorrection versus flash: 0 deg.[2015-01-13 10:02:11.040] trxCtrlDpdProc_0 dpdController.cc:4260 INFO:PerformedDelay estimation with training signal in 62666 us. IntegerDelay: 0x1d3 FracDelay: 0x37[2015-01-13 10:02:11.040] trxCtrlDpdProc_0 dpdController.cc:4293 INFO:First fractional delay ok. dpdIrqStat: 0x00140000, dpdStat = 0x00140000, dpdMode = 0x08410610, dpdTxSurMaxAddr = 0x00000749, dpdDelEstFracDeltaInt = 0x00000000, dpdDelEstIntCorr = 0x00000000, dpdDelEstFracCorr = 0x00001f
fb[2015-01-13 10:02:11.044] trxCtrlDpdProc_0 dlDpdDelayCompHandler.cc:84 INFO:DPDdelay update, dpdDelay = 2742, currentDpdDelay[1]=1713 (0.1 ns)[2015-01-13 10:02:11.044] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3659 [0.1ns]
[2015-01-13 10:02:11.044] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1260), hardDelay:(834)
[2015-01-13 10:02:11.044] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:11.048] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3659 [0.1ns]
[2015-01-13 10:02:11.048] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1260), hardDelay:(834)
[2015-01-13 10:02:11.048] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:11.048] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:324 INFO:tRuReportedDelayDl:298910 = tRuInternalDlDb:292940 + tDlFreqCompDelay:598 + tInternalBfnDelay:3659 + DpdDelay:1713[2015-01-13 10:02:11.048] trxCtrlDpdProc_0 dlDelayHandler.cc:106 INFO:gsm (dl fi
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lterBranch:1)tTrpToArp:30431[ns] = salCarrierReportedDelay:298910 + vldbSize_0_1ns/2:2590 + tAnpDl:0 + tTRpToRuInput:0 + tRicrTRpToRuInput:2730 + tExtBFNDelayDiff:80 + tFrameOffset:0.00,tFrameOffsetFrac:0.00[0.1ns],setBfnAdvancerAtFirstCarrier:0,setBfnAdvanceAtEveryCarrier:0
[2015-01-13 10:02:11.048] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:154 INFO:setTotalDelay set vldb to 264 ns[2015-01-13 10:02:11.064] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3659 [0.1ns]
[2015-01-13 10:02:11.064] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1260), hardDelay:(834)
[2015-01-13 10:02:11.064] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:11.064] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3659 [0.1ns]
[2015-01-13 10:02:11.064] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1260), hardDelay:(834)
[2015-01-13 10:02:11.064] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:11.064] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:324 INFO:tRuReportedDelayDl:298910 = tRuInternalDlDb:292940 + tDlFreqCompDelay:598 + tInter
nalBfnDelay:3659 + DpdDelay:1713[2015-01-13 10:02:11.068] trxCtrlDpdProc_0 dlDelayHandler.cc:106 INFO:gsm (dl filterBranch:2)tTrpToArp:30431[ns] = salCarrierReportedDelay:298910 + vldbSize_0_1ns/2:2590 + tAnpDl:0 + tTRpToRuInput:0 + tRicrTRpToRuInput:2730 + tExtBFNDelayDiff:80 + tFrameOffset:0.00,tFrameOffsetFrac:0.00[0.1ns],setBfnAdvancerAtFirstCarrier:0,setBfnAdvanceAtEveryCarrier:0
[2015-01-13 10:02:11.068] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:154 INFO:setTotalDelay set vldb to 264 ns[2015-01-13 10:02:11.080] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpga
Delay:3659 [0.1ns]
[2015-01-13 10:02:11.080] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1260), hardDelay:(834)
[2015-01-13 10:02:11.080] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
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[2015-01-13 10:02:11.080] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3659 [0.1ns]
[2015-01-13 10:02:11.080] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1260), hardDelay:(834)
[2015-01-13 10:02:11.080] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:11.080] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:324 INFO:tRuReportedDelayDl:298910 = tRuInternalDlDb:292940 + tDlFreqCompDelay:598 + tInternalBfnDelay:3659 + DpdDelay:1713[2015-01-13 10:02:11.084] trxCtrlDpdProc_0 dlDelayHandler.cc:106 INFO:gsm (dl filterBranch:3)tTrpToArp:30431[ns] = salCarrierReportedDelay:298910 + vldbSize_0_1ns/2:2590 + tAnpDl:0 + tTRpToRuInput:0 + tRicrTRpToRuInput:2730 + tExtBFNDelayDiff:80 + tFrameOffset:0.00,tFrameOffsetFrac:0.00[0.1ns],setBfnAdvancerAtFirstCarrier:0,setBfnAdvanceAtEveryCarrier:0
[2015-01-13 10:02:11.084] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:154 INFO:setTotalDelay set vldb to 264 ns[2015-01-13 10:02:11.096] trDcProc warpBasedDlFreqConfig.cc:49 INFO:updateTrxCtrlAtRelease antennaBranchId: 0, trxDeviceId: 1, txLoFreq: 955840, (result: true)[2015-01-13 10:02:11.160] trDcProc dlCarrierPowerEventSubscriber.cc:81 INFO:CarrierUpdateEvent successful for carrier: 792, event: 4[2015-01-13 10:02:11.160] trDcProc dlDelayEventSubscriber.cc:233 INFO:carrierUpdateEvent, carrierId (hex): 318, event :4
[2015-01-13 10:02:11.160] trDcProc dlFreqHopHandler.cc:111 INFO:3 GSM carriers with frequency hopping enabled found[2015-01-13 10:02:11.180] trDcProc dlFreqHopHandler.cc:205 INFO:GSM carriers frequency hopping end for range:1 after 13 iteration[2015-01-13 10:02:11.184] trDcProc warp17DlFreqHopBlock.cc:241 INFO: DL releaseFreqHopCarrierId, fb=(0), invalidCarrierId=(128)[2015-01-13 10:02:11.184] trDcProc HAL_Interface.cc:1069 INFO:warp 17. filter =true
[2015-01-13 10:02:11.184] trDcProc filterEventSubscriber.cc:80 INFO:supportFilter 1[2015-01-13 10:02:11.188] trDcProc vddComp.cc:53 INFO:VddComp::carrierUpdateEvent: setting center frequency to 955800 and vector width to 2600[2015-01-13 10:02:11.192] trDcProc paConfig.cc:136 INFO:Not allowed to turn offPA: 1 since there is carrier setup in carrierList[2015-01-13 10:02:11.192] trDcProc trDcHandler.cc:1620 INFO:Device state: IDLE f
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or carrierId:24, clientId:102[2015-01-13 10:02:11.192] trDcProc trDcHandler.cc:1644 INFO:Carrier released clientId:102 carrierId:24[2015-01-13 10:02:11.196] trDcProc tx.cc:447 INFO:TX_OFF: Start txTrace instance: TxTracerA[2015-01-13 10:02:11.196] trDcProc txTraceWarp1x.cc:172 INFO:dlFbA0Cfg:0x80010000, dlFbA1Cfg:0x80020001, dlFbA2Cfg:0x80040001, dlFbA3Cfg:0x80080001,dlFbB0Cfg:0xf0000, dlFbB1Cfg:0xf0000, dlFbB2Cfg:0xf0000, dlFbB3Cfg:0xf0000, cgbDlTest:0x0[2015-01-13 10:02:11.224] trxCtrlDpdProc_0 dpdController.cc:2820 INFO:TX_OFF: dev = 5; Status: dpd on, state TUNED, de on, ga on; dev: 1, txFreq: 0, state: OFF;dev: 2, txFreq: 0, state: OFF; dev: 3, txFreq: 955800, state: ON; dev: 4, txFreq: 0, state: OFF; dev: 5, txFreq: 955800, state: OFF; dev: 6, txFreq: 0, state: OFF; dev: 7, txFreq: 955800, state: ON; dev: 8, txFreq: 0, state: OFF;
[2015-01-13 10:02:11.224] trDcProc commonCsc.cc:254 INFO:carrierUpdateEvent DISABLED successful for carrier 798[2015-01-13 10:02:11.228] trDcProc paConfig.cc:136 INFO:Not allowed to turn off
PA: 1 since there is carrier setup in carrierList[2015-01-13 10:02:11.228] trDcProc trDcHandler.cc:1613 INFO:Device state: BUSY/DEACTIVATE for carrierId:30, clientId:102[2015-01-13 10:02:11.228] trDcProc dlPwrClippingHandler.cc:126 INFO:configClipping: carrTypeCombination = 1, noOfWcdmaCarrier = 0, noOfLteCdmaCarrier = 0, noOfGsmCarrier = 2[2015-01-13 10:02:11.228] trDcProc dlClippingHalWarpImpl.cc:521 INFO:Does not support filter[2015-01-13 10:02:11.228] trDcProc commonCsc.cc:498 INFO:filterBranchId 1 alread
y unblocked.[2015-01-13 10:02:11.228] trDcProc commonCsc.cc:498 INFO:filterBranchId 3 already unblocked.[2015-01-13 10:02:11.228] trDcProc dlPwrClippingEventSubscriber.cc:77 INFO:carrierUpdateEvent successful for carrier: 798 event :4[2015-01-13 10:02:11.232] trxCtrlDpdProc_0 dpdController.cc:2499 INFO:TX_RELEASE: dev = 5, txLo: 955840, Status: dpd on, state TUNED, de on, ga on; dev: 1, txFreq: 0, state: OFF; dev: 2, txFreq: 0, state: OFF;dev: 3, txFreq: 955800, state: ON; dev: 4, txFreq: 0, state: OFF; dev: 5, txFreq: 955800, state: OFF; dev: 6, txFreq: 0, state: OFF; dev: 7, txFreq: 955800, sta
te: ON; dev: 8, txFreq: 0, state: OFF;
[2015-01-13 10:02:11.232] trxCtrlDpdProc_0 dpdDeviceSetHandler.cc:300 INFO:Tx frequencies: HiFreq = 955800, LoFreq = 955800[2015-01-13 10:02:11.296] trxCtrlDpdProc_0 dpdController.cc:1605 INFO:boardFreq= 955840, mgnOffsetPeakDig = 0, dpdIqGiPeakOld = 0x7197C900, dpdIqGiPeakNew = 0x7197C900, dpdIqGqPeakOld = 0x72913B00, dpdIqGqPeakNew = 0x72913B00.
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[2015-01-13 10:02:11.300] trxCtrlDpdProc_0 dpdController.cc:1605 INFO:boardFreq= 955840, mgnOffsetPeakDig = 0, dpdIqGiPeakOld = 0x7197C900, dpdIqGiPeakNew = 0x7197C900, dpdIqGqPeakOld = 0x72913B00, dpdIqGqPeakNew = 0x72913B00.[2015-01-13 10:02:11.300] trxCtrlDpdProc_0 dpdController.cc:3757 INFO:DPD forcedidle prior to peak-phase calibration. dpdIrqStat: 0x00340008, dpdStat: 0x00140000, dpdStatusPd0: 0x00000000, dpdStatusPd1: 0x00000000[2015-01-13 10:02:11.300] trxCtrlDpdProc_0 dpdController.cc:3785 INFO:Using standard peak-phase calibration algorithm[2015-01-13 10:02:11.328] trxCtrlDpdProc_0 dpdController.cc:3846 INFO:Peak_calibrate_result_phase status ok: step 0: 54 deg[2015-01-13 10:02:11.328] trxCtrlDpdProc_0 dpdController.cc:3915 INFO:Peak_calibrate_result_phase: 53 deg[2015-01-13 10:02:11.328] trxCtrlDpdProc_0 dpdController.cc:3916 INFO:Peak_calibrate_result_value: 25426[2015-01-13 10:02:11.328] trxCtrlDpdProc_0 dpdController.cc:4017 INFO:Performedpeak phase calibration in 29199 us.
[2015-01-13 10:02:11.328] trxCtrlDpdProc_0 dpdController.cc:4018 INFO:Peak-phasecorrection versus flash: 0 deg.[2015-01-13 10:02:11.356] trxCtrlDpdProc_0 dpdController.cc:4260 INFO:PerformedDelay estimation with training signal in 24400 us. IntegerDelay: 0x1d3 FracDelay: 0x37[2015-01-13 10:02:11.356] trxCtrlDpdProc_0 dpdController.cc:4293 INFO:First fractional delay ok. dpdIrqStat: 0x00140000, dpdStat = 0x00140000, dpdMode = 0x08410610, dpdTxSurMaxAddr = 0x00000749, dpdDelEstFracDeltaInt = 0x00000000, dpdDelEstIntCorr = 0x00000000, dpdDelEstFracCorr = 0x00001ffe
[2015-01-13 10:02:11.356] trxCtrlDpdProc_0 dlDpdDelayCompHandler.cc:84 INFO:DPDdelay update, dpdDelay = 2742, currentDpdDelay[1]=1713 (0.1 ns)[2015-01-13 10:02:11.356] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3659 [0.1ns]
[2015-01-13 10:02:11.356] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1260), hardDelay:(834)
[2015-01-13 10:02:11.356] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDela
y:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:11.360] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3659 [0.1ns]
[2015-01-13 10:02:11.360] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1260), hardDelay:(834)
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[2015-01-13 10:02:11.360] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:11.360] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:324 INFO:tRuReportedDelayDl:298910 = tRuInternalDlDb:292940 + tDlFreqCompDelay:598 + tInternalBfnDelay:3659 + DpdDelay:1713[2015-01-13 10:02:11.360] trxCtrlDpdProc_0 dlDelayHandler.cc:106 INFO:gsm (dl filterBranch:1)tTrpToArp:30431[ns] = salCarrierReportedDelay:298910 + vldbSize_0_1ns/2:2590 + tAnpDl:0 + tTRpToRuInput:0 + tRicrTRpToRuInput:2730 + tExtBFNDelayDiff:80 + tFrameOffset:0.00,tFrameOffsetFrac:0.00[0.1ns],setBfnAdvancerAtFirstCarrier:0,setBfnAdvanceAtEveryCarrier:0
[2015-01-13 10:02:11.360] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:154 INFO:setTotalDelay set vldb to 264 ns[2015-01-13 10:02:11.376] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3659 [0.1ns]
[2015-01-13 10:02:11.376] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1260), hardDelay:(834)
[2015-01-13 10:02:11.376] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:11.376] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3659 [0.1ns]
[2015-01-13 10:02:11.376] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1260), hardDelay:(834)
[2015-01-13 10:02:11.376] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:11.376] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:324 INFO:tRuReportedDelayDl:298910 = tRuInternalDlDb:292940 + tDlFreqCompDelay:598 + tInternalBfnDelay:3659 + DpdDelay:1713
[2015-01-13 10:02:11.380] trxCtrlDpdProc_0 dlDelayHandler.cc:106 INFO:gsm (dl filterBranch:3)tTrpToArp:30431[ns] = salCarrierReportedDelay:298910 + vldbSize_0_1ns/2:2590 + tAnpDl:0 + tTRpToRuInput:0 + tRicrTRpToRuInput:2730 + tExtBFNDelayDiff:80 + tFrameOffset:0.00,tFrameOffsetFrac:0.00[0.1ns],setBfnAdvancerAtFirstCarrier:0,setBfnAdvanceAtEveryCarrier:0
[2015-01-13 10:02:11.380] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:154 INFO:setTotalDelay set vldb to 264 ns
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[2015-01-13 10:02:11.392] trDcProc warpBasedDlFreqConfig.cc:49 INFO:updateTrxCtrlAtRelease antennaBranchId: 0, trxDeviceId: 5, txLoFreq: 955840, (result: true)[2015-01-13 10:02:11.444] trDcProc dlCarrierPowerEventSubscriber.cc:81 INFO:CarrierUpdateEvent successful for carrier: 798, event: 4[2015-01-13 10:02:11.444] trDcProc dlDelayEventSubscriber.cc:233 INFO:carrierUpdateEvent, carrierId (hex): 31e, event :4[2015-01-13 10:02:11.444] trDcProc dlFreqHopHandler.cc:111 INFO:2 GSM carriers with frequency hopping enabled found[2015-01-13 10:02:11.464] trDcProc dlFreqHopHandler.cc:205 INFO:GSM carriers frequency hopping end for range:1 after 13 iteration[2015-01-13 10:02:11.464] trDcProc warp17DlFreqHopBlock.cc:241 INFO: DL releaseFreqHopCarrierId, fb=(2), invalidCarrierId=(128)[2015-01-13 10:02:11.464] trDcProc HAL_Interface.cc:1069 INFO:warp 17. filter =true[2015-01-13 10:02:11.464] trDcProc filterEventSubscriber.cc:80 INFO:supportFilter 1
[2015-01-13 10:02:11.468] trDcProc vddComp.cc:53 INFO:VddComp::carrierUpdateEvent: setting center frequency to 955800 and vector width to 2600[2015-01-13 10:02:11.472] trDcProc paConfig.cc:136 INFO:Not allowed to turn offPA: 1 since there is carrier setup in carrierList[2015-01-13 10:02:11.472] trDcProc trDcHandler.cc:1620 INFO:Device state: IDLE for carrierId:30, clientId:102[2015-01-13 10:02:11.472] trDcProc trDcHandler.cc:1644 INFO:Carrier released clientId:102 carrierId:30
[2015-01-13 10:02:11.476] trDcProc tx.cc:447 INFO:TX_OFF: Start txTrace instance: TxTracerA[2015-01-13 10:02:11.476] trDcProc txTraceWarp1x.cc:172 INFO:dlFbA0Cfg:0x80010000, dlFbA1Cfg:0x80020001, dlFbA2Cfg:0x80040000, dlFbA3Cfg:0x80080001,dlFbB0Cfg:0xf0000, dlFbB1Cfg:0xf0000, dlFbB2Cfg:0xf0000, dlFbB3Cfg:0xf0000, cgbDlTest:0x0[2015-01-13 10:02:11.504] trxCtrlDpdProc_0 dpdController.cc:2820 INFO:TX_OFF: dev = 7; Status: dpd on, state TUNED, de on, ga on; dev: 1, txFreq: 0, state: OFF;dev: 2, txFreq: 0, state: OFF; dev: 3, txFreq: 955800, state: ON; dev: 4, txFreq: 0, state: OFF; dev: 5, txFreq: 0, state: OFF; dev: 6, txFreq: 0, state: OFF; dev: 7, txFreq: 955800, state: OFF; dev: 8, txFreq
: 0, state: OFF;
[2015-01-13 10:02:11.504] trDcProc commonCsc.cc:254 INFO:carrierUpdateEvent DISABLED successful for carrier 801[2015-01-13 10:02:11.504] trDcProc paConfig.cc:136 INFO:Not allowed to turn offPA: 1 since there is carrier setup in carrierList[2015-01-13 10:02:11.504] trDcProc trDcHandler.cc:1613 INFO:Device state: BUSY/DEACTIVATE for carrierId:33, clientId:102
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[2015-01-13 10:02:11.508] trDcProc dlPwrClippingHandler.cc:126 INFO:configClipping: carrTypeCombination = 1, noOfWcdmaCarrier = 0, noOfLteCdmaCarrier = 0, noOfGsmCarrier = 1[2015-01-13 10:02:11.508] trDcProc dlClippingHalWarpImpl.cc:521 INFO:Does not support filter[2015-01-13 10:02:11.508] trDcProc commonCsc.cc:498 INFO:filterBranchId 1 already unblocked.[2015-01-13 10:02:11.508] trDcProc dlPwrClippingEventSubscriber.cc:77 INFO:carrierUpdateEvent successful for carrier: 801 event :4[2015-01-13 10:02:11.508] trxCtrlDpdProc_0 dpdController.cc:2499 INFO:TX_RELEASE: dev = 7, txLo: 955840, Status: dpd on, state TUNED, de on, ga on; dev: 1, txFreq: 0, state: OFF; dev: 2, txFreq: 0, state: OFF;dev: 3, txFreq: 955800, state: ON; dev: 4, txFreq: 0, state: OFF; dev: 5, txFreq: 0, state: OFF; dev: 6, txFreq: 0, state: OFF; dev: 7, txFreq: 955800, state: OFF; dev: 8, txFreq: 0, state: OFF;
[2015-01-13 10:02:11.508] trxCtrlDpdProc_0 dpdDeviceSetHandler.cc:300 INFO:Tx frequencies: HiFreq = 955800, LoFreq = 955800
[2015-01-13 10:02:11.576] trxCtrlDpdProc_0 dpdController.cc:1605 INFO:boardFreq= 955840, mgnOffsetPeakDig = 0, dpdIqGiPeakOld = 0x7197C900, dpdIqGiPeakNew = 0x7197C900, dpdIqGqPeakOld = 0x72913B00, dpdIqGqPeakNew = 0x72913B00.[2015-01-13 10:02:11.576] trxCtrlDpdProc_0 dpdController.cc:1605 INFO:boardFreq= 955840, mgnOffsetPeakDig = 0, dpdIqGiPeakOld = 0x7197C900, dpdIqGiPeakNew = 0x7197C900, dpdIqGqPeakOld = 0x72913B00, dpdIqGqPeakNew = 0x72913B00.[2015-01-13 10:02:11.576] trxCtrlDpdProc_0 dpdController.cc:3757 INFO:DPD forcedidle prior to peak-phase calibration. dpdIrqStat: 0x00340008, dpdStat: 0x00140000, dpdStatusPd0: 0x00000000, dpdStatusPd1: 0x0000
0000[2015-01-13 10:02:11.576] trxCtrlDpdProc_0 dpdController.cc:3785 INFO:Using standard peak-phase calibration algorithm[2015-01-13 10:02:11.600] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xc,fabEnCd 0xc, fabForce 0xd, mplPwrC0 0x0 C1 0x0 C2 0x0 C3 0x0, pmPa0C0 0x0 C1 0x0C2 0x0 C3 0x0, pa0C0Adj 0x0 C1 0x2014 C2 0x0 C3 0x2014, ncoC0 0x0 C1 0x8010 C2 0x0 C3 0x0, pmPa1 0x0 pa1Adj 0x47a4[2015-01-13 10:02:11.628] trxCtrlDpdProc_0 dpdController.cc:3846 INFO:Peak_calibrate_result_phase status ok: step 0: 54 deg
[2015-01-13 10:02:11.628] trxCtrlDpdProc_0 dpdController.cc:3915 INFO:Peak_calibrate_result_phase: 53 deg[2015-01-13 10:02:11.628] trxCtrlDpdProc_0 dpdController.cc:3916 INFO:Peak_calibrate_result_value: 25461[2015-01-13 10:02:11.628] trxCtrlDpdProc_0 dpdController.cc:4017 INFO:Performedpeak phase calibration in 51866 us.[2015-01-13 10:02:11.628] trxCtrlDpdProc_0 dpdController.cc:4018 INFO:Peak-phase
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correction versus flash: 0 deg.[2015-01-13 10:02:11.656] trxCtrlDpdProc_0 dpdController.cc:4260 INFO:PerformedDelay estimation with training signal in 25999 us. IntegerDelay: 0x1d3 FracDelay: 0x36[2015-01-13 10:02:11.656] trxCtrlDpdProc_0 dpdController.cc:4293 INFO:First fractional delay ok. dpdIrqStat: 0x00140000, dpdStat = 0x00140000, dpdMode = 0x08410610, dpdTxSurMaxAddr = 0x00000749, dpdDelEstFracDeltaInt = 0x00000000, dpdDelEstIntCorr = 0x00000000, dpdDelEstFracCorr = 0x00001ffd[2015-01-13 10:02:11.660] trxCtrlDpdProc_0 dlDpdDelayCompHandler.cc:84 INFO:DPDdelay update, dpdDelay = 2743, currentDpdDelay[1]=1714 (0.1 ns)[2015-01-13 10:02:11.660] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3658 [0.1ns]
[2015-01-13 10:02:11.660] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1259), hardDelay:(834)
[2015-01-13 10:02:11.660] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDela
y:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:11.660] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3658 [0.1ns]
[2015-01-13 10:02:11.660] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1259), hardDelay:(834)
[2015-01-13 10:02:11.660] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDela
y:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:11.664] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:324 INFO:tRuReportedDelayDl:298910 = tRuInternalDlDb:292940 + tDlFreqCompDelay:598 + tInternalBfnDelay:3658 + DpdDelay:1714[2015-01-13 10:02:11.664] trxCtrlDpdProc_0 dlDelayHandler.cc:106 INFO:gsm (dl filterBranch:1)tTrpToArp:30431[ns] = salCarrierReportedDelay:298910 + vldbSize_0_1ns/2:2590 + tAnpDl:0 + tTRpToRuInput:0 + tRicrTRpToRuInput:2730 + tExtBFNDelayDiff:80 + tFrameOffset:0.00,tFrameOffsetFrac:0.00[0.1ns],setBfnAdvancerAtFirstCarrier:0,setBfnAdvanceAtEveryCarrier:0
[2015-01-13 10:02:11.664] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:154 INFO:setTotalDelay set vldb to 264 ns[2015-01-13 10:02:11.676] trDcProc warpBasedDlFreqConfig.cc:49 INFO:updateTrxCtrlAtRelease antennaBranchId: 0, trxDeviceId: 7, txLoFreq: 955840, (result: true)[2015-01-13 10:02:11.712] trDcProc dlCarrierPowerEventSubscriber.cc:81 INFO:CarrierUpdateEvent successful for carrier: 801, event: 4
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[2015-01-13 10:02:11.712] trDcProc dlDelayEventSubscriber.cc:233 INFO:carrierUpdateEvent, carrierId (hex): 321, event :4[2015-01-13 10:02:11.712] trDcProc dlFreqHopHandler.cc:111 INFO:1 GSM carriers with frequency hopping enabled found[2015-01-13 10:02:11.728] trDcProc dlFreqHopHandler.cc:205 INFO:GSM carriers frequency hopping end for range:1 after 13 iteration[2015-01-13 10:02:11.728] trDcProc warp17DlFreqHopBlock.cc:241 INFO: DL releaseFreqHopCarrierId, fb=(3), invalidCarrierId=(128)[2015-01-13 10:02:11.728] trDcProc HAL_Interface.cc:1069 INFO:warp 17. filter =true[2015-01-13 10:02:11.728] trDcProc filterEventSubscriber.cc:80 INFO:supportFilter 1[2015-01-13 10:02:11.732] trDcProc vddComp.cc:53 INFO:VddComp::carrierUpdateEvent: setting center frequency to 955800 and vector width to 2600[2015-01-13 10:02:11.736] trxCtrlDpdProc_0 trxCtrl11HandlerPf4.cc:249 INFO:Zerofill enable
[2015-01-13 10:02:11.748] trxCtrlDpdProc_0 dpdPaController.cc:66 INFO:paCtrl called with newState = paOnPendEvent. Current state is paOnEvent[2015-01-13 10:02:11.748] trxCtrlDpdProc_0 dpdPaController.cc:96 INFO:new pa state: TRX_PA_ON_PEND_EVENT or TRX_PA_OFF_EVENT for txBranch 0[2015-01-13 10:02:11.752] trxCtrlDpdProc_0 paHalIf.cc:79 INFO:PA_OFF: paA SET TOSTATUS OFF[2015-01-13 10:02:11.752] trxCtrlDpdProc_0 trxCtrl11HandlerPf4.cc:228 INFO:Tx input disabled
[2015-01-13 10:02:11.752] trxCtrlDpdProc_0 trxCtrl11HandlerPf4.cc:228 INFO:Tx input disabled[2015-01-13 10:02:11.768] trxCtrlDpdProc_0 dlDpdDelayCompHandler.cc:84 INFO:DPDdelay update, dpdDelay = 2799, currentDpdDelay[1]=1749 (0.1 ns)[2015-01-13 10:02:11.772] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3658 [0.1ns]
[2015-01-13 10:02:11.772] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1259), hardDelay:(834)
[2015-01-13 10:02:11.772] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:11.772] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3658 [0.1ns]
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[2015-01-13 10:02:11.772] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1259), hardDelay:(834)
[2015-01-13 10:02:11.772] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:11.772] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:324 INFO:tRuReportedDelayDl:298945 = tRuInternalDlDb:292940 + tDlFreqCompDelay:598 + tInternalBfnDelay:3658 + DpdDelay:1749[2015-01-13 10:02:11.776] trxCtrlDpdProc_0 dlDelayHandler.cc:106 INFO:gsm (dl filterBranch:1)tTrpToArp:30435[ns] = salCarrierReportedDelay:298945 + vldbSize_0_1ns/2:2590 + tAnpDl:0 + tTRpToRuInput:0 + tRicrTRpToRuInput:2730 + tExtBFNDelayDiff:80 + tFrameOffset:0.00,tFrameOffsetFrac:0.00[0.1ns],setBfnAdvancerAtFirstCarrier:0,setBfnAdvanceAtEveryCarrier:0
[2015-01-13 10:02:11.776] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:154 INFO:setTotalDelay set vldb to 260 ns[2015-01-13 10:02:11.852] trxCtrlDpdProc_0 dpdController.cc:327 INFO:Not a RUWA
Hardcopy device[2015-01-13 10:02:11.852] trxEvtProc eventHandler.cc:1003 INFO:Fault already subscribed for faultId=0x33,txId=0[2015-01-13 10:02:11.852] trxEvtProc eventHandler.cc:1003 INFO:Fault already subscribed for faultId=0x37,txId=0[2015-01-13 10:02:11.876] trxCtrlDpdProc_0 dpdController.cc:340 INFO:ConfigDatainformation isWarp: 0x1, isClassic 0x0[2015-01-13 10:02:11.876] trxCtrlDpdProc_0 dpdController.cc:2153 INFO:DGB main/peak swap inactive.
[2015-01-13 10:02:11.876] trxCtrlDpdProc_0 dpdController.cc:2172 INFO:DAC main/peak swap inactive.[2015-01-13 10:02:11.876] trxCtrlDpdProc_0 dpdController.cc:357 INFO:dgbExist: NO, dgbEnable: NO[2015-01-13 10:02:11.876] trDcProc vddComp.cc:208 INFO:VddComp:tempCompInit: getting "/pa/table/id6" from DB, powerClassIndex: 0, paIdInternal: 0[2015-01-13 10:02:12.080] trxCtrlDpdProc_0 dpdController.cc:2375 INFO:TX_SETUP:dev = 3, carrierFrequency = 955800, txLo: 955840, Status: dpd off, state OFF, deoff, ga on; dev: 1, txFreq: 0, state: OFF; dev: 2
, txFreq: 0, state: OFF; dev: 3, txFreq: 0, state: OFF; dev: 4, txFreq: 0, state: OFF; dev: 5, txFreq: 0, state: OFF; dev: 6, txFreq: 0, state: OFF; dev: 7, txFreq: 0, state: OFF; dev: 8, txFreq: 0, state: OFF;
[2015-01-13 10:02:12.084] trxCtrlDpdProc_0 dpdController.cc:2391 INFO:Number ofconfigured carriers: tx: 0, rx: 0[2015-01-13 10:02:12.084] trxCtrlDpdProc_0 dpdController.cc:3601 INFO:1 carrierconfiguration, freqSetup: 955800
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[2015-01-13 10:02:12.084] trxCtrlDpdProc_0 dpdController.cc:1605 INFO:boardFreq= 955840, mgnOffsetPeakDig = 0, dpdIqGiPeakOld = 0x7197C900, dpdIqGiPeakNew = 0x7197C900, dpdIqGqPeakOld = 0x72913B00, dpdIqGqPeakNew = 0x72913B00.[2015-01-13 10:02:12.084] trDcProc warpBasedDlFreqConfig.cc:35 INFO:updateTrxCtrlAtSetup antennaBranchId: 0, trxDeviceId: 3, txLoFreq: 955840 (result: true)[2015-01-13 10:02:12.084] trDcProc dlCtrl.cc:228 INFO:Carrier id 795, FilterBranch id 1 is added into reEnabledCarrierFBList[2015-01-13 10:02:12.084] trxCtrlDpdProc_0 dpdPaController.cc:66 INFO:paCtrl called with newState = paOnPendEvent. Current state is paOnPendEvent[2015-01-13 10:02:12.084] trxCtrlDpdProc_0 dpdPaController.cc:115 INFO:TRX_CTRL_ACT_REQ: Current state and new state is the same, no action requierd.[2015-01-13 10:02:12.084] trDcProc dlCtrl.cc:385 INFO:1 enabled carriers, re enable started![2015-01-13 10:02:12.084] trDcProc txTraceWarp1x.cc:172 INFO:dlFbA0Cfg:0x80010000, dlFbA1Cfg:0x80020001, dlFbA2Cfg:0x80040000, dlFbA3Cfg:0x80080000,dlFbB0Cfg:0xf0000, dlFbB1Cfg:0xf0000, dlFbB2Cfg:0xf0000, dlFbB
3Cfg:0xf0000, cgbDlTest:0x0[2015-01-13 10:02:12.084] trDcProc tx.cc:388 INFO:carrierUpdateEvent: ENABLED ccData.deviceId 3, ccData.filterBranch 1, carrierConf.carrierId 795[2015-01-13 10:02:12.084] - fault_manager.cc:1910 INFO:Set event TX_ON_EVENT totime: 10000[ms], from 0x10097[2015-01-13 10:02:12.084] trxCtrlDpdProc_0 dpdController.cc:2592 INFO:TX_ON: dev= 3; Status: dpd off, state OFF, de off, ga on; dev: 1, txFreq: 0, state: OFF;dev: 2, txFreq: 0, state: OFF; dev: 3, txFreq: 955800, state: OFF; dev: 4, txFreq: 0, state: OFF; dev: 5, txFreq: 0, state: OFF; dev: 6, txFreq: 0, state: OFF; dev: 7, txFreq: 0, state: OFF; dev: 8, txFreq: 0,
state: OFF;
[2015-01-13 10:02:12.084] trxCtrlDpdProc_0 trxCtrl11HandlerPf4.cc:228 INFO:Tx input disabled[2015-01-13 10:02:12.084] trxCtrlDpdProc_0 dpdPaController.cc:66 INFO:paCtrl called with newState = paOnEvent. Current state is paOnPendEvent[2015-01-13 10:02:12.084] trxEvtProc eventHandler.cc:1028 INFO:Event already subscribed,eventId=0x80, txId=0[2015-01-13 10:02:12.096] trxCtrlDpdProc_0 paHalIf.cc:108 INFO:PA_ON: paA SET TOSTATUS ON
[2015-01-13 10:02:12.176] trxCtrlDpdProc_0 dpdController.cc:1605 INFO:boardFreq= 955840, mgnOffsetPeakDig = 0, dpdIqGiPeakOld = 0x7197C900, dpdIqGiPeakNew = 0x7197C900, dpdIqGqPeakOld = 0x72913B00, dpdIqGqPeakNew = 0x72913B00.[2015-01-13 10:02:12.176] trxCtrlDpdProc_0 dpdController.cc:2676 INFO:m_commonConf.m_isPeakBranchPresent= 1, m_commonConf.m_isWarp= 1, pTrx->hasRuwaHardcopy= 0[2015-01-13 10:02:12.176] trxCtrlDpdProc_0 trxCtrl11HandlerPf4.cc:233 INFO:Tx in
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put enabled[2015-01-13 10:02:12.176] trxCtrlDpdProc_0 dpdStateHandler.cc:662 INFO:Trainingsignals. (attTuning:true dpdStart:false delEst:true)[2015-01-13 10:02:12.176] trxCtrlDpdProc_0 dpdStateHandler.cc:664 INFO:Wait fordata. (Pma:-i[-42.55 -8.00], DpdPma:-i[-i -i], Pmb:-i, TorPmb:-58.13[-i -8.00] dB)[2015-01-13 10:02:12.180] trDcProc powerClassCtrl.cc:356 INFO:salPowerClassDbm on branch 1 calculated to 4900 (closest actual 4900)[2015-01-13 10:02:12.180] trDcProc paConfig.cc:136 INFO:Not allowed to turn offPA: 1 since there is carrier setup in carrierList[2015-01-13 10:02:12.180] trDcProc trDcHandler.cc:1620 INFO:Device state: IDLE for carrierId:33, clientId:102[2015-01-13 10:02:12.180] trDcProc trDcHandler.cc:1644 INFO:Carrier released clientId:102 carrierId:33[2015-01-13 10:02:12.180] trDcProc dlCtrl.cc:261 INFO:DlCtrl::carrierUpdateEvent: remove the filter branch id 1 from the reEnabledCarrierFBList upon receipt ofevent CR_SUBSCRIPTION_EVENT_CARRIER_DISABLED
[2015-01-13 10:02:12.180] trDcProc commonCsc.cc:275 INFO:carrierUpdateEvent DISABLED successful for carrier 799[2015-01-13 10:02:12.180] trDcProc trDcHandler.cc:1613 INFO:Device state: BUSY/DEACTIVATE for carrierId:31, clientId:102[2015-01-13 10:02:12.184] trDcProc cfpgaComUlCpriCtrlBlock.cc:135 INFO:disableLink, fb 1[2015-01-13 10:02:12.188] trDcProc HAL_Interface.cc:1069 INFO:warp 17. filter =true
[2015-01-13 10:02:12.188] trDcProc filterEventSubscriber.cc:80 INFO:supportFilter 1[2015-01-13 10:02:12.188] trDcProc rxGainComp.cc:199 INFO:updateCarrierData() carrierConf.carrierId=799, carrierConf.carrierRfPort=B[2015-01-13 10:02:12.188] trDcProc rxGainComp.cc:225 INFO:rx4A2 m_vectorWidth=2600, signalBW=200, carrierFreqMin=909500, carrierFreqMax=912100[2015-01-13 10:02:12.188] trDcProc vddComp.cc:53 INFO:VddComp::carrierUpdateEvent: setting center frequency to 955800 and vector width to 2600[2015-01-13 10:02:12.188] trDcProc trDcHandler.cc:1620 INFO:Device state: IDLE f
or carrierId:31, clientId:102[2015-01-13 10:02:12.188] trDcProc trDcHandler.cc:1644 INFO:Carrier released clientId:102 carrierId:31[2015-01-13 10:02:12.188] trDcProc commonCsc.cc:275 INFO:carrierUpdateEvent DISABLED successful for carrier 802[2015-01-13 10:02:12.188] trDcProc trDcHandler.cc:1613 INFO:Device state: BUSY/DEACTIVATE for carrierId:34, clientId:102
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[2015-01-13 10:02:12.192] trDcProc cfpgaComUlCpriCtrlBlock.cc:135 INFO:disableLink, fb 0[2015-01-13 10:02:12.196] trDcProc HAL_Interface.cc:1069 INFO:warp 17. filter =true[2015-01-13 10:02:12.196] trDcProc filterEventSubscriber.cc:80 INFO:supportFilter 1[2015-01-13 10:02:12.196] trDcProc rxGainComp.cc:199 INFO:updateCarrierData() carrierConf.carrierId=802, carrierConf.carrierRfPort=B[2015-01-13 10:02:12.196] trDcProc rxGainComp.cc:225 INFO:rx4A1 m_vectorWidth=2600, signalBW=200, carrierFreqMin=909500, carrierFreqMax=912100[2015-01-13 10:02:12.196] trDcProc vddComp.cc:53 INFO:VddComp::carrierUpdateEvent: setting center frequency to 955800 and vector width to 2600[2015-01-13 10:02:12.196] trDcProc trDcHandler.cc:1620 INFO:Device state: IDLE for carrierId:34, clientId:102[2015-01-13 10:02:12.196] trDcProc trDcHandler.cc:1644 INFO:Carrier released clientId:102 carrierId:34
[2015-01-13 10:02:12.200] trDcProc commonCsc.cc:275 INFO:carrierUpdateEvent DISABLED successful for carrier 796[2015-01-13 10:02:12.200] trDcProc trDcHandler.cc:1613 INFO:Device state: BUSY/DEACTIVATE for carrierId:28, clientId:102[2015-01-13 10:02:12.204] trDcProc cfpgaComUlCpriCtrlBlock.cc:135 INFO:disableLink, fb 2[2015-01-13 10:02:12.204] trDcProc HAL_Interface.cc:1069 INFO:warp 17. filter =true
[2015-01-13 10:02:12.204] trDcProc filterEventSubscriber.cc:80 INFO:supportFilter 1[2015-01-13 10:02:12.204] trDcProc rxGainComp.cc:199 INFO:updateCarrierData() carrierConf.carrierId=796, carrierConf.carrierRfPort=B[2015-01-13 10:02:12.204] trDcProc rxGainComp.cc:225 INFO:rx4A3 m_vectorWidth=2600, signalBW=200, carrierFreqMin=909500, carrierFreqMax=912100[2015-01-13 10:02:12.204] trDcProc vddComp.cc:53 INFO:VddComp::carrierUpdateEvent: setting center frequency to 955800 and vector width to 2600[2015-01-13 10:02:12.204] trDcProc trDcHandler.cc:1620 INFO:Device state: IDLE f
or carrierId:28, clientId:102[2015-01-13 10:02:12.204] trDcProc trDcHandler.cc:1644 INFO:Carrier released clientId:102 carrierId:28[2015-01-13 10:02:12.268] trxCtrlDpdProc_0 dpdController.cc:2375 INFO:TX_SETUP:dev = 3, carrierFrequency = 955800, txLo: 955840, Status: dpd off, state RAMPING, de off, ga on; dev: 1, txFreq: 0, state: OFF; dev: 2, txFreq: 0, state: OFF; dev: 3, txFreq: 955800, state: INIT; dev: 4, txFreq: 0, state: OFF; dev: 5, txFreq: 0, state: OFF; dev: 6, txFreq: 0, state: OFF; d
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ev: 7, txFreq: 0, state: OFF; dev: 8, txFreq: 0, state: OFF;
[2015-01-13 10:02:12.268] trxCtrlDpdProc_0 dpdController.cc:2391 INFO:Number ofconfigured carriers: tx: 1, rx: 0[2015-01-13 10:02:12.268] trxCtrlDpdProc_0 dpdController.cc:3601 INFO:1 carrierconfiguration, freqSetup: 955800
[2015-01-13 10:02:12.268] trxCtrlDpdProc_0 dpdController.cc:1605 INFO:boardFreq= 955840, mgnOffsetPeakDig = 0, dpdIqGiPeakOld = 0x7197C900, dpdIqGiPeakNew = 0x7197C900, dpdIqGqPeakOld = 0x72913B00, dpdIqGqPeakNew = 0x72913B00.[2015-01-13 10:02:12.268] trDcProc warpBasedDlFreqConfig.cc:35 INFO:updateTrxCtrlAtSetup antennaBranchId: 0, trxDeviceId: 3, txLoFreq: 955840 (result: true)[2015-01-13 10:02:12.284] trxCtrlDpdProc_0 dpdStateRamping.cc:56 INFO:Start Ramping. (Pma:-26.50[-42.55 -8.00], DpdPma:-29.50[-30.00 -29.00], Pmb:-26.50, TorPmb:-34.12[-61.50 -8.00] dB)[2015-01-13 10:02:12.292] trDcProc dlCarrierPowerEventSubscriber.cc:81 INFO:CarrierUpdateEvent successful for carrier: 795, event: 512
[2015-01-13 10:02:12.292] trDcProc dlDelayEventSubscriber.cc:233 INFO:carrierUpdateEvent, carrierId (hex): 31b, event :512[2015-01-13 10:02:12.292] trDcProc linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3658 [0.1ns]
[2015-01-13 10:02:12.292] trDcProc linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1259), hardDelay:(834)
[2015-01-13 10:02:12.292] trDcProc linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(
80)
[2015-01-13 10:02:12.292] trDcProc linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3658 [0.1ns]
[2015-01-13 10:02:12.292] trDcProc linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1259), hardDelay:(834)
[2015-01-13 10:02:12.292] trDcProc linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(
80)
[2015-01-13 10:02:12.296] trDcProc platformXDlDelayAdjust.cc:324 INFO:tRuReportedDelayDl:298945 = tRuInternalDlDb:292940 + tDlFreqCompDelay:598 + tInternalBfnDelay:3658 + DpdDelay:1749[2015-01-13 10:02:12.296] trDcProc dlDelayHandler.cc:106 INFO:gsm (dl filterBranch:1)tTrpToArp:30435[ns] = salCarrierReportedDelay:298945 + vldbSize_0_1ns/2:2590 + tAnpDl:0 + tTRpToRuInput:0 + tRicrTRpToRuInput
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:2730 + tExtBFNDelayDiff:80 + tFrameOffset:0.00,tFrameOffsetFrac:0.00[0.1ns],setBfnAdvancerAtFirstCarrier:0,setBfnAdvanceAtEveryCarrier:0
[2015-01-13 10:02:12.296] trDcProc platformXDlDelayAdjust.cc:154 INFO:setTotalDelay set vldb to 260 ns[2015-01-13 10:02:12.308] trDcProc dlFreqHopHandler.cc:111 INFO:1 GSM carriers with frequency hopping enabled found[2015-01-13 10:02:12.320] trDcProc dlFreqHopHandler.cc:205 INFO:GSM carriers frequency hopping end for range:1 after 13 iteration[2015-01-13 10:02:12.320] trDcProc vddComp.cc:53 INFO:VddComp::carrierUpdateEvent: setting center frequency to 955800 and vector width to 2600[2015-01-13 10:02:12.708] timeOutSrv txTraceWarp1x.cc:141 INFO:warpA:fabEn 0xc,fabEnCd 0x0, fabForce 0xd, mplPwrC0 0x0 C1 0x0 C2 0x0 C3 0x0, pmPa0C0 0x0 C1 0x0C2 0x0 C3 0x0, pa0C0Adj 0x0 C1 0x2014 C2 0x0 C3 0x0, ncoC0 0x0 C1 0x8010 C2 0x0 C3 0x0, pmPa1 0x0 pa1Adj 0x47a4[2015-01-13 10:02:12.896] trxCtrlDpdProc_0 dpdStateTuning.cc:68 INFO:gainAdjust:0.118837, gainAdjustValue: true, maxDiffAddr: 1, diffAddrLimit: 0, gainAdjustmentLoopChanged: 0
[2015-01-13 10:02:13.072] trxCtrlDpdProc_0 dpdStateTuning.cc:152 INFO:Start DPD.(Pma:-26.50[-42.55 -8.00], DpdPma:-29.50[-30.00 -29.00], Pmb:-26.50, TorPmb:-26.47[-61.50 -8.00] dB)[2015-01-13 10:02:13.072] trxCtrlDpdProc_0 dpdController.cc:1605 INFO:boardFreq= 955840, mgnOffsetPeakDig = 0, dpdIqGiPeakOld = 0x7197C900, dpdIqGiPeakNew = 0x7197C900, dpdIqGqPeakOld = 0x72913B00, dpdIqGqPeakNew = 0x72913B00.[2015-01-13 10:02:13.072] trxCtrlDpdProc_0 dpdController.cc:3757 INFO:DPD forcedidle prior to peak-phase calibration. dpdIrqStat: 0x04340008, dpdStat: 0x00140000, dpdStatusPd0: 0x00000000, dpdStatusPd1: 0x0000
0000[2015-01-13 10:02:13.072] trxCtrlDpdProc_0 dpdController.cc:3785 INFO:Using standard peak-phase calibration algorithm[2015-01-13 10:02:13.100] trxCtrlDpdProc_0 dpdController.cc:3846 INFO:Peak_calibrate_result_phase status ok: step 0: 54 deg[2015-01-13 10:02:13.100] trxCtrlDpdProc_0 dpdController.cc:3915 INFO:Peak_calibrate_result_phase: 53 deg[2015-01-13 10:02:13.100] trxCtrlDpdProc_0 dpdController.cc:3916 INFO:Peak_calibrate_result_value: 24662
[2015-01-13 10:02:13.104] trxCtrlDpdProc_0 dpdController.cc:4017 INFO:Performedpeak phase calibration in 29333 us.[2015-01-13 10:02:13.104] trxCtrlDpdProc_0 dpdController.cc:4018 INFO:Peak-phasecorrection versus flash: 0 deg.[2015-01-13 10:02:13.132] trxCtrlDpdProc_0 dpdController.cc:4260 INFO:PerformedDelay estimation with training signal in 25999 us. IntegerDelay: 0x1d3 FracDelay: 0x35
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[2015-01-13 10:02:13.132] trxCtrlDpdProc_0 dpdController.cc:4293 INFO:First fractional delay ok. dpdIrqStat: 0x00140000, dpdStat = 0x00140000, dpdMode = 0x08410610, dpdTxSurMaxAddr = 0x00000749, dpdDelEstFracDeltaInt = 0x00000000, dpdDelEstIntCorr = 0x00000000, dpdDelEstFracCorr = 0x00001ffd[2015-01-13 10:02:13.132] trxCtrlDpdProc_0 dlDpdDelayCompHandler.cc:84 INFO:DPDdelay update, dpdDelay = 2744, currentDpdDelay[1]=1715 (0.1 ns)[2015-01-13 10:02:13.132] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3656 [0.1ns]
[2015-01-13 10:02:13.132] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1257), hardDelay:(834)
[2015-01-13 10:02:13.132] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:13.136] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpga
Delay:3656 [0.1ns]
[2015-01-13 10:02:13.136] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1257), hardDelay:(834)
[2015-01-13 10:02:13.136] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:13.136] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:324 INFO:tR
uReportedDelayDl:298927 = tRuInternalDlDb:292940 + tDlFreqCompDelay:616 + tInternalBfnDelay:3656 + DpdDelay:1715[2015-01-13 10:02:13.136] trxCtrlDpdProc_0 dlDelayHandler.cc:106 INFO:gsm (dl filterBranch:1)tTrpToArp:30433[ns] = salCarrierReportedDelay:298927 + vldbSize_0_1ns/2:2590 + tAnpDl:0 + tTRpToRuInput:0 + tRicrTRpToRuInput:2730 + tExtBFNDelayDiff:80 + tFrameOffset:0.00,tFrameOffsetFrac:0.00[0.1ns],setBfnAdvancerAtFirstCarrier:0,setBfnAdvanceAtEveryCarrier:0
[2015-01-13 10:02:13.136] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:154 INFO:setTotalDelay set vldb to 262 ns
[2015-01-13 10:02:13.148] trxCtrlDpdProc_0 dpdController.cc:5585 INFO:RU_TX_ON_IND sent for device id3[2015-01-13 10:02:13.148] trDcProc rusDlFreqConfig.cc:162 INFO:frequency = 956400 (kHz), compensatedFreq = 956400 (kHz), rasterkHz = 80 (kHz)[2015-01-13 10:02:13.156] trDcProc carrierListHandler.cc:453 INFO:CarrierListHandler::txLoUpdated() CR_SUBSCRIPTION_EVENT_DL_TXLO carrierId=795[2015-01-13 10:02:13.156] trDcProc dlFreqHopHandler.cc:111 INFO:1 GSM carriers w
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[2015-01-13 10:02:13.344] trxCtrlDpdProc_0 dpdController.cc:4293 INFO:First fractional delay ok. dpdIrqStat: 0x00140000, dpdStat = 0x00140000, dpdMode = 0x08410610, dpdTxSurMaxAddr = 0x00000749, dpdDelEstFracDeltaInt = 0x00000000, dpdDelEstIntCorr = 0x00000000, dpdDelEstFracCorr = 0x00001ffb[2015-01-13 10:02:13.344] trxCtrlDpdProc_0 dlDpdDelayCompHandler.cc:84 INFO:DPDdelay update, dpdDelay = 2757, currentDpdDelay[1]=1723 (0.1 ns)[2015-01-13 10:02:13.344] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3656 [0.1ns]
[2015-01-13 10:02:13.344] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1257), hardDelay:(834)
[2015-01-13 10:02:13.344] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:13.348] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:128 INFO:comFpga
Delay:3656 [0.1ns]
[2015-01-13 10:02:13.348] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1257), hardDelay:(834)
[2015-01-13 10:02:13.348] trxCtrlDpdProc_0 linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:13.348] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:324 INFO:tR
uReportedDelayDl:298935 = tRuInternalDlDb:292940 + tDlFreqCompDelay:616 + tInternalBfnDelay:3656 + DpdDelay:1723[2015-01-13 10:02:13.348] trxCtrlDpdProc_0 dlDelayHandler.cc:106 INFO:gsm (dl filterBranch:1)tTrpToArp:30434[ns] = salCarrierReportedDelay:298935 + vldbSize_0_1ns/2:2590 + tAnpDl:0 + tTRpToRuInput:0 + tRicrTRpToRuInput:2730 + tExtBFNDelayDiff:80 + tFrameOffset:0.00,tFrameOffsetFrac:0.00[0.1ns],setBfnAdvancerAtFirstCarrier:0,setBfnAdvanceAtEveryCarrier:0
[2015-01-13 10:02:13.348] trxCtrlDpdProc_0 platformXDlDelayAdjust.cc:154 INFO:setTotalDelay set vldb to 261 ns
[2015-01-13 10:02:13.360] trDcProc warpBasedDlFreqConfig.cc:35 INFO:updateTrxCtrlAtSetup antennaBranchId: 0, trxDeviceId: 3, txLoFreq: 956400 (result: true)[2015-01-13 10:02:13.432] trDcProc dlCarrierPowerEventSubscriber.cc:81 INFO:CarrierUpdateEvent successful for carrier: 795, event: 512[2015-01-13 10:02:13.432] trDcProc dlDelayEventSubscriber.cc:233 INFO:carrierUpdateEvent, carrierId (hex): 31b, event :512[2015-01-13 10:02:13.432] trDcProc linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:36
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56 [0.1ns]
[2015-01-13 10:02:13.432] trDcProc linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1257), hardDelay:(834)
[2015-01-13 10:02:13.432] trDcProc linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:13.432] trDcProc linkHalIfCpriFpga.cc:128 INFO:comFpgaDelay:3656 [0.1ns]
[2015-01-13 10:02:13.432] trDcProc linkHalIfCpriFpga.cc:129 INFO:serdesDelay:(20), jbDelay:(1257), hardDelay:(834)
[2015-01-13 10:02:13.432] trDcProc linkHalIfCpriFpga.cc:130 INFO:RfsDelay:(488.281250 + 162.760417), BfnDelay:(813.802083 + 0.000000), tBfnFabToCalibPortDelay:(80)
[2015-01-13 10:02:13.432] trDcProc platformXDlDelayAdjust.cc:324 INFO:tRuReportedDelayDl:298935 = tRuInternalDlDb:292940 + tDlFreqCompDelay:616 + tInternalBfnDelay:3656 + DpdDelay:1723[2015-01-13 10:02:13.436] trDcProc dlDelayHandler.cc:106 INFO:gsm (dl filterBranch:1)tTrpToArp:30434[ns] = salCarrierReportedDelay:298935 + vldbSize_0_1ns/2:2590 + tAnpDl:0 + tTRpToRuInput:0 + tRicrTRpToRuInput:2730 + tExtBFNDelayDiff:80 + tFrameOffset:0.00,tFrameOffsetFrac:0.00[0.1ns],setBfnAdvancerAtFirstCarrier:0,setBfnAdvanceAtEveryCarrier:0
[2015-01-13 10:02:13.436] trDcProc platformXDlDelayAdjust.cc:154 INFO:setTotalDe
lay set vldb to 261 ns[2015-01-13 10:02:13.448] trDcProc dlFreqHopHandler.cc:111 INFO:1 GSM carriers with frequency hopping enabled found[2015-01-13 10:02:13.452] trDcProc dlFreqHopHandler.cc:205 INFO:GSM carriers frequency hopping end for range:1 after 7 iteration[2015-01-13 10:02:13.456] trDcProc vddComp.cc:53 INFO:VddComp::carrierUpdateEvent: setting center frequency to 956400 and vector width to 1400[2015-01-13 10:02:13.456] trDcProc commonCsc.cc:275 INFO:carrierUpdateEvent DISABLED successful for carrier 800
[2015-01-13 10:02:13.456] trDcProc trDcHandler.cc:1613 INFO:Device state: BUSY/DEACTIVATE for carrierId:32, clientId:102[2015-01-13 10:02:13.460] trDcProc cfpgaComUlCpriCtrlBlock.cc:135 INFO:disableLink, fb 5[2015-01-13 10:02:13.460] trDcProc HAL_Interface.cc:1069 INFO:warp 17. filter =true
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[2015-01-13 10:02:13.460] trDcProc filterEventSubscriber.cc:80 INFO:supportFilter 1[2015-01-13 10:02:13.460] trDcProc rxGainComp.cc:199 INFO:updateCarrierData() carrierConf.carrierId=800, carrierConf.carrierRfPort=B[2015-01-13 10:02:13.464] trDcProc rxGainComp.cc:225 INFO:rx4B2 m_vectorWidth=2600, signalBW=200, carrierFreqMin=909500, carrierFreqMax=912100[2015-01-13 10:02:13.464] trDcProc vddComp.cc:53 INFO:VddComp::carrierUpdateEvent: setting center frequency to 956400 and vector width to 1400[2015-01-13 10:02:13.464] trDcProc trDcHandler.cc:1620 INFO:Device state: IDLE for carrierId:32, clientId:102[2015-01-13 10:02:13.464] trDcProc trDcHandler.cc:1644 INFO:Carrier released clientId:102 carrierId:32[2015-01-13 10:02:13.464] trDcProc commonCsc.cc:275 INFO:carrierUpdateEvent DISABLED successful for carrier 803[2015-01-13 10:02:13.464] trDcProc trDcHandler.cc:1613 INFO:Device state: BUSY/DEACTIVATE for carrierId:35, clientId:102
[2015-01-13 10:02:13.468] trDcProc cfpgaComUlCpriCtrlBlock.cc:135 INFO:disableLink, fb 4[2015-01-13 10:02:13.468] trDcProc HAL_Interface.cc:1069 INFO:warp 17. filter =true[2015-01-13 10:02:13.468] trDcProc filterEventSubscriber.cc:80 INFO:supportFilter 1[2015-01-13 10:02:13.468] trDcProc rxGainComp.cc:199 INFO:updateCarrierData() carrierConf.carrierId=803, carrierConf.carrierRfPort=B[2015-01-13 10:02:13.468] trDcProc rxGainComp.cc:225 INFO:rx4B1 m_vectorWidth=26
00, signalBW=200, carrierFreqMin=909500, carrierFreqMax=912100[2015-01-13 10:02:13.472] trDcProc vddComp.cc:53 INFO:VddComp::carrierUpdateEvent: setting center frequency to 956400 and vector width to 1400[2015-01