Download pdf - Verdi3 Automated Debug PlatformVerdi3_datasheet.pdf• Compact format reduces file size by more ... • Automatic tracing of signal activity across ... integrate 3the Verdi system

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FUNCTIONAL CLOSURE SOLUTIONS

Faster, smaller and more efficient infrastructure:• Multi-threadeddatabaseboostsperformance

bymorethan45%

• Compactformatreducesfilesizebymorethan30%

• Parallelsimulationdumpingfor30%productivitygain

Flexible graphical user interface for personalization:• Fastaccesstosourcefiles,videosand

user-defineddocuments

• Personalizewindowlayouttofityourdebugneeds

• Differentworkingmodesfordifferentdebugpurposes

• Centralizedspotlighttosearchcommands,preferencesanddocuments

Verdi3™ AutomatedDebug Platform

SpringSoft’s Verdi3™ software is an

open platform for debugging digital

designs with powerful technology

that helps you:

• Comprehend complex and unfamiliar

design behavior

• Automate difficult and tedious

debug processes

• Unify diverse and complicated

design environments

Third Generation Debug PlatformTheVerdi3generationplatformbuildsonthesecorevalueswithunprecedentedpersonalization,customizationandinteroperabilitytomaximizeyourdebugproductivity.Youcanspeeddebugofyourlarge,complexdesigns,tailorthedebugenvironmentforthewayyouwork,anddirectlyintegratecustomandthird-partyprogramsintoyourflows.



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Core Features

TheVerdi3platformprovidesyouwithfundamentaldebugfeatures:

• �Full-featured�Waveform�Viewertodisplayandanalyzeactivityovertime

• �High�performance�Fast�Signal�Database�(FSDB)�5.0�formatwithmulti-threadedtechnologyforaccesstoFSDBdatatwotimesfasterthanpreviousversion

• �Powerful�Waveform�Comparison�EnginetoquicklyisolatedifferencesbetweenFSDBfiles

• �Source�Code�Browsertoeasilytraversebetweensourcecodeandhierarchy

• �Flexible�schematicsandblockdiagramsthatdisplaylogicandconnectivityusingfamiliarsymbols

• �Intuitive�bubble�diagramsthatrevealtheoperationoffinitestatemachines

Advanced Features

TheVerdi3platformalsoenablesyoutoperformadvanceddebugoperations:

• �Automatic�tracing�of�signal�activityacrossmanyclockcycleswithpowerfulbehavioranalysisengine

• �Temporal�flow�viewsprovideacombineddisplayoftimeandstructuretohelpyourapidlyunderstandcause-and-effectrelationships

• �Transaction-based�debugwithflexibletransactionandmessagesupporttodesigndebugandanalysisathigherlevelsofabstraction

• �Assertion-based�debugwithbuilt-insupportforassertionsfacilitatesquicktraversalfromassertionfailuretorelateddesignactivity

• �SystemVerilog�testbench�debugwith:

>Specializedviewsoftestbenchcode,includingdeclaration-basedhierarchybrowsingandnavigation,classinheritanceandrelationshipcomprehension,andtracingcapabilities

>Messageloggingcapability,coupledwithadvancedvisualizationtechniques,forcompletepictureoftestbenchactivityandverificationenvironment

>Full-featuredinteractivesimulationcontroltostepthroughcomplextestbenchcodeformoredetailedanalysis

Seamless VIA integration for customized flows:

• RicharrayofVIAprogramstotailorVerdi3deploymentforuserflows

• Customizablemenu/toolbarsenableVIAfunctionsinVerdi3userinterface

• DirectlaunchofVIA-enabledthird-partytools/scriptsfromdebugenvironment

Cut Debug Time in HalfTheVerdi3debugplatformletsyoufocusontasksthataddmorevaluetoyourdesignsbycuttingyourdebugtime,typicallybyover50%,withdebugautomationtechnologythat:

• Automatesbehaviortracingandanalysis

• Extracts,isolates,anddisplayspertinentlogicinflexibledesignviews

• Revealsoperationandinteractionbetweendesign,powerintent,assertionsandtestbench

Complete Debug EnvironmentTheVerdi3AutomatedDebugPlatformbringstogetheralloftheadvancedtechnologyandcapabilitiesyouneedtodebugwithsupportforthebroadrangeoflanguagesandmethodologiesusedtodesignandverifycomplexICsandSoCs.

Users�can�personalize�the�layout�and�debug�modes��

of�Verdi3�environment.



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Personalized Graphical User Interface

TheVerdi3platformprovidesQt-basedGUIandflexibleusagemodelswith:

• �Welcome�Pageforaccesstoinformationanddebugmodes

>Releasenotes,applicationnotesandcommandreferencedocuments

>Pre-definedmodesfordifferentdebugtasks,suchashardwaredebug,testbenchdebug,power-awareandpropertydebug

>Savedsessionswithscreenshotsandtextnotestorestore/continuework

>Trainingvideosthatdemonstratehowtousekeyfeatures

>Customizableuserlinksforsharingdocumentsandwebpage

• �Window�management�systemtopersonalizelayoutofdebugenvironment

>Allcomponentscanbedockedorundockedfrommajorwindow

>MajormoduleslikenWave,nSchemaandTFVcanbeconfiguredasstandalonewindow

>One-clickaccesstomultiplesourcefileswithinsinglewindow

>Customizabletoolbar,menuandhotkeysfornaturalfitwithdebugtasks

• �Spotlight�Searchforfast,efficientnavigationofcommands,manualsandpreferencesettings

Broad Language and Methodology Support

TheVerdi3platformenablesdebugof:

• DesigncomponentsdescribedinVerilog,VHDL,andSystemVerilog

• AutomatedtestbenchenvironmentsusingSystemVerilogTestbench(SVTB)

• AssertionsusingSystemVerilogAssertions(SVA)

Open Architecture and Unified MethodologyTheVerdi3platformisdesignedsothatyoucantakefulladvantageofyourverificationanddebugmethodology.ThesystemisbuiltonSpringSoft’sopenDesignKnowledgeArchitectureforcompiling,extractingandpreservingrelevantinformationintodatabasesthatareoptimizedforefficientdebug.Itoperatesconsistentlyacrossmultipledomains—verificationtools,design/verificationlanguages,andabstractions—tounifyyourdebugprocess,reducelearningcurvesandsavetimeasyoumovetonewdesignprojects.

Design Knowledge Architecture• �Knowledge�Engine�Compilersextractdesign

knowledgecontainedinHDLcode,testbenches,andassertions

• �Knowledge�Database�(KDB)storescrucialdesignknowledgetofacilitatedebugandunderstandingofyourdesign

• �Fast�Signal�Database�(FSDB)capturesandstoresresultsfromsimulators,emulators,andformaltoolsthatproducetime/valuesequences

• Application�Programming�Interfaces�(APIs)provideopenaccesstobothdatabasesandcommand-and-controlmechanisms,enablingyoutoeasilyintegratetheVerdi3systemwithotherverificationtoolsanddesignenvironments

Verdi3�users�can�quickly�access�and�traverse�

multiple�source�files�in�a�single�window.



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Interoperability and Customization TheopenarchitectureandinteroperabilityoftheVerdi3platformalsoenablesyoutoleverageyourinvestmentwithintegrationofothercommercialandproprietaryverificationtools.Itscontinuouslyexpandingecosystemprovidesout-of-the-boxsupportforawiderangeofcommonlyusedtools,including:

• Simulators

• Emulatorsandaccelerators

• Modelcheckersandotherformalanalysisengines

YoucanfurthermaximizetheeffectivenessofyourVerdi3deploymentwithcustomautomationprogramsthatleveragethepowerofitsunderlyingdesignknowledgeinfrastructurefordataminingandmanipulationapplications.SeamlessintegrationwithSpringSoft’sVIA(VerdiInteroperabilityApps)platformprovideseverythingyouneedtoquicklycreateandintegrateOpenSourcescripts/utilitieswiththeVerdi3softwarethataredesignedtoworkreliablyinyourflow.

Debug and Analysis Across Multiple Abstraction Levels

TheVerdi3platformallowsyoutoseamlesslydebugthroughoutyoursystem-leveltogate-levelmethodologyflow.ItprovidesadditionalsupportforverificationandanalysisattheimplementationlevelwiththeAnalyzerDesignImplementationAnalysismodule,asingleenvironmentforanalyzingtroublesomedesignerrorsrelatedtoclocks,clocktrees,andtiming.

Debug of Power-Aware Design Intent

TheVerdi3Power-AwareDebugModuleacceleratescomprehensionofpowerintentandautomatestheprocessofvisualizing,tracing,andanalyzingthesourceofpower-relatederrors.Itsimplifiestheveri-ficationoflow-powerSoCdesignswithautomationtechnologiesthathelpyou:

• �VisualizepowerintentwithUPF/CPF

• �ComprehendimpactofpowerintentonHDLdesign

• �Automatedebugtodeterminewhetherunexpecteddesignbehavioriscausedbyfunctionallogicorpower-relatederrors

Debug�and�Analysis�Across�Multiple��

Abstraction�Levels

The Verdi3 Automated Debug Platform Saves You TimeSpringSoft’saward-winningdebugsoftwarecutsyourdebugtimeinhalfbyautomatingtheprocessofcomprehendinghowcomplexdesignsworkandenablingyoutopersonalizeandcustomizeyourdebugenvironment.Withover400customersand60EDApartners,ithasbecometheindustry’sdefactostandarddebugplatformandthecornerstoneofourfamilyoffunctionalclosureproductsthatmakeiteasiertodomoreverificationinlesstime.



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