If you can't read please download the document
Upload
engineeringcorner
View
557
Download
2
Embed Size (px)
Citation preview
Bryan Colvin
Portfolio and Skills
Analog Design
Audio EngineeringProAudio, Low Noise(-120dB), Consumer
Power SupplyVoltage: Buck, boost, inverting, isolated, Flyback
Current: Source, Sink, AC, charge pumps, mirrors
AmplifiersOp Amps, Custom, Power, Class-AB, Class-D
Filters(All configurations and implementations)
High Side Power Switching and monitoring
LT-Spice Modeling
Interface electronicsADC, DAC, Logic translation, Displays, isolation, Sensors
Video: HDMI, Component, S-Video, Composite, etc.
Gigabit Ethernet, RS-232, USB2.0, 1394, MIDI, AES/EBU, SPDIF, etc.
PCB/Logic Design
High SpeedImpedance controlled routing, Cross Talk, EMI reduction, differential routing
Termination (series, shunt, thevenin, AC, series/shunt with logic translation)
Clock Distribution, PLL, DLL, Frequency Synthesis
Signaling StandardsSingle Ended: TTL, CMOS, ECL, PECL, LVTTL, LVCMOS, GTL, GTL+, PCI, HSTL(I,II,III) SSTL(I,II), etc.
Differential: LVDS, BLVDS, Ultra LVD, SRSDS, LDT, etc.
Logic translation circuits, SERDES, SPI, I2C, I2S, JTAG, PCIe,SCSI,CAN,SATA
PCBLow cost 2-layer to 12 layer stacks, buried vias, etc.
BGAs, SMT, through-hole components, DFT, DFM
EMI isolation moats, bridge routing, optical isolation, balans
Stacking rules, mechanicals, shielding, power routing/ distribution
MemoryDDR, DDR2, GDDR3, ROM, EEROM, FLASH, FIFO, etc.
Systems Design
Systems ModelingC++, Data throughput modeling, optimization
Verilog Test bench with auto regression
Embedded Processor verses Logic Design partition space
Data transport optimization
ProcessorsCustom Processor Design: DSP, IO, VLIW, multi-threaded, data-path engines, SIMD
Compiler for the above in (written in C++)
FPGA/ASICMemory controllers: DDR/DDR2/GDDR3
Interface: SPI, I2C, ADAT, I2S, UART, etc.
State Machines: One-hot, shift register, anticipatory decoding, partitioning, optimization, LFSR, gray-coded, state optimization software in C++, timing systems, compiled ROM using C++, high-speed optimization, asynchronous
FIFO, queues, cache, Multiple clock domains, synchronization circuits.
CRT controllers, CAM, Encryption, Compression, Multiple clock domain management
Signal Processing
Synthesizer / MusicADSR with true logarithmic decay
Wave Guide Synthesis modeling
FM synthesis engines
Traditional wave table engines
Mixer including EQ
Dynamic Sample Rate Conversion
Room modeling / reverberation
Effects processing
GeneralFFT engines, Sample rate conversion using odd ratios,
FIT / IIR / Dynamic / Adaptive filters
VideoH.264/VC1 Motion compensation
Media filters, scaling, rotation
Patents
5,245,229 - Digitally controlled IC Anti-Clipping Mixer5,307,025 - Audio power amplifier with pop prevention at turn-on and turn-off5,468,906 - Sound synthesis model incorporating sympathetic vibrations of strings5,557,227 - Exponential Envelope Generator5,451,911 - Multi-Phase PLL Timing Generator5,543,578 - Residual Excited Wave Guide5,825,881 - Merchandising System5,841,872 - Data Spinning Encryption System6,041,123 - Encryption Communications SystemPending Phantom Power Supply SystemPending Current Pump System