Architecture and Instruction Set of the C6x Processor

Module 1

Reference

• R. Chassaing, DSP applications using C and the TMS 320C6x DSK, Wiley, 2002

• DSP • TMS320 Introduction• Architecture• Functional Unit• Fetch & Execute Packet• Pipelining• Registers• Addressing Modes

DSP

• Digital Signal Processing : Application of mathematical operations to digitally represented signal

• Signals represented digitally as sequence of samples.

• Digital Signal Processor: Electronics System that process digital Signal.

DSP System

DSP tasks

• Most DSP tasks Require– Repetitive numeric computation– Real time processing– High memory– System flexibility

• DSP must perform these tasks efficiently while minimizing– Cost– Power– Memory use– Development time

TMS DSP IC

• TMS 320 C6X– TMX – experimental device– TMP – prototype– TMS – Qualified device– 320- TI DSP family– C- CMOS with ROM– E- CMOS with EPROM– 5- Generation– X- version number

TMS320 Introduction

• Texas Instruments introduced the first generation TMS32010 digital signal processor in 1982, the TMS320C25 in 1986 , and the TMS320C50 in 1991.

• These 16-bit processors are all fixed pointprocessors and are code-compatible.

• Von neumann VS Harvard• The fixed-point processors C1x, C2x, and C5x

are based on a modified Harvard architecture with separate memory spaces for data and instructions that allow concurrent accesses.

• Quantization error or round-off noise from an ADC is a concern with a fixed point processor.

• The TMS320C30 floating-point processor was introduced in the late 1980s.

• The TMS320C6201 (C62x), announced in 1997.• C62x is based on a very-long-instruction-word

(VLIW) architecture, still using separate memory spaces for instructions and data as with the Harvard architecture.

• The C62x is not code-compatible with the previous generation of fixed-point processors.