DESIGN AND IMPLEMENTATION OF FPGA BASED G CODE COMPATIBLE CNC LATHE CONTROLLER

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International Journal of Electronics and Communication Engineering & Technology

(IJECET)

Volume 7, Issue 1, Jan-Feb 2016, pp. 87-100, Article ID: IJECET_07_01_009

Available online at

http://www.iaeme.com/IJECETissues.asp?JType=IJECET&VType=7&IType=1

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ISSN Print: 0976-6464 and ISSN Online: 0976-6472

© IAEME Publication

DESIGN AND IMPLEMENTATION OF FPGA

BASED G CODE COMPATIBLE CNC LATHE

CONTROLLER

Mufaddal A. Saifee

M.Tech. by Research Student, Institute of Technology,

Nirma University, Ahmedabad, Gujarat, India

Dr. Usha S. Mehta

Associate Professor, Institute of Technology,

Nirma University, Ahmedabad, Gujarat, India

ABSTRACT

The conventional machining done in the past like lathe and milling

operations were done manually. Accuracy and consistency between two

produced parts vary tremendously due to human errors and limitations. With

the advent of processor and controllers, came the Computerized Numerically

Controlled (CNC) machines, having the advantage of using universally

accepted G code machining language to machine the parts. It became really

easy to produce the parts with same accuracies and consistency on different

machines with the same G code being used. G codes are CNC machine

assembly language having various Interpolation Instructions G codes, Tool

Instruction T codes, Feed-rate Instruction F codes, Principal Axis Speed

Instruction S codes and various Controlling and Input - Output Instructions M

codes.

G code based CNC systems available till date, are implemented using

controllers and processors using software interpolation. Software

implementation of complex interpolation algorithms by serial pipelined

processors is time consuming, difficult and impractical for real time

applications. Thus the efficient, real time complex computation approach is

only feasible with hardware logic circuits like FPGA or ASIC having parallel

and low power processing architectures. In the presented work, for the first

time a G code based, CNC Lathe controller is designed and implemented in a

FPGA. It is implemented and validated on Xilinx Artix 7, 7a100tcsg324-1

FPGA based kit, with its heart being a 4 stage Multi InstructionMulti Data

(MIMD) Complex Instruction Set computers (CISC) G code processor. The

Rapid Positioning Controller, Linear Interpolation Controller and Circular

Interpolation Controller are also designed as a co-processor for the G Code

Mufaddal A. Saifee and Dr. Usha S. Mehta


processor to perform rapid positioning (G00), linear 2d (G01) and circular 2d

arc clockwise (G02) and anticlockwise (G03) interpolated movements

respectively of the CNC Lathe machine.

The simulation and hardware results of the integrated CNC controller with

its central CISC G code Processor and its interpolation controllers shows the

efficient and precise operation for the CNC Lathe machines. Implemented

CNC lathe Controller was able to achieve the maximum frequency of 52.35

MHz while utilizing 3277 LUTs and 1580 Flip Flops of Artix 7 FPGA, proving

it to be performance and hardware efficient.

Keywords: CNC, 3D Linear Interpolation, 2D Circular Interpolation, FPGA,

CISC Processor, MIMD Processor.

Cite this Article: Mufaddal A. Saifee and Dr. Usha S. Mehta. Design and

Implementation of FPGA Based G Code Compatible CNC Lathe Controller.

International Journal of Electronics and Communication Engineering &

Technology, 7(1), 2016, pp. 75-86.

http://www.iaeme.com/IJECET/issues.asp?JType=IJECET&VType=7&IType=1

1. INTRODUCTION

The conventional machining done in the past like lathe and milling operations were

done manually. With the advent of processor and controllers, came the CNC

machines, with the advantage of using universally accepted G code machining

language to machine the parts. It became really easy to produce the parts with same

accuracies and consistency on different machines with the same G code being used.

The Heart of Industrial Automation Devices like CNC Machines are Motion

Controllers, which sequentially executes G codes to machine the parts. Motion

controllers control the motion conveyed through G code in a predetermined direction

through motors. The circular motion of the motor is translated to the CNC tool

linearly in small steps. A motor each is required for motion in one particular axis.

Therefore, for a 3D motion, the tool is controlled by providing varying rate of pulses

to each of the three motors, corresponding to an axis. The controlled motion (line/arc)

along the required path trajectory is achieved through various interpolation algorithms

run in 2D or 3D space, which are responsible for providing varying rate of pulses to

corresponding axis.

Till date available CNC systems are implemented using controllers and

processors. These processors implement CNC motions using software interpolation.

Most of the interpolation algorithm uses complex parametric function like sine and

cosine for necessary calculations. Software implementation of such algorithms by

serial pipelined processors is time consuming and as well as difficult and impractical

for real time applications. As employment with single CPU in traditional control

system, the CPU is busy with kinds of tasks; in this case, the high requirement for real

time in interpolation is impractical and difficult. Thus the efficient, real time complex

computation approach is only feasible with hardware logic circuits like FPGA or

ASIC having parallel and lower power processing architectures. As compared to

ASIC, FPGAs have lower time to market and simpler design cycle making it an

excellent solution for the implementation of motion controllers.

The FPGA-based implementation of control algorithm offers advantages such as

high speed computation, complex functionality and real-time processing capabilities.

Takahashi and Goetz presented the design and implementation of FPGA based high-

Design and Implementation of FPGA Based G Code Compatible CNC Lathe Controller


performance ac servo system. A new motion control hardware architecture was

presented by Shao etal. where FPGA was used for position and velocity control, and

for dynamic compensation, inverse kinematics, and trajectory generation a DSP was

utilized. The design and implementation of a motor control IC for the permanent

magnet ac (PMAC) servo was presented by Tzou and Kuo. For system initialization

and parameter setting DSP was used. Oldknow and Yellowley presented FPGA based

3-D dynamic interpolation motion controller and proved the implementation on a two

axis test stand. Park and Oh presented the hardware realization of straight line

interpolation using inverse kinematics for robot manipulators. An FPGA-based

motion controller was developed by Yau et al. in order to realize the real-time non-

uniform rational B-spline (NURBS) interpolator and CNC controller in an FPGA. The

NURBS interpolation algorithm and the infinite impulse response filter algorithm

were implemented to control an XY table using an FPGA-based motion controller.

Kung et al. used a soft-core embedded processor to perform motion trajectory and

position control of a servo control IC for the XY table. Chan et al. used distributed

arithmetic (DA) to implement a PID controller. This DA-based PID controller offers

the advantage of optimal resource utilization and power consumption when

implemented in an FPGA.

In the research listed to date, FPGAs were used to realize only the logic circuits of

motion control systems or particular functions of the motion control systems such as

interpolation, velocity profile generator, PID controller, and inverse kinematics

calculator. Moreover the controllers implemented were propriety and none targeted

the universally accepted G code base motion controller implementation. The work

presented over here implements a FPGA based G code - motion controller, which

implements all the G codes required for a Lathe operations. To achieve this 4 stage

Multi Instruction Multi Data (MIMD) Complex Instruction Set computers (CISC) G

code processor is designed and implemented. It is capable of executing Interpolation

Instructions G codes, Tool Instruction T codes, Feed-rate Instruction F codes,

Principal Axis Speed Instruction S codes and various Controlling and Input - Output

Instructions M codes, required for controlling a Lathe Machine. To support various G

codes conveying the interpolated motion of the tool for machining, Linear

Interpolation, Circular Interpolation and Rapid Positioning Controllers are

implemented as co-processors to the G code processor. G codes are written to the

Block Ram of the FPGA through UART, for which a UART controller is

implemented. G code Processor fetches the G codes sequentially from the Block Ram

and executes the machining operations. For G codes requiring the linear, circular or

rapid interpolation movements, the G code processor communicates the coordinates to

the respective co-processors which then does the corresponding machining operations.

Thus the hardware interpolation performed by the respective co-processors -

controllers highly improves the motion controller performance.

The proposed motion controller is implemented using Verilog HDL in Xilinx

Artix 7 FPGA. Simulation is performed using Modelsim 10.1 simulator and hardware

is implemented using Xilinx ISE 14.4 in Digilent Nexus4 Artix 7 FPGA based board.

Hardware results are validated using Xilinx ChipScope Pro on chip debugging tool.

The paper is organized as follows: Section 2 briefs the proposed CNC Lathe

Controller, Section 3 explains implementation of CNC Motion Controller, briefs the

Proposed FPGA based CNC Lathe Controller, its heart Application Specific G Code

Processor, its different co-processor interpolation controllers. It also explains

implementation and verification of Application Specific G Code CISC processor with



its G, M, T, F and S codes instructions. and Section 4 describes Synthesis, Simulation

and Hardware results. Conclusions are detailed in Section 5.

2. PROPOSED CNC LATHE CONTROLLER

Proposed FPGA-based G code compatible, 2-axis motion controller will be capable of

controlling 2 axes of either stepper motor or pulse type servo drivers for position,

speed, and interpolation controls. The overall structure of the proposed CNC

controller is modularized with different functional modules as shown in figure 1

below.

2.1. UART

UART (Universal Asynchronous Receiver Transmitter) is used for asynchronous

serial data communication to configure the G code Processor and its instruction

memory. It’s a generic UART supporting all baud rates. Our design uses the 115200

baud rate. A moving average low pass filter is used to remove noise samples from

data samples at receiver. Reference 4 gives more detail on the implementation.

2.2. UART Register Interface

UART Register Interface appropriately interprets and writes data to the 32 bit

displacement coefficient registers. These registers provide data like displacement

coefficients in X, Y and Z axes for the respective servo drives. UART Register

Interface writes the 128 bit G Code instructions for the ASSP G code processor in a

128 bit x 512 Block RAM. The heart of the UART Register Interface is the Finite

State Machine (FSM) which has 3 states and controls the configuring of above

registers and RAM. The states are 1) Idle, 2) reg write and 3) RAM write.

Linear

Interpolation

Application Specific G

Code Processor

rd

instr (64 bit)

UART

UART reg interface

RAM

Tx

Rx

wr Rx_intTx_int

Sbu

f_ou

t(7:

0)

Sbu

f_in

(7:0

)

wr

Inst

r (6

3:0)

Start linFeedrate, displacement

coefficient, axis

parameters

Done lin

Direction_2 axis

Pulses_2 axis

Cicular

Interpolation

Start cirFeedrate, displacement

coefficient, axis

parameters

Done cir

Direction_2 axis

Pulses_2 axis

Rapid

Positioning

Start rapidFeedrate, displacement

coefficient, axis

parameters

Done rapid

Direction_2 axis

Pulses_2 axis

Mux

Pulse_x

Pulse_z

Direction_x

Direction_z

Interpolation_selection

Principal axis

control

Principal axis

parameters

Pulse_spindle

Direction_spindle

Tool offset 4bits

Tool No 3bits

Coolant on

Coolant off

Lubricant on

Lubricant off

Tailstock forward

Tailstock backward

Principle axis forward rotation

Principle axis backward rotation

Principle axis stop

Chuck clamped

Chuck released

24 programmable outputs

24 programmable inputs

24 programmable inputs alarm

Cycle_start

Instruction_valid

Address valid

Address

Instruction

Figure 1 CNC Controller Block Diagram



2.3. RAM

RAM used is a simple dual port RAM with one side read only and other write only.

It's a 128 bit width and 512 deep synchronous block RAM of Artix 7 FPGA. It is used

to hold instructions. Instructions are written in RAM by UART register interface

through UART, while they are read by G code processor. G code processor fetches

the next bunch after it has positioned the two servo motors according to the

instruction fetched previously.

2.4. Linear Interpolation

It performs the linear interpolation algorithm, to cause the tool to cut in straight line

from current position to the specified end point. It is called by G code processor for

G01, G90 and G94 G codes processing. Reference 2 gives more detail on the

implementation.

2.5. Circular Interpolation

It performs the Circular interpolation algorithm, to cause the tool to cut in circular arc

from current position to the specified end point with the provided radius. It is called

by G code processor for G02 and G03 G codes processing. Reference 3 gives more

detail on the implementation.

2.6. Rapid Positioning

It performs the rapid positioning to cause the tool to move at maximum speed from

current position to the specified end point. It is called by G code processor for G00,

G28, G90 and G94 G codes processing. Implementation similar to Linear

interpolation.

2.7. Principal axis Control

Depending on the S code parameters used in G98 and G99 G codes, it controls the

speed of the principal axis rotation.

2.8. Application Specific G code Processor

It is the heart of the CNC controller. It is a 4 stage pipelined 32 bit application specific

CISC processor. It fetches the instruction from the RAM, decodes them and

accordingly either controls the outputs, or provides data to various interpolation

modules to drive the servo motors according to the interpolated motion required. It

then waits for the interpolated motion to get completed after which it fetches the next

instruction.

3. G CODE PROCESSOR

Application G code processor is designed to support the G, M, S and T codes used in

a standard lathe machines. It is a 32 - bit, 4 stage pipeline, CISC (Complex Instruction

Set Computers) processor. It is implemented on Xilinx Artix 7 FPGA.

Its basic features are:

16 - bit Program Counter.

128 bit Instruction Register.

Four stage pipeline architecture:



Instruction Fetch: 128 bit instructions are fetched from the external memory in this stage.

Instruction Decode: Fetched instruction is accordingly decoded into M, T or G code

Execute: Instructions depending on their type are executed in single clock or multiple

clock.

Current position update: If the instructions are any of the G code interpolation or M

code program end then depending on the motion executed the current position is

updated.

3.1. G Code Processor Block Diagram

Ins

tru

cti

on

Fe

tch

Ins

tru

cti

on

De

co

de

Ins

tru

cti

on

Ex

ec

ute

Ins

tru

cti

on

wri

te b

ac

k

Current position register update

Wait complete operation

`

Pipeline Registers

Adder

32 bit

PC

muxD

clr

Q

Instruction Decoder

Instruction register(63:0)

bra

nch

_ta

ken

branch_taken

X “0000 0001”

Program Counter

clk

reset

Sig_Program Counter

Imm

ed

_d

ata

(31

:0)

Start lin

Feedrate, displacement coefficient, axis parameters

Start cir


Start rapid


Interpolation_selection

Principal axis parameters

op

cod

e

Coolant on

Coolant off

Lubricant on

Lubricant off

Tailstock forward

Tailstock backward

Principle axis forward rotation

Principle axis backward rotation

Principle axis stop

Chuck clamped

Chuck released

24 programmable outputs

Tim

er

pa

ram

et

ers

Done lin

Done cir

Done rapid

Timer

Current position

Current

position

24 programmable inputs

Timer_up

op

cod

e

done

24 programmable inputs alarm

Cycle start

Non_restoring_divider

Pricipal axis rotation/

min calculation

Feedrate mm/min

calculation

Figure 2 G Code Processor Block Diagram

Block diagram of 4 stage pipeline G code processor is shown in figure 2. Program

counter is incremented and given out to the external ram, which then returns with the

instruction back. Instruction is then decoded. Axis parameters, feedrate, coordinates

are decoded and given out to external interpolation modules to do the machining.

Once they are finished with the machining process they send a done signal. Processor



waits for the done signals and accordingly updates the current position register. The

program counter increments by 1 to fetch the next instruction. If there is block change

instruction, it is decoded in the instruction decode stage and accordingly instruction is

fetched from the next decoded address. For the M codes depending on whether they

are control instructions or programmable input output instructions they are executed

in single or multiple clock cycles. Tool selection and offset instruction is executed in

single clock.

3.2. G Code Instructions Supported

Table 1 G Codes Supported

No Instruction Function

M codes

1 M00 Program Pauses

2 M30 Program Ends

3 M98 Subroutine calling

4 M99 Return from subroutine

5 M03 Principal axis forward direction

6 M04 Principal axis backward direction

7 M05 Principal axis stop

8 M08 Coolant on

9 M09 Coolant off

10 M10 Tailstock forward

11 M11 Tailstock backward

12 M12 Chuck clamped

13 M13 Chuck released

14 M32 Lubricant on

15 M33 Lubricant off

16 M88 Check the signal of specified input pin

17 M89 Control the switch of specified output pin

T Code

18 T Tool change and its offset set

G Code

19 G00 Fast moving / rapid interpolation

20 G01 Linear interpolation

21 G02 Arc interpolation clockwise

22 G03 Arc interpolation anticlockwise

23 G04 Pause, Quasi Stop

24 G28 Return to mechanical home

25 G32 Thread cutting

26 G33 Z axis taping cycle

27 G50 Maximum Principal axis rotation speed

28 G90 Axial cutting cycle

29 G92 Thread cutting cycle

30 G94 Radial cutting cycle

31 G96 Principal axis rotation speed m/min

32 G97 Principal axis rotation speed r/min

33 G98 Feedrate mm/min

34 G99 Feedrate mm/r



3.3. Instructions Formats

3.3.1. M00/30/03/04/05/08/09/10/11/12/13/32/33

126 125 124 123 122 121 120 119 118 ……...

OpcodeM - 00

117 0127

M-Code No.Unused

Bits

3.3.2. M88

127

126

125

124

123

122

121

120

119

118

117

116

115

114

113

112

111

110

109

108

107

106

105

104

103

102

101

100

99

98

97

96

95

94

93

92 ……..

UnusedBits

91

0

OpCode

M00

M-Code No.88

Input Port

Address

Input Value

To Wait For

Q Op

Code

Millisecond Value For

Waiting

3.3.3. M89

127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 ……..

UnusedBits

OpcodeM00

M-Code No.89

Output Port Address

Out-put

Value

111 0

3.3.4. M98

127

126

125

124

123

122

121

120

119

118

117

116

115

114

113

112

111

110

109

108

107

106

105

104

103

102

101

100

99

98

97

96

95

94

93

92 ……..

UnusedBits

91

0

OpCode

M00

M-Code No.98

Repeat Subroutine

Value

Subroutine Address

3.3.5. M99

127

126

125

124

123

122

121

120

119

118

117

116

115

114

113

112

111

110

109

108

107

106

105

104

103

102

101

100

99

98 ……..

UnusedBits

97

0

OpCode

M00

M-Code No.99

P Opcode 1010

Subroutine Address

3.3.6. T

126 125 124 123 122 121 120 119 118 ……...

Opcode T - 00

117 0127

Tool Number

UnusedBits

Tool Offset



3.3.7. G97/50

127

126

125

124

123

122

121

120

119

118

117

116

115

114

113

112

……..

UnusedBits

Opcode

G01

G-Code No.97/50

G97 - Principal Axis Value In Rotation/minG50 - Principal Axis Max Allowed Value In Rotation/min

111

0110

109

108

107

106

105

104

103

3.3.8. G98/99

127

126

125

124

123

122

121

120

119

118

117

116

115

114

113

112

……..

UnusedBits

Opcode

G01

G-Code No.98/99

G99 - Feedrate in mm/minG99 - Feedrate in mm/r => prin axis r/min x

given mm/r = mm/min

111

0110

109

108

107

106

105

104

103

3.3.9. G04

127

126

125

124

123

122

121

120

119

118

117

116

115

114

113

112

……..

UnusedBits

Opcode

G01

G-Code No.04 Timer Value

111

0110

109

108

107

106

105

104

103

102

101

3.3.10 G00/28

127

126

125

124

123

122

121

120

119

118

117

116

115

114

113

112

111

110

109

108

107

106

105

104

103

102

101

100

99

98

97

96

95

94

93

92 …...

UnusedBits

85

0

OpCode

G01

G-Code No.00/28

x/u Opcode

Valuez/w Op

Code Value

91

90

89

88

87

86

3.3.11. G01

127

126

125

124

123

122

121

120

119

118

117

116

115

114

113

…...102

101

100

99

98

97 …...

UnusedBits

67

0

OpCode

G01

G-Code No.01

x/u Opcode

Valuez/w Op

Code

f Value

…...86

Value

85

84

83

82

81

…...68

FOp

Code

3.3.12. G02/03/90/94

127

126

125

124

123

122

121

120

119

118

117

116

115

114

113

…...102

101

100

99

98

97

OpCod

eG01

G-Code No.02/03/90/

94

x/u Opcode

Valuez/w Op

Code Value

…...86

Value

85

84

83

82

81

…...70

R

…...

UnusedBits

51

0

f Value

69

68

67

66

65

…...52

FOp

Code



4. RESULTS

4.1. Synthesis Report - Device utilization summary:

Selected Device: 7a100tcsg324-1

Slice Logic Utilization:

Number of Slice Registers: 1489 out of 126800 1%

Number of Slice LUTs: 3111 out of 63400 4%

Number used as Logic: 3111 out of 63400 4%

IO Utilization:

Number of bonded IOBs: 38 out of 210 4%

Specific Feature Utilization:

Number of Block RAM/FIFO: 2 out of 135 1%

Number of BUFG/BUFGCTRLs: 1 out of 32 12%

Number of DSP48A1s: 26 out of 240 37%

4.2. Simulation Results

4.2.1. M03

Test Case

M03 - Principal axis forward direction

M00 - Pause

Figure 3 M03 Waveform

4.2.2. G01

Test Case

G98 500 Feedrate 500 mm/min

G01 X 3 Z 13 Linear interpolation to coordinates 3, 13 with above feedrate

G01 X 5 Z 9 F 1000 Linear interpolation to coordinates 5, 9 with feedrate 1000

M 00 Pause



Figure 4 G01 Waveform

4.3. Hardware Setup

The Hardware setup shown in figure -------- consists of Artix 7 FPGA based Digilent

Nexus 4 kit, JTAG cable, UART cable, Power cable and a PC having Xilinx 14.4 ISE

and Chipscope Analyzer installed. The various G codes are dumped into FPGA block

RAM memory. The processor on getting enable signal from the enable switch on kit,

starts fetching and executing M, T and G instructions. The in chip FPGA signals are

viewed and verified for each instructions using Chipscope analyzer.

Figure 5 Hardware Setup



4.4. Hardware Results

4.4.1. T - Tool Change and its Offset Set

Figure 6 T - Tool change and its offset set

4.4.2. M88 - Check the Signal of Specified Input Pin

Figure 7 M88 -Check the signal of specified input pin



4.4.3. G94 - Radial Cutting Cycle

Figure G94 - Radial Cutting Cycle

5. CONCLUSION

A G Code based motion controller was implemented to control a multiple-axis motion

system for a CNC Lathe machine for the first time in FPGA, with its heart being a 4

stage Multi Instruction Multi Data (MIMD) Complex Instruction Set computers

(CISC) G code processor. The G Code Processor supports most of the G codes, M

codes, T code, F code and S code required for performing Lathe machining operation. It was designed using Verilog and implemented on Xilinx Artix 7, 7a100tcsg324-1

FPGA. It consumed 3277, 6 input LUTs and 1580 Flip Flops and was able to achieve

maximum frequency of 52.35 MHz. The feasibility to realize reconfigurable G code

based CNC system within FPGA were validated.

Simulation results show the precision and performance to be excellent. Synthesis

report also shows it to be hardware efficient by consuming fewer Flip Fops and

LUTS. Excellent real time operation, good precision and optimum hardware resources

makes the FPGA-based CNC Lathe controller have excellent performance and useful

for any motion controller for CNC machines.



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