X-Band Transmitter Baseband DSP Module

X-BAND TRANSMITTER BASEBAND DSP MODULE

Alexandria University

Mo’menAhmed

Supervised by:

Eng. Hany Bekhit / Eng. Aya Mohamed

X-Band Transmitter DSP project 1

Outline:

• X-band transmitter

• Why baseband DSP ?

• Tools

• Matlab, Simulink and FPGA implementation

• Synthesis

• Lessons learnt

• Future work


X-band transmitter block diagram

8 – 8.4 GHZX-Band Transmitter DSP project 3

Why Baseband DSP?


Sending image data without using DSP


I received Inverted data


While sending data through space, bit stream could be inverted causing errors on receiving

UseDifferential encoder


• Hides data in transitions • Overcome polarity inversion of received data

I lost synchronization with you


While sending data through space, streams of ones and zeros causes the loss of synchronization

UseScrambler


• Prevents streams of zeros or ones makes receivers easily detect data and synchronize with sender

• 20 bit shift register

I received data withhigh Bit Error rate


To send data with low BER, use high power amplifiers but they consume lots of power and money

UseConvolutional encoder


• Convolutional coding acts as an error detection and correction unit hence decease BER with the same transmitted power

DSP module functions

• To receive the clock and data from clock and data interfaces

• To apply the DSP algorithm on the transmitted data. The DSP algorithm includes differential encoding, scrambling and convolutional encoding

• To generate test data pattern to be used in the self-test mode of operation


MATLAB Simulink block diagram



Tools- Matlab Simulink- Xilinx ISE Design suite

Artix-7 NEXYS 4 DDRFPGA

PRS (test pattern generator)


Differential Encoder


Scrambler


Convolutional Encoder


Clock Divider


• Inputs 100 MHZ, outputs 100 and 50 GHZ• System operates at 50 GHZ, 100 GHZ for half bit delay

DSP Block diagram


Top level simulation


Top level implementation


• Output_Q_buff is the Quadrature output• /Inst_convolutional_Encoder/out_I is the In-phase output

Synthesis results


Module Max.

Frequency

# of

Registers

Clock

Buffers

I/O

Buffers

Top module 634.115 MHz 43 1 4

PRS 851.798 MHz 7 1 3

Differential Enc. 944.287 MHz 1 1 4

Scrambler 851.789 MHz 21 1 4

Conv. Enc. 707.214 MHz 8 1 5

Clk. Divider 685.871 MHz 1 1 5

Lessons Learnt

• Matlab Simulink for DSP

• In Chip debugging

• In Chip verification

• ChipScope Pro with Artix-7 FPGA


Conclusion and Future Work

• DSP is very important for satellites communications

• To improve this work, optimization to the recourses used on the FPGA and maximum frequency

• X-Band transmitter module could be implemented

• Modulation on OQPSK design


Questions ?


Engineering

X-Band Transmitter Baseband DSP Module