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Youssef Mohamed Ramzy
Phone: (002) 01117673412 96, Mohamed Naguib st. Bakus, Alexandria, EGYPTE-mail: [email protected]
Hardware skills
• System Verilog
• System Verilog Assertion
• Verilog / VHDL
• FPGA
• EDA ( Questa – Xilinx )
• Perl
• Python
• C / C++
• Linux
• Assembly (8051-8088)
• Matlab
• Research
• Team work
• Documentation
• Communication
• Presentation
Software skills
Soft skills
Publication
Education
• System Verilog Assertions Synthesis Based Compiler
This paper presents architecture of system Verilog assertions (SVA) synthesiscompiler, which translates the un-synthesizable System Verilog assertions, intoSynthesizable Verilog modules, in order to convert them to digital hardware circuits; used to watch how the running design performs.
Projects• Run Time Verification ( Graduation project ) – 2015-present
it is based on synthesizable system Verilog assertions which are able to localize the bug and correct it online using mutation based repair. The code is on FPGA and if assertions discovered a bug, it will correct the LUT online and no need to recompile.
• GPU – 2014 I am a one of the architecture team that has a task to build the architecture of the system. My role is understanding the Rasterization module in the system and trying to build its architecture.
Dr. Maged Ghonima
• RADAR system – 2014
Building a RADAR system aimed to monitor the moving objects using concept of coffee can radar.
• AES (Advanced Encryption Standard) – 2014
Design and implementation of AES-CTR mode using Verilog HDL.
• SPqM embedded system ) HDL ) - A 8x8 carry save multiplier ( Matlab –
Simulink – HDL ) - a full quad-copter system ( Discrete IC component )
• Egypt scholars – Alex SC – 2014-2015
Volunteering work
Co-founder and head of organizing & logistics committee in Alex student chapter.
• Techne Summit – 2015-2016logistics and operation committee member.
• MEU’15Delegate.
• VLSI EGYPT – ALEX section – 2016
PR (Public Relation) committee member.
• Mind Utopia’14CB (Capacity Building) member.
Experience • Black horse VOIP service provider – 2016 ( employee )
• Vodafone Alexandria – 2014 ( trainee )
• Delight Dessert House – 2012 ( employee )
• Ezz Dekheila steel company – Alexandria ( Trainee )
Language
• English Professional working proficiency
• Arabic Native
Bachelor of engineering, Alexandria University, Egypt, June 2016. Major: ElectronicsDegree: 77% (accumulative degree until 3rd year )
High school, Mubarak for Toppers, Alex, Egypt, 2011, Science section, score: 97.8%.
Conference: DAC-WIP
