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The top documents tagged [energy constrained design]
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Dual-Threshold Voltage Design of Sub-threshold Circuits Jia Yao Dept. of ECE, Auburn University Doctoral Final Examination Dissertation Committee: Dr
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Robust Low Power VLSI R obust L ow P ower VLSI Low-Power BIST (Built-In Self Test) Overview 10/31/2014 Harsh N. Patel
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Dual-Threshold Voltage Design of Sub-threshold Circuits
76 views