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diffrent dominated companieslogosADSP21XXTMS32CXXTMS nomenclatureevolution of TMS familycomparisona) computational core featureb) input/output capabilitiesc) memoryd) programmabilityApplication of TMS320CXX
Citation preview
Analog Devices (wwwanalogcomdsp) ADSP-21xx 16 bit fixed pointADSP-21xxx 32 bit floating and fixed
Lucent Technologies (wwwlucentcom)DSP16xxx 16 bit fixed point
DSP32xx 32 bit floating point
Motorola (wwwmotcom)DSP561xx 16 bit fixed pointDSP560xx 24 bit fixed pointDSP96002 32 bit floating point
Texas Instruments (wwwticom)TMS320Cxx 16 bit fixed pointTMS320Cxx 32 bit floating point
LOGOrsquos
TMS 32Cxx ADSP 21xx
bullFabricated in a high speed submicron double-layer metal CMOS process the highest-performance ADSP-21xx processors operate at 25 MHz with a 40 ns instruction cycle timebullEvery instruction can execute in a single cycle Fabrication in CMOS results in low power dissipationbullThe ADSP-2100 Familyrsquos flexible architecture and comprehensive instruction set support a high degree of parallelism bullIn one cycle the ADSP-21xx can perform all of the following operationsibull Generate the next program addressiibull Fetch the next instructioniiibull Perform one or two data movesivbull Update one or two data address pointersvbull Perform a computationvibull Receive and transmit data via one or two serial portsviibull Receive andor transmit data via the host interface port
bullThe TMS320 family consists of two types of single-chip DSPs 16-bit fixed point and 32-bit floating-point bullThese DSPs possess the operational flexibility of high-speed controllers and the numerical capability of array processors Combining these two qualities the TMS320 processors are inexpensive alternatives to custom-fabricated VLSI and multichip bit-slice processorsbull The following characteristics make this family the ideal choice for a wide range of processing applications1048576 Very flexible instruction set1048576 Inherent operational flexibility1048576 High-speed performance1048576 Innovative parallel architectural design1048576 Cost-effectiveness
DSP processor features
ADSP21xx TMS32cxx
Computational core feature
Core Clock frequency of 100Mhz
Frequency of 100Mhz latest is now 150Mhz
All instruction are cycle executed
All floating point instruction are multi cycle executed
96 universal registers 32 general purpose register
Support 32 circular buffers
Support 8 circular buffers
Support hardware loop
No hardware loop
Comparison
ComparisonDSP Processor features
ADSP 21xx TMS32Cxx
Inputoutput capabilities
4 serial ports 2 link port external port (32bit) can be used with 14 DMA Channels
1 host port external port (32 bit) 2 multi channel buffered serial port used with 16DMA Channels
All DMAs are non-intrusive
All DMAs are intrusive Accomplished by rdquo cycle stealingrdquo
400 Mbytes sec maximum throughput through external memory interface
200Mbytessec maximum throughput through external memory interface400Mbytessec (latest)
Support GLUELESS shared memory multiprocessing
Requires GLUELOGIC for shared memory with other processors
Comparison DSP Processor features
ADSP 21xx TMS32Cxx
Memory 1mega bit on chip RAM (128k bytes on RAM )
frac12 mega bit on chip RAM(72k bytes of on chip memory )
Can store up to 21k instructions
Can store up to 18k instructions
Dual ported on chip memory with unified address space
Only 4k program memory and 4k data cache support parallel access
ComparisonDSP Processor features
ADSP 21xx TMS32Cxx
Programmability Support SIMD programming model which is suited for many type of applications ie Reduced code size
VLIW architecture requires instructions explicitly to program various compute units in the processor ie Larger code size
Easy to write code in assembly as all instruction complete in 1cycle
its not easy to write code in assembly because instructions take multiple cycle to complete It is difficult
WINTERTemplate
APPLICATION OF TMS320CXX
httpwwwanalogcomenprocessors-dspADSP-21xxprocessorsmanualsresourcesindexhtml
httpenwikipediaorgwikiTexas_Instruments_TMS320
BOOKSbullAn introduction to Microcomputers(Volume 2 part B) page( 1895- 1898)by ADAM OSBORNE JERRY KANE
bullDigital Signal ProcessingBy Ifeacher amp jervis (page 873 to 900)
httpwwwticomproducttms320f2812247SEM
httpwwwanalogcomenprocessors-dspadsp-21xxprocessorsindexhtml
LOGOrsquos
TMS 32Cxx ADSP 21xx
bullFabricated in a high speed submicron double-layer metal CMOS process the highest-performance ADSP-21xx processors operate at 25 MHz with a 40 ns instruction cycle timebullEvery instruction can execute in a single cycle Fabrication in CMOS results in low power dissipationbullThe ADSP-2100 Familyrsquos flexible architecture and comprehensive instruction set support a high degree of parallelism bullIn one cycle the ADSP-21xx can perform all of the following operationsibull Generate the next program addressiibull Fetch the next instructioniiibull Perform one or two data movesivbull Update one or two data address pointersvbull Perform a computationvibull Receive and transmit data via one or two serial portsviibull Receive andor transmit data via the host interface port
bullThe TMS320 family consists of two types of single-chip DSPs 16-bit fixed point and 32-bit floating-point bullThese DSPs possess the operational flexibility of high-speed controllers and the numerical capability of array processors Combining these two qualities the TMS320 processors are inexpensive alternatives to custom-fabricated VLSI and multichip bit-slice processorsbull The following characteristics make this family the ideal choice for a wide range of processing applications1048576 Very flexible instruction set1048576 Inherent operational flexibility1048576 High-speed performance1048576 Innovative parallel architectural design1048576 Cost-effectiveness
DSP processor features
ADSP21xx TMS32cxx
Computational core feature
Core Clock frequency of 100Mhz
Frequency of 100Mhz latest is now 150Mhz
All instruction are cycle executed
All floating point instruction are multi cycle executed
96 universal registers 32 general purpose register
Support 32 circular buffers
Support 8 circular buffers
Support hardware loop
No hardware loop
Comparison
ComparisonDSP Processor features
ADSP 21xx TMS32Cxx
Inputoutput capabilities
4 serial ports 2 link port external port (32bit) can be used with 14 DMA Channels
1 host port external port (32 bit) 2 multi channel buffered serial port used with 16DMA Channels
All DMAs are non-intrusive
All DMAs are intrusive Accomplished by rdquo cycle stealingrdquo
400 Mbytes sec maximum throughput through external memory interface
200Mbytessec maximum throughput through external memory interface400Mbytessec (latest)
Support GLUELESS shared memory multiprocessing
Requires GLUELOGIC for shared memory with other processors
Comparison DSP Processor features
ADSP 21xx TMS32Cxx
Memory 1mega bit on chip RAM (128k bytes on RAM )
frac12 mega bit on chip RAM(72k bytes of on chip memory )
Can store up to 21k instructions
Can store up to 18k instructions
Dual ported on chip memory with unified address space
Only 4k program memory and 4k data cache support parallel access
ComparisonDSP Processor features
ADSP 21xx TMS32Cxx
Programmability Support SIMD programming model which is suited for many type of applications ie Reduced code size
VLIW architecture requires instructions explicitly to program various compute units in the processor ie Larger code size
Easy to write code in assembly as all instruction complete in 1cycle
its not easy to write code in assembly because instructions take multiple cycle to complete It is difficult
WINTERTemplate
APPLICATION OF TMS320CXX
httpwwwanalogcomenprocessors-dspADSP-21xxprocessorsmanualsresourcesindexhtml
httpenwikipediaorgwikiTexas_Instruments_TMS320
BOOKSbullAn introduction to Microcomputers(Volume 2 part B) page( 1895- 1898)by ADAM OSBORNE JERRY KANE
bullDigital Signal ProcessingBy Ifeacher amp jervis (page 873 to 900)
httpwwwticomproducttms320f2812247SEM
httpwwwanalogcomenprocessors-dspadsp-21xxprocessorsindexhtml
bullFabricated in a high speed submicron double-layer metal CMOS process the highest-performance ADSP-21xx processors operate at 25 MHz with a 40 ns instruction cycle timebullEvery instruction can execute in a single cycle Fabrication in CMOS results in low power dissipationbullThe ADSP-2100 Familyrsquos flexible architecture and comprehensive instruction set support a high degree of parallelism bullIn one cycle the ADSP-21xx can perform all of the following operationsibull Generate the next program addressiibull Fetch the next instructioniiibull Perform one or two data movesivbull Update one or two data address pointersvbull Perform a computationvibull Receive and transmit data via one or two serial portsviibull Receive andor transmit data via the host interface port
bullThe TMS320 family consists of two types of single-chip DSPs 16-bit fixed point and 32-bit floating-point bullThese DSPs possess the operational flexibility of high-speed controllers and the numerical capability of array processors Combining these two qualities the TMS320 processors are inexpensive alternatives to custom-fabricated VLSI and multichip bit-slice processorsbull The following characteristics make this family the ideal choice for a wide range of processing applications1048576 Very flexible instruction set1048576 Inherent operational flexibility1048576 High-speed performance1048576 Innovative parallel architectural design1048576 Cost-effectiveness
DSP processor features
ADSP21xx TMS32cxx
Computational core feature
Core Clock frequency of 100Mhz
Frequency of 100Mhz latest is now 150Mhz
All instruction are cycle executed
All floating point instruction are multi cycle executed
96 universal registers 32 general purpose register
Support 32 circular buffers
Support 8 circular buffers
Support hardware loop
No hardware loop
Comparison
ComparisonDSP Processor features
ADSP 21xx TMS32Cxx
Inputoutput capabilities
4 serial ports 2 link port external port (32bit) can be used with 14 DMA Channels
1 host port external port (32 bit) 2 multi channel buffered serial port used with 16DMA Channels
All DMAs are non-intrusive
All DMAs are intrusive Accomplished by rdquo cycle stealingrdquo
400 Mbytes sec maximum throughput through external memory interface
200Mbytessec maximum throughput through external memory interface400Mbytessec (latest)
Support GLUELESS shared memory multiprocessing
Requires GLUELOGIC for shared memory with other processors
Comparison DSP Processor features
ADSP 21xx TMS32Cxx
Memory 1mega bit on chip RAM (128k bytes on RAM )
frac12 mega bit on chip RAM(72k bytes of on chip memory )
Can store up to 21k instructions
Can store up to 18k instructions
Dual ported on chip memory with unified address space
Only 4k program memory and 4k data cache support parallel access
ComparisonDSP Processor features
ADSP 21xx TMS32Cxx
Programmability Support SIMD programming model which is suited for many type of applications ie Reduced code size
VLIW architecture requires instructions explicitly to program various compute units in the processor ie Larger code size
Easy to write code in assembly as all instruction complete in 1cycle
its not easy to write code in assembly because instructions take multiple cycle to complete It is difficult
WINTERTemplate
APPLICATION OF TMS320CXX
httpwwwanalogcomenprocessors-dspADSP-21xxprocessorsmanualsresourcesindexhtml
httpenwikipediaorgwikiTexas_Instruments_TMS320
BOOKSbullAn introduction to Microcomputers(Volume 2 part B) page( 1895- 1898)by ADAM OSBORNE JERRY KANE
bullDigital Signal ProcessingBy Ifeacher amp jervis (page 873 to 900)
httpwwwticomproducttms320f2812247SEM
httpwwwanalogcomenprocessors-dspadsp-21xxprocessorsindexhtml
bullThe TMS320 family consists of two types of single-chip DSPs 16-bit fixed point and 32-bit floating-point bullThese DSPs possess the operational flexibility of high-speed controllers and the numerical capability of array processors Combining these two qualities the TMS320 processors are inexpensive alternatives to custom-fabricated VLSI and multichip bit-slice processorsbull The following characteristics make this family the ideal choice for a wide range of processing applications1048576 Very flexible instruction set1048576 Inherent operational flexibility1048576 High-speed performance1048576 Innovative parallel architectural design1048576 Cost-effectiveness
DSP processor features
ADSP21xx TMS32cxx
Computational core feature
Core Clock frequency of 100Mhz
Frequency of 100Mhz latest is now 150Mhz
All instruction are cycle executed
All floating point instruction are multi cycle executed
96 universal registers 32 general purpose register
Support 32 circular buffers
Support 8 circular buffers
Support hardware loop
No hardware loop
Comparison
ComparisonDSP Processor features
ADSP 21xx TMS32Cxx
Inputoutput capabilities
4 serial ports 2 link port external port (32bit) can be used with 14 DMA Channels
1 host port external port (32 bit) 2 multi channel buffered serial port used with 16DMA Channels
All DMAs are non-intrusive
All DMAs are intrusive Accomplished by rdquo cycle stealingrdquo
400 Mbytes sec maximum throughput through external memory interface
200Mbytessec maximum throughput through external memory interface400Mbytessec (latest)
Support GLUELESS shared memory multiprocessing
Requires GLUELOGIC for shared memory with other processors
Comparison DSP Processor features
ADSP 21xx TMS32Cxx
Memory 1mega bit on chip RAM (128k bytes on RAM )
frac12 mega bit on chip RAM(72k bytes of on chip memory )
Can store up to 21k instructions
Can store up to 18k instructions
Dual ported on chip memory with unified address space
Only 4k program memory and 4k data cache support parallel access
ComparisonDSP Processor features
ADSP 21xx TMS32Cxx
Programmability Support SIMD programming model which is suited for many type of applications ie Reduced code size
VLIW architecture requires instructions explicitly to program various compute units in the processor ie Larger code size
Easy to write code in assembly as all instruction complete in 1cycle
its not easy to write code in assembly because instructions take multiple cycle to complete It is difficult
WINTERTemplate
APPLICATION OF TMS320CXX
httpwwwanalogcomenprocessors-dspADSP-21xxprocessorsmanualsresourcesindexhtml
httpenwikipediaorgwikiTexas_Instruments_TMS320
BOOKSbullAn introduction to Microcomputers(Volume 2 part B) page( 1895- 1898)by ADAM OSBORNE JERRY KANE
bullDigital Signal ProcessingBy Ifeacher amp jervis (page 873 to 900)
httpwwwticomproducttms320f2812247SEM
httpwwwanalogcomenprocessors-dspadsp-21xxprocessorsindexhtml
DSP processor features
ADSP21xx TMS32cxx
Computational core feature
Core Clock frequency of 100Mhz
Frequency of 100Mhz latest is now 150Mhz
All instruction are cycle executed
All floating point instruction are multi cycle executed
96 universal registers 32 general purpose register
Support 32 circular buffers
Support 8 circular buffers
Support hardware loop
No hardware loop
Comparison
ComparisonDSP Processor features
ADSP 21xx TMS32Cxx
Inputoutput capabilities
4 serial ports 2 link port external port (32bit) can be used with 14 DMA Channels
1 host port external port (32 bit) 2 multi channel buffered serial port used with 16DMA Channels
All DMAs are non-intrusive
All DMAs are intrusive Accomplished by rdquo cycle stealingrdquo
400 Mbytes sec maximum throughput through external memory interface
200Mbytessec maximum throughput through external memory interface400Mbytessec (latest)
Support GLUELESS shared memory multiprocessing
Requires GLUELOGIC for shared memory with other processors
Comparison DSP Processor features
ADSP 21xx TMS32Cxx
Memory 1mega bit on chip RAM (128k bytes on RAM )
frac12 mega bit on chip RAM(72k bytes of on chip memory )
Can store up to 21k instructions
Can store up to 18k instructions
Dual ported on chip memory with unified address space
Only 4k program memory and 4k data cache support parallel access
ComparisonDSP Processor features
ADSP 21xx TMS32Cxx
Programmability Support SIMD programming model which is suited for many type of applications ie Reduced code size
VLIW architecture requires instructions explicitly to program various compute units in the processor ie Larger code size
Easy to write code in assembly as all instruction complete in 1cycle
its not easy to write code in assembly because instructions take multiple cycle to complete It is difficult
WINTERTemplate
APPLICATION OF TMS320CXX
httpwwwanalogcomenprocessors-dspADSP-21xxprocessorsmanualsresourcesindexhtml
httpenwikipediaorgwikiTexas_Instruments_TMS320
BOOKSbullAn introduction to Microcomputers(Volume 2 part B) page( 1895- 1898)by ADAM OSBORNE JERRY KANE
bullDigital Signal ProcessingBy Ifeacher amp jervis (page 873 to 900)
httpwwwticomproducttms320f2812247SEM
httpwwwanalogcomenprocessors-dspadsp-21xxprocessorsindexhtml
ComparisonDSP Processor features
ADSP 21xx TMS32Cxx
Inputoutput capabilities
4 serial ports 2 link port external port (32bit) can be used with 14 DMA Channels
1 host port external port (32 bit) 2 multi channel buffered serial port used with 16DMA Channels
All DMAs are non-intrusive
All DMAs are intrusive Accomplished by rdquo cycle stealingrdquo
400 Mbytes sec maximum throughput through external memory interface
200Mbytessec maximum throughput through external memory interface400Mbytessec (latest)
Support GLUELESS shared memory multiprocessing
Requires GLUELOGIC for shared memory with other processors
Comparison DSP Processor features
ADSP 21xx TMS32Cxx
Memory 1mega bit on chip RAM (128k bytes on RAM )
frac12 mega bit on chip RAM(72k bytes of on chip memory )
Can store up to 21k instructions
Can store up to 18k instructions
Dual ported on chip memory with unified address space
Only 4k program memory and 4k data cache support parallel access
ComparisonDSP Processor features
ADSP 21xx TMS32Cxx
Programmability Support SIMD programming model which is suited for many type of applications ie Reduced code size
VLIW architecture requires instructions explicitly to program various compute units in the processor ie Larger code size
Easy to write code in assembly as all instruction complete in 1cycle
its not easy to write code in assembly because instructions take multiple cycle to complete It is difficult
WINTERTemplate
APPLICATION OF TMS320CXX
httpwwwanalogcomenprocessors-dspADSP-21xxprocessorsmanualsresourcesindexhtml
httpenwikipediaorgwikiTexas_Instruments_TMS320
BOOKSbullAn introduction to Microcomputers(Volume 2 part B) page( 1895- 1898)by ADAM OSBORNE JERRY KANE
bullDigital Signal ProcessingBy Ifeacher amp jervis (page 873 to 900)
httpwwwticomproducttms320f2812247SEM
httpwwwanalogcomenprocessors-dspadsp-21xxprocessorsindexhtml
Comparison DSP Processor features
ADSP 21xx TMS32Cxx
Memory 1mega bit on chip RAM (128k bytes on RAM )
frac12 mega bit on chip RAM(72k bytes of on chip memory )
Can store up to 21k instructions
Can store up to 18k instructions
Dual ported on chip memory with unified address space
Only 4k program memory and 4k data cache support parallel access
ComparisonDSP Processor features
ADSP 21xx TMS32Cxx
Programmability Support SIMD programming model which is suited for many type of applications ie Reduced code size
VLIW architecture requires instructions explicitly to program various compute units in the processor ie Larger code size
Easy to write code in assembly as all instruction complete in 1cycle
its not easy to write code in assembly because instructions take multiple cycle to complete It is difficult
WINTERTemplate
APPLICATION OF TMS320CXX
httpwwwanalogcomenprocessors-dspADSP-21xxprocessorsmanualsresourcesindexhtml
httpenwikipediaorgwikiTexas_Instruments_TMS320
BOOKSbullAn introduction to Microcomputers(Volume 2 part B) page( 1895- 1898)by ADAM OSBORNE JERRY KANE
bullDigital Signal ProcessingBy Ifeacher amp jervis (page 873 to 900)
httpwwwticomproducttms320f2812247SEM
httpwwwanalogcomenprocessors-dspadsp-21xxprocessorsindexhtml
ComparisonDSP Processor features
ADSP 21xx TMS32Cxx
Programmability Support SIMD programming model which is suited for many type of applications ie Reduced code size
VLIW architecture requires instructions explicitly to program various compute units in the processor ie Larger code size
Easy to write code in assembly as all instruction complete in 1cycle
its not easy to write code in assembly because instructions take multiple cycle to complete It is difficult
WINTERTemplate
APPLICATION OF TMS320CXX
httpwwwanalogcomenprocessors-dspADSP-21xxprocessorsmanualsresourcesindexhtml
httpenwikipediaorgwikiTexas_Instruments_TMS320
BOOKSbullAn introduction to Microcomputers(Volume 2 part B) page( 1895- 1898)by ADAM OSBORNE JERRY KANE
bullDigital Signal ProcessingBy Ifeacher amp jervis (page 873 to 900)
httpwwwticomproducttms320f2812247SEM
httpwwwanalogcomenprocessors-dspadsp-21xxprocessorsindexhtml
WINTERTemplate
APPLICATION OF TMS320CXX
httpwwwanalogcomenprocessors-dspADSP-21xxprocessorsmanualsresourcesindexhtml
httpenwikipediaorgwikiTexas_Instruments_TMS320
BOOKSbullAn introduction to Microcomputers(Volume 2 part B) page( 1895- 1898)by ADAM OSBORNE JERRY KANE
bullDigital Signal ProcessingBy Ifeacher amp jervis (page 873 to 900)
httpwwwticomproducttms320f2812247SEM
httpwwwanalogcomenprocessors-dspadsp-21xxprocessorsindexhtml
httpwwwanalogcomenprocessors-dspADSP-21xxprocessorsmanualsresourcesindexhtml
httpenwikipediaorgwikiTexas_Instruments_TMS320
BOOKSbullAn introduction to Microcomputers(Volume 2 part B) page( 1895- 1898)by ADAM OSBORNE JERRY KANE
bullDigital Signal ProcessingBy Ifeacher amp jervis (page 873 to 900)
httpwwwticomproducttms320f2812247SEM
httpwwwanalogcomenprocessors-dspadsp-21xxprocessorsindexhtml
