1. In computing, an arithmetic logic unit (ALU) is a digital
circuit that performs arithmetic and logical operations. The ALU is
a fundamental building block of the central processing unit (CPU)
of a computer, and even the simplest microprocessors contain one
for purposes such as maintaining timers. The processors found
inside modern CPUs and graphics processing units (GPUs) accommodate
very powerful and very complex ALUs; a single component may contain
a number of ALUs. Mathematician John von Neumann proposed the ALU
concept in 1945, when he wrote a report on the foundations for a
new computer called the EDVAC. Research into ALUs remains an
important part of computer science, falling under Arithmetic and
logic structures in the ACM Computing Classification System.
7. The shifting : S1 S0 Operation 0 0 No change 0 1 Parallel
input 1 0 Shift right 1 1 Shift left
8. V1 5 V A3 A2 A1 A0 B3 B2 B1 B0 Ci U2 74LS283N SUM_4 10 SUM_3
13 SUM_1 4 SUM_2 1 C4 9 B411 A412 B315 A314 B22 A23 B16 A15 C07 U1
74LS283N SUM_410 SUM_313 SUM_14 SUM_21 C49 B411 A412 B315 A314 B22
A23 B16 A15 C07 BCD adder sum>9 carry flag The BCD addition of
the input data:
9. BCD SUBTRACTION DECIMA L DIGIT 9s COMPLE MENT 0 9 4 5 The
step as flowing : (a) ADD 9s COMP. OF B TO A (b) IF RESULT > 9,
CORRECT BY ADDING 0110 (c) IF MOST SIGNIFICANT CARRY IS PRODUCED
[i.e. =1] THEN THE RESULT IS POSITIVE AND THE END ARROUND CARRY
MUST BE ADDED. (d) IF MOST SIGNIFICANT CARRY IS 0 [i.e. NO CARRY]
THEN THE RESULT IS NEGATIVE AND WE GET THE 9s COMP. OF THE
RESULT.
15. 5-inverting of in put data: Pass the input data on ((NOT))
gate which Is alogic gate that has one input and one output , the
output is low when the input is high and the output is high when
input is low
16. 6-NANDing of input data: Pass the input data on ((NAND))
gate which Is alogic gate which has 2 input and 1 output and the
out put is low when the two input is high and the rest of the
possibilities of input the out put is low
17. 7-NORing of input data: Pass the input data on ((NOR)) gate
which is a logic gate that Has 2input and 1 out put and the out put
is high only when the two input is low , the rest of the
possibilities of input the out put is low.
18. Comparing of two input data for equality operation:
19. Comparing of two input data for larger than and smaller
than operation :