PROCESS AND DEVICE SIMULATION

OF

NARROW WIDTH EFFECT

IN

SILVACO

SUBMITTED BY:

Prashant singh

OUTLINEIntroductionProcess SimulationDevice SimulationReview :

Normal Narrow Width Effect

Reverse Narrow Width EffectSimulation ResultsReferences

INTRODUCTION Process simulation of field oxide bird’s beak in ATHENA. Interface of the 2D structure from ATHENA to DEVEDIT3D.Structure editing to create 3D MOSFET.Interface of the 3D structure from DEVEDIT3D to ATLAS.Simulation of the Id / Vgs characterstics in ATLAS.Extraction of Vt for change in value of width.

PROCESS SIMULATION

MOSFET Using LOCOS isolation technique.Default models used in ATHENA.

DEVICE SIMULATIONMODELS Used in ATLAS

- SRH Recombination

- CVT Mobility model

- One carrier model

NARROW WIDTH EFFECT

As we are shrinking down device size,

Narrow Width Effect comes into existence in device isolation technique.

LOCOS : Normal Narrow Width Effect.

TRENCH ISOLATION TECHNIQUE : Reverse Narrow Width Effect.

NORMAL NARROW WIDTH MODEL

REVERSE NARROW WIDTH EFFECT

• Athena (Silvaco) used to plot for several values of width.(Continued from next slide)

NARROW WIDTH EFFECT PLOTS

Width = 0.1um Vth = 0.420291V

WIDTH = 0.3umVth = 0.420231 V

WIDTH = 0.55umVth = 0.367652 V

WIDTH = 0.8um Vth = 0.391844V

WIDTH = 1.1um Vth = 0.391484 V

PLOT OF Vth versus WIDTH

Vds = 0.1V

Vgs = 0.1 to 1.5 V (RAMP Vgs With step

size 0.1V)

REFERENCES

TCAD Reference Manual. SILVACO simulated examples.MOSFET modeling and BSIM3 user’s guide by Yuhan

Cheng and chenming hu.

THANK YOU