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This presentation covers: Variation challenges in custom IC design Variation-aware solutions available in the TSMC AMS reference flow Methods to develop and verify designs over PVT corners in less time How to efficiently apply Monte Carlo techniques in design sign-off How Monte Carlo is really possible up to 6-sigma Customer case studies of the above methodsPresenters: - Nigel Bleasdale, Director of Product Management, Solido Design Automation - Jason Chen, Design Methodology and Service Marketing, TSMC
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Click to edit Master title styleVariation Webinar for Optimal Yield in Memory, Analog, & Custom
Digital Design
October 12, 2011
All audio is presented through the telephoneDial-up information is available in your Webinar invitation base on your location
Jason ChenDesign Methodology and Service MarketingTSMC
Nigel BleasdaleDirector of Product ManagementSolido Design Automation
Achieving optimal Yield in Memory, Analog, and Custom Digital Design
Presenters
Copyright Solido Design Automation Inc. All rights reserved
Agenda
• Introductions
• Variation Design Challenges
• TSMC AMS Reference Flow 2.0
• Advanced PVT Flow
• Advanced Monte Carlo Flow
• Customers succeeding with Solido
• Closing comments
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Copyright Solido Design Automation Inc. All rights reserved
Variation ImpactsBecoming critical at smaller process nodes
• Shrinking geometries drive increasing levels of integration with higher levels of variation risk
• 65% of engineers surveyed see variation as their top priority in the next 2 years
Source: 2011 Independent Survey
Copyright Solido Design Automation Inc. All rights reserved
Many Types of Variation to Consider
LayoutDependent
Effects
Environmental
Operational Fabrication
Loading
Global
Local
ImplementationParasitic
DependentEffects
PowerDependent
Effects
Over or underdesign
Increasedvalidation
costs
Lesspredictabil
ity
Design Challenges
Copyright Solido Design Automation Inc. All rights reserved
Agenda
• Introductions
• Variation Design Challenges
• TSMC AMS Reference Flow 2.0
• Advanced PVT Flow
• Advanced Monte Carlo Flow
• Customers succeeding with Solido
• Closing comments
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Copyright Solido Design Automation Inc. All rights reserved
© 2010 TSMC, Ltd© 2010 TSMC, Ltd
TSMC Property
7 TSMC AMS Reference Flow 2.0
Variation-Aware Solutionsin
TSMC Analog and Mixed Signal (AMS) Reference Flow 2.0
Jason Chen
Oct, 2011
© 2010 TSMC, Ltd© 2010 TSMC, Ltd
TSMC Property
TSMC AMS Reference Flow 2.08
Agenda
Design Challenges at Advanced Nodes
General Concepts for Open Innovation PlatformTM (OIP) and AMS Ref 2.0
Advanced Monte Carlo in TSMC AMS Ref 2.0
© 2010 TSMC, Ltd© 2010 TSMC, Ltd
TSMC Property
TSMC AMS Reference Flow 2.09
Design Challenges at Advanced Nodes
The design variations are NOT only from devices/process
Not cost-effective to over budget all variations in design margins
Monte Carlo verification to manage risks in variationsTrade-off between runtime and accuracy
Debugging capability
Physical Effects are more significant in advanced nodesLayout Dependent Effects (LDE), depends upon layout placement
Interconnect RC, depends upon placement & routing
EM/IR drop, depends upon power planning
10
© 2010 TSMC, Ltd© 2010 TSMC, Ltd© 2010 TSMC, Ltd
TSMC AMS Reference Flow 2.0 (2011)10
CustomerInnovations
EDA/IP/ServicePartners
Innovations
TSMCInnovations
Open Innovation PlatformTM (OIP)
OIP
Requirements
ProductTape out
AAA
Earlier Technology Access via Earlier Ecosystem Readiness
11
© 2010 TSMC, Ltd© 2010 TSMC, Ltd© 2010 TSMC, Ltd
TSMC AMS Reference Flow 2.0 (2011)11
Collaboration Optimizes ROID
esig
n In
vest
men
t
OriginalInvestment
Actual Investment
Design Kit
Flow and Methodology
Services
Through Resource Sharing and Early Engagement
Tools, IP
© 2010 TSMC, Ltd© 2010 TSMC, Ltd
TSMC Property
TSMC AMS Reference Flow 2.012
TSMC AMS Ref 2.0 General Concept
Pre-Layout Circuit Schematic
Layout Post-LayoutVerification
DesignConstraints
Circuit Design Spec.Circuit to device level
Mini-Loop
Enables designer to iterate between design spec and layout within mini-loop
Traditional
Real-timeSolver
1. LDE2. RC3. IR/EM
AMS 2.0 Plug-Ins
TSMC PDK & models as foundation
© 2010 TSMC, Ltd© 2010 TSMC, Ltd
TSMC Property
TSMC AMS Reference Flow 2.013
Design-Spec Driven Design Flow
RCX-API SIM-APILDE-API
Design Constraints
(LDE, RC, EM/IR)
Power AwareParasitic Aware
Optimize-API …
1st Physical Layer(Database level)
VariationAnalysis
Circuit Design Spec
2nd API Layer(Interface level)
3rd Application Layer(EDA Tools Application)
LDE Aware ….
Electrical Constraints Physical Constraints
© 2010 TSMC, Ltd© 2010 TSMC, Ltd
TSMC Property
TSMC AMS Reference Flow 2.014
Advanced Monte Carlo Methodology
Analyze
• Find statistical variation problems• Understand root causes of problems• Extract worst case statistical corners
Identify
• Variation-aware design sensitivity• Opportunities for performance, power and area improvement• Set target sigma
Fix
• Reduce variation effects• Improve performance• Reduce power and area
Verify
• Verify the design against target sigma
© 2010 TSMC, Ltd© 2010 TSMC, Ltd
TSMC Property
TSMC AMS Reference Flow 2.015
Applying Advanced Monte Carlo Methodologyin TSMC AMS Ref 2.0
Analyze
Identify
Fix
Verify
Generate 3-sigma corners and locate design sensitivities
Iterated executions to reduce design sensitivities
Verified yield to 3-sigma on “Charge Pump”, 4-sigma on “VCO”, 5-sigma on “Sense Amp” and 6-sigma on “bit cell”
Analyzed low yield with only 46 Monte Carlo samples
© 2010 TSMC, Ltd© 2010 TSMC, Ltd
TSMC Property
TSMC AMS Reference Flow 2.016
TSMC AMS Ref 2.0 Sample Results, after Applying Advanced Monte Carlo Methodology
© 2010 TSMC, Ltd© 2010 TSMC, Ltd
TSMC Property
TSMC AMS Reference Flow 2.017
SummaryThe collaboration between TSMC and Solido is one of the successful examples of TSMC’s Open Innovation Platform
TSMC Analog Mixed-Signal Reference Flow 2.0 provides an alternative solution to the existing traditional design flow
Solido’s solutions of Advanced Monte Carlo and High-Sigma Monte Carlo show better yield and centering results with less Monte Carlo samples
TSMC customers enjoy the benefits with minimized challenges for their designs in advanced nodes
Agenda
• Introductions
• Variation Design Challenges
• TSMC AMS Reference Flow 2.0
• Advanced PVT Flow
• Advanced Monte Carlo Flow
• Customers succeeding with Solido
• Closing comments
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Copyright Solido Design Automation Inc. All rights reserved
The Solido Mission
Established in 2005, Solido is a recognized leader in managing the impact of variations
on design
Solido solutions are used in production
for 130nm to 28nm nodes
Copyright Solido Design Automation Inc. All rights reserved
Solido Products and Partner Integration
Packages
Solido Variation Designer
Spectre/APS HSPICE
Eldo
CustomSim
FineSim
PVT+
ADE (5.1 & 6.1)
AFS
Simulator Independent Interface PDK interface Design & Test Interface
Netlist
TSMC
Monte Carlo+ High-Sigma Monte Carlo+
Future Apps&
Customer Apps
Run Extracted Corners
Run PVT+
Run DesignSense
Run Fast PVT+ (beta)
Run Extracted Corners
Run High Sigma Monte Carlo
Run DesignSense
Run Monte Carlo +
Run Extracted Corners
Run DesignSense
Run Monte Carlo +
Copyright Solido Design Automation Inc. All rights reserved
New App
Customer App
Advanced PVT Solution
Solido Variation Designer
Spectre/APS HSPICE
Eldo
CustomSim
FineSim
PVT+
ADE (5.1 & 6.1)
AFS
Simulator Independent Interface PDK interface Design & Test Interface
Netlist
TSMC
Run Extracted Corners
Run PVT+
Run DesignSense
Run Fast PVT+ (beta)
• 20x faster finding development corners
• 8X faster for full corner verification
• Any failing corners are found even faster
• 30% reduction in design debug time
• Manage a history of design changes
Copyright Solido Design Automation Inc. All rights reserved
Advanced PVT Sub-FlowTSMC AMS Reference Flow 2.0
• Advanced PVT overcomes key drawbacks of traditional PVT analysis, providing:– More coverage with fewer simulations– Awareness of environmental variable sensitivity– Key design variable contributions to PVT variation– 30% less time to debug and fix PVT problems
• Advanced PVT includes the following technologies:– Design of Experiments: Orthogonal, Fractional, or Sweep– Sensitivity analysis across worst-case corners– Insights into optimal design changes– Full interactive control
Copyright Solido Design Automation Inc. All rights reserved
Analyze
Identify
Fix
Advanced PVT Sub-FlowOverview
Run CornersUsing DoE
Save Worst-CaseCorners (WCC)
Run sensitivity across WCC Update design
x
xo
o
InitialUpdated
Managedesign changes
Validate acrossall Corners
Explore designs over WCCCopyright Solido Design Automation Inc. All rights reserved
Advanced PVT Sub-FlowNew – Automated Fast PVT Analysis
• New PVT solution since AMS 2.0 release
• Corner extraction for design debug– Automated DOE based solution to quickly find design specific
representative corners for development– Very quickly explores across all corner combinations
• Design Verification– Runs only the simulations needed to verify the design– Fast verification with auto-stop
• Optional stopping criteria: Simulation limit, time limit, margin limit
• All methods take advantage of LSF and SGE
Copyright Solido Design Automation Inc. All rights reserved
Video Demonstration of Fast-PVT
Video
Copyright Solido Design Automation Inc. All rights reserved
Advanced PVT Sub-FlowWith Solido Variation Designer
Variation Designer Platform(Simulator independent)
Solido PVT+ Package
Run PVT+
Run DesignSense
Run Extracted Corners
Analyze
Identify
VerifyRun PVT+
Fix
TSMC 28nm PDK
High Yield Designs
Benefits to TSMC 28nm Reference Flow
Found failing corners 3x faster
Efficiently find worse-case corners for design debug
Suggested most probable design changes
PVT Sensitivity
Design Sensitivity Centered design and validated over all corners
Improved design performance By 40%
Solido’s advanced PVT analysis brings cornerdebug earlier in the design flow, reducing
late stage verification failures
Copyright Solido Design Automation Inc. All rights reserved
Agenda
• Introductions
• Variation Design Challenges
• TSMC AMS Reference Flow 2.0
• Advanced PVT Flow
• Advanced Monte Carlo Flow
• Customers succeeding with Solido
• Closing comments
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Copyright Solido Design Automation Inc. All rights reserved
Monte Carlo+
Run Extracted Corners
Run DesignSense
Run Monte Carlo +
Advanced Monte Carlo Solution
Solido Variation Designer
Spectre/APS HSPICE
Eldo
CustomSim
FineSim
ADE (5.1 & 6.1)
AFS
Simulator Independent Interface PDK interface Design & Test Interface
Netlist
TSMC
Monte Carlo+
Run Extracted Corners
Run DesignSense
Run Monte Carlo +
• Quality-driven analysis
• 3X faster convergence to target yield with OSS
• Generate 3-sigma corners
• 30% reduction in design debug time
• Manage a history of design changes
Copyright Solido Design Automation Inc. All rights reserved
Advanced Monte Carlo Sub-FlowTSMC AMS Reference Flow 2.0
• Advanced Monte Carlo overcomes key drawbacks of traditional Monte Carlo analysis, providing:– Fewer simulations– Accurate, defendable results– Guidance to debug or fix variation problems
• Advanced Monte Carlo includes these technologies:– Accuracy-aware Monte Carlo– Optimal Spread Sampling +LHS and regular MC– Statistical corner extraction– Statistical impact analysis– DesignSense variation-aware sensitivity analysis
Copyright Solido Design Automation Inc. All rights reserved
High-Sigma Monte Carlo+
Run Extracted Corners
Run High Sigma Monte Carlo
Run DesignSense
Run Monte Carlo +
High Sigma Monte Carlo SolutionFast, Accurate, Scalable and Verifiable
Solido Variation Designer
Spectre/APS HSPICE
Eldo
CustomSim
FineSim
ADE (5.1 & 6.1)
AFS
Simulator Independent Interface PDK interface Design & Test Interface
Netlist
TSMC
• Runs Monte Carlo up to 5 billion samples
• >1,000,000 times faster than Monte Carlo at 6σ
• Spice accurate verification
• Scalable up to 1000 variables
• Includes auto-stop and visual verification
High-Sigma Monte Carlo+
Run Extracted Corners
Run High Sigma Monte Carlo
Run DesignSense
Run Monte Carlo +
Copyright Solido Design Automation Inc. All rights reserved
Advanced Monte Carlo Sub-Flow4, 5, and 6-sigma verification
• High Sigma Monte Carlo, addresses the requirement to be Fast, Accurate, Scalable, and Verifiable:– 6-sigma verification (5B samples) in several hours
• Reduced to minutes in next release– Scales better than other High-Sigma solution to 100s of variables– Visual verification of the complete flow
• Advanced Monte Carlo includes these technologies:– Intelligent algorithm to focus attention only on the tails of the
statistical distribution– Very efficient distributed simulation across LSF or SGE– QQ plot visualization of results– Multi-thread and multi-machine being added to core engine in
next release
Copyright Solido Design Automation Inc. All rights reserved
Video Demonstration of High-sigma MC
Video
Copyright Solido Design Automation Inc. All rights reserved
Advanced Monte Carlo Sub-FlowWith Solido Variation Designer
Variation Designer Platform(Simulator independent)
Solido MC+ and HSMC+ Package
Run DesignSense
Run Extracted Corners
Analyze
Identify
Verify
Run Monte Carlo+
Fix
Run High-Sigma Monte
Carlo+
TSMC 28nm PDK
High Yield Designs
Benefits to TSMC 28nm Reference Flow
Validated low yield on Charge PumpAuto-stops in 46 samples
Generated true 3-sigma corners
Suggested most probable design changes
Improved, and verified Charge Pump yield
From 68% to 99%
Tightened Charge Pump variation By 50%
Validated VCO to 4-sigma200x faster than Monte
Carlo
Validated Sense Amp to 5-sigma50,000x faster Monte Carlo
Validated bitcell to 6-sigma1,666,667x faster than Monte Carlo
Solido Variation Designer makes Monte Carlo
analysis viable in design analysis and verification
Run Monte Carlo+
Run High-Sigma Monte
Carlo+
Copyright Solido Design Automation Inc. All rights reserved
Agenda
• Introductions
• Variation Design Challenges
• TSMC AMS Reference Flow 2.0
• Advanced PVT Flow
• Advanced Monte Carlo Flow
• Customers succeeding with Solido
• Closing comments
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Copyright Solido Design Automation Inc. All rights reserved
Customer Case Study #1 - 28nmQualcomm: HSPICE Statistical Simulation for Memory
Design goals• 28nm LP process• Verify write to 5.8
sigma• Validate Vccmin
operation
Solution• HSPICE• Variation Designer• 100 cpu LSF cluster
Mohamed Abu-RahmaMemory Design Group, Qualcomm Incorporated
Copyright Solido Design Automation Inc. All rights reserved
Full video: http://www.synopsys.com/Tools/Verification/AMSVerification/Pages/DAC2011-AMS-Video.aspx?cmp=VDAC2011AMS-AMS-HL
Customer Case Study #2 - 28nm NVIDIA
Design goals• 28nm process• Verify memory to
6-sigma• Verify standard cells
to >4-sigma• PLL verification pre
and post layout• Power-analysis
across 1000s of corners
Solution• HSPICE• Variation Designer• >200 cpu LSF cluster
Ting KuNVIDIA Corporation
Full article: http://www.deepchip.com/items/0492-10.htmlCopyright Solido Design Automation Inc. All rights reserved
Customer Case Study #3 - 65nm Hauwei-HiSilicon
Corner analysis1. Design over 45 corners (5 process x 3 voltage x 3 temperature)
2. We used Solido's PVT+ DoE to narrow the 45 corners to our 8 worst corners.
3. Found and extracted 4 failing corners
4. Solido's sensitivity analysis suggested fixes to adjust two transistor lengths. After making the changes, we re-ran the simulations across the 4 failing corners. The design now passed spec.
5. We ran a final check with Solido PVT+ across all 45 corners. It passed specs at all the corner conditions.
Statistical analysis
Solido made measuring non-linearity at 3-sigma practical.
Design goals• 65nm process• Validate design across
45 corners • Validate designs to
3-sigma• Reduce debug time• Validate DAC non-
linearity over statistical variations
Solution• Spectre/APS• Virtuoso ADE• Variation Designer
Op-amp DACMC+ initial sims 40
(75x saving)n/a
# of extracted corners 2 2# of devices fixed 2 n/aMC+ sims for final 3-sigma verification 2 2
2x saving Not possiblew/o Solido
Jun ChenHuawei-HiSilicon
Copyright Solido Design Automation Inc. All rights reserved
Full article: http://www.deepchip.com/items/0492-05.html
Agenda
• Introductions
• Variation Design Challenges
• TSMC AMS Reference Flow 2.0
• Advanced PVT Flow
• Advanced Monte Carlo Flow
• Customers succeeding with Solido
• Closing comments
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Copyright Solido Design Automation Inc. All rights reserved
Variation Analysis is a Collaborative Effort
CUSTOMER
PDKs130nm-28nm
Variation Designer+ Apps
Variation Challeng
es
EDA Partners
Copyright Solido Design Automation Inc. All rights reserved
Customer Solution
A Collaborative SolutionAddressing Layout Dependent Effects at 28nm
Flow presentation at TSMC’s Open Innovation Platform,October 18th at the San Jose Convention Center
Copyright Solido Design Automation Inc. All rights reserved