Computer Organization Section 4.3, Chapter 5 Sections 6.1 – 6.2 (Optional)

Computer Organization

Section 4.3, Chapter 5 Sections 6.1 – 6.2 (Optional)

Exactly What IS a Computer?

• Processor

• Memory

• I/O

Structure that Works

Complex systems have hierarchical structure.

• We observe this in the physical world.

• Artificial systems need it in order to “work”.

Tempus and Hora

1000 parts in a watch

Tempus and Hora

Hora

Tempus

1 assemply; 1000 partsProb(no interrupt) = (1 – p)1000

Cost/interrupt = t * (1/p)

p = probability of interruptiont = time to add one part

111 assemblies; 10 parts eachProb(no interrupt) = (1 – p)10

Cost/interrupt = t * 5

Tempus and Hora

Hora

Tempus

1 assemply; 1000 partsProb(no interrupt) = (.99)1000 = 44 * 10-6 Cost/interrupt = t * 500

p = .01t = time to add one part

111 assemblies; 10 parts eachProb(no interrupt) = (.99)10 = .9 Cost/interrupt = t * 5

It will take Tempus 4,000 times as long to build one watch as it takes Hora.

The Main Components

Data Bus

Memory(RAM) Central

ProcessingUnit (CPU) Secondary

Storage

Input/OutputI/O

Main Memory

22 6F B2 1E 24 E6 07 5C 12 76 84 70 33 68 FD 3C

56 09 40 77 89 4A B5 42 61 04 AA 5E AB 43 71 1C

70 DF 32 2D

40 1F 69 C0 8A 7C 0F E9 90 9D 39 2E

4D 1F 60 9A 09 7D 10 4C 93 6F 81 B5 6A 9F 0A 1C

0

4

8

C

Word addressing

96 1A 89 AC

71 52 0C F3 8B 81 B2 D1 65 04 A5 18F8B

Main Memory

22 6F B2 1E 24 E6 07 5C 12 76 84 70 33 68 FD 3C

56 09 40 77 89 4A B5 42 61 04 AA 5E AB 43 71 1C

70 DF 32 2D

40 1F 69 C0 8A 7C 0F E9 90 9D 39 2E

4D 1F 60 9A 09 7D 10 4C 93 6F 81 B5 6A 9F 0A 1C

0

10

20

30

Byte addressing

96 1A 89 AC

71 52 0C F3 8B 81 B2 D1 65 04 A5 183E2C

Address Spaces• Let’s say we have a 16GB memory.

• That’s 24 (16) * 230 (giga) = 234 bytes.

• To specify that many addresses, we need 34 bits. Oops, more than a whole word.

• Possible solutions:• Use 64 bit words.• Use hierarchical address definitions.

Hierarchical Addresses

The Main Components

Data Bus

Memory(RAM) Central

ProcessingUnit (CPU) Secondary

Storage

Input/OutputI/O

Processor Chips

Transistors

The Intel® Core 2 Duo processor has 291 million transistors, more than 10,000 times as many transistors as the Intel 8088 CPU in the first IBM PC which had only 29,000 transistors.

Moore’s Law

http://computer.howstuffworks.com/moores-law.htmhttp://www.intel.com/pressroom/kits/events/moores_law_40th/index.htm

Transistors in Intel Processors

How It Has Happened

The Old Way

ENIAC 1945

The Stored Program Concept

22 6F B2 1E 24 E6 07 5C 12 76 84 70 33 68 FD 3C

56 09 40 77 89 4A B5 42 61 04 AA 5E AB 43 71 1C

70 DF 32 2D

40 1F 69 C0 8A 7C 0F E9 90 9D 39 2E

4D 1F 60 9A 09 7D 10 4C 93 6F 81 B5 6A 9F 0A 1C

0

10

20

30

Operation code: 40Memory address: 1F69C0

When Do Things Happen?

1. Fetch next instruction2. Increment program counter3. Decode instruction4. ? Fetch additional data5. Execute

When Do Things Happen?

1. Fetch next instruction2. Increment program counter3. Decode instruction4. ? Fetch additional data5. Execute

When Do Things Happen?

1. Fetch next instruction2. Increment program counter3. Decode instruction4. ? Fetch additional data5. Execute

When Do Things Happen?

1. Fetch next instruction2. Increment program counter3. Decode instruction4. ? Fetch additional data5. Execute

The Computer’s Clock

from time import clock

def clock_it(n): for i in range(n): rand = clock() print(rand)

Let’s watch the clock on this machine:

Clock Speed

Clock Speeds

Intel® Core™ i3 - 370M processor (2.40GHz )

Apple Mac Book Pro

Intel® Core™ i7 970 Processor (6x 3.20GHz/12MB L3 Cache)

2011 Pallidin F

2.53 GHz

4Q 2012: Intel® Core™ i7 3970X Processor (6x 3.250GHz/15MB L3 Cache)

What’s Going on Here?

Parallelism

Pipelining

• Fill two cups of Diet Coke

• Build a housing development

• Can you think of more?

Pipelining

• Fill two cups of Diet Coke

• Build a housing development

• Laundry

Pipelining

• Bottlenecks

We can solve this problem by adding a new kind of parallelism.

Adding Them Up

7621

80

72

28

67

94

19

9

Single Instruction Stream Multiple Data Stream (SIMD)

• Add numbers

• Process insurance claims

• Rowing

SIMD to Funnel

• UT admissions

SIMD in Football

• A quilt of blocks

Increasing Parallelism in SIMD

Problem: Bottlenecks

Eliminating Bottlenecks

• Solution: Add more processors.

• Benefit: Faster throughput at peak times.

• Cost:

The Essential SIMD Property

The Main Components

Data Bus

Memory(RAM) Central

ProcessingUnit (CPU) Secondary

Storage

Input/OutputI/O

How Much Data Storage for Facebook?People share more than 2.5 billion pieces of content on Facebook each day (August, 2012).

At least 60,000 in 6/2010

How Much Data Storage for Facebook?People share more than 30 billion pieces of content on Facebook each month.

Data Centers Slurp Up Power

http://gizmodo.com/5880804/facebooks-oregon-data-center-uses-as-much-power-as-the-entire-county

Memory Hierarchy

The Beer Model

1) Glass

The Beer Model

1) Glass2) Cooler

The Beer Model

1) Glass2) Cooler3) Refrigerator

The Beer Model

1) Glass2) Cooler3) Refrigerator4) Grocery Store

Memory Hierarchy