Crystal Growth of III/V Semiconductor Nanowires Kobi Greenberg

Crystal Growth of III/V Semiconductor Nanowires

Kobi Greenberg

Metal organic molecular beam epitaxy (MOMBE)

Future applications of nanowires

Martensson et al

Nanowire LED

Maarten et al

Single photon emitter

Algra et al

Crystal structure engineering

Nanowires as a Biological Interface

Mårtensson et al

The vapor liquid solid growth mechanism

TMI

420oC

In

P2Au catalyst

InP

TEM pictures of InP nanowires grown in our lab by the vapor liquid solid method

ZB

WZ

Au

InP

Two ways to arrange cannon ballsCubic structureHexagonal structure

Stacking fault formation

A

B

C

A

B

C

A

B

A

B

A

B

Zincblende nanowire Wurzite nanowireWurzite nanowire

With stacking fault

A

B

C

B

A

B

SF

Limitations of the vapor liquid solid method

• Difficult to eliminate stacking fault • Very sensitive to wafer surface effects

Calahorra, Greenberg et al. nanotechnology 2012

TMI 420oC

In

P2Au catalyst

InP

The selective area vapor liquid solid growth method

Si3N4

Dalacu et al, Nanotechnology 2009

Au catalyst

TMI

420oC

P2

TEM pictures of InP nanowires grown in our lab by selective area vapor liquid solid method: no stacking faults

Advantages of the selective area vapor liquid solid method

• Easy to eliminate stacking fault in InP nanowires

• not sensitive to wafer surface effects

• Predictable growth rate

Si3N4

Au catalyst

TMI420oC

P2

Fabrication

Wafer cleaning

Si3N4 deposition

Electron sensitive resist coating

Electron beam lithography + development+ BOE

InP<111>B substrate

Gold evaporation

Lift off

nanowire heterostuctures: important for device applications

• conventional layers of materials having different lattice constant cannot be grown on top of each other as single crystals.

• Due to their small dimensions, a stack of materials with different lattice constants can be grown as a single crystal

GaP

InGaP

Heterostructure analysis by EDX and STEM HAADF

1

2

3

1

2

33

Summary

• Selective area vapor liquid solid is the method of choice for defect free nanowire growth.

• Heterostructures of InP and GaP having 7.7% lattice mismatch were demonstrated.

• Method will be implemented for other materials such as GaAs, GaP,InAs and their heterostuctures.