Development of Ge JFETs for Deep-Cryogenic Preamplifiers SPIE - Astronomical Telescopes and...

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R. R. Ward and R. K. Kirschman GPD Optoelectronics Corp., Salem, New Hampshire, U.S.A. M. D. Jhabvala NASA Goddard Space Flight Center, Greenbelt, Maryland, U.S.A. R. S. Babu Ball Aerospace & Technologies Corp., Boulder, Colorado, U.S.A. D. V. Camin and V. Grassi Physics Department of the University and INFN, Milan, Italy

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Development of Ge JFETsfor

Deep-Cryogenic Preamplifiers

SPIE - Astronomical Telescopes and Instrumentation

Hawai’i, August 2002

R. R. Ward and R. K. KirschmanGPD Optoelectronics Corp., Salem, New Hampshire, U.S.A.

M. D. JhabvalaNASA Goddard Space Flight Center, Greenbelt, Maryland, U.S.A.

R. S. BabuBall Aerospace & Technologies Corp., Boulder, Colorado, U.S.A.

D. V. Camin and V. GrassiPhysics Department of the University and INFN, Milan, Italy

ASTRO-E Preamp Assembly

~1.2 K

~120 K

~18 K

The Problem

• Sensor at ~1 K, Preamplifier at ~100 K

• Long Wires– Parasitic capacitance and resistance– Microphonics– EMI pickup

• Heat Transfer to Sensor

• Extra Power

• Mechanical Complexity

A Solution

• A Transistor That Can Operate at ~1 K

A Solution

• A Transistor That Can Operate at ~1 K

• We Proposed the Ge JFET (Junction Field-Effect Transistor)

Technical Goals for Ge JFETs

• Operate at Any Temperature, ~1 – 300 K

• Very Low Low-Frequency Noise– Equal to best Si JFETs at optimum temp (~120 K)

• High Input Resistance/Low Input Current

• Tailorable Input Capacitance

• Low Power

• Integrable

• Available, Standard and Custom

Why Ge?

• Ge JFETs Operate Well to Lowest Temperatures (~1 K)

• Both n-Channel and p-Channel JFETs

• Texas Instruments Ge JFET

• Ge Is an Elemental Semiconductor

• Ge Technology Is Sufficiently Developed

S Gf D

N Epitaxial LayerP+ ImplantN+ Implant

Gb

P+ Ge Substrate

Passivation

Au-Sb Ti-Au

Backside Metalization (Au)

Ge JFET Cross-Section (n-channel)

~1 mm

Ge JFETs

Conduction vs Temperature

0

0.5

1

1.5

2

2.5

3

3.5

0 50 100 150 200 250 300

Temperature, T (K)

Si JFET (U310)

Si JFET (2N4416)

I (300)dss

dss

I (T)

Conduction vs Temperature

0

0.5

1

1.5

2

2.5

3

3.5

0 50 100 150 200 250 300

Temperature, T (K)

Si JFET (U310)

Si JFET (2N4416)

I (300)dss

dss

I (T)

Ge JFET, Vds = 0.5 V

Conduction vs Temperature

0

0.5

1

1.5

2

2.5

3

3.5

0 50 100 150 200 250 300

Temperature, T (K)

Si JFET (U310)

Ge JFET, Vds = 1.0 V

Si JFET (2N4416)

I (300)dss

dss

I (T)

Ge JFET, Vds = 0.5 V

DC Characteristics

DC Characteristics - 4 K

0

2

4

6

8

10

12

0 1 2 3 4 5

Drain-source voltage, Vds (V)

Vgs = 0 V

Vgs = -1.0 V

DC Characteristics

0

2

4

6

8

10

-2 -1.5 -1 -0.5 0 0.5

Gate-source voltage, Vgs (V)

300 K

77 K

4 K

10-13

10-11

10-9

10-7

10-5

10-3

10-1

-10 -8 -6 -4 -2 0

Gate-source voltage, Vgs (V)

Ig, 77 & 4 KId, 77 K

Ig, 300 K

Id, 4 KId, 300 K

DC Characteristics

Noise Characteristics

Noise Voltage - 77 K

1

10

100

1000

1 10 100 1000 104 105

Frequency (Hz)

518B, 520B, 807B, 809B

Id = 330 uA, Vds = 1.2 V

Noise Voltage vs Power - 77 K

1

10

100

1 10 100 1000 104 105

Frequency (Hz)

A54G 77 K

1.2 V x 17 uA (20 uW)

1.2 V x 1 mA (1.2 mW)

1.2 V x 330 uA (400 uW)

1

10

100

10 100 1000

10 100 1000

1 Hz

1, 10, 100 kHz

100 Hz

10 Hz

Power (ID x 1.2 V) (uW)

ID-1/4

Drain current, ID (uA)

Noise Voltage vs Power - 77 K

1

10

100

1000

1 10 100 1000 104 105

Frequency (Hz)

40 K

24 K

Noise Voltage vs Temperature

1

10

100

1000

0 50 100 150 200

Temperature (K)

100 kHz

1 Hz

100 Hz1 kHz

10 Hz

10 kHz

Noise Voltage vs Temperature

Noise Voltage - 4 K

1

10

100

1000

1 10 100 1000 104 105

Frequency (Hz)

n-channel

p-channel

Summary

• Successfully Fabricated Ge JFETs, n- and p-Channel

• Provided Evaluation Ge JFETs to Potential Users

• DC Characteristics Good at All Temperatures down to 4 K

• Turn-On Threshold at 4 K (T<~20 K)

• Achieved Low Noise down to ~30 K

• Noise Higher than Desired at 4 K

Plans

• Adjust Parameters to Extend Low Noise to ~1 K

• Reduce Noise at All Cryogenic Temperatures– Match that of Si JFETs at higher temperature

• For Both n- and p-Channel

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