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Standard Ethernet for Real-Time Industrial Application
IEEE1588 Precision Time Protocol
T3LAB Bologna -13 Dicembre 2012
2
Agenda
Industrial EthernetStandard Ethernet in real-time industrial applicationsSwitched Ethernet IEEE 1588 PTP Protocol IEEE 1588 PTP Implementation issuesVirtual LAN applicationsPTP Network Demo
3
Industrial Ethernet (IE)
Use of the Ethernet family of computer network technologies in an industrial environment, for automation and process controlAdapt Ethernet for the needs of industrial processes, which require real time behaviorUse of standard router, switches, hub, ecc.. InteroperabilityInnovation: high data rate up to 1Gbit/s
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Industrial Ethernet: Fieldbus Overview
ProfinetEthernet/IPSercos IIIPowerlink (B&R)Modbus TCPEtherCAT (BeckHOFF)Switched EthernetPlain Ethernet
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Industrial Ethernet structures
6
Industrial Ethernet applications
IE Fieldbus
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IE – World Market (IMS Research)Strength of Ethernet TCP/IP, the 'standard' form of Ethernet
World market shares for Industrial Ethernet components
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Standard & Switched Ethernet
TCP/IP ProtocolPTP ProtocolSTP/RSTP ProtocolVLAN SupportGigabit EthernetSpecialized Ethernet HW
Managed switches
Redundant topologiesPower over Ethernet (PoE)
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Switched Ethernet architecturePredictible performance
Standardization
QoS feature
Broadcast & Multicast
Network analyzers
Latency increase with number of cascading nodes
IEEE 1588 HW timestamp
RSTP support
Gigabit Ethernet
Security with VLAN
Diagnostics (port status, amount of traffic)
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IEEE 1588: Standard for a Precision Clock Synchronization Protocol
Distribution of frequency and time over a packet network
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Time synchronization in distributed system
To coordinate measurement instant (sampling, triggering)To measure time intervals (and to calculate derived quantities)As a reference to determine the order of eventsAs a basis for the execution of coordinated actions (time based behavior)– Scheduled execution of scripts– Coordinate actuators
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Time synchronization is required
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Why is necessary?
Oscillator tolerance (PPM)– Typical ±50,±100 PPM
100 PPM of deviation → 100usec/sec → 8,5sec/1days
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How to provide common time base?
Message-based: actions are triggered by the reception of a message (Profibus)Cyclic: a periodic timing is made possible by a cyclic communication protocol (SERCOS, Powerlink)Time-based: system time is provided by a synchronized clock implemented in every node– SNTP
– IEEE1588: high accuracy for Networked measurements and control systems
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Typical application of synchronized clock
Automation and control systemsMeasurement and automatic test systemsPower generation, transmission and distribution systemsTelecommunication
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Automation and control systems
Application of IEEE 1588 by different organization proposing Real Time Ethernet– Ethernet Powerlink (B&R)
– EtherCAT (BECKHOFF)
– Profinet (Siemens)
Real time applications– Time stamping
– Cyclic operation
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IEEE 1588 over UDP
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Protocol time – one step
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Protocol time – two step
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PTP delay & offset
MS_difference = t2 – t1 = offset + MS_delay
SM_difference = t4 – t3 = -offset + SM_delay
MS_difference = offset + MS_DelaySM_difference = -offset + SM_delay
MS_Delay = SM_Delay = one_way_delay
Offset = (MS_difference - SM_difference)/2one_way_delay = (MS_difference + SM_difference)/2
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PTP observed drift
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IEEE 1588 Message Format
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Timestamp point
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Accurate timestamp
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Influence of timestamp point
Messages generate and received by PTP are delayed in an unpredictable way
– Scheduling– Limited resource of CPU– Interrupt latency
Constant and varying delay components– Transit delay– Jitter
Delay effect can be bypassed with HW timestamp support
26
Source of delay and JitterExample: 100Mbps Ethernet
– Cable• 560 ns delay per 100m
– Hub• 500 ns delay, jitter about 50 ns
– Switch• Cut-through: minimal delay 1,12 us• Store-and-forward: proportional to frame length
– 5,7..122usec – Router
• Greater than Switch
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IEEE 1588 Multicast Messages
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Optional improvements
Fast synch interval at startp-up or re-synch– Speed-up the time of convergence
– Non standard
Unicast PTP Messages– Unicast message negoziation (optional in IEEE1588
v2 standard)
– Limit network traffic
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PTP Network Topologies
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Boundary clock
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Transparent clock
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Transparent clock: Correction Field
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IEEE 1588 Implementation
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Software Only Implementation
Linux PTPd (source code available)
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PTPd2 details
No hardware time stamping supportLinux kernel space timestamp – (SO_TIMESTAMP )
Advanced clock-servo
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PTPd2 source code
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Portable PTP software architecture(I)
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Portable PTP software architecture (II)
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PTP Implementation with IEEE1588 HW
IEEE1588 Managed Ethernet layer2 switch
DSP/uPC/uC with IEEE1588 MAC
Freescale Kinetis K60 K70 and X Family
Freescale i.MX51
STM32
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Hardware timestamp capture
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T3LAB – PTP Porting KITBased on ptpd2 source code
Several port has been developed and validated– Different uC/uPC/DSP
– Different TCP/IP stack
– Different OS (also uC without OS)
– Different Network Interface Driver
– API for Ethernet micro-switch
• With IEEE1588 hardware support (Micrel KSZ8463)
• Without hardware support (Micrel KSZ8895)
– Use of VLAN technologies to improve PTP synchronization accuracy
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Port: TI DSP / KSZ8895
TI DSPNDK
PTP SW
PTP ClockFPGA
SwitchKSZ8895
PTPd porting for DaVinci DSP with DSPBios OSNetwork Interface improvements (timestamp)FPGA HW implementation of PTP clockDriver for KSZ8895
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Port: Beagle Board/KSZ8463
SPI HW interface for KSZ8463 eval board SPI driver for Linux 2.6Configuration API for KSZ8463PTP software modification (HW timestamp of KSZ8463 )
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Port: STR9 uC/KSZ8463
SPI HW InterfacePTP porting (network layer modification)Configuration API for KSZ8463PTP software modification ( HW timestamp of KSZ8463)
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Heterogeneous network topologiesIEEE 1588 interoperability
MARVEL
KSZ8895
EVMDM6437
KSZ8463
BeagleBoard
KSZ8463
BeagleBoard
CISCO
Linux PCPTP MasterWebserver
Linux PCBrowser
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Embedded switch with prioritization The switch maintains a separate queue per priority
Messages containing time information can be sent with highest priority
If highest priority traffic is moderate (e.g. exclusively caused by PTP) contention is very unlikely
If the transmission of a low priority frame is in progress, the high priority frame has to wait until the medium is free again (worst case: 122us in a 100Mbps Ethernet)
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802.1p VLAN Priority MappingUser priority (setsockopt)
802.1p prioriy (sw priority mapping)
Switch priority queues
0 0 01 1 02 2 13 3 14 4 25 5 26 6 37 7 3
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VLAN Tag/Untag example
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VLAN - Sample application
Clock synchronization via PTP IEEE1588 Tagged VLAN traffic (802.1q)Measure of packet crossing time and packet loss(first-last node)
High and low priority VLAN Ethernet trafficReal-time and PTP traffic with high priority VLAN tagBest effort traffic with low priority VLAN tag
12 nodesMTU = 1500Byte100 Mbit/secThop = 120usecTtot = 1440usec
VLAN Traffic-low prio-high prio
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PTP Network Demo (Courtesy of Datalogic Automation )
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Switched Network topologies
TI DaVinci DSP with DSPBios OS NDK TCP/IP stackFPGA for PTP ClockManaged KSZ8895 Ethernet switchDaisy chain and ring topologiesPC base application– PTP and VLAN validation
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PTP Network Demo
PTP Performance issues– CPU load
– PTP task scheduling
– Network traffic (vlan traffic increase performance)
– PTP Synch message interval (1/8,1/4,1,2 sec)
– Clock-servo parameters• Filter
• PI controller
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alpha = 1/2^Sy[1] = x[0]y[n] = alpha * x[n-1] + (1-alpha) * y[n-1]
13
57
911
1315
1719
2123
2527
2931
3335
3739
4143
4547
4951
5355
5759
6163
6567
6971
7375
7779
8183
8587
8991
9395
9799
-600000
-500000
-400000
-300000
-200000
-100000
0
100000
200000
300000
400000
Network Offset From Master (S = 1)
Test0-192.168.1.10Test0-192.168.1.11Test0-192.168.1.17Test0-192.168.1.2Test0-192.168.1.3Test0-192.168.1.4Test0-192.168.1.5Test0-192.168.1.6Test0-192.168.1.7Test0-192.168.1.8Test0-192.168.1.9
[ns]
Clock Servo parameters offset from master filter (I)
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Clock Servo parameters offset from master filter (II)
13
57
911
1315
1719
2123
2527
2931
3335
3739
4143
4547
4951
5355
5759
6163
6567
6971
7375
7779
8183
8587
8991
9395
9799
-600000
-500000
-400000
-300000
-200000
-100000
0
100000
200000
300000
400000
Network Offset From Master (S=4, Ap=1000, Ai=5)
Test4-192.168.1.10Test4-192.168.1.11Test4-192.168.1.17Test4-192.168.1.2Test4-192.168.1.3Test4-192.168.1.4Test4-192.168.1.5Test4-192.168.1.6Test4-192.168.1.7Test4-192.168.1.8Test4-192.168.1.9
[ns]
55
Clock Servo parameters: PI controller
ptpClock->observedDrift += offsetNorm / ptpClock->servo.ai;adj = offsetNorm / ptpClock->servo.ap + ptpClock->observedDrift;
13
57
911
1315
1719
2123
2527
2931
3335
3739
4143
4547
4951
5355
5759
6163
6567
6971
7375
7779
8183
8587
8991
9395
9799
-600000
-500000
-400000
-300000
-200000
-100000
0
100000
200000
300000
400000
Network Offset From Master (S=4, Ai =1000,Ap=10)
Test8-192.168.1.10Test8-192.168.1.11Test8-192.168.1.17Test8-192.168.1.2Test8-192.168.1.3Test8-192.168.1.4Test8-192.168.1.5Test8-192.168.1.6Test8-192.168.1.7Test8-192.168.1.8Test8-192.168.1.9
[ns]
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Clock Servo Tuning
1 6121 41 81 1016
1116 26
3136 46
5156 66
7176 86
9196 106
111116
121126
131136
141146
151156
161166
171176
181186
191196
201206
211216
221226
231236
241246
251
-300000
-200000
-100000
0
100000
200000
300000
Clock Servo Parameters Comparison
S=1, Ai=1000,Ap=5S=4, Ai=1000,Ap=5S=4, Ai=1000,Ap=10
Off
set F
rom
Mas
ter
[ns]
57
Giuseppe Merendinowww.t3lab.it
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